diff --git a/build_debian.sh b/build_debian.sh
index b4384113a114..1010fbc26e0f 100755
--- a/build_debian.sh
+++ b/build_debian.sh
@@ -29,7 +29,7 @@
set -x -e
## docker engine version (with platform)
-DOCKER_VERSION=1.11.1-0~stretch_amd64
+DOCKER_VERSION=5:18.09.0~3-0~debian-stretch
LINUX_KERNEL_VERSION=4.9.0-8
## Working directory to prepare the file system
@@ -63,6 +63,11 @@ mkdir -p $FILESYSTEM_ROOT/$PLATFORM_DIR
mkdir -p $FILESYSTEM_ROOT/$PLATFORM_DIR/x86_64-grub
touch $FILESYSTEM_ROOT/$PLATFORM_DIR/firsttime
+## make / as a mountpoint in chroot env, needed by dockerd
+pushd $FILESYSTEM_ROOT
+sudo mount --bind . .
+popd
+
## Build a basic Debian system by debootstrap
echo '[INFO] Debootstrap...'
sudo http_proxy=$http_proxy debootstrap --variant=minbase --arch amd64 stretch $FILESYSTEM_ROOT http://debian-archive.trafficmanager.net/debian
@@ -159,12 +164,19 @@ echo '[INFO] Install docker'
## Install apparmor utils since they're missing and apparmor is enabled in the kernel
## Otherwise Docker will fail to start
sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install apparmor
-docker_deb_url=https://apt.dockerproject.org/repo/pool/main/d/docker-engine/docker-engine_${DOCKER_VERSION}.deb
-docker_deb_temp=`mktemp`
-trap_push "rm -f $docker_deb_temp"
-wget $docker_deb_url -qO $docker_deb_temp
-sudo dpkg --root=$FILESYSTEM_ROOT -i $docker_deb_temp || \
- sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install apt-transport-https \
+ ca-certificates \
+ curl \
+ gnupg2 \
+ software-properties-common
+sudo LANG=C chroot $FILESYSTEM_ROOT curl -o /tmp/docker.gpg -fsSL https://download.docker.com/linux/debian/gpg
+sudo LANG=C chroot $FILESYSTEM_ROOT apt-key add /tmp/docker.gpg
+sudo LANG=C chroot $FILESYSTEM_ROOT rm /tmp/docker.gpg
+sudo LANG=C chroot $FILESYSTEM_ROOT add-apt-repository \
+ "deb [arch=amd64] https://download.docker.com/linux/debian stretch stable"
+sudo LANG=C chroot $FILESYSTEM_ROOT apt-get update
+sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install docker-ce=${DOCKER_VERSION}
+sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y remove software-properties-common gnupg2
## Add docker config drop-in to select aufs, otherwise it may select other storage driver
sudo mkdir -p $FILESYSTEM_ROOT/etc/systemd/system/docker.service.d/
diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/installer.conf b/device/dell/x86_64-dell_s6100_c2538-r0/installer.conf
index 0a9a3a639eb2..5efc436529e1 100644
--- a/device/dell/x86_64-dell_s6100_c2538-r0/installer.conf
+++ b/device/dell/x86_64-dell_s6100_c2538-r0/installer.conf
@@ -1,3 +1,3 @@
CONSOLE_PORT=0x2f8
CONSOLE_DEV=1
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich,i2c_mux_gpio"
diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100/buffers.json.j2 b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/buffers.json.j2
similarity index 100%
rename from device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100/buffers.json.j2
rename to device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/buffers.json.j2
diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100/buffers_defaults_t1.j2 b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/buffers_defaults_t1.j2
similarity index 97%
rename from device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100/buffers_defaults_t1.j2
rename to device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/buffers_defaults_t1.j2
index 912f72a4c07c..5c654ab9e8a1 100644
--- a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100/buffers_defaults_t1.j2
+++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/buffers_defaults_t1.j2
@@ -14,7 +14,7 @@
"size": "10443264",
"type": "ingress",
"mode": "dynamic",
- "xoff": "7335744"
+ "xoff": "4625920"
},
"egress_lossy_pool": {
"size": "8877440",
diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/pg_profile_lookup.ini b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/pg_profile_lookup.ini
new file mode 100644
index 000000000000..aedda37a8878
--- /dev/null
+++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/pg_profile_lookup.ini
@@ -0,0 +1,17 @@
+# PG lossless profiles.
+# speed cable size xon xoff threshold xon_offset
+ 10000 5m 1248 2288 35776 -3 2288
+ 25000 5m 1248 2288 53248 -3 2288
+ 40000 5m 1248 2288 66560 -3 2288
+ 50000 5m 1248 2288 90272 -3 2288
+ 100000 5m 1248 2288 165568 -3 2288
+ 10000 40m 1248 2288 37024 -3 2288
+ 25000 40m 1248 2288 53248 -3 2288
+ 40000 40m 1248 2288 71552 -3 2288
+ 50000 40m 1248 2288 96096 -3 2288
+ 100000 40m 1248 2288 177632 -3 2288
+ 10000 300m 1248 2288 46176 -3 2288
+ 25000 300m 1248 2288 79040 -3 2288
+ 40000 300m 1248 2288 108160 -3 2288
+ 50000 300m 1248 2288 141856 -3 2288
+ 100000 300m 1248 2288 268736 -3 2288
diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100/port_config.ini b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/port_config.ini
similarity index 100%
rename from device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100/port_config.ini
rename to device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/port_config.ini
diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-T0/qos.json.j2 b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/qos.json.j2
similarity index 100%
rename from device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-T0/qos.json.j2
rename to device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/qos.json.j2
diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100/sai.profile b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/sai.profile
similarity index 100%
rename from device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100/sai.profile
rename to device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/sai.profile
diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100/th-z9100-32x100G.config.bcm b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/th-z9100-32x100G.config.bcm
similarity index 97%
rename from device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100/th-z9100-32x100G.config.bcm
rename to device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/th-z9100-32x100G.config.bcm
index ea335c15d628..25aefca2dafa 100644
--- a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100/th-z9100-32x100G.config.bcm
+++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/th-z9100-32x100G.config.bcm
@@ -1,14 +1,25 @@
#TH Z9100 32x100
+
l3_alpm_enable=2
+pfc_deadlock_seq_control=1
+bcm_stat_interval=2000000
bcm_num_cos=8
switch_bypass_mode=0
mmu_lossless=0
lpm_scaling_enable=0
+lpm_scaling_enable=0
lpm_ipv6_128b_reserved=0
ipv6_lpm_128b_enable=1
-
+l2xmsg_mode=1
+oversubscribe_mode=1
os=unix
+pbmp_oversubscribe=0x3fd000000ff4000003fc000001fe
+pbmp_xport_xe=0x3fd000000ff4000003fc000001fe
+
+serdes_if_type_xe=14
+serdes_if_type_ce=14
+
#Parity
parity_correction=1
parity_enable=1
@@ -52,134 +63,139 @@ portmap_33=132:10
portmap_67=133:10
portmap_101=134:10
portmap_135=135:10
+
xgxs_tx_lane_map_ce0=0x0132
-xgxs_rx_lane_map_ce0=0x1023
-phy_xaui_tx_polarity_flip_ce0=0xe
-phy_xaui_rx_polarity_flip_ce0=0xc
xgxs_tx_lane_map_ce1=0x2301
-xgxs_rx_lane_map_ce1=0x1302
-phy_xaui_tx_polarity_flip_ce1=0x2
-phy_xaui_rx_polarity_flip_ce1=0xd
xgxs_tx_lane_map_ce2=0x0123
-xgxs_rx_lane_map_ce2=0x1203
-phy_xaui_tx_polarity_flip_ce2=0xa
-phy_xaui_rx_polarity_flip_ce2=0x2
xgxs_tx_lane_map_ce3=0x3201
-xgxs_rx_lane_map_ce3=0x1302
-phy_xaui_tx_polarity_flip_ce3=0xb
-phy_xaui_rx_polarity_flip_ce3=0xf
xgxs_tx_lane_map_ce4=0x3210
-xgxs_rx_lane_map_ce4=0x3201
-phy_xaui_tx_polarity_flip_ce4=0x2
-phy_xaui_rx_polarity_flip_ce4=0xc
xgxs_tx_lane_map_ce5=0x2301
-xgxs_rx_lane_map_ce5=0x1302
-phy_xaui_tx_polarity_flip_ce5=0x0
-phy_xaui_rx_polarity_flip_ce5=0x2
xgxs_tx_lane_map_ce6=0x0123
-xgxs_rx_lane_map_ce6=0x1203
-phy_xaui_tx_polarity_flip_ce6=0x0
-phy_xaui_rx_polarity_flip_ce6=0x2
xgxs_tx_lane_map_ce7=0x1320
-xgxs_rx_lane_map_ce7=0x2301
-phy_xaui_tx_polarity_flip_ce7=0xa
-phy_xaui_rx_polarity_flip_ce7=0xd
xgxs_tx_lane_map_ce8=0x1032
-xgxs_rx_lane_map_ce8=0x0312
-phy_xaui_tx_polarity_flip_ce8=0x0
-phy_xaui_rx_polarity_flip_ce8=0xd
xgxs_tx_lane_map_ce9=0x2031
-xgxs_rx_lane_map_ce9=0x1302
-phy_xaui_tx_polarity_flip_ce9=0xb
-phy_xaui_rx_polarity_flip_ce9=0xa
xgxs_tx_lane_map_ce10=0x1023
-xgxs_rx_lane_map_ce10=0x2103
-phy_xaui_tx_polarity_flip_ce10=0xe
-phy_xaui_rx_polarity_flip_ce10=0x7
xgxs_tx_lane_map_ce11=0x0132
-xgxs_rx_lane_map_ce11=0x3210
-phy_xaui_tx_polarity_flip_ce11=0x6
-phy_xaui_rx_polarity_flip_ce11=0xf
xgxs_tx_lane_map_ce12=0x0213
-xgxs_rx_lane_map_ce12=0x2301
-phy_xaui_tx_polarity_flip_ce12=0x6
-phy_xaui_rx_polarity_flip_ce12=0xf
xgxs_tx_lane_map_ce13=0x1032
-xgxs_rx_lane_map_ce13=0x0213
-phy_xaui_tx_polarity_flip_ce13=0xf
-phy_xaui_rx_polarity_flip_ce13=0xd
xgxs_tx_lane_map_ce14=0x0132
-xgxs_rx_lane_map_ce14=0x3210
-phy_xaui_tx_polarity_flip_ce14=0x5
-phy_xaui_rx_polarity_flip_ce14=0x4
xgxs_tx_lane_map_ce15=0x0123
-xgxs_rx_lane_map_ce15=0x3210
-phy_xaui_tx_polarity_flip_ce15=0x8
-phy_xaui_rx_polarity_flip_ce15=0xb
xgxs_tx_lane_map_ce16=0x0123
-xgxs_rx_lane_map_ce16=0x3201
-phy_xaui_tx_polarity_flip_ce16=0xf
-phy_xaui_rx_polarity_flip_ce16=0x2
xgxs_tx_lane_map_ce17=0x0123
-xgxs_rx_lane_map_ce17=0x0213
-phy_xaui_tx_polarity_flip_ce17=0xf
-phy_xaui_rx_polarity_flip_ce17=0xd
xgxs_tx_lane_map_ce18=0x1032
-xgxs_rx_lane_map_ce18=0x3210
-phy_xaui_tx_polarity_flip_ce18=0xf
-phy_xaui_rx_polarity_flip_ce18=0xf
xgxs_tx_lane_map_ce19=0x0123
-xgxs_rx_lane_map_ce19=0x3210
-phy_xaui_tx_polarity_flip_ce19=0xf
-phy_xaui_rx_polarity_flip_ce19=0x0
xgxs_tx_lane_map_ce20=0x2301
-xgxs_rx_lane_map_ce20=0x3102
-phy_xaui_tx_polarity_flip_ce20=0xf
-phy_xaui_rx_polarity_flip_ce20=0x0
xgxs_tx_lane_map_ce21=0x3102
-xgxs_rx_lane_map_ce21=0x2103
-phy_xaui_tx_polarity_flip_ce21=0xf
-phy_xaui_rx_polarity_flip_ce21=0x5
xgxs_tx_lane_map_ce22=0x1023
-xgxs_rx_lane_map_ce22=0x2301
-phy_xaui_tx_polarity_flip_ce22=0xb
-phy_xaui_rx_polarity_flip_ce22=0x0
xgxs_tx_lane_map_ce23=0x2130
-xgxs_rx_lane_map_ce23=0x2310
-phy_xaui_tx_polarity_flip_ce23=0xa
-phy_xaui_rx_polarity_flip_ce23=0x2
xgxs_tx_lane_map_ce24=0x2310
-xgxs_rx_lane_map_ce24=0x3201
-phy_xaui_tx_polarity_flip_ce24=0xf
-phy_xaui_rx_polarity_flip_ce24=0xc
xgxs_tx_lane_map_ce25=0x2013
-xgxs_rx_lane_map_ce25=0x0123
-phy_xaui_tx_polarity_flip_ce25=0x0
-phy_xaui_rx_polarity_flip_ce25=0x8
xgxs_tx_lane_map_ce26=0x0132
-xgxs_rx_lane_map_ce26=0x1023
-phy_xaui_tx_polarity_flip_ce26=0xb
-phy_xaui_rx_polarity_flip_ce26=0x4
xgxs_tx_lane_map_ce27=0x0123
-xgxs_rx_lane_map_ce27=0x0213
-phy_xaui_tx_polarity_flip_ce27=0x7
-phy_xaui_rx_polarity_flip_ce27=0x7
xgxs_tx_lane_map_ce28=0x0213
-xgxs_rx_lane_map_ce28=0x1203
-phy_xaui_tx_polarity_flip_ce28=0x8
-phy_xaui_rx_polarity_flip_ce28=0x7
xgxs_tx_lane_map_ce29=0x0123
-xgxs_rx_lane_map_ce29=0x0213
-phy_xaui_tx_polarity_flip_ce29=0x3
-phy_xaui_rx_polarity_flip_ce29=0x9
xgxs_tx_lane_map_ce30=0x2301
-xgxs_rx_lane_map_ce30=0x3201
-phy_xaui_tx_polarity_flip_ce30=0xc
-phy_xaui_rx_polarity_flip_ce30=0xc
xgxs_tx_lane_map_ce31=0x0123
+
+xgxs_rx_lane_map_ce0=0x1023
+xgxs_rx_lane_map_ce1=0x1302
+xgxs_rx_lane_map_ce2=0x1203
+xgxs_rx_lane_map_ce3=0x1302
+xgxs_rx_lane_map_ce4=0x3201
+xgxs_rx_lane_map_ce5=0x1302
+xgxs_rx_lane_map_ce6=0x1203
+xgxs_rx_lane_map_ce7=0x2301
+xgxs_rx_lane_map_ce8=0x0312
+xgxs_rx_lane_map_ce9=0x1302
+xgxs_rx_lane_map_ce10=0x2103
+xgxs_rx_lane_map_ce11=0x3210
+xgxs_rx_lane_map_ce12=0x2301
+xgxs_rx_lane_map_ce13=0x0213
+xgxs_rx_lane_map_ce14=0x3210
+xgxs_rx_lane_map_ce15=0x3210
+xgxs_rx_lane_map_ce16=0x3201
+xgxs_rx_lane_map_ce17=0x0213
+xgxs_rx_lane_map_ce18=0x3210
+xgxs_rx_lane_map_ce19=0x3210
+xgxs_rx_lane_map_ce20=0x3102
+xgxs_rx_lane_map_ce21=0x2103
+xgxs_rx_lane_map_ce22=0x2301
+xgxs_rx_lane_map_ce23=0x2310
+xgxs_rx_lane_map_ce24=0x3201
+xgxs_rx_lane_map_ce25=0x0123
+xgxs_rx_lane_map_ce26=0x1023
+xgxs_rx_lane_map_ce27=0x0213
+xgxs_rx_lane_map_ce28=0x1203
+xgxs_rx_lane_map_ce29=0x0213
+xgxs_rx_lane_map_ce30=0x3201
xgxs_rx_lane_map_ce31=0x0213
+
+phy_xaui_tx_polarity_flip_ce0=0xe
+phy_xaui_tx_polarity_flip_ce1=0x2
+phy_xaui_tx_polarity_flip_ce2=0xa
+phy_xaui_tx_polarity_flip_ce3=0xb
+phy_xaui_tx_polarity_flip_ce4=0x2
+phy_xaui_tx_polarity_flip_ce5=0x0
+phy_xaui_tx_polarity_flip_ce6=0x0
+phy_xaui_tx_polarity_flip_ce7=0xa
+phy_xaui_tx_polarity_flip_ce8=0x0
+phy_xaui_tx_polarity_flip_ce9=0xb
+phy_xaui_tx_polarity_flip_ce10=0xe
+phy_xaui_tx_polarity_flip_ce11=0x6
+phy_xaui_tx_polarity_flip_ce12=0x6
+phy_xaui_tx_polarity_flip_ce13=0xf
+phy_xaui_tx_polarity_flip_ce14=0x5
+phy_xaui_tx_polarity_flip_ce15=0x8
+phy_xaui_tx_polarity_flip_ce16=0xf
+phy_xaui_tx_polarity_flip_ce17=0xf
+phy_xaui_tx_polarity_flip_ce18=0xf
+phy_xaui_tx_polarity_flip_ce19=0xf
+phy_xaui_tx_polarity_flip_ce20=0xf
+phy_xaui_tx_polarity_flip_ce21=0xf
+phy_xaui_tx_polarity_flip_ce22=0xb
+phy_xaui_tx_polarity_flip_ce23=0xa
+phy_xaui_tx_polarity_flip_ce24=0xf
+phy_xaui_tx_polarity_flip_ce25=0x0
+phy_xaui_tx_polarity_flip_ce26=0xb
+phy_xaui_tx_polarity_flip_ce27=0x7
+phy_xaui_tx_polarity_flip_ce28=0x8
+phy_xaui_tx_polarity_flip_ce29=0x3
+phy_xaui_tx_polarity_flip_ce30=0xc
phy_xaui_tx_polarity_flip_ce31=0x3
+
+phy_xaui_rx_polarity_flip_ce0=0xc
+phy_xaui_rx_polarity_flip_ce1=0xd
+phy_xaui_rx_polarity_flip_ce2=0x2
+phy_xaui_rx_polarity_flip_ce3=0xf
+phy_xaui_rx_polarity_flip_ce4=0xc
+phy_xaui_rx_polarity_flip_ce5=0x2
+phy_xaui_rx_polarity_flip_ce6=0x2
+phy_xaui_rx_polarity_flip_ce7=0xd
+phy_xaui_rx_polarity_flip_ce8=0xd
+phy_xaui_rx_polarity_flip_ce9=0xa
+phy_xaui_rx_polarity_flip_ce10=0x7
+phy_xaui_rx_polarity_flip_ce11=0xf
+phy_xaui_rx_polarity_flip_ce12=0xf
+phy_xaui_rx_polarity_flip_ce13=0xd
+phy_xaui_rx_polarity_flip_ce14=0x4
+phy_xaui_rx_polarity_flip_ce15=0xb
+phy_xaui_rx_polarity_flip_ce16=0x2
+phy_xaui_rx_polarity_flip_ce17=0xd
+phy_xaui_rx_polarity_flip_ce18=0xf
+phy_xaui_rx_polarity_flip_ce19=0x0
+phy_xaui_rx_polarity_flip_ce20=0x0
+phy_xaui_rx_polarity_flip_ce21=0x5
+phy_xaui_rx_polarity_flip_ce22=0x0
+phy_xaui_rx_polarity_flip_ce23=0x2
+phy_xaui_rx_polarity_flip_ce24=0xc
+phy_xaui_rx_polarity_flip_ce25=0x8
+phy_xaui_rx_polarity_flip_ce26=0x4
+phy_xaui_rx_polarity_flip_ce27=0x7
+phy_xaui_rx_polarity_flip_ce28=0x7
+phy_xaui_rx_polarity_flip_ce29=0x9
+phy_xaui_rx_polarity_flip_ce30=0xc
phy_xaui_rx_polarity_flip_ce31=0x8
+
dport_map_port_38=1
dport_map_port_39=2
dport_map_port_40=3
@@ -212,9 +228,5 @@ dport_map_port_2=29
dport_map_port_1=30
dport_map_port_4=31
dport_map_port_3=32
-oversubscribe_mode=1
-pbmp_xport_xe=0x3fd000000ff4000003fc000001fe
-serdes_if_type_xe=14
-serdes_if_type_ce=14
mmu_init_config="MSFT-TH-Tier1"
diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-T0/buffers.json.j2 b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/buffers.json.j2
similarity index 100%
rename from device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-T0/buffers.json.j2
rename to device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/buffers.json.j2
diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-T0/buffers_defaults_t0.j2 b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/buffers_defaults_t0.j2
similarity index 98%
rename from device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-T0/buffers_defaults_t0.j2
rename to device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/buffers_defaults_t0.j2
index 83d99c78201b..4bd35b354c8a 100644
--- a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-T0/buffers_defaults_t0.j2
+++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/buffers_defaults_t0.j2
@@ -28,7 +28,7 @@
"size": "11213696",
"type": "ingress",
"mode": "dynamic",
- "xoff": "6387264"
+ "xoff": "3855488"
},
"egress_lossy_pool": {
"size": "9532224",
diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/pg_profile_lookup.ini b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/pg_profile_lookup.ini
new file mode 100644
index 000000000000..aedda37a8878
--- /dev/null
+++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/pg_profile_lookup.ini
@@ -0,0 +1,17 @@
+# PG lossless profiles.
+# speed cable size xon xoff threshold xon_offset
+ 10000 5m 1248 2288 35776 -3 2288
+ 25000 5m 1248 2288 53248 -3 2288
+ 40000 5m 1248 2288 66560 -3 2288
+ 50000 5m 1248 2288 90272 -3 2288
+ 100000 5m 1248 2288 165568 -3 2288
+ 10000 40m 1248 2288 37024 -3 2288
+ 25000 40m 1248 2288 53248 -3 2288
+ 40000 40m 1248 2288 71552 -3 2288
+ 50000 40m 1248 2288 96096 -3 2288
+ 100000 40m 1248 2288 177632 -3 2288
+ 10000 300m 1248 2288 46176 -3 2288
+ 25000 300m 1248 2288 79040 -3 2288
+ 40000 300m 1248 2288 108160 -3 2288
+ 50000 300m 1248 2288 141856 -3 2288
+ 100000 300m 1248 2288 268736 -3 2288
diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-T0/port_config.ini b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/port_config.ini
similarity index 100%
rename from device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-T0/port_config.ini
rename to device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/port_config.ini
diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100/qos.json.j2 b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/qos.json.j2
similarity index 100%
rename from device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100/qos.json.j2
rename to device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/qos.json.j2
diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-T0/sai.profile b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/sai.profile
similarity index 100%
rename from device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-T0/sai.profile
rename to device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/sai.profile
diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/th-z9100-8x100G-48x50G.config.bcm b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/th-z9100-8x100G-48x50G.config.bcm
new file mode 100644
index 000000000000..5dddf7d2a2d4
--- /dev/null
+++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/th-z9100-8x100G-48x50G.config.bcm
@@ -0,0 +1,380 @@
+#TH Z9100 T0
+
+l3_alpm_enable=2
+pfc_deadlock_seq_control=1
+bcm_stat_interval=2000000
+bcm_num_cos=8
+switch_bypass_mode=0
+mmu_lossless=0
+lpm_scaling_enable=0
+lpm_scaling_enable=0
+lpm_ipv6_128b_reserved=0
+ipv6_lpm_128b_enable=1
+l2xmsg_mode=1
+oversubscribe_mode=1
+os=unix
+
+pbmp_oversubscribe=0x3fffffffdffffffff7fffffffdfffffffe
+pbmp_xport_xe=0x3fffffffdffffffff7fffffffdfffffffe
+
+serdes_if_type_xe=14
+serdes_if_type_ce=14
+
+#Parity
+parity_correction=1
+parity_enable=1
+
+#Port configuration
+dport_map_port_100.0=130
+dport_map_port_10.0=126
+dport_map_port_1.0=117
+dport_map_port_102.0=65
+dport_map_port_103.0=66
+dport_map_port_106.0=69
+dport_map_port_107.0=70
+dport_map_port_110.0=73
+dport_map_port_111.0=74
+dport_map_port_114.0=77
+dport_map_port_115.0=78
+dport_map_port_118.0=101
+dport_map_port_119.0=102
+dport_map_port_122.0=97
+dport_map_port_123.0=98
+dport_map_port_126.0=109
+dport_map_port_130.0=105
+dport_map_port_13.0=121
+dport_map_port_14.0=122
+dport_map_port_17.0=85
+dport_map_port_18.0=86
+dport_map_port_21.0=81
+dport_map_port_22.0=82
+dport_map_port_25.0=93
+dport_map_port_26.0=94
+dport_map_port_29.0=89
+dport_map_port_30.0=90
+dport_map_port_34.0=37
+dport_map_port_38.0=33
+dport_map_port_42.0=45
+dport_map_port_43.0=46
+dport_map_port_46.0=41
+dport_map_port_47.0=42
+dport_map_port_50.0=1
+dport_map_port_5.0=113
+dport_map_port_51.0=2
+dport_map_port_54.0=5
+dport_map_port_55.0=6
+dport_map_port_58.0=9
+dport_map_port_59.0=10
+dport_map_port_62.0=13
+dport_map_port_63.0=14
+dport_map_port_66.0=129
+dport_map_port_68.0=17
+dport_map_port_69.0=18
+dport_map_port_72.0=21
+dport_map_port_73.0=22
+dport_map_port_76.0=25
+dport_map_port_80.0=29
+dport_map_port_84.0=49
+dport_map_port_85.0=50
+dport_map_port_88.0=53
+dport_map_port_89.0=54
+dport_map_port_9.0=125
+dport_map_port_92.0=57
+dport_map_port_93.0=58
+dport_map_port_96.0=61
+dport_map_port_97.0=62
+
+phy_xaui_rx_polarity_flip_100.0=0xf
+phy_xaui_rx_polarity_flip_10.0=0x2
+phy_xaui_rx_polarity_flip_1.0=0x9
+phy_xaui_rx_polarity_flip_102.0=0x2
+phy_xaui_rx_polarity_flip_103.0=0x0
+phy_xaui_rx_polarity_flip_106.0=0x1
+phy_xaui_rx_polarity_flip_107.0=0x3
+phy_xaui_rx_polarity_flip_110.0=0x3
+phy_xaui_rx_polarity_flip_111.0=0x3
+phy_xaui_rx_polarity_flip_114.0=0x0
+phy_xaui_rx_polarity_flip_115.0=0x0
+phy_xaui_rx_polarity_flip_118.0=0x0
+phy_xaui_rx_polarity_flip_119.0=0x2
+phy_xaui_rx_polarity_flip_122.0=0x0
+phy_xaui_rx_polarity_flip_123.0=0x3
+phy_xaui_rx_polarity_flip_126.0=0x7
+phy_xaui_rx_polarity_flip_130.0=0x4
+phy_xaui_rx_polarity_flip_13.0=0x0
+phy_xaui_rx_polarity_flip_14.0=0x3
+phy_xaui_rx_polarity_flip_17.0=0x1
+phy_xaui_rx_polarity_flip_18.0=0x1
+phy_xaui_rx_polarity_flip_21.0=0x0
+phy_xaui_rx_polarity_flip_22.0=0x0
+phy_xaui_rx_polarity_flip_25.0=0x2
+phy_xaui_rx_polarity_flip_26.0=0x0
+phy_xaui_rx_polarity_flip_29.0=0x0
+phy_xaui_rx_polarity_flip_30.0=0x0
+phy_xaui_rx_polarity_flip_34.0=0xa
+phy_xaui_rx_polarity_flip_38.0=0xd
+phy_xaui_rx_polarity_flip_42.0=0x3
+phy_xaui_rx_polarity_flip_43.0=0x3
+phy_xaui_rx_polarity_flip_46.0=0x3
+phy_xaui_rx_polarity_flip_47.0=0x1
+phy_xaui_rx_polarity_flip_50.0=0x0
+phy_xaui_rx_polarity_flip_5.0=0x7
+phy_xaui_rx_polarity_flip_51.0=0x3
+phy_xaui_rx_polarity_flip_54.0=0x1
+phy_xaui_rx_polarity_flip_55.0=0x3
+phy_xaui_rx_polarity_flip_58.0=0x2
+phy_xaui_rx_polarity_flip_59.0=0x0
+phy_xaui_rx_polarity_flip_62.0=0x3
+phy_xaui_rx_polarity_flip_63.0=0x3
+phy_xaui_rx_polarity_flip_66.0=0xf
+phy_xaui_rx_polarity_flip_68.0=0x0
+phy_xaui_rx_polarity_flip_69.0=0x3
+phy_xaui_rx_polarity_flip_72.0=0x2
+phy_xaui_rx_polarity_flip_73.0=0x0
+phy_xaui_rx_polarity_flip_76.0=0x2
+phy_xaui_rx_polarity_flip_80.0=0xd
+phy_xaui_rx_polarity_flip_84.0=0x3
+phy_xaui_rx_polarity_flip_85.0=0x3
+phy_xaui_rx_polarity_flip_88.0=0x1
+phy_xaui_rx_polarity_flip_89.0=0x3
+phy_xaui_rx_polarity_flip_9.0=0x0
+phy_xaui_rx_polarity_flip_92.0=0x0
+phy_xaui_rx_polarity_flip_93.0=0x1
+phy_xaui_rx_polarity_flip_96.0=0x3
+phy_xaui_rx_polarity_flip_97.0=0x2
+
+phy_xaui_tx_polarity_flip_100.0=0x6
+phy_xaui_tx_polarity_flip_10.0=0x0
+phy_xaui_tx_polarity_flip_1.0=0x3
+phy_xaui_tx_polarity_flip_102.0=0x3
+phy_xaui_tx_polarity_flip_103.0=0x3
+phy_xaui_tx_polarity_flip_106.0=0x3
+phy_xaui_tx_polarity_flip_107.0=0x3
+phy_xaui_tx_polarity_flip_110.0=0x3
+phy_xaui_tx_polarity_flip_111.0=0x3
+phy_xaui_tx_polarity_flip_114.0=0x3
+phy_xaui_tx_polarity_flip_115.0=0x3
+phy_xaui_tx_polarity_flip_118.0=0x0
+phy_xaui_tx_polarity_flip_119.0=0x0
+phy_xaui_tx_polarity_flip_122.0=0x3
+phy_xaui_tx_polarity_flip_123.0=0x3
+phy_xaui_tx_polarity_flip_126.0=0x7
+phy_xaui_tx_polarity_flip_130.0=0xb
+phy_xaui_tx_polarity_flip_13.0=0x0
+phy_xaui_tx_polarity_flip_14.0=0x3
+phy_xaui_tx_polarity_flip_17.0=0x3
+phy_xaui_tx_polarity_flip_18.0=0x3
+phy_xaui_tx_polarity_flip_21.0=0x3
+phy_xaui_tx_polarity_flip_22.0=0x3
+phy_xaui_tx_polarity_flip_25.0=0x2
+phy_xaui_tx_polarity_flip_26.0=0x2
+phy_xaui_tx_polarity_flip_29.0=0x3
+phy_xaui_tx_polarity_flip_30.0=0x2
+phy_xaui_tx_polarity_flip_34.0=0xb
+phy_xaui_tx_polarity_flip_38.0=0x0
+phy_xaui_tx_polarity_flip_42.0=0x2
+phy_xaui_tx_polarity_flip_43.0=0x1
+phy_xaui_tx_polarity_flip_46.0=0x2
+phy_xaui_tx_polarity_flip_47.0=0x3
+phy_xaui_tx_polarity_flip_50.0=0x2
+phy_xaui_tx_polarity_flip_5.0=0x8
+phy_xaui_tx_polarity_flip_51.0=0x3
+phy_xaui_tx_polarity_flip_54.0=0x2
+phy_xaui_tx_polarity_flip_55.0=0x0
+phy_xaui_tx_polarity_flip_58.0=0x2
+phy_xaui_tx_polarity_flip_59.0=0x2
+phy_xaui_tx_polarity_flip_62.0=0x3
+phy_xaui_tx_polarity_flip_63.0=0x2
+phy_xaui_tx_polarity_flip_66.0=0x6
+phy_xaui_tx_polarity_flip_68.0=0x2
+phy_xaui_tx_polarity_flip_69.0=0x0
+phy_xaui_tx_polarity_flip_72.0=0x0
+phy_xaui_tx_polarity_flip_73.0=0x0
+phy_xaui_tx_polarity_flip_76.0=0x0
+phy_xaui_tx_polarity_flip_80.0=0xa
+phy_xaui_tx_polarity_flip_84.0=0x2
+phy_xaui_tx_polarity_flip_85.0=0x1
+phy_xaui_tx_polarity_flip_88.0=0x3
+phy_xaui_tx_polarity_flip_89.0=0x3
+phy_xaui_tx_polarity_flip_9.0=0x3
+phy_xaui_tx_polarity_flip_92.0=0x1
+phy_xaui_tx_polarity_flip_93.0=0x1
+phy_xaui_tx_polarity_flip_96.0=0x0
+phy_xaui_tx_polarity_flip_97.0=0x2
+
+portmap_100.0=131:10
+portmap_10.0=11:50:2
+portmap_1.0=1:100
+portmap_102.0=97:50:2
+portmap_103.0=99:50:2
+portmap_106.0=101:50:2
+portmap_107.0=103:50:2
+portmap_110.0=105:50:2
+portmap_111.0=107:50:2
+portmap_114.0=109:50:2
+portmap_115.0=111:50:2
+portmap_118.0=113:50:2
+portmap_119.0=115:50:2
+portmap_122.0=117:50:2
+portmap_123.0=119:50:2
+portmap_126.0=121:100
+portmap_130.0=125:100
+portmap_13.0=13:50:2
+portmap_14.0=15:50:2
+portmap_17.0=17:50:2
+portmap_18.0=19:50:2
+portmap_21.0=21:50:2
+portmap_22.0=23:50:2
+portmap_25.0=25:50:2
+portmap_26.0=27:50:2
+portmap_29.0=29:50:2
+portmap_30.0=31:50:2
+portmap_34.0=33:100
+portmap_38.0=37:100
+portmap_42.0=41:50:2
+portmap_43.0=43:50:2
+portmap_46.0=45:50:2
+portmap_47.0=47:50:2
+portmap_50.0=49:50:2
+portmap_5.0=5:100
+portmap_51.0=51:50:2
+portmap_54.0=53:50:2
+portmap_55.0=55:50:2
+portmap_58.0=57:50:2
+portmap_59.0=59:50:2
+portmap_62.0=61:50:2
+portmap_63.0=63:50:2
+portmap_66.0=129:10
+portmap_68.0=65:50:2
+portmap_69.0=67:50:2
+portmap_72.0=69:50:2
+portmap_73.0=71:50:2
+portmap_76.0=73:100
+portmap_80.0=77:100
+portmap_84.0=81:50:2
+portmap_85.0=83:50:2
+portmap_88.0=85:50:2
+portmap_89.0=87:50:2
+portmap_9.0=9:50:2
+portmap_92.0=89:50:2
+portmap_93.0=91:50:2
+portmap_96.0=93:50:2
+portmap_97.0=95:50:2
+
+xgxs_rx_lane_map_100.0=0x3210
+xgxs_rx_lane_map_10.0=0x213
+xgxs_rx_lane_map_1.0=0x213
+xgxs_rx_lane_map_102.0=0x3201
+xgxs_rx_lane_map_103.0=0x3201
+xgxs_rx_lane_map_106.0=0x213
+xgxs_rx_lane_map_107.0=0x213
+xgxs_rx_lane_map_110.0=0x3210
+xgxs_rx_lane_map_111.0=0x3210
+xgxs_rx_lane_map_114.0=0x3210
+xgxs_rx_lane_map_115.0=0x3210
+xgxs_rx_lane_map_118.0=0x123
+xgxs_rx_lane_map_119.0=0x123
+xgxs_rx_lane_map_122.0=0x3201
+xgxs_rx_lane_map_123.0=0x3201
+xgxs_rx_lane_map_126.0=0x213
+xgxs_rx_lane_map_130.0=0x1023
+xgxs_rx_lane_map_13.0=0x3201
+xgxs_rx_lane_map_14.0=0x3201
+xgxs_rx_lane_map_17.0=0x2103
+xgxs_rx_lane_map_18.0=0x2103
+xgxs_rx_lane_map_21.0=0x3102
+xgxs_rx_lane_map_22.0=0x3102
+xgxs_rx_lane_map_25.0=0x2310
+xgxs_rx_lane_map_26.0=0x2310
+xgxs_rx_lane_map_29.0=0x2301
+xgxs_rx_lane_map_30.0=0x2301
+xgxs_rx_lane_map_34.0=0x1302
+xgxs_rx_lane_map_38.0=0x312
+xgxs_rx_lane_map_42.0=0x3210
+xgxs_rx_lane_map_43.0=0x3210
+xgxs_rx_lane_map_46.0=0x2103
+xgxs_rx_lane_map_47.0=0x2103
+xgxs_rx_lane_map_50.0=0x1023
+xgxs_rx_lane_map_5.0=0x1203
+xgxs_rx_lane_map_51.0=0x1023
+xgxs_rx_lane_map_54.0=0x1302
+xgxs_rx_lane_map_55.0=0x1302
+xgxs_rx_lane_map_58.0=0x1203
+xgxs_rx_lane_map_59.0=0x1203
+xgxs_rx_lane_map_62.0=0x1302
+xgxs_rx_lane_map_63.0=0x1302
+xgxs_rx_lane_map_66.0=0x3210
+xgxs_rx_lane_map_68.0=0x3201
+xgxs_rx_lane_map_69.0=0x3201
+xgxs_rx_lane_map_72.0=0x1302
+xgxs_rx_lane_map_73.0=0x1302
+xgxs_rx_lane_map_76.0=0x1203
+xgxs_rx_lane_map_80.0=0x2301
+xgxs_rx_lane_map_84.0=0x2301
+xgxs_rx_lane_map_85.0=0x2301
+xgxs_rx_lane_map_88.0=0x213
+xgxs_rx_lane_map_89.0=0x213
+xgxs_rx_lane_map_9.0=0x213
+xgxs_rx_lane_map_92.0=0x3210
+xgxs_rx_lane_map_93.0=0x3210
+xgxs_rx_lane_map_96.0=0x3210
+xgxs_rx_lane_map_97.0=0x3210
+xgxs_tx_lane_map_100.0=0x132
+xgxs_tx_lane_map_10.0=0x123
+xgxs_tx_lane_map_1.0=0x123
+xgxs_tx_lane_map_102.0=0x123
+xgxs_tx_lane_map_103.0=0x123
+xgxs_tx_lane_map_106.0=0x123
+xgxs_tx_lane_map_107.0=0x123
+xgxs_tx_lane_map_110.0=0x132
+xgxs_tx_lane_map_111.0=0x132
+xgxs_tx_lane_map_114.0=0x123
+xgxs_tx_lane_map_115.0=0x123
+xgxs_tx_lane_map_118.0=0x2013
+xgxs_tx_lane_map_119.0=0x2013
+xgxs_tx_lane_map_122.0=0x2310
+xgxs_tx_lane_map_123.0=0x2310
+xgxs_tx_lane_map_126.0=0x123
+xgxs_tx_lane_map_130.0=0x132
+xgxs_tx_lane_map_13.0=0x2301
+xgxs_tx_lane_map_14.0=0x2301
+xgxs_tx_lane_map_17.0=0x3102
+xgxs_tx_lane_map_18.0=0x3102
+xgxs_tx_lane_map_21.0=0x132
+xgxs_tx_lane_map_22.0=0x132
+xgxs_tx_lane_map_25.0=0x2130
+xgxs_tx_lane_map_26.0=0x2130
+xgxs_tx_lane_map_29.0=0x1023
+xgxs_tx_lane_map_30.0=0x1023
+xgxs_tx_lane_map_34.0=0x2031
+xgxs_tx_lane_map_38.0=0x1032
+xgxs_tx_lane_map_42.0=0x132
+xgxs_tx_lane_map_43.0=0x132
+xgxs_tx_lane_map_46.0=0x1023
+xgxs_tx_lane_map_47.0=0x1023
+xgxs_tx_lane_map_50.0=0x132
+xgxs_tx_lane_map_5.0=0x213
+xgxs_tx_lane_map_51.0=0x132
+xgxs_tx_lane_map_54.0=0x2301
+xgxs_tx_lane_map_55.0=0x2301
+xgxs_tx_lane_map_58.0=0x123
+xgxs_tx_lane_map_59.0=0x123
+xgxs_tx_lane_map_62.0=0x3201
+xgxs_tx_lane_map_63.0=0x3201
+xgxs_tx_lane_map_66.0=0x132
+xgxs_tx_lane_map_68.0=0x3210
+xgxs_tx_lane_map_69.0=0x3210
+xgxs_tx_lane_map_72.0=0x2301
+xgxs_tx_lane_map_73.0=0x2301
+xgxs_tx_lane_map_76.0=0x123
+xgxs_tx_lane_map_80.0=0x1320
+xgxs_tx_lane_map_84.0=0x213
+xgxs_tx_lane_map_85.0=0x213
+xgxs_tx_lane_map_88.0=0x1032
+xgxs_tx_lane_map_89.0=0x1032
+xgxs_tx_lane_map_9.0=0x123
+xgxs_tx_lane_map_92.0=0x132
+xgxs_tx_lane_map_93.0=0x132
+xgxs_tx_lane_map_96.0=0x123
+xgxs_tx_lane_map_97.0=0x123
+mmu_init_config="MSFT-TH-Tier0"
diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-T0/pg_profile_lookup.ini b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-T0/pg_profile_lookup.ini
deleted file mode 100644
index 7222f8014925..000000000000
--- a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-T0/pg_profile_lookup.ini
+++ /dev/null
@@ -1,17 +0,0 @@
-# PG lossless profiles.
-# speed cable size xon xoff threshold xon_offset
- 10000 5m 1248 2288 35776 -4 2288
- 25000 5m 1248 2288 53248 -4 2288
- 40000 5m 1248 2288 66560 -4 2288
- 50000 5m 1248 2288 79872 -4 2288
- 100000 5m 1248 2288 165568 -4 2288
- 10000 40m 1248 2288 37024 -4 2288
- 25000 40m 1248 2288 56160 -4 2288
- 40000 40m 1248 2288 71552 -4 2288
- 50000 40m 1248 2288 85696 -4 2288
- 100000 40m 1248 2288 177632 -4 2288
- 10000 300m 1248 2288 46176 -4 2288
- 25000 300m 1248 2288 79040 -4 2288
- 40000 300m 1248 2288 108160 -4 2288
- 50000 300m 1248 2288 131456 -4 2288
- 100000 300m 1248 2288 268736 -4 2288
diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-T0/th-z9100-8x100G-48x50G.config.bcm b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-T0/th-z9100-8x100G-48x50G.config.bcm
deleted file mode 100644
index 68768cfa0666..000000000000
--- a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-T0/th-z9100-8x100G-48x50G.config.bcm
+++ /dev/null
@@ -1,377 +0,0 @@
- phy_xaui_rx_polarity_flip_103.0=0x0
- phy_xaui_tx_polarity_flip_9.0=0x3
- dport_map_port_72.0=21
- dport_map_port_46.0=41
- xgxs_rx_lane_map_102.0=0x3201
- xgxs_rx_lane_map_103.0=0x3201
- xgxs_tx_lane_map_110.0=0x132
- xgxs_tx_lane_map_111.0=0x132
- portmap_55.0=55:50:2
- portmap_29.0=29:50:2
- portmap_102.0=97:50:2
- dport_map_port_55.0=6
- l2xmsg_hostbuf_size.0=8192
- l3_mem_entries.0=73728
- dport_map_port_29.0=89
- portmap_10.0=11:50:2
- xgxs_rx_lane_map_68.0=0x3201
- xgxs_tx_lane_map_68.0=0x3210
- xgxs_rx_lane_map_69.0=0x3201
- xgxs_tx_lane_map_69.0=0x3210
- dport_map_port_119.0=102
- portmap_38.0=37:100
- dport_map_port_10.0=126
- portmap_111.0=107:50:2
- dport_map_port_38.0=33
- phy_xaui_tx_polarity_flip_119.0=0x0
- dport_map_port_100.0=130
- module_64ports.0=0
- portmap_73.0=71:50:2
- xgxs_tx_lane_map_102.0=0x123
- xgxs_tx_lane_map_103.0=0x123
- portmap_47.0=47:50:2
- phy_xaui_rx_polarity_flip_69.0=0x3
- phy_xaui_tx_polarity_flip_100.0=0x6
- phy_xaui_rx_polarity_flip_130.0=0x4
- dport_map_port_73.0=22
- dport_map_port_47.0=42
- phy_xaui_rx_polarity_flip_50.0=0x0
- phy_xaui_tx_polarity_flip_92.0=0x1
- phy_xaui_tx_polarity_flip_66.0=0x6
- portmap_5.0=5:100
- portmap_103.0=99:50:2
- phy_xaui_tx_polarity_flip_21.0=0x3
- tdma_intr_enable.0=1
- phy_xaui_rx_polarity_flip_122.0=0x0
- ipv6_lpm_128b_enable.0=0
- xgxs_rx_lane_map_50.0=0x1023
- xgxs_tx_lane_map_50.0=0x132
- xgxs_rx_lane_map_51.0=0x1023
- xgxs_tx_lane_map_51.0=0x132
- phy_xaui_tx_polarity_flip_30.0=0x2
- phy_xaui_rx_polarity_flip_42.0=0x3
- phy_xaui_tx_polarity_flip_84.0=0x2
- phy_xaui_rx_polarity_flip_96.0=0x3
- phy_xaui_tx_polarity_flip_58.0=0x2
- stat_if_parity_enable.0=1
- dport_map_port_110.0=73
- phy_xaui_rx_polarity_flip_51.0=0x3
- phy_xaui_tx_polarity_flip_13.0=0x0
- phy_xaui_rx_polarity_flip_25.0=0x2
- oversubscribe_mode=1
- xgxs_rx_lane_map_130.0=0x1023
- phy_xaui_tx_polarity_flip_93.0=0x1
- phy_xaui_tx_polarity_flip_110.0=0x3
- phy_xaui_rx_polarity_flip_114.0=0x0
- portmap_130.0=125:100
- xgxs_rx_lane_map_42.0=0x3210
- xgxs_tx_lane_map_42.0=0x132
- xgxs_rx_lane_map_43.0=0x3210
- xgxs_tx_lane_map_43.0=0x132
- phy_xaui_tx_polarity_flip_22.0=0x3
- phy_xaui_rx_polarity_flip_34.0=0xa
- xgxs_rx_lane_map_96.0=0x3210
- xgxs_tx_lane_map_96.0=0x123
- xgxs_rx_lane_map_97.0=0x3210
- xgxs_tx_lane_map_97.0=0x123
- portmap_92.0=89:50:2
- phy_xaui_tx_polarity_flip_76.0=0x0
- portmap_66.0=129:10
- phy_xaui_rx_polarity_flip_88.0=0x1
- phy_xaui_tx_polarity_flip_1.0=0x3
- phy_xaui_rx_polarity_flip_123.0=0x3
- bcm_tunnel_term_compatible_mode.0=1
- dport_map_port_92.0=57
- dport_map_port_66.0=129
- xgxs_rx_lane_map_25.0=0x2310
- xgxs_tx_lane_map_25.0=0x2130
- xgxs_rx_lane_map_26.0=0x2310
- xgxs_tx_lane_map_26.0=0x2130
- dport_map_port_102.0=65
- portmap_21.0=21:50:2
- phy_xaui_rx_polarity_flip_43.0=0x3
- table_dma_enable.0=1
- phy_xaui_rx_polarity_flip_17.0=0x1
- xgxs_rx_lane_map_122.0=0x3201
- xgxs_rx_lane_map_123.0=0x3201
- phy_xaui_tx_polarity_flip_85.0=0x1
- xgxs_tx_lane_map_130.0=0x132
- phy_xaui_rx_polarity_flip_97.0=0x2
- phy_xaui_tx_polarity_flip_59.0=0x2
- dport_map_port_21.0=81
- phy_xaui_tx_polarity_flip_102.0=0x3
- phy_xaui_rx_polarity_flip_106.0=0x1
- portmap_122.0=117:50:2
- xgxs_rx_lane_map_34.0=0x1302
- xgxs_tx_lane_map_34.0=0x2031
- dport_map_port_111.0=74
- portmap_30.0=31:50:2
- phy_xaui_tx_polarity_flip_14.0=0x3
- phy_xaui_rx_polarity_flip_26.0=0x0
- xgxs_rx_lane_map_88.0=0x213
- xgxs_rx_lane_map_89.0=0x213
- dport_map_port_9.0=125
- xgxs_tx_lane_map_88.0=0x1032
- xgxs_tx_lane_map_89.0=0x1032
- xgxs_tx_lane_map_5.0=0x213
- portmap_84.0=81:50:2
- phy_xaui_tx_polarity_flip_68.0=0x2
- portmap_58.0=57:50:2
- dport_map_port_30.0=90
- phy_xaui_tx_polarity_flip_111.0=0x3
- phy_xaui_rx_polarity_flip_115.0=0x0
- dport_map_port_84.0=49
- dport_map_port_58.0=9
- xgxs_rx_lane_map_17.0=0x2103
- xgxs_tx_lane_map_17.0=0x3102
- xgxs_rx_lane_map_18.0=0x2103
- xgxs_tx_lane_map_18.0=0x3102
- portmap_13.0=13:50:2
- xgxs_rx_lane_map_114.0=0x3210
- xgxs_rx_lane_map_115.0=0x3210
- portmap_93.0=91:50:2
- xgxs_tx_lane_map_122.0=0x2310
- xgxs_tx_lane_map_123.0=0x2310
- phy_xaui_rx_polarity_flip_89.0=0x3
- dport_map_port_13.0=121
- schan_intr_enable.0=0
- portmap_114.0=109:50:2
- dport_map_port_93.0=58
- dport_map_port_103.0=66
- portmap_22.0=23:50:2
- phy_xaui_rx_polarity_flip_18.0=0x1
- xgxs_rx_lane_map_5.0=0x1203
- portmap_76.0=73:100
- phy_xaui_rx_polarity_flip_5.0=0x7
- dport_map_port_22.0=82
- phy_xaui_tx_polarity_flip_103.0=0x3
- phy_xaui_rx_polarity_flip_107.0=0x3
- portmap_123.0=119:50:2
- os.0=unix
- dport_map_port_76.0=25
- parity_enable.0=1
- xgxs_rx_lane_map_106.0=0x213
- xgxs_rx_lane_map_107.0=0x213
- portmap_85.0=83:50:2
- phy_xaui_tx_polarity_flip_69.0=0x0
- xgxs_tx_lane_map_114.0=0x123
- xgxs_tx_lane_map_115.0=0x123
- portmap_59.0=59:50:2
- pbmp_oversubscribe.0=0x3fffffffdffffffff7fffffffdfffffffe
- portmap_106.0=101:50:2
- dport_map_port_85.0=50
- dport_map_port_59.0=10
- tdma_timeout_usec=1000000
- phy_xaui_tx_polarity_flip_50.0=0x2
- phy_xaui_rx_polarity_flip_62.0=0x3
- portmap_14.0=15:50:2
- portmap_68.0=65:50:2
- dport_map_port_14.0=122
- portmap_115.0=111:50:2
- dport_map_port_68.0=17
- dport_map_port_130.0=105
- xgxs_tx_lane_map_106.0=0x123
- xgxs_tx_lane_map_107.0=0x123
- lls_num_l2uc.0=10
- phy_xaui_tx_polarity_flip_130.0=0xb
- os=unix
- xgxs_rx_lane_map_62.0=0x1302
- xgxs_tx_lane_map_62.0=0x3201
- xgxs_rx_lane_map_63.0=0x1302
- xgxs_tx_lane_map_63.0=0x3201
- phy_xaui_rx_polarity_flip_80.0=0xd
- phy_xaui_tx_polarity_flip_42.0=0x2
- phy_xaui_rx_polarity_flip_54.0=0x1
- phy_xaui_tx_polarity_flip_96.0=0x0
- miim_intr_enable.0=0
- portmap_9.0=9:50:2
- portmap_107.0=103:50:2
- dport_map_port_122.0=97
- phy_xaui_tx_polarity_flip_51.0=0x3
- phy_xaui_rx_polarity_flip_63.0=0x3
- phy_xaui_tx_polarity_flip_25.0=0x2
- portmap_69.0=67:50:2
- phy_xaui_tx_polarity_flip_122.0=0x3
- phy_xaui_rx_polarity_flip_126.0=0x7
- xgxs_rx_lane_map_80.0=0x2301
- dport_map_port_69.0=18
- xgxs_rx_lane_map_54.0=0x1302
- xgxs_rx_lane_map_55.0=0x1302
- dport_map_port_1.0=117
- xgxs_tx_lane_map_80.0=0x1320
- xgxs_tx_lane_map_54.0=0x2301
- xgxs_tx_lane_map_55.0=0x2301
- table_dma_enable=1
- portmap_50.0=49:50:2
- phy_xaui_rx_polarity_flip_72.0=0x2
- phy_xaui_tx_polarity_flip_34.0=0xb
- phy_xaui_rx_polarity_flip_46.0=0x3
- phy_xaui_tx_polarity_flip_88.0=0x3
- dport_map_port_50.0=1
- l2_mem_entries.0=73728
- l2xmsg_mode.0=1
- dport_map_port_114.0=77
- phy_xaui_tx_polarity_flip_43.0=0x1
- phy_xaui_rx_polarity_flip_55.0=0x3
- phy_xaui_tx_polarity_flip_17.0=0x3
- phy_xaui_rx_polarity_flip_29.0=0x0
- phy_xaui_tx_polarity_flip_97.0=0x2
- phy_xaui_tx_polarity_flip_114.0=0x3
- phy_xaui_rx_polarity_flip_118.0=0x0
- phy_xaui_rx_polarity_flip_10.0=0x2
- xgxs_rx_lane_map_72.0=0x1302
- xgxs_rx_lane_map_73.0=0x1302
- xgxs_rx_lane_map_46.0=0x2103
- xgxs_rx_lane_map_47.0=0x2103
- xgxs_tx_lane_map_72.0=0x2301
- xgxs_tx_lane_map_73.0=0x2301
- xgxs_tx_lane_map_46.0=0x1023
- xgxs_tx_lane_map_47.0=0x1023
- dport_map_port_123.0=98
- portmap_42.0=41:50:2
- phy_xaui_tx_polarity_flip_26.0=0x2
- phy_xaui_rx_polarity_flip_38.0=0xd
- portmap_96.0=93:50:2
- phy_xaui_tx_polarity_flip_5.0=0x8
- dport_map_port_42.0=45
- phy_xaui_tx_polarity_flip_123.0=0x3
- dport_map_port_96.0=61
- xgxs_rx_lane_map_29.0=0x2301
- xgxs_tx_lane_map_29.0=0x1023
- xgxs_rx_lane_map_30.0=0x2301
- xgxs_tx_lane_map_30.0=0x1023
- dport_map_port_106.0=69
- portmap_51.0=51:50:2
- phy_xaui_rx_polarity_flip_73.0=0x0
- portmap_25.0=25:50:2
- phy_xaui_rx_polarity_flip_47.0=0x1
- xgxs_rx_lane_map_126.0=0x213
- phy_xaui_tx_polarity_flip_89.0=0x3
- dport_map_port_51.0=2
- dport_map_port_25.0=93
- phy_xaui_tx_polarity_flip_106.0=0x3
- portmap_126.0=121:100
- xgxs_rx_lane_map_38.0=0x312
- xgxs_tx_lane_map_38.0=0x1032
- dport_map_port_115.0=78
- portmap_34.0=33:100
- phy_xaui_tx_polarity_flip_18.0=0x3
- pbmp_xport_xe.0=0x3fffffffdffffffff7fffffffdfffffffe
- xgxs_tx_lane_map_9.0=0x123
- xgxs_tx_lane_map_10.0=0x123
- portmap_88.0=85:50:2
- max_vp_lags.0=0
- dport_map_port_34.0=37
- phy_xaui_tx_polarity_flip_115.0=0x3
- phy_xaui_rx_polarity_flip_119.0=0x2
- dport_map_port_88.0=53
- portmap_43.0=43:50:2
- portmap_17.0=17:50:2
- phy_xaui_rx_polarity_flip_100.0=0xf
- xgxs_rx_lane_map_118.0=0x123
- xgxs_rx_lane_map_119.0=0x123
- portmap_97.0=95:50:2
- xgxs_tx_lane_map_126.0=0x123
- dport_map_port_43.0=46
- dport_map_port_17.0=85
- portmap_118.0=113:50:2
- dport_map_port_97.0=62
- num_ipv6_lpm_128b_entries.0=0
- phy_xaui_tx_polarity_flip_62.0=0x3
- dport_map_port_107.0=70
- portmap_26.0=27:50:2
- xgxs_rx_lane_map_9.0=0x213
- xgxs_rx_lane_map_10.0=0x213
- portmap_1.0=1:100
- phy_xaui_rx_polarity_flip_9.0=0x0
- dport_map_port_26.0=94
- phy_xaui_tx_polarity_flip_107.0=0x3
- portmap_89.0=87:50:2
- xgxs_tx_lane_map_118.0=0x2013
- xgxs_tx_lane_map_119.0=0x2013
- dport_map_port_89.0=54
- phy_xaui_tx_polarity_flip_80.0=0xa
- phy_xaui_rx_polarity_flip_92.0=0x0
- phy_xaui_tx_polarity_flip_54.0=0x2
- phy_xaui_rx_polarity_flip_66.0=0xf
- portmap_18.0=19:50:2
- dport_map_port_18.0=86
- portmap_119.0=115:50:2
- phy_xaui_rx_polarity_flip_21.0=0x0
- xgxs_rx_lane_map_100.0=0x3210
- phy_xaui_tx_polarity_flip_63.0=0x2
- phy_xaui_rx_polarity_flip_110.0=0x3
- portmap_100.0=131:10
- phy_xaui_rx_polarity_flip_30.0=0x0
- xgxs_rx_lane_map_92.0=0x3210
- xgxs_rx_lane_map_93.0=0x3210
- xgxs_rx_lane_map_66.0=0x3210
- xgxs_tx_lane_map_92.0=0x132
- xgxs_tx_lane_map_93.0=0x132
- xgxs_tx_lane_map_66.0=0x132
- phy_xaui_tx_polarity_flip_72.0=0x0
- portmap_62.0=61:50:2
- phy_xaui_rx_polarity_flip_84.0=0x3
- phy_xaui_tx_polarity_flip_46.0=0x2
- phy_xaui_rx_polarity_flip_58.0=0x2
- tdma_intr_enable=1
- dport_map_port_62.0=13
- xgxs_rx_lane_map_21.0=0x3102
- xgxs_rx_lane_map_22.0=0x3102
- xgxs_tx_lane_map_21.0=0x132
- xgxs_tx_lane_map_22.0=0x132
- phy_xaui_rx_polarity_flip_13.0=0x0
- tdma_timeout_usec.0=5000000
- dport_map_port_126.0=109
- phy_xaui_rx_polarity_flip_93.0=0x1
- phy_xaui_tx_polarity_flip_55.0=0x0
- xgxs_tx_lane_map_100.0=0x132
- phy_xaui_tx_polarity_flip_29.0=0x3
- phy_xaui_rx_polarity_flip_102.0=0x2
- parity_correction.0=1
- phy_xaui_tx_polarity_flip_126.0=0x7
- phy_xaui_tx_polarity_flip_10.0=0x0
- phy_xaui_rx_polarity_flip_22.0=0x0
- xgxs_rx_lane_map_84.0=0x2301
- xgxs_rx_lane_map_85.0=0x2301
- xgxs_rx_lane_map_58.0=0x1203
- xgxs_rx_lane_map_59.0=0x1203
- dport_map_port_5.0=113
- xgxs_tx_lane_map_84.0=0x213
- xgxs_tx_lane_map_85.0=0x213
- xgxs_tx_lane_map_58.0=0x123
- xgxs_tx_lane_map_59.0=0x123
- mmu_lossless.0=0
- xgxs_tx_lane_map_1.0=0x123
- portmap_80.0=77:100
- portmap_54.0=53:50:2
- phy_xaui_rx_polarity_flip_76.0=0x2
- phy_xaui_tx_polarity_flip_38.0=0x0
- phy_xaui_rx_polarity_flip_111.0=0x3
- dport_map_port_80.0=29
- dport_map_port_54.0=5
- xgxs_rx_lane_map_13.0=0x3201
- xgxs_rx_lane_map_14.0=0x3201
- xgxs_tx_lane_map_13.0=0x2301
- xgxs_tx_lane_map_14.0=0x2301
- xgxs_rx_lane_map_110.0=0x3210
- xgxs_rx_lane_map_111.0=0x3210
- phy_xaui_tx_polarity_flip_73.0=0x0
- dport_map_port_118.0=101
- portmap_63.0=63:50:2
- phy_xaui_rx_polarity_flip_85.0=0x3
- phy_xaui_tx_polarity_flip_47.0=0x3
- phy_xaui_rx_polarity_flip_59.0=0x0
- portmap_110.0=105:50:2
- dport_map_port_63.0=14
- phy_xaui_tx_polarity_flip_118.0=0x0
- phy_xaui_rx_polarity_flip_14.0=0x3
- xgxs_rx_lane_map_76.0=0x1203
- xgxs_tx_lane_map_76.0=0x123
- xgxs_rx_lane_map_1.0=0x213
- portmap_72.0=69:50:2
- portmap_46.0=45:50:2
- phy_xaui_rx_polarity_flip_68.0=0x0
- phy_xaui_rx_polarity_flip_1.0=0x9
-
-mmu_init_config="MSFT-TH-Tier0"
diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100/pg_profile_lookup.ini b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100/pg_profile_lookup.ini
deleted file mode 100644
index 7222f8014925..000000000000
--- a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100/pg_profile_lookup.ini
+++ /dev/null
@@ -1,17 +0,0 @@
-# PG lossless profiles.
-# speed cable size xon xoff threshold xon_offset
- 10000 5m 1248 2288 35776 -4 2288
- 25000 5m 1248 2288 53248 -4 2288
- 40000 5m 1248 2288 66560 -4 2288
- 50000 5m 1248 2288 79872 -4 2288
- 100000 5m 1248 2288 165568 -4 2288
- 10000 40m 1248 2288 37024 -4 2288
- 25000 40m 1248 2288 56160 -4 2288
- 40000 40m 1248 2288 71552 -4 2288
- 50000 40m 1248 2288 85696 -4 2288
- 100000 40m 1248 2288 177632 -4 2288
- 10000 300m 1248 2288 46176 -4 2288
- 25000 300m 1248 2288 79040 -4 2288
- 40000 300m 1248 2288 108160 -4 2288
- 50000 300m 1248 2288 131456 -4 2288
- 100000 300m 1248 2288 268736 -4 2288
diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/default_sku b/device/dell/x86_64-dell_z9100_c2538-r0/default_sku
index 71a625493829..e09260239e96 100644
--- a/device/dell/x86_64-dell_z9100_c2538-r0/default_sku
+++ b/device/dell/x86_64-dell_z9100_c2538-r0/default_sku
@@ -1 +1 @@
-Force10-Z9100 t1
+Force10-Z9100-C32 t1
diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/installer.conf b/device/dell/x86_64-dell_z9100_c2538-r0/installer.conf
index 0a9a3a639eb2..5efc436529e1 100644
--- a/device/dell/x86_64-dell_z9100_c2538-r0/installer.conf
+++ b/device/dell/x86_64-dell_z9100_c2538-r0/installer.conf
@@ -1,3 +1,3 @@
CONSOLE_PORT=0x2f8
CONSOLE_DEV=1
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich,i2c_mux_gpio"
diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/platform_reboot b/device/dell/x86_64-dellemc_z9264f_c3538-r0/platform_reboot
new file mode 100644
index 000000000000..3e165630658b
--- /dev/null
+++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/platform_reboot
@@ -0,0 +1,25 @@
+#!/usr/bin/python
+import sys
+import os
+import struct
+
+PORT_RES = '/dev/port'
+
+
+def portio_reg_write(resource, offset, val):
+ fd = os.open(resource, os.O_RDWR)
+ if(fd < 0):
+ print 'file open failed %s" % resource'
+ return
+ if(os.lseek(fd, offset, os.SEEK_SET) != offset):
+ print 'lseek failed on %s' % resource
+ return
+ ret = os.write(fd, struct.pack('B', val))
+ if(ret != 1):
+ print 'write failed %d' % ret
+ return
+ os.close(fd)
+
+if __name__ == "__main__":
+ portio_reg_write(PORT_RES, 0xcf9, 0xe)
+
diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/eeprom.py b/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/eeprom.py
index 37ce00a0ca6c..2af10473065e 100644
--- a/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/eeprom.py
+++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/eeprom.py
@@ -18,5 +18,5 @@
class board(eeprom_tlvinfo.TlvInfoDecoder):
def __init__(self, name, path, cpld_root, ro):
- self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0053/eeprom"
+ self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0050/eeprom"
super(board, self).__init__(self.eeprom_path, 0, '', True)
diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/psuutil.py b/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/psuutil.py
index d3fe5cf64240..88023d9d5a10 100644
--- a/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/psuutil.py
+++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/psuutil.py
@@ -10,7 +10,7 @@
Z9264F_MAX_PSUS = 2
-IPMI_SENSOR_DATA = "ipmitool sdr list"
+IPMI_SENSOR_DATA = "docker exec -it pmon ipmitool sdr list"
PSU_PRESENCE = "PSU{0}_state"
# Use this for older firmware
# PSU_PRESENCE="PSU{0}_prsnt"
diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/sfputil.py b/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/sfputil.py
index cbd723717afd..a4a0747a3bc5 100644
--- a/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/sfputil.py
+++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/sfputil.py
@@ -27,6 +27,8 @@ class SfpUtil(SfpUtilBase):
_port_to_eeprom_mapping = {}
+ _global_port_pres_dict = {}
+
@property
def port_start(self):
return self.PORT_START
@@ -44,28 +46,42 @@ def port_to_eeprom_mapping(self):
return self._port_to_eeprom_mapping
def pci_mem_read(self, mm, offset):
- mm.seek(offset)
- read_data_stream=mm.read(4)
- reg_val=struct.unpack('I',read_data_stream)
- mem_val = str(reg_val)[1:-2]
- # print "reg_val read:%x"%reg_val
- return mem_val
+ mm.seek(offset)
+ read_data_stream=mm.read(4)
+ reg_val=struct.unpack('I',read_data_stream)
+ mem_val = str(reg_val)[1:-2]
+ # print "reg_val read:%x"%reg_val
+ return mem_val
def pci_mem_write(self, mm, offset, data):
- mm.seek(offset)
- # print "data to write:%x"%data
- mm.write(struct.pack('I',data))
+ mm.seek(offset)
+ # print "data to write:%x"%data
+ mm.write(struct.pack('I',data))
def pci_set_value(self, resource, val, offset):
- fd=open(resource,O_RDWR)
- mm=mmap(fd,0)
- return self.pci_mem_write(mm,offset,val)
+ fd = open(resource, O_RDWR)
+ mm = mmap(fd, 0)
+ val = self.pci_mem_write(mm, offset, val)
+ mm.close()
+ close(fd)
+ return val
def pci_get_value(self, resource, offset):
- fd=open(resource,O_RDWR)
- mm=mmap(fd,0)
- return self.pci_mem_read(mm, offset)
+ fd = open(resource, O_RDWR)
+ mm = mmap(fd, 0)
+ val = self.pci_mem_read(mm, offset)
+ mm.close()
+ close(fd)
+ return val
+ def init_global_port_presence(self):
+ for port_num in range(self.port_start, (self.port_end + 1)):
+ presence = self.get_presence(port_num)
+ if(presence):
+ self._global_port_pres_dict[port_num] = '1'
+ else:
+ self._global_port_pres_dict[port_num] = '0'
+
def __init__(self):
eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom"
@@ -74,6 +90,7 @@ def __init__(self):
self.port_to_eeprom_mapping[x] = eeprom_path.format(
port_num)
port_num = 0
+ self.init_global_port_presence()
SfpUtilBase.__init__(self)
@@ -192,9 +209,19 @@ def reset(self, port_num):
return True
def get_transceiver_change_event(self):
- """
- TODO: This function need to be implemented
- when decide to support monitoring SFP(Xcvrd)
- on this platform.
- """
- raise NotImplementedError
+ port_dict = {}
+ while True:
+ for port_num in range(self.port_start, (self.port_end + 1)):
+ presence = self.get_presence(port_num)
+ if(presence and self._global_port_pres_dict[port_num] == '0'):
+ self._global_port_pres_dict[port_num] = '1'
+ port_dict[port_num] = '1'
+ elif(not presence and
+ self._global_port_pres_dict[port_num] == '1'):
+ self._global_port_pres_dict[port_num] = '0'
+ port_dict[port_num] = '0'
+
+ if(len(port_dict) > 0):
+ return True, port_dict
+
+ time.sleep(0.5)
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/sai_2700.xml b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/sai_2700.xml
index 7831c9cf59d0..eedf359fb889 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/sai_2700.xml
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/sai_2700.xml
@@ -5,6 +5,9 @@
00:02:03:04:05:00
+
+ 1
+
32
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai_2700_48x50g_8x100g.xml b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai_2700_48x50g_8x100g.xml
index bda7a3e1cc17..dccb606f7435 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai_2700_48x50g_8x100g.xml
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai_2700_48x50g_8x100g.xml
@@ -5,6 +5,9 @@
00:02:03:04:05:00
+
+ 1
+
32
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py
index 3f31af9f2944..9713873ed264 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py
@@ -1,17 +1,47 @@
#!/usr/bin/env python
import sys, errno
-import time
import os
from python_sdk_api.sxd_api import *
from python_sdk_api.sx_api import *
+REGISTER_NUM = 1
+SXD_LOG_VERBOSITY_LEVEL = 0
+DEVICE_ID = 1
+SWITCH_ID = 0
+SX_PORT_ATTR_ARR_SIZE = 64
+
+PMAOS_ASE = 1
+PMAOS_EE = 1
+PMAOS_E = 2
+PMAOS_RST = 0
+PMAOS_ENABLE = 1
+PMAOS_DISABLE = 2
+
+def get_port_admin_status_by_log_port(log_port):
+ oper_state_p = new_sx_port_oper_state_t_p()
+ admin_state_p = new_sx_port_admin_state_t_p()
+ module_state_p = new_sx_port_module_state_t_p()
+ rc = sx_api_port_state_get(handle, log_port, oper_state_p, admin_state_p, module_state_p)
+ assert rc == SXD_STATUS_SUCCESS, "sx_api_port_state_get failed, rc = %d" % rc
+
+ admin_state = sx_port_admin_state_t_p_value(admin_state_p)
+ if admin_state == SX_PORT_ADMIN_STATUS_UP:
+ return True
+ else:
+ return False
+
+def set_port_admin_status_by_log_port(handle, log_port, admin_status):
+ rc = sx_api_port_state_set(handle, log_port, admin_status)
+ assert rc == SX_STATUS_SUCCESS, "sx_api_port_state_set failed, rc = %d" % rc
+
+# Get all the ports related to the sfp, if port admin status is up, put it to list
def get_log_ports(handle, sfp_module):
- port_attributes_list = new_sx_port_attributes_t_arr(64)
+ port_attributes_list = new_sx_port_attributes_t_arr(SX_PORT_ATTR_ARR_SIZE)
port_cnt_p = new_uint32_t_p()
- uint32_t_p_assign(port_cnt_p, 64)
+ uint32_t_p_assign(port_cnt_p, SX_PORT_ATTR_ARR_SIZE)
- rc = sx_api_port_device_get(handle, 1 , 0, port_attributes_list, port_cnt_p)
+ rc = sx_api_port_device_get(handle, DEVICE_ID , SWITCH_ID, port_attributes_list, port_cnt_p)
assert rc == SX_STATUS_SUCCESS, "sx_api_port_device_get failed, rc = %d" % rc
port_cnt = uint32_t_p_value(port_cnt_p)
@@ -19,32 +49,60 @@ def get_log_ports(handle, sfp_module):
for i in range(0, port_cnt):
port_attributes = sx_port_attributes_t_arr_getitem(port_attributes_list, i)
if port_attributes.port_mapping.module_port == sfp_module:
- log_port_list.append(port_attributes.log_port)
+ if get_port_admin_status_by_log_port(port_attributes.log_port):
+ log_port_list.append(port_attributes.log_port)
return log_port_list
-def set_sfp_admin_status(handle, meta, sfp_module, sfp_log_port_list, admin_status):
+def init_sx_meta_data():
+ meta = sxd_reg_meta_t()
+ meta.dev_id = DEVICE_ID
+ meta.swid = SWITCH_ID
+ return meta
+
+def set_sfp_admin_status(sfp_module, admin_status):
# Get PMAOS
pmaos = ku_pmaos_reg()
pmaos.module = sfp_module
+ meta = init_sx_meta_data()
meta.access_cmd = SXD_ACCESS_CMD_GET
- rc = sxd_access_reg_pmaos(pmaos, meta, 1, None, None)
+ rc = sxd_access_reg_pmaos(pmaos, meta, REGISTER_NUM, None, None)
assert rc == SXD_STATUS_SUCCESS, "sxd_access_reg_pmaos failed, rc = %d" % rc
# Set admin status to PMAOS
- pmaos.ase = 1
- pmaos.ee = 1
- pmaos.e = 2
- pmaos.rst = 0
+ pmaos.ase = PMAOS_ASE
+ pmaos.ee = PMAOS_EE
+ pmaos.e = PMAOS_E
+ pmaos.rst = PMAOS_RST
if admin_status == SX_PORT_ADMIN_STATUS_DOWN:
- pmaos.admin_status = 2
+ pmaos.admin_status = PMAOS_DISABLE
else:
- pmaos.admin_status = 1
+ pmaos.admin_status = PMAOS_ENABLE
meta.access_cmd = SXD_ACCESS_CMD_SET
- rc = sxd_access_reg_pmaos(pmaos, meta, 1, None, None)
+ rc = sxd_access_reg_pmaos(pmaos, meta, REGISTER_NUM, None, None)
assert rc == SXD_STATUS_SUCCESS, "sxd_access_reg_pmaos failed, rc = %d" % rc
+def set_sfp_lpmode(sfp_module, lpm_enable):
+ # Get PMMP
+ pmmp = ku_pmmp_reg()
+ pmmp.module = sfp_module
+ meta = init_sx_meta_data()
+ meta.access_cmd = SXD_ACCESS_CMD_GET
+ rc = sxd_access_reg_pmmp(pmmp, meta, REGISTER_NUM, None, None)
+ assert rc == SXD_STATUS_SUCCESS, "sxd_access_reg_pmmp failed, rc = %d" % rc
+
+ # Set low power mode status
+ lpm_mask = 1 << 8
+ if lpm_enable:
+ pmmp.eeprom_override = pmmp.eeprom_override | lpm_mask
+ else:
+ pmmp.eeprom_override = pmmp.eeprom_override & (~lpm_mask)
+
+ meta.access_cmd = SXD_ACCESS_CMD_SET
+ rc = sxd_access_reg_pmmp(pmmp, meta, REGISTER_NUM, None, None)
+ assert rc == SXD_STATUS_SUCCESS, "sxd_access_reg_pmmp failed, rc = %d" % rc
+
# Check if SFP port number is provided
if len(sys.argv) < 3:
print "SFP module number or LPM is missed."
@@ -67,41 +125,30 @@ def set_sfp_admin_status(handle, meta, sfp_module, sfp_log_port_list, admin_stat
sys.exit(errno.EACCES)
pid = os.getpid()
-rc = sxd_access_reg_init(pid, None, 0)
-if (rc != 0):
+rc = sxd_access_reg_init(pid, None, SXD_LOG_VERBOSITY_LEVEL)
+if (rc != SXD_STATUS_SUCCESS):
print "Failed to initializing register access.\nPlease check that SDK is running."
sys.exit(errno.EACCES);
-# Get SFP module and log ports number and LPM status
+# Get SFP module
sfp_module = int(sys.argv[1])
+
+# Get all ports at admin up status that related to the SFP module
log_port_list = get_log_ports(handle, sfp_module)
-if not log_port_list:
- print "Failed to get log ports"
- sys.exit(errno.EACCES)
-# Get PMMP
-pmmp = ku_pmmp_reg()
-pmmp.module = sfp_module
-meta = sxd_reg_meta_t()
-meta.dev_id = 1
-meta.swid = 0
-meta.access_cmd = SXD_ACCESS_CMD_GET
-rc = sxd_access_reg_pmmp(pmmp, meta, 1, None, None)
-assert rc == SXD_STATUS_SUCCESS, "sxd_access_reg_pmmp failed, rc = %d" % rc
+# SET SFP related ports to admin down status
+for log_port in log_port_list:
+ set_port_admin_status_by_log_port(handle, log_port, SX_PORT_ADMIN_STATUS_DOWN)
# Disable admin status before LPM settings
-set_sfp_admin_status(handle, meta, sfp_module, log_port_list, SX_PORT_ADMIN_STATUS_DOWN)
+set_sfp_admin_status(sfp_module, SX_PORT_ADMIN_STATUS_DOWN)
# Set low power mode status
-lpm_mask = 1 << 8
-if lpm_enable:
- pmmp.eeprom_override = pmmp.eeprom_override | lpm_mask
-else:
- pmmp.eeprom_override = pmmp.eeprom_override & (~lpm_mask)
-
-meta.access_cmd = SXD_ACCESS_CMD_SET
-rc = sxd_access_reg_pmmp(pmmp, meta, 1, None, None)
-assert rc == SXD_STATUS_SUCCESS, "sxd_access_reg_pmmp failed, rc = %d" % rc
+set_sfp_lpmode(sfp_module, lpm_enable)
# Enable admin status after LPM settings
-set_sfp_admin_status(handle, meta, sfp_module, log_port_list, SX_PORT_ADMIN_STATUS_UP)
+set_sfp_admin_status(sfp_module, SX_PORT_ADMIN_STATUS_UP)
+
+# SET SFP related ports to admin up status
+for log_port in log_port_list:
+ set_port_admin_status_by_log_port(handle, log_port, SX_PORT_ADMIN_STATUS_UP)
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py
index 98a7477aa601..e4f9f05d41ff 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py
@@ -123,31 +123,9 @@ def set_low_power_mode(self, port_num, lpmode):
if curr_lpmode == lpmode:
return True
+ # Compose LPM command
lpm = 'on' if lpmode else 'off'
lpm_cmd = "docker exec syncd python /usr/share/sonic/platform/plugins/sfplpmset.py {} {}".format(port_num, lpm)
- sfp_port_names = self.physical_to_logical[port_num]
-
- # Get port admin status
- try:
- enabled_ports = subprocess.check_output("ip link show up", shell=True)
- except subprocess.CalledProcessError as e:
- print "Error! Unable to get ports status, err msg: {}".format(e.output)
- return False
-
- port_to_disable = []
- for port in sfp_port_names:
- if port in enabled_ports:
- port_to_disable.append(port)
-
- # Disable ports before LPM settings
- for port in port_to_disable:
- try:
- subprocess.check_output("ifconfig {} down".format(port), shell=True)
- except subprocess.CalledProcessError as e:
- print "Error! Unable to set admin status to DOWN for {}, rc = {}, err msg: {}".format(port, e.returncode, e.output)
- return False
-
- time.sleep(3)
# Set LPM
try:
@@ -156,14 +134,6 @@ def set_low_power_mode(self, port_num, lpmode):
print "Error! Unable to set LPM for {}, rc = {}, err msg: {}".format(port_num, e.returncode, e.output)
return False
- # Enable ports after LPM settings
- for port in port_to_disable:
- try:
- subprocess.check_output("ifconfig {} up".format(port), shell=True)
- except subprocess.CalledProcessError as e:
- print "Error! Unable to set admin status to UP for {}, rc = {}, err msg: {}".format(port, e.returncode, e.output)
- return False
-
return True
def reset(self, port_num):
@@ -206,7 +176,11 @@ def get_transceiver_change_event(self, timeout=0):
if 'LIVENESS' not in keys:
return False, phy_port_dict
- (state, c) = self.db_sel.select(timeout)
+ if timeout:
+ (state, c) = self.db_sel.select(timeout)
+ else:
+ (state, c) = self.db_sel.select()
+
if state == self.db_sel_timeout:
status = True
elif state != self.db_sel_object:
diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 22d69702286b..a3cbf5adbae7 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -28,7 +28,7 @@ function preStartAction()
{
{%- if docker_container_name == "database" %}
WARM_DIR=/host/warmboot
- if [[ "$BOOT_TYPE" == "warm" && -f $WARM_DIR/dump.rdb ]]; then
+ if [[ ("$BOOT_TYPE" == "warm" || "$BOOT_TYPE" == "fastfast") && -f $WARM_DIR/dump.rdb ]]; then
# Load redis content from /host/warmboot/dump.rdb
docker cp $WARM_DIR/dump.rdb database:/var/lib/redis/dump.rdb
else
@@ -49,7 +49,7 @@ function postStartAction()
until [[ $(/usr/bin/docker exec database redis-cli -s $REDIS_SOCK ping | grep -c PONG) -gt 0 ]]; do
sleep 1;
done
- if [[ "$BOOT_TYPE" == "warm" && -f $WARM_DIR/dump.rdb ]]; then
+ if [[ ("$BOOT_TYPE" == "warm" || "$BOOT_TYPE" == "fastfast") && -f $WARM_DIR/dump.rdb ]]; then
rm -f $WARM_DIR/dump.rdb
else
# If there is a config db dump file, load it
@@ -61,7 +61,7 @@ function postStartAction()
fi
{%- elif docker_container_name == "swss" %}
docker exec swss rm -f /ready # remove cruft
- if [[ "$BOOT_TYPE" == "fast" || "$BOOT_TYPE" == "fastfast" ]] && [[ -d /host/fast-reboot ]]; then
+ if [[ "$BOOT_TYPE" == "fast" ]] && [[ -d /host/fast-reboot ]]; then
test -e /host/fast-reboot/fdb.json && docker cp /host/fast-reboot/fdb.json swss:/
test -e /host/fast-reboot/arp.json && docker cp /host/fast-reboot/arp.json swss:/
test -e /host/fast-reboot/default_routes.json && docker cp /host/fast-reboot/default_routes.json swss:/
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 3294068e71a6..ed8df864cd06 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -43,7 +43,8 @@ clean_sys() {
trap_push clean_sys
sudo LANG=C chroot $FILESYSTEM_ROOT mount sysfs /sys -t sysfs
-sudo bash -c "echo \"DOCKER_OPTS=\"--storage-driver=overlay\"\" >> $FILESYSTEM_ROOT/etc/default/docker"
+sudo bash -c "echo \"DOCKER_OPTS=\"--storage-driver=overlay2\"\" >> $FILESYSTEM_ROOT/etc/default/docker"
+sudo cp files/docker/docker $FILESYSTEM_ROOT/etc/init.d/
sudo chroot $FILESYSTEM_ROOT service docker start
# Apply apt configuration files
@@ -280,6 +281,7 @@ sudo LANG=C chroot $FILESYSTEM_ROOT docker load < {{image}}
sudo LANG=C chroot $FILESYSTEM_ROOT docker tag {{imagename}}:latest {{imagename}}:$(sonic_get_version)
{% endfor %}
sudo chroot $FILESYSTEM_ROOT service docker stop
+sudo rm $FILESYSTEM_ROOT/etc/init.d/docker
{% for script in installer_start_scripts.split(' ') -%}
sudo cp {{script}} $FILESYSTEM_ROOT/usr/bin/
{% endfor %}
diff --git a/files/docker/README b/files/docker/README
new file mode 100644
index 000000000000..d6a1ef008c2a
--- /dev/null
+++ b/files/docker/README
@@ -0,0 +1,2 @@
+docker file is extracted from docker-ce 17.03.0~ce-0~debian-stretch to
+enable 'service docker start' in the build chroot env.
diff --git a/files/docker/docker b/files/docker/docker
new file mode 100755
index 000000000000..4f9d38dda5c6
--- /dev/null
+++ b/files/docker/docker
@@ -0,0 +1,152 @@
+#!/bin/sh
+set -e
+
+### BEGIN INIT INFO
+# Provides: docker
+# Required-Start: $syslog $remote_fs
+# Required-Stop: $syslog $remote_fs
+# Should-Start: cgroupfs-mount cgroup-lite
+# Should-Stop: cgroupfs-mount cgroup-lite
+# Default-Start: 2 3 4 5
+# Default-Stop: 0 1 6
+# Short-Description: Create lightweight, portable, self-sufficient containers.
+# Description:
+# Docker is an open-source project to easily create lightweight, portable,
+# self-sufficient containers from any application. The same container that a
+# developer builds and tests on a laptop can run at scale, in production, on
+# VMs, bare metal, OpenStack clusters, public clouds and more.
+### END INIT INFO
+
+export PATH=/sbin:/bin:/usr/sbin:/usr/bin:/usr/local/sbin:/usr/local/bin
+
+BASE=docker
+
+# modify these in /etc/default/$BASE (/etc/default/docker)
+DOCKERD=/usr/bin/dockerd
+# This is the pid file managed by docker itself
+DOCKER_PIDFILE=/var/run/$BASE.pid
+# This is the pid file created/managed by start-stop-daemon
+DOCKER_SSD_PIDFILE=/var/run/$BASE-ssd.pid
+DOCKER_LOGFILE=/var/log/$BASE.log
+DOCKER_OPTS=
+DOCKER_DESC="Docker"
+
+# Get lsb functions
+. /lib/lsb/init-functions
+
+if [ -f /etc/default/$BASE ]; then
+ . /etc/default/$BASE
+fi
+
+# Check docker is present
+if [ ! -x $DOCKERD ]; then
+ log_failure_msg "$DOCKERD not present or not executable"
+ exit 1
+fi
+
+check_init() {
+ # see also init_is_upstart in /lib/lsb/init-functions (which isn't available in Ubuntu 12.04, or we'd use it directly)
+ if [ -x /sbin/initctl ] && /sbin/initctl version 2>/dev/null | grep -q upstart; then
+ log_failure_msg "$DOCKER_DESC is managed via upstart, try using service $BASE $1"
+ exit 1
+ fi
+}
+
+fail_unless_root() {
+ if [ "$(id -u)" != '0' ]; then
+ log_failure_msg "$DOCKER_DESC must be run as root"
+ exit 1
+ fi
+}
+
+cgroupfs_mount() {
+ # see also https://github.com/tianon/cgroupfs-mount/blob/master/cgroupfs-mount
+ if grep -v '^#' /etc/fstab | grep -q cgroup \
+ || [ ! -e /proc/cgroups ] \
+ || [ ! -d /sys/fs/cgroup ]; then
+ return
+ fi
+ if ! mountpoint -q /sys/fs/cgroup; then
+ mount -t tmpfs -o uid=0,gid=0,mode=0755 cgroup /sys/fs/cgroup
+ fi
+ (
+ cd /sys/fs/cgroup
+ for sys in $(awk '!/^#/ { if ($4 == 1) print $1 }' /proc/cgroups); do
+ mkdir -p $sys
+ if ! mountpoint -q $sys; then
+ if ! mount -n -t cgroup -o $sys cgroup $sys; then
+ rmdir $sys || true
+ fi
+ fi
+ done
+ )
+}
+
+case "$1" in
+ start)
+ check_init
+
+ fail_unless_root
+
+ cgroupfs_mount
+
+ touch "$DOCKER_LOGFILE"
+ chgrp docker "$DOCKER_LOGFILE"
+
+ ulimit -n 1048576
+
+ # Having non-zero limits causes performance problems due to accounting overhead
+ # in the kernel. We recommend using cgroups to do container-local accounting.
+ if [ "$BASH" ]; then
+ ulimit -u unlimited
+ else
+ ulimit -p unlimited
+ fi
+
+ log_begin_msg "Starting $DOCKER_DESC: $BASE"
+ start-stop-daemon --start --background \
+ --no-close \
+ --exec "$DOCKERD" \
+ --pidfile "$DOCKER_SSD_PIDFILE" \
+ --make-pidfile \
+ -- \
+ -p "$DOCKER_PIDFILE" \
+ $DOCKER_OPTS \
+ >> "$DOCKER_LOGFILE" 2>&1
+ log_end_msg $?
+ ;;
+
+ stop)
+ check_init
+ fail_unless_root
+ log_begin_msg "Stopping $DOCKER_DESC: $BASE"
+ start-stop-daemon --stop --pidfile "$DOCKER_SSD_PIDFILE" --retry 10
+ log_end_msg $?
+ ;;
+
+ restart)
+ check_init
+ fail_unless_root
+ docker_pid=`cat "$DOCKER_SSD_PIDFILE" 2>/dev/null`
+ [ -n "$docker_pid" ] \
+ && ps -p $docker_pid > /dev/null 2>&1 \
+ && $0 stop
+ $0 start
+ ;;
+
+ force-reload)
+ check_init
+ fail_unless_root
+ $0 restart
+ ;;
+
+ status)
+ check_init
+ status_of_proc -p "$DOCKER_SSD_PIDFILE" "$DOCKERD" "$DOCKER_DESC"
+ ;;
+
+ *)
+ echo "Usage: service docker {start|stop|restart|status}"
+ exit 1
+ ;;
+esac
diff --git a/files/docker/docker.service.conf b/files/docker/docker.service.conf
index b124d94f70d1..e9ba55c8afa8 100644
--- a/files/docker/docker.service.conf
+++ b/files/docker/docker.service.conf
@@ -1,3 +1,3 @@
[Service]
ExecStart=
-ExecStart=/usr/bin/docker daemon -H fd:// --storage-driver=overlay --bip=240.127.1.1/24 --iptables=false
+ExecStart=/usr/bin/dockerd -H unix:// --storage-driver=overlay2 --bip=240.127.1.1/24 --iptables=false
diff --git a/files/scripts/swss.sh b/files/scripts/swss.sh
index b5ff18770938..70b81383fa44 100755
--- a/files/scripts/swss.sh
+++ b/files/scripts/swss.sh
@@ -90,11 +90,7 @@ start() {
# Don't flush DB during warm boot
if [[ x"$WARM_BOOT" != x"true" ]]; then
- # Don't flush APP_DB during MLNX fastfast boot
- BOOT_TYPE="$(cat /proc/cmdline | grep -o 'SONIC_BOOT_TYPE=\S*' | cut -d'=' -f2)"
- if [[ x"$BOOT_TYPE" != x"fastfast" ]] && [[ ! -f /var/warmboot/issu_started ]]; then
- /usr/bin/docker exec database redis-cli -n 0 FLUSHDB
- fi
+ /usr/bin/docker exec database redis-cli -n 0 FLUSHDB
/usr/bin/docker exec database redis-cli -n 2 FLUSHDB
/usr/bin/docker exec database redis-cli -n 5 FLUSHDB
clean_up_tables 6 "'PORT_TABLE*', 'MGMT_PORT_TABLE*', 'VLAN_TABLE*', 'VLAN_MEMBER_TABLE*', 'INTERFACE_TABLE*', 'MIRROR_SESSION*'"
diff --git a/files/scripts/syncd.sh b/files/scripts/syncd.sh
index 3e011a2f07bf..bef8ff11558c 100755
--- a/files/scripts/syncd.sh
+++ b/files/scripts/syncd.sh
@@ -90,14 +90,12 @@ start() {
# Flush DB during non-warm start
/usr/bin/docker exec database redis-cli -n 1 FLUSHDB
-
- # platform specific tasks
- if [ x$sonic_asic_platform == x'cavium' ]; then
- /etc/init.d/xpnet.sh start
- fi
fi
# platform specific tasks
+
+ # start mellanox drivers regardless of
+ # boot type
if [ x"$sonic_asic_platform" == x"mellanox" ]; then
BOOT_TYPE=`getBootType`
if [[ x"$WARM_BOOT" == x"true" || x"$BOOT_TYPE" == x"fast" ]]; then
@@ -109,6 +107,13 @@ start() {
/sbin/modprobe i2c-dev
fi
+ if [[ x"$WARM_BOOT" != x"true" ]]; then
+ if [ x$sonic_asic_platform == x'cavium' ]; then
+ /etc/init.d/xpnet.sh start
+ fi
+ fi
+
+
# start service docker
/usr/bin/${SERVICE}.sh start
debug "Started ${SERVICE} service..."
@@ -146,21 +151,23 @@ stop() {
/usr/bin/${SERVICE}.sh stop
debug "Stopped ${SERVICE} service..."
- # if warm start enabled, don't stop peer service docker
+ # platform specific tasks
+
+ # stop mellanox driver regardless of
+ # shutdown type
+ if [ x$sonic_asic_platform == x'mellanox' ]; then
+ /etc/init.d/sxdkernel stop
+ /usr/bin/mst stop
+ fi
+
+
if [[ x"$WARM_BOOT" != x"true" ]]; then
- # platform specific tasks
if [ x$sonic_asic_platform == x'cavium' ]; then
/etc/init.d/xpnet.sh stop
/etc/init.d/xpnet.sh start
fi
fi
- # platform specific tasks
- if [ x"$sonic_asic_platform" == x"mellanox" ]; then
- /etc/init.d/sxdkernel stop
- /usr/bin/mst stop
- fi
-
unlock_service_state_change
}
diff --git a/platform/broadcom/sonic-platform-modules-dell/common/dell_i2c_utils.sh b/platform/broadcom/sonic-platform-modules-dell/common/dell_i2c_utils.sh
index 896e0166dc59..7ebf1e544497 100755
--- a/platform/broadcom/sonic-platform-modules-dell/common/dell_i2c_utils.sh
+++ b/platform/broadcom/sonic-platform-modules-dell/common/dell_i2c_utils.sh
@@ -18,7 +18,7 @@ i2c_config() {
done
if [[ "$count" -eq "$MAX_BUS_RETRY" ]]; then
- echo "ERROR: $@ : i2c bus not created"
+ echo "dell_i2c_utils : ERROR: $@ : i2c bus not created"
return
fi
@@ -31,7 +31,7 @@ i2c_config() {
done
if [[ "$count" -eq "$MAX_I2C_OP_RETRY" ]]; then
- echo "ERROR: $@ : i2c operation failed"
+ echo "dell_i2c_utils : ERROR: $@ : i2c operation failed"
return
fi
}
@@ -53,10 +53,75 @@ i2c_poll_bus_exists() {
done
if [[ "$count" -eq "$MAX_BUS_RETRY" ]]; then
- echo "ERROR: $@ : i2c bus not created"
+ echo "dell_i2c_utils : ERROR: $@ : i2c bus not created"
return 1
else
return 0
fi
}
+# Perform an i2c mux device create
+# Input is of the form:
+# i2c_mux_create mux_driver i2c_addr i2c_bus_num i2c_child_bus_num_start
+# where i2c_bus_num is the bus number in which the mux is to be created and
+# i2c_child_bus_num_start is the first of the 8 bus channels that this mux should create
+i2c_mux_create() {
+ local MAX_MUX_CHANNEL_RETRY=3
+ local MAX_MUX_CHANNELS=8
+ local count=0
+ local i
+ local mux_driver=$1
+ local i2c_addr=$2
+ local i2c_bus_num=$3
+ local i2c_child_bus_num_start=$4
+
+ # Construct the i2c bus, the first and last bus channels that will be created under the MUX
+ i2c_bus=/sys/bus/i2c/devices/i2c-$i2c_bus_num
+ i2c_mux_channel_first=$i2c_bus/i2c-$i2c_child_bus_num_start
+ i2c_mux_channel_last=$i2c_bus/i2c-$(expr $i2c_child_bus_num_start + $MAX_MUX_CHANNELS - 1)
+
+ if i2c_poll_bus_exists $i2c_bus; then
+ while [[ "$count" -lt "$MAX_MUX_CHANNEL_RETRY" ]]; do
+ eval "echo $mux_driver $i2c_addr > /sys/bus/i2c/devices/i2c-$i2c_bus_num/new_device" > /dev/null 2>&1
+ ret=$?
+
+ # Give more time for the mux channels to get created based on retries
+ i=0
+ while [[ "$i" -lt "$count" ]]; do
+ sleep 1
+ i=$((i+1))
+ done
+
+ # Check if the (first and last) mux channels got created
+ if [[ $ret -eq "0" && -e $i2c_mux_channel_first && -e $i2c_mux_channel_last ]]; then
+ break;
+ else
+ # If the channel did not get created, remove the mux, reset the mux tree and retry
+ echo "dell_i2c_utils : ERROR: i2c mux channel not created for $mux_driver,$i2c_addr,$i2c_bus_num"
+ i2c_mux_delete $i2c_addr $i2c_bus_num
+ reset_muxes
+ fi
+
+ count=$((count+1))
+ done
+ fi
+
+ if [[ "$count" -eq "$MAX_MUX_CHANNEL_RETRY" ]]; then
+ echo "dell_i2c_utils : ERROR: $1,$2 : i2c mux channel not created"
+ return
+ fi
+
+ return
+}
+
+# Perform an i2c mux device delete
+# Input is of the form:
+# i2c_mux_delete i2c_addr i2c_bus_num
+i2c_mux_delete() {
+ local i2c_addr
+ local i2c_bus_num
+
+ i2c_addr=$1
+ i2c_bus_num=$2
+ i2c_config "echo $i2c_addr > /sys/bus/i2c/devices/i2c-$i2c_bus_num/delete_device"
+}
diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/io_rd_wr.py b/platform/broadcom/sonic-platform-modules-dell/common/io_rd_wr.py
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-dell/s6100/scripts/io_rd_wr.py
rename to platform/broadcom/sonic-platform-modules-dell/common/io_rd_wr.py
diff --git a/platform/broadcom/sonic-platform-modules-dell/common/platform_reboot b/platform/broadcom/sonic-platform-modules-dell/common/platform_reboot
new file mode 100755
index 000000000000..3e165630658b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-dell/common/platform_reboot
@@ -0,0 +1,25 @@
+#!/usr/bin/python
+import sys
+import os
+import struct
+
+PORT_RES = '/dev/port'
+
+
+def portio_reg_write(resource, offset, val):
+ fd = os.open(resource, os.O_RDWR)
+ if(fd < 0):
+ print 'file open failed %s" % resource'
+ return
+ if(os.lseek(fd, offset, os.SEEK_SET) != offset):
+ print 'lseek failed on %s' % resource
+ return
+ ret = os.write(fd, struct.pack('B', val))
+ if(ret != 1):
+ print 'write failed %d' % ret
+ return
+ os.close(fd)
+
+if __name__ == "__main__":
+ portio_reg_write(PORT_RES, 0xcf9, 0xe)
+
diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.install b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.install
index 7d56aee6e2f7..9be9da0ab428 100644
--- a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.install
+++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.install
@@ -1,9 +1,10 @@
-s6100/scripts/io_rd_wr.py usr/local/bin
s6100/scripts/iom_power_*.sh usr/local/bin
s6100/scripts/s6100_platform.sh usr/local/bin
common/dell_i2c_utils.sh usr/local/bin
+common/io_rd_wr.py usr/local/bin
common/fstrim.timer etc/systemd/system
common/fstrim.service etc/systemd/system
+common/platform_reboot usr/share/sonic/device/x86_64-dell_s6100_c2538-r0
s6100/scripts/platform_sensors.py usr/local/bin
s6100/scripts/sensors usr/bin
s6100/systemd/platform-modules-s6100.service etc/systemd/system
diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.install b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.install
index 410dcf16ea1b..4e141c762c22 100644
--- a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.install
+++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.install
@@ -1,8 +1,10 @@
z9100/scripts/check_qsfp.sh usr/local/bin
z9100/scripts/z9100_platform.sh usr/local/bin
common/dell_i2c_utils.sh usr/local/bin
+common/io_rd_wr.py usr/local/bin
common/fstrim.timer etc/systemd/system
common/fstrim.service etc/systemd/system
+common/platform_reboot usr/share/sonic/device/x86_64-dell_z9100_c2538-r0
z9100/scripts/platform_sensors.py usr/local/bin
z9100/scripts/sensors usr/bin
z9100/cfg/z9100-modules.conf etc/modules-load.d
diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.install b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.install
index 7887399e4964..dbe2b81131db 100644
--- a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.install
+++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.install
@@ -4,3 +4,4 @@ z9264f/scripts/platform_sensors.py usr/local/bin
z9264f/scripts/sensors usr/bin
z9264f/scripts/pcisysfs.py usr/bin
z9264f/cfg/z9264f-modules.conf etc/modules-load.d
+z9264f/systemd/platform-modules-z9264f.service etc/systemd/system
diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.postinst b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.postinst
new file mode 100644
index 000000000000..f5da0a818900
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.postinst
@@ -0,0 +1,10 @@
+# postinst script for Z9264f
+
+# Enable Dell-Z9264f-platform-service
+depmod -a
+systemctl enable platform-modules-z9264f.service
+systemctl start platform-modules-z9264f.service
+
+
+#DEBHELPER#
+
diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/modules/dell_s6100_iom_cpld.c b/platform/broadcom/sonic-platform-modules-dell/s6100/modules/dell_s6100_iom_cpld.c
index 7b9cf77a448e..1ffa909ed70a 100644
--- a/platform/broadcom/sonic-platform-modules-dell/s6100/modules/dell_s6100_iom_cpld.c
+++ b/platform/broadcom/sonic-platform-modules-dell/s6100/modules/dell_s6100_iom_cpld.c
@@ -11,6 +11,8 @@
//iom cpld slave address
#define IOM_CPLD_SLAVE_ADD 0x3e
+#define CPLD_SEP_RST0 0x5
+
//iom cpld ver register
#define IOM_CPLD_SLAVE_VER 0x00
@@ -384,6 +386,34 @@ static ssize_t set_abs_mask(struct device *dev, struct device_attribute *devattr
return count;
}
+static ssize_t get_sep_reset(struct device *dev, struct device_attribute *devattr, char *buf)
+{
+ int ret;
+ u8 devdata=0;
+ struct cpld_data *data = dev_get_drvdata(dev);
+
+ ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,CPLD_SEP_RST0);
+ if(ret < 0)
+ return sprintf(buf, "read error");
+ devdata = (u8)ret & 0xff;
+ return sprintf(buf,"0x%02x\n",devdata);
+}
+
+static ssize_t set_sep_reset(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count)
+{
+ unsigned long devdata;
+ int err;
+ struct cpld_data *data = dev_get_drvdata(dev);
+
+ err = kstrtoul(buf, 16, &devdata);
+ if (err)
+ return err;
+
+ dell_s6100_iom_cpld_write(data,IOM_CPLD_SLAVE_ADD,CPLD_SEP_RST0,(u8)(devdata & 0xff));
+
+ return count;
+}
+
static DEVICE_ATTR(iom_cpld_vers,S_IRUGO,get_cpldver, NULL);
static DEVICE_ATTR(qsfp_modprs, S_IRUGO,get_modprs, NULL);
static DEVICE_ATTR(qsfp_lpmode, S_IRUGO | S_IWUSR,get_lpmode,set_lpmode);
@@ -396,6 +426,7 @@ static DEVICE_ATTR(qsfp_int, S_IRUGO, get_int, NULL);
static DEVICE_ATTR(qsfp_abs_int, S_IRUGO, get_abs_int, NULL);
static DEVICE_ATTR(qsfp_int_mask, S_IRUGO | S_IWUSR, get_int_mask, set_int_mask);
static DEVICE_ATTR(qsfp_abs_mask, S_IRUGO | S_IWUSR, get_abs_mask, set_abs_mask);
+static DEVICE_ATTR(sep_reset, S_IRUGO | S_IWUSR, get_sep_reset, set_sep_reset);
static struct attribute *i2c_cpld_attrs[] = {
&dev_attr_qsfp_lpmode.attr,
@@ -410,6 +441,7 @@ static struct attribute *i2c_cpld_attrs[] = {
&dev_attr_qsfp_abs_int.attr,
&dev_attr_qsfp_int_mask.attr,
&dev_attr_qsfp_abs_mask.attr,
+ &dev_attr_sep_reset.attr,
NULL,
};
diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/s6100_platform.sh b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/s6100_platform.sh
index 1d1e05f04258..1ac6ce93bc1d 100755
--- a/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/s6100_platform.sh
+++ b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/s6100_platform.sh
@@ -21,9 +21,9 @@ init_devnum() {
# Attach/Detach CPU board mux @ 0x70
cpu_board_mux() {
case $1 in
- "new_device") i2c_config "echo pca9547 0x70 > /sys/bus/i2c/devices/i2c-${devnum}/$1"
+ "new_device") i2c_mux_create pca9547 0x70 $devnum 2
;;
- "delete_device") i2c_config "echo 0x70 > /sys/bus/i2c/devices/i2c-${devnum}/$1"
+ "delete_device") i2c_mux_delete 0x70 $devnum
;;
*) echo "s6100_platform: cpu_board_mux: invalid command !"
;;
@@ -33,9 +33,9 @@ cpu_board_mux() {
# Attach/Detach Switchboard MUX @ 0x71
switch_board_mux() {
case $1 in
- "new_device") i2c_config "echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-4/$1"
+ "new_device") i2c_mux_create pca9548 0x71 4 10
;;
- "delete_device") i2c_config "echo 0x71 > /sys/bus/i2c/devices/i2c-4/$1"
+ "delete_device") i2c_mux_delete 0x71 4
;;
*) echo "s6100_platform: switch_board_mux : invalid command !"
;;
@@ -78,13 +78,17 @@ switch_board_cpld() {
switch_board_qsfp_mux() {
case $1 in
"new_device")
+ # The mux for the QSFPs spawn {18..25}, {26..33}... {74..81}
+ # starting at chennel 18 and 16 channels per IOM.
+ channel_first=18
for ((i=9;i>=6;i--));
do
# 0x71 mux on the IOM 1
mux_index=$(expr $i - 5)
echo "Attaching PCA9548 $mux_index"
- i2c_config "echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-$i/$1"
- i2c_config "echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-$i/$1"
+ i2c_mux_create pca9548 0x71 $i $channel_first
+ i2c_mux_create pca9548 0x72 $i $(expr $channel_first + 8)
+ channel_first=$(expr $channel_first + 16)
done
;;
"delete_device")
@@ -93,8 +97,8 @@ switch_board_qsfp_mux() {
# 0x71 mux on the IOM 1
mux_index=$(expr $i - 5)
echo "Detaching PCA9548 $mux_index"
- i2c_config "echo 0x71 > /sys/bus/i2c/devices/i2c-$devnum/i2c-$i/$1"
- i2c_config "echo 0x72 > /sys/bus/i2c/devices/i2c-$devnum/i2c-$i/$1"
+ i2c_mux_delete 0x71 $i
+ i2c_mux_delete 0x72 $i
done
;;
*) echo "s6100_platform: switch_board_qsfp_mux: invalid command !"
@@ -191,6 +195,28 @@ xcvr_presence_interrupts() {
esac
}
+# Reset the mux tree
+reset_muxes() {
+ local i
+
+ # Reset the IOM muxes (if they have been already instantiated)
+ for ((i=14;i<=17;i++));
+ do
+ if [[ -e /sys/class/i2c-adapter/i2c-$i/$i-003e ]]; then
+ echo 0xfc > /sys/class/i2c-adapter/i2c-$i/$i-003e/sep_reset
+ echo 0xff > /sys/class/i2c-adapter/i2c-$i/$i-003e/sep_reset
+ fi
+ done
+
+ # Reset the switch card PCA9548A
+ io_rd_wr.py --set --val 0xef --offset 0x110
+ io_rd_wr.py --set --val 0xff --offset 0x110
+
+ # Reset the CPU Card PCA9547
+ io_rd_wr.py --set --val 0xfd --offset 0x20b
+ io_rd_wr.py --set --val 0xff --offset 0x20b
+}
+
init_devnum
if [[ "$1" == "init" ]]; then
diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/z9100_platform.sh b/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/z9100_platform.sh
index e264ff6ce644..c943e584943c 100755
--- a/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/z9100_platform.sh
+++ b/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/z9100_platform.sh
@@ -21,9 +21,9 @@ init_devnum() {
# Attach/Detach CPU board mux @ 0x70
cpu_board_mux() {
case $1 in
- "new_device") i2c_config "echo pca9547 0x70 > /sys/bus/i2c/devices/i2c-${devnum}/$1"
+ "new_device") i2c_mux_create pca9547 0x70 $devnum 2
;;
- "delete_device") i2c_config "echo 0x70 > /sys/bus/i2c/devices/i2c-${devnum}/$1"
+ "delete_device") i2c_mux_delete 0x70 $devnum
;;
*) echo "z9100_platform: cpu_board_mux: invalid command !"
;;
@@ -33,9 +33,9 @@ cpu_board_mux() {
# Attach/Detach switch board MUX to IOM CPLDs @ 0x71
switch_board_mux() {
case $1 in
- "new_device") i2c_config "echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-4/$1"
+ "new_device") i2c_mux_create pca9548 0x71 4 10
;;
- "delete_device") i2c_config "echo 0x71 > /sys/bus/i2c/devices/i2c-4/$1"
+ "delete_device") i2c_mux_delete 0x71 4
;;
*) echo "z9100_platform: switch_board_mux : invalid command !"
;;
@@ -78,12 +78,16 @@ switch_board_cpld() {
switch_board_qsfp_mux() {
case $1 in
"new_device")
+ # The mux for the QSFPs spawn {18..25}, {26..33}, {34..41} and {42..49}
+ # starting at chennel 18 and 8 channels per mux.
+ channel_first=18
for ((i=9;i>=6;i--));
do
# 0x71 mux on the IOM 1
mux_index=$(expr $i - 5)
echo "Attaching PCA9548 $mux_index"
- i2c_config "echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-$i/$1"
+ i2c_mux_create pca9548 0x71 $i $channel_first
+ channel_first=$(expr $channel_first + 8)
done
;;
"delete_device")
@@ -92,7 +96,7 @@ switch_board_qsfp_mux() {
# 0x71 mux on the IOM 1
mux_index=$(expr $i - 5)
echo "Detaching PCA9548 $mux_index"
- i2c_config "echo 0x71 > /sys/bus/i2c/devices/i2c-$devnum/i2c-$i/$1"
+ i2c_mux_delete 0x71 $i
done
;;
*) echo "z9100_platform: switch_board_qsfp_mux: invalid command !"
@@ -156,6 +160,17 @@ xcvr_presence_interrupts() {
esac
}
+# Reset the mux tree
+reset_muxes() {
+ # Reset the IOM muxes and the switch card mux
+ io_rd_wr.py --set --val 0xe0 --offset 0x110
+ io_rd_wr.py --set --val 0xff --offset 0x110
+
+ # Reset the CPU Card PCA9547
+ io_rd_wr.py --set --val 0xfd --offset 0x20b
+ io_rd_wr.py --set --val 0xff --offset 0x20b
+}
+
init_devnum
if [[ "$1" == "init" ]]; then
diff --git a/platform/broadcom/sonic-platform-modules-dell/z9264f/modules/dell_z9264f_fpga_ocores.c b/platform/broadcom/sonic-platform-modules-dell/z9264f/modules/dell_z9264f_fpga_ocores.c
index 35ea1f812e9e..c08a4c210c53 100644
--- a/platform/broadcom/sonic-platform-modules-dell/z9264f/modules/dell_z9264f_fpga_ocores.c
+++ b/platform/broadcom/sonic-platform-modules-dell/z9264f/modules/dell_z9264f_fpga_ocores.c
@@ -1,5 +1,5 @@
- /*
- * Copyright (C) 2018 Joyce Yu
+/*
+ * Copyright (C) 2018 Dell Inc
*
* Licensed under the GNU General Public License Version 2
*
@@ -15,12 +15,11 @@
*
*/
-/**
+/**********************************************************************
* @file fpga_ocores.c
* @brief This is a driver to interface with Linux Open Cores driver for FPGA i2c access
*
- */
-
+ ************************************************************************/
#include
#include
#include
@@ -50,10 +49,17 @@
void __iomem * fpga_base_addr = NULL;
+void __iomem * fpga_ctl_addr = NULL;
#define DRIVER_NAME "fpgapci"
#define PCI_NUM_BARS 4
+#ifdef DEBUG
+# define PRINT(fmt, ...) printk(fmt, ##__VA_ARGS__)
+#else
+# define PRINT(fmt, ...)
+#endif
+
/* Maximum size of driver buffer (allocated with kalloc()).
* Needed to copy data from user to kernel space, among other
* things. */
@@ -86,10 +92,15 @@ struct fpgapci_dev {
};
-static int use_irq = 0;
+static int use_irq = 1;
module_param(use_irq, int, 0644);
MODULE_PARM_DESC(use_irq, "Get an use_irq value from user...\n");
+static uint32_t num_bus = 0;
+module_param(num_bus, int, 0);
+MODULE_PARM_DESC(num_bus,
+ "Number of i2c busses supported by the FPGA on this platform.");
+
/* Xilinx FPGA PCIE info: */
/* Non-VGA unclassified device: Xilinx Corporation Device 7021*/
@@ -123,78 +134,68 @@ struct pci_data_struct{
void * kvirt_addr_bar0;
};
+/* global variable declarations */
/* Static function declarations */
-static int fpgapci_probe(struct pci_dev *dev, const struct pci_device_id *id);
+static int fpgapci_probe(struct pci_dev *dev, const struct pci_device_id *id);
static void fpgapci_remove(struct pci_dev *dev);
-static int scan_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev);
-static int map_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev);
+static int scan_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev);
+static int map_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev);
static void free_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev);
-//#define kernel_debug
-
-struct ocores_i2c {
+struct fpgalogic_i2c {
void __iomem *base;
u32 reg_shift;
u32 reg_io_width;
wait_queue_head_t wait;
- //struct i2c_adapter adap;
struct i2c_msg *msg;
int pos;
int nmsgs;
int state; /* see STATE_ */
- //struct clk *clk;
int ip_clock_khz;
int bus_clock_khz;
- void (*setreg)(struct ocores_i2c *i2c, int reg, u8 value);
- u8 (*getreg)(struct ocores_i2c *i2c, int reg);
+ void (*reg_set)(struct fpgalogic_i2c *i2c, int reg, u8 value);
+ u8 (*reg_get)(struct fpgalogic_i2c *i2c, int reg);
u32 timeout;
struct mutex lock;
};
/* registers */
-#define OCI2C_PRELOW 0
-#define OCI2C_PREHIGH 1
-#define OCI2C_CONTROL 2
-#define OCI2C_DATA 3
-#define OCI2C_CMD 4 /* write only */
-#define OCI2C_STATUS 4 /* read only, same address as OCI2C_CMD */
-#define OCI2C_VER 5
+#define FPGAI2C_REG_PRELOW 0
+#define FPGAI2C_REG_PREHIGH 1
+#define FPGAI2C_REG_CONTROL 2
+#define FPGAI2C_REG_DATA 3
+#define FPGAI2C_REG_CMD 4 /* write only */
+#define FPGAI2C_REG_STATUS 4 /* read only, same address as FPGAI2C_REG_CMD */
+#define FPGAI2C_REG_VER 5
-#define OCI2C_CTRL_IEN 0x40
-#define OCI2C_CTRL_EN 0x80
+#define FPGAI2C_REG_CTRL_IEN 0x40
+#define FPGAI2C_REG_CTRL_EN 0x80
-#define OCI2C_CMD_START 0x91
-#define OCI2C_CMD_STOP 0x41
-#define OCI2C_CMD_READ 0x21
-#define OCI2C_CMD_WRITE 0x11
-#define OCI2C_CMD_READ_ACK 0x21
-#define OCI2C_CMD_READ_NACK 0x29
-#define OCI2C_CMD_IACK 0x01
+#define FPGAI2C_REG_CMD_START 0x91
+#define FPGAI2C_REG_CMD_STOP 0x41
+#define FPGAI2C_REG_CMD_READ 0x21
+#define FPGAI2C_REG_CMD_WRITE 0x11
+#define FPGAI2C_REG_CMD_READ_ACK 0x21
+#define FPGAI2C_REG_CMD_READ_NACK 0x29
+#define FPGAI2C_REG_CMD_IACK 0x01
-#define OCI2C_STAT_IF 0x01
-#define OCI2C_STAT_TIP 0x02
-#define OCI2C_STAT_ARBLOST 0x20
-#define OCI2C_STAT_BUSY 0x40
-#define OCI2C_STAT_NACK 0x80
+#define FPGAI2C_REG_STAT_IF 0x01
+#define FPGAI2C_REG_STAT_TIP 0x02
+#define FPGAI2C_REG_STAT_ARBLOST 0x20
+#define FPGAI2C_REG_STAT_BUSY 0x40
+#define FPGAI2C_REG_STAT_NACK 0x80
/* SR[7:0] - Status register */
-#define OCI2C_SR_RXACK (1 << 7) /* Receive acknowledge from slave ‘1’ = No acknowledge received*/
-#define OCI2C_SR_BUSY (1 << 6) /* Busy, I2C bus busy (as defined by start / stop bits) */
-#define OCI2C_SR_AL (1 << 5) /* Arbitration lost - core lost arbitration */
-#define OCI2C_SR_TIP (1 << 1) /* Transfer in progress */
-#define OCI2C_SR_IF (1 << 0) /* Interrupt flag */
-
-#if 0
-#define STATE_DONE 0
-#define STATE_START 1
-#define STATE_WRITE 2
-#define STATE_READ 3
-#define STATE_ERROR 4
-#else
+#define FPGAI2C_REG_SR_RXACK (1 << 7) /* Receive acknowledge from slave ‘1’ = No acknowledge received*/
+#define FPGAI2C_REG_SR_BUSY (1 << 6) /* Busy, I2C bus busy (as defined by start / stop bits) */
+#define FPGAI2C_REG_SR_AL (1 << 5) /* Arbitration lost - fpga i2c logic lost arbitration */
+#define FPGAI2C_REG_SR_TIP (1 << 1) /* Transfer in progress */
+#define FPGAI2C_REG_SR_IF (1 << 0) /* Interrupt flag */
+
enum {
STATE_DONE = 0,
STATE_INIT,
@@ -205,144 +206,229 @@ enum {
STATE_READ,
STATE_ERROR,
};
-#endif
-#define TYPE_OCORES 0
-#define TYPE_GRLIB 1
+#define TYPE_FPGALOGIC 0
+#define TYPE_GRLIB 1
/*I2C_CH1 Offset address from PCIE BAR 0*/
-#define OCORES_I2C_BASE 0x00006000
-#define OCORES_CH_OFFSET 0x10
+#define FPGALOGIC_I2C_BASE 0x00006000
+#define FPGALOGIC_CH_OFFSET 0x10
#define i2c_bus_controller_numb 1
-#define I2C_PCI_MAX_BUS (16)
-#define CLS_I2C_CLOCK_LEGACY 0
-#define CLS_I2C_CLOCK_PRESERVE (~0U)
-
-static struct ocores_i2c opencores_i2c[I2C_PCI_MAX_BUS];
-static struct i2c_adapter i2c_pci_adap[I2C_PCI_MAX_BUS];
-static struct mutex i2c_xfer_lock[I2C_PCI_MAX_BUS];
-
-static void oc_setreg_8(struct ocores_i2c *i2c, int reg, u8 value)
+#define I2C_PCI_MAX_BUS (16)
+#define I2C_PCI_MAX_BUS_REV00 (7)
+#define DELL_I2C_CLOCK_LEGACY 0
+#define DELL_I2C_CLOCK_PRESERVE (~0U)
+#define I2C_PCI_BUS_NUM_5 5
+#define I2C_PCI_BUS_NUM_7 7
+#define I2C_PCI_BUS_NUM_8 8
+#define I2C_PCI_BUS_NUM_10 10
+#define I2C_PCI_BUS_NUM_12 12
+#define I2C_PCI_BUS_NUM_16 16
+
+#define MB_BRD_REV_TYPE 0x0008
+#define MB_BRD_REV_MASK 0x00f0
+#define MB_BRD_REV_00 0x0000
+#define MB_BRD_REV_01 0x0010
+#define MB_BRD_REV_02 0x0020
+#define MB_BRD_REV_03 0x0030
+#define MB_BRD_TYPE_MASK 0x000f
+#define BRD_TYPE_Z9232_NON_NEBS 0x0
+#define BRD_TYPE_Z9232_NEBS 0x1
+#define BRD_TYPE_Z9264_NON_NEBS 0x2
+#define BRD_TYPE_Z9264_NEBS 0x3
+#define BRD_TYPE_S5212_NON_NEBS 0x4
+#define BRD_TYPE_S5212_NEBS 0x5
+#define BRD_TYPE_S5224_NON_NEBS 0x6
+#define BRD_TYPE_S5224_NEBS 0x7
+#define BRD_TYPE_S5248_NON_NEBS 0x8
+#define BRD_TYPE_S5248_NEBS 0x9
+#define BRD_TYPE_S5296_NON_NEBS 0xa
+#define BRD_TYPE_S5296_NEBS 0xb
+#define BRD_TYPE_S5232_NON_NEBS 0xc
+#define BRD_TYPE_S5232_NEBS 0xd
+
+#define FPGA_CTL_REG_SIZE 0x60
+#define MSI_VECTOR_MAP_MASK 0x1f
+#define MSI_VECTOR_MAP1 0x58
+#define I2C_CH1_MSI_MAP_VECT_8 0x00000008
+#define I2C_CH2_MSI_MAP_VECT_9 0x00000120
+#define I2C_CH3_MSI_MAP_VECT_10 0x00002800
+#define I2C_CH4_MSI_MAP_VECT_11 0x00058000
+#define I2C_CH5_MSI_MAP_VECT_12 0x00c00000
+#define I2C_CH6_MSI_MAP_VECT_13 0x15000000
+#define MSI_VECTOR_MAP2 0x5c
+#define I2C_CH7_MSI_MAP_VECT_14 0x0000000e
+#define MSI_VECTOR_MAP3 0x9c
+#define I2C_CH8_MSI_MAP_VECT_8 0x00800000
+#define I2C_CH8_MSI_MAP_VECT_16 0x01100000
+#define I2C_CH9_MSI_MAP_VECT_9 0x12000000
+#define I2C_CH9_MSI_MAP_VECT_17 0x24000000
+#define MSI_VECTOR_MAP4 0xa0
+#define I2C_CH10_MSI_MAP_VECT_10 0x0000000a
+#define I2C_CH10_MSI_MAP_VECT_18 0x00000012
+#define I2C_CH11_MSI_MAP_VECT_11 0x00000120
+#define I2C_CH11_MSI_MAP_VECT_19 0x00000260
+#define I2C_CH12_MSI_MAP_VECT_12 0x00002800
+#define I2C_CH12_MSI_MAP_VECT_20 0x00005000
+#define I2C_CH13_MSI_MAP_VECT_13 0x00058000
+#define I2C_CH13_MSI_MAP_VECT_21 0x000a8000
+#define I2C_CH14_MSI_MAP_VECT_14 0x00c00000
+#define I2C_CH14_MSI_MAP_VECT_22 0x01600000
+#define I2C_CH15_MSI_MAP_VECT_8 0x10000000
+#define I2C_CH15_MSI_MAP_VECT_23 0x2e000000
+#define MSI_VECTOR_MAP5 0xa4
+#define I2C_CH16_MSI_MAP_VECT_9 0x00000009
+#define I2C_CH16_MSI_MAP_VECT_24 0x00000018
+
+#define MSI_VECTOR_REV_00 16
+#define MSI_VECTOR_REV_01 32
+
+#define FPGA_MSI_VECTOR_ID_8 8
+#define FPGA_MSI_VECTOR_ID_9 9
+#define FPGA_MSI_VECTOR_ID_10 10
+#define FPGA_MSI_VECTOR_ID_11 11
+#define FPGA_MSI_VECTOR_ID_12 12
+#define FPGA_MSI_VECTOR_ID_13 13
+#define FPGA_MSI_VECTOR_ID_14 14
+#define FPGA_MSI_VECTOR_ID_15 15 /*Note: this is external MSI vector id */
+#define FPGA_MSI_VECTOR_ID_16 16
+#define FPGA_MSI_VECTOR_ID_17 17
+#define FPGA_MSI_VECTOR_ID_18 18
+#define FPGA_MSI_VECTOR_ID_19 19
+#define FPGA_MSI_VECTOR_ID_20 20
+#define FPGA_MSI_VECTOR_ID_21 21
+#define FPGA_MSI_VECTOR_ID_22 22
+#define FPGA_MSI_VECTOR_ID_23 23
+#define FPGA_MSI_VECTOR_ID_24 24
+
+
+
+static int total_i2c_pci_bus = 0;
+static uint32_t board_rev_type = 0;
+static struct fpgalogic_i2c fpgalogic_i2c[I2C_PCI_MAX_BUS];
+static struct i2c_adapter i2c_pci_adap[I2C_PCI_MAX_BUS];
+static struct mutex i2c_xfer_lock[I2C_PCI_MAX_BUS];
+
+static void fpgai2c_reg_set_8(struct fpgalogic_i2c *i2c, int reg, u8 value)
{
iowrite8(value, i2c->base + (reg << i2c->reg_shift));
}
-static void oc_setreg_16(struct ocores_i2c *i2c, int reg, u8 value)
+static void fpgai2c_reg_set_16(struct fpgalogic_i2c *i2c, int reg, u8 value)
{
iowrite16(value, i2c->base + (reg << i2c->reg_shift));
}
-static void oc_setreg_32(struct ocores_i2c *i2c, int reg, u8 value)
+static void fpgai2c_reg_set_32(struct fpgalogic_i2c *i2c, int reg, u8 value)
{
iowrite32(value, i2c->base + (reg << i2c->reg_shift));
}
-static void oc_setreg_16be(struct ocores_i2c *i2c, int reg, u8 value)
+static void fpgai2c_reg_set_16be(struct fpgalogic_i2c *i2c, int reg, u8 value)
{
iowrite16be(value, i2c->base + (reg << i2c->reg_shift));
}
-static void oc_setreg_32be(struct ocores_i2c *i2c, int reg, u8 value)
+static void fpgai2c_reg_set_32be(struct fpgalogic_i2c *i2c, int reg, u8 value)
{
iowrite32be(value, i2c->base + (reg << i2c->reg_shift));
}
-static inline u8 oc_getreg_8(struct ocores_i2c *i2c, int reg)
+static inline u8 fpgai2c_reg_get_8(struct fpgalogic_i2c *i2c, int reg)
{
return ioread8(i2c->base + (reg << i2c->reg_shift));
}
-static inline u8 oc_getreg_16(struct ocores_i2c *i2c, int reg)
+static inline u8 fpgai2c_reg_get_16(struct fpgalogic_i2c *i2c, int reg)
{
return ioread16(i2c->base + (reg << i2c->reg_shift));
}
-static inline u8 oc_getreg_32(struct ocores_i2c *i2c, int reg)
+static inline u8 fpgai2c_reg_get_32(struct fpgalogic_i2c *i2c, int reg)
{
return ioread32(i2c->base + (reg << i2c->reg_shift));
}
-static inline u8 oc_getreg_16be(struct ocores_i2c *i2c, int reg)
+static inline u8 fpgai2c_reg_get_16be(struct fpgalogic_i2c *i2c, int reg)
{
return ioread16be(i2c->base + (reg << i2c->reg_shift));
}
-static inline u8 oc_getreg_32be(struct ocores_i2c *i2c, int reg)
+static inline u8 fpgai2c_reg_get_32be(struct fpgalogic_i2c *i2c, int reg)
{
return ioread32be(i2c->base + (reg << i2c->reg_shift));
}
-static inline void oc_setreg(struct ocores_i2c *i2c, int reg, u8 value)
+static inline void fpgai2c_reg_set(struct fpgalogic_i2c *i2c, int reg, u8 value)
{
- i2c->setreg(i2c, reg, value);
+ i2c->reg_set(i2c, reg, value);
+ udelay(100);
}
-static inline u8 oc_getreg(struct ocores_i2c *i2c, int reg)
+static inline u8 fpgai2c_reg_get(struct fpgalogic_i2c *i2c, int reg)
{
- return i2c->getreg(i2c, reg);
+ udelay(100);
+ return i2c->reg_get(i2c, reg);
}
-
-static void ocores_dump(struct ocores_i2c *i2c)
-//static void __maybe_unused ocores_dump(struct ocores_i2c *i2c)
+static void fpgai2c_dump(struct fpgalogic_i2c *i2c)
{
u8 tmp;
- printk(KERN_DEBUG "Opencores register dump:\n");
+ PRINT("Logic register dump:\n");
- tmp = oc_getreg(i2c, OCI2C_PRELOW);
- printk(KERN_DEBUG "OCI2C_PRELOW (%d) = 0x%x\n",OCI2C_PRELOW,tmp);
+ tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_PRELOW);
+ PRINT("FPGAI2C_REG_PRELOW (%d) = 0x%x\n",FPGAI2C_REG_PRELOW,tmp);
- tmp = oc_getreg(i2c, OCI2C_PREHIGH);
- printk(KERN_DEBUG "OCI2C_PREHIGH(%d) = 0x%x\n",OCI2C_PREHIGH,tmp);
+ tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_PREHIGH);
+ PRINT("FPGAI2C_REG_PREHIGH(%d) = 0x%x\n",FPGAI2C_REG_PREHIGH,tmp);
- tmp = oc_getreg(i2c, OCI2C_CONTROL);
- printk(KERN_DEBUG "OCI2C_CONTROL(%d) = 0x%x\n",OCI2C_CONTROL,tmp);
+ tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_CONTROL);
+ PRINT("FPGAI2C_REG_CONTROL(%d) = 0x%x\n",FPGAI2C_REG_CONTROL,tmp);
- tmp = oc_getreg(i2c, OCI2C_DATA);
- printk(KERN_DEBUG "OCI2C_DATA (%d) = 0x%x\n",OCI2C_DATA,tmp);
+ tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_DATA);
+ PRINT("FPGAI2C_REG_DATA (%d) = 0x%x\n",FPGAI2C_REG_DATA,tmp);
- tmp = oc_getreg(i2c, OCI2C_CMD);
- printk(KERN_DEBUG "OCI2C_CMD (%d) = 0x%x\n",OCI2C_CMD,tmp);
+ tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_CMD);
+ PRINT("FPGAI2C_REG_CMD (%d) = 0x%x\n",FPGAI2C_REG_CMD,tmp);
}
-static void ocores_stop(struct ocores_i2c *i2c)
+static void fpgai2c_stop(struct fpgalogic_i2c *i2c)
{
- //unsigned long time_out = jiffies + msecs_to_jiffies(i2c->timeout);
- oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_STOP);
}
/*
* dell_get_mutex must be called prior to calling this function.
*/
-static int ocores_poll(struct ocores_i2c *i2c)
+static int fpgai2c_poll(struct fpgalogic_i2c *i2c)
{
- u8 stat = oc_getreg(i2c, OCI2C_STATUS);
+ u8 stat = fpgai2c_reg_get(i2c, FPGAI2C_REG_STATUS);
struct i2c_msg *msg = i2c->msg;
u8 addr;
/* Ready? */
- if (stat & OCI2C_STAT_TIP)
+ if (stat & FPGAI2C_REG_STAT_TIP)
return -EBUSY;
if (i2c->state == STATE_DONE || i2c->state == STATE_ERROR) {
/* Stop has been sent */
- oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_IACK);
if (i2c->state == STATE_ERROR)
return -EIO;
return 0;
}
/* Error? */
- if (stat & OCI2C_STAT_ARBLOST) {
+ if (stat & FPGAI2C_REG_STAT_ARBLOST) {
i2c->state = STATE_ERROR;
- oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_STOP);
return -EAGAIN;
}
if (i2c->state == STATE_INIT) {
- if (stat & OCI2C_STAT_BUSY)
+ if (stat & FPGAI2C_REG_STAT_BUSY)
return -EBUSY;
i2c->state = STATE_ADDR;
@@ -361,16 +447,16 @@ static int ocores_poll(struct ocores_i2c *i2c)
/* Set read bit if necessary */
addr |= (i2c->msg->flags & I2C_M_RD) ? 1 : 0;
- oc_setreg(i2c, OCI2C_DATA, addr);
- oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, addr);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_START);
return 0;
}
/* Second part of 10 bit addressing */
if (i2c->state == STATE_ADDR10) {
- oc_setreg(i2c, OCI2C_DATA, i2c->msg->addr & 0xff);
- oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_WRITE);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, i2c->msg->addr & 0xff);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_WRITE);
i2c->state = STATE_START;
return 0;
@@ -379,13 +465,13 @@ static int ocores_poll(struct ocores_i2c *i2c)
if (i2c->state == STATE_START || i2c->state == STATE_WRITE) {
i2c->state = (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE;
- if (stat & OCI2C_STAT_NACK) {
+ if (stat & FPGAI2C_REG_STAT_NACK) {
i2c->state = STATE_ERROR;
- oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_STOP);
return -ENXIO;
}
} else {
- msg->buf[i2c->pos++] = oc_getreg(i2c, OCI2C_DATA);
+ msg->buf[i2c->pos++] = fpgai2c_reg_get(i2c, FPGAI2C_REG_DATA);
}
if (i2c->pos >= msg->len) {
@@ -404,60 +490,58 @@ static int ocores_poll(struct ocores_i2c *i2c)
}
} else {
i2c->state = STATE_DONE;
- oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_STOP);
return 0;
}
}
if (i2c->state == STATE_READ) {
- oc_setreg(i2c, OCI2C_CMD, i2c->pos == (msg->len - 1) ?
- OCI2C_CMD_READ_NACK : OCI2C_CMD_READ_ACK);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, i2c->pos == (msg->len - 1) ?
+ FPGAI2C_REG_CMD_READ_NACK : FPGAI2C_REG_CMD_READ_ACK);
} else {
- oc_setreg(i2c, OCI2C_DATA, msg->buf[i2c->pos++]);
- oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_WRITE);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, msg->buf[i2c->pos++]);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_WRITE);
}
return 0;
}
-static void ocores_process(struct ocores_i2c *i2c)
+static void fpgai2c_process(struct fpgalogic_i2c *i2c)
{
struct i2c_msg *msg = i2c->msg;
- u8 stat = oc_getreg(i2c, OCI2C_STATUS);
- //unsigned long timeout = jiffies + msecs_to_jiffies(1000);
+ u8 stat = fpgai2c_reg_get(i2c, FPGAI2C_REG_STATUS);
+
+ PRINT("fpgai2c_process in. status reg :0x%x\n", stat);
- printk(KERN_DEBUG "ocores_process in. status reg :0x%x\n", stat);
if ((i2c->state == STATE_DONE) || (i2c->state == STATE_ERROR)) {
/* stop has been sent */
- printk(KERN_DEBUG "ocores_process OCI2C_CMD_IACK stat = 0x%x Set OCI2C_CMD(0%x) OCI2C_CMD_IACK = 0x%x\n",stat, OCI2C_CMD, OCI2C_CMD_IACK);
- oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
+ PRINT("fpgai2c_process FPGAI2C_REG_CMD_IACK stat = 0x%x Set FPGAI2C_REG_CMD(0%x) FPGAI2C_REG_CMD_IACK = 0x%x\n",stat, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_IACK);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_IACK);
wake_up(&i2c->wait);
return;
}
+
/* error? */
- if (stat & OCI2C_STAT_ARBLOST) {
+ if (stat & FPGAI2C_REG_STAT_ARBLOST) {
i2c->state = STATE_ERROR;
- printk(KERN_DEBUG "ocores_process OCI2C_STAT_ARBLOST OCI2C_CMD_STOP\n");
- ocores_stop(i2c);
+ PRINT("fpgai2c_process FPGAI2C_REG_STAT_ARBLOST FPGAI2C_REG_CMD_STOP\n");
+ fpgai2c_stop(i2c);
return;
}
if ((i2c->state == STATE_START) || (i2c->state == STATE_WRITE)) {
i2c->state =
(msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE;
- printk(KERN_DEBUG "ocores_process i2c->state =%d\n",i2c->state);
- if (stat & OCI2C_STAT_NACK) {
+ if (stat & FPGAI2C_REG_STAT_NACK) {
i2c->state = STATE_ERROR;
- printk(KERN_DEBUG "ocores_process OCI2C_STAT_NACK OCI2C_CMD_STOP\n");
- ocores_stop(i2c);//oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+ fpgai2c_stop(i2c);
return;
}
} else
{
- msg->buf[i2c->pos++] = oc_getreg(i2c, OCI2C_DATA);
- printk(KERN_DEBUG "ocores_process oc_getreg OCI2C_DATA(0x%x) msg->buf[%d] = 0x%x\n",OCI2C_DATA, i2c->pos, msg->buf[i2c->pos]);
+ msg->buf[i2c->pos++] = fpgai2c_reg_get(i2c, FPGAI2C_REG_DATA);
}
/* end of msg? */
@@ -467,56 +551,51 @@ static void ocores_process(struct ocores_i2c *i2c)
i2c->pos = 0;
msg = i2c->msg;
- if (i2c->nmsgs) { /* end? */
+ if (i2c->nmsgs) { /* end? */
/* send start? */
if (!(msg->flags & I2C_M_NOSTART)) {
- //addr = i2c_8bit_addr_from_msg(msg);
+
u8 addr = (msg->addr << 1);
if (msg->flags & I2C_M_RD)
addr |= 1;
i2c->state = STATE_START;
- printk(KERN_DEBUG "Set OCI2C_CMD(0%x) addr = 0x%x\n",OCI2C_CMD, addr);
- oc_setreg(i2c, OCI2C_DATA, addr);
- printk(KERN_DEBUG "Set OCI2C_CMD(0%x) OCI2C_CMD_START = 0x%x\n",OCI2C_CMD, OCI2C_CMD_START);
- oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, addr);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_START);
return;
} else
{
i2c->state = (msg->flags & I2C_M_RD)
? STATE_READ : STATE_WRITE;
- printk(KERN_DEBUG "ocores_process end i2c->state =%d\n",i2c->state);
}
} else {
i2c->state = STATE_DONE;
- printk(KERN_DEBUG "ocores_process end i2c->state = STATE_DONE ocores_stop\n");
- ocores_stop(i2c);//oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+ fpgai2c_stop(i2c);
return;
}
}
if (i2c->state == STATE_READ) {
- printk(KERN_DEBUG "ocores_poll STATE_READ i2c->pos=%d msg->len-1 = 0x%x set OCI2C_CMD = 0x%x\n",i2c->pos, msg->len-1,
- i2c->pos == (msg->len-1) ? OCI2C_CMD_READ_NACK : OCI2C_CMD_READ_ACK);
- oc_setreg(i2c, OCI2C_CMD, i2c->pos == (msg->len-1) ?
- OCI2C_CMD_READ_NACK : OCI2C_CMD_READ_ACK);
+ PRINT("fpgai2c_poll STATE_READ i2c->pos=%d msg->len-1 = 0x%x set FPGAI2C_REG_CMD = 0x%x\n",i2c->pos, msg->len-1,
+ i2c->pos == (msg->len-1) ? FPGAI2C_REG_CMD_READ_NACK : FPGAI2C_REG_CMD_READ_ACK);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, i2c->pos == (msg->len-1) ?
+ FPGAI2C_REG_CMD_READ_NACK : FPGAI2C_REG_CMD_READ_ACK);
} else {
- printk(KERN_DEBUG "ocores_process set OCI2C_DATA(0x%x)\n",OCI2C_DATA);
- oc_setreg(i2c, OCI2C_DATA, msg->buf[i2c->pos++]);
- printk(KERN_DEBUG "ocores_process set OCI2C_CMD(0x%x) OCI2C_CMD_WRITE = 0x%x\n",OCI2C_CMD, OCI2C_CMD_WRITE);
- oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_WRITE);
+ PRINT("fpgai2c_process set FPGAI2C_REG_DATA(0x%x)\n",FPGAI2C_REG_DATA);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, msg->buf[i2c->pos++]);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_WRITE);
}
}
-static irqreturn_t ocores_isr(int irq, void *dev_id)
+static irqreturn_t fpgai2c_isr(int irq, void *dev_id)
{
- struct ocores_i2c *i2c = dev_id;
- ocores_process(i2c);
+ struct fpgalogic_i2c *i2c = dev_id;
+ fpgai2c_process(i2c);
return IRQ_HANDLED;
}
-void dell_get_mutex(struct ocores_i2c *i2c)
+void dell_get_mutex(struct fpgalogic_i2c *i2c)
{
mutex_lock(&i2c->lock);
}
@@ -524,33 +603,30 @@ void dell_get_mutex(struct ocores_i2c *i2c)
/**
* dell_release_mutex - release mutex
*/
-void dell_release_mutex(struct ocores_i2c *i2c)
+void dell_release_mutex(struct fpgalogic_i2c *i2c)
{
mutex_unlock(&i2c->lock);
}
-static int ocores_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
+static int fpgai2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
{
- struct ocores_i2c *i2c = i2c_get_adapdata(adap);
- unsigned long orig_jiffies;
+ struct fpgalogic_i2c *i2c = i2c_get_adapdata(adap);
int ret;
unsigned long timeout = jiffies + msecs_to_jiffies(1000);
- //printk("%s(), line:%d\n", __func__, __LINE__);
i2c->msg = msgs;
i2c->pos = 0;
i2c->nmsgs = num;
i2c->state = (use_irq == 1) ? STATE_START : STATE_INIT;
- //printk(KERN_DEBUG "i2c->msg->addr = 0x%x i2c->msg->flags = 0x%x\n",i2c->msg->addr,i2c->msg->flags);
- //printk(KERN_DEBUG "I2C_M_RD = 0x%x i2c->msg->addr << 1 = 0x%x\n",I2C_M_RD,i2c->msg->addr << 1);
+ PRINT("i2c->msg->addr = 0x%x i2c->msg->flags = 0x%x\n",i2c->msg->addr,i2c->msg->flags);
+ PRINT("I2C_M_RD = 0x%x i2c->msg->addr << 1 = 0x%x\n",I2C_M_RD,i2c->msg->addr << 1);
- //ocores_dump(i2c);
if (!use_irq) {
/* Handle the transfer */
while (time_before(jiffies, timeout)) {
dell_get_mutex(i2c);
- ret = ocores_poll(i2c);
+ ret = fpgai2c_poll(i2c);
dell_release_mutex(i2c);
if (i2c->state == STATE_DONE || i2c->state == STATE_ERROR)
@@ -568,13 +644,13 @@ static int ocores_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
} else {
- printk(KERN_DEBUG "Set OCI2C_DATA(0%x) val = 0x%x\n",OCI2C_DATA,
- (i2c->msg->addr << 1) | ((i2c->msg->flags & I2C_M_RD) ? 1:0));
- oc_setreg(i2c, OCI2C_DATA,
+ PRINT("Set FPGAI2C_REG_DATA(0%x) val = 0x%x\n",FPGAI2C_REG_DATA,
+ (i2c->msg->addr << 1) | ((i2c->msg->flags & I2C_M_RD) ? 1:0));
+
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA,
(i2c->msg->addr << 1) |
((i2c->msg->flags & I2C_M_RD) ? 1:0));
- printk(KERN_DEBUG "Set OCI2C_CMD(0%x) val = 0x%x\n",OCI2C_CMD, OCI2C_CMD_START);
- oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_START);
/* Interrupt mode */
if (wait_event_timeout(i2c->wait, (i2c->state == STATE_ERROR) ||
@@ -585,7 +661,7 @@ static int ocores_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
}
}
-static int ocores_init(struct ocores_i2c *i2c)
+static int fpgai2c_init(struct fpgalogic_i2c *i2c)
{
int prescale;
int diff;
@@ -594,76 +670,69 @@ static int ocores_init(struct ocores_i2c *i2c)
if (i2c->reg_io_width == 0)
i2c->reg_io_width = 1; /* Set to default value */
- if (!i2c->setreg || !i2c->getreg) {
+ if (!i2c->reg_set || !i2c->reg_get) {
bool be = 0; //1:big_endian 0:little_endian
switch (i2c->reg_io_width) {
case 1:
- i2c->setreg = oc_setreg_8;
- i2c->getreg = oc_getreg_8;
+ i2c->reg_set = fpgai2c_reg_set_8;
+ i2c->reg_get = fpgai2c_reg_get_8;
break;
case 2:
- i2c->setreg = be ? oc_setreg_16be : oc_setreg_16;
- i2c->getreg = be ? oc_getreg_16be : oc_getreg_16;
+ i2c->reg_set = be ? fpgai2c_reg_set_16be : fpgai2c_reg_set_16;
+ i2c->reg_get = be ? fpgai2c_reg_get_16be : fpgai2c_reg_get_16;
break;
case 4:
- i2c->setreg = be ? oc_setreg_32be : oc_setreg_32;
- i2c->getreg = be ? oc_getreg_32be : oc_getreg_32;
+ i2c->reg_set = be ? fpgai2c_reg_set_32be : fpgai2c_reg_set_32;
+ i2c->reg_get = be ? fpgai2c_reg_get_32be : fpgai2c_reg_get_32;
break;
default:
- printk(KERN_ERR "Unsupported I/O width (%d)\n",
+ PRINT("Unsupported I/O width (%d)\n",
i2c->reg_io_width);
return -EINVAL;
}
}
- ctrl = oc_getreg(i2c, OCI2C_CONTROL);
- printk(KERN_DEBUG "%s(), line:%d\n", __func__, __LINE__);
- printk(KERN_DEBUG "i2c->base = 0x%p\n",i2c->base);
+ ctrl = fpgai2c_reg_get(i2c, FPGAI2C_REG_CONTROL);
- printk(KERN_DEBUG "ctrl = 0x%x\n",ctrl);
- printk(KERN_DEBUG "set ctrl = 0x%x\n",ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN));
+ PRINT("%s(), line:%d\n", __func__, __LINE__);
+ PRINT("i2c->base = 0x%p\n",i2c->base);
+
+ PRINT("ctrl = 0x%x\n",ctrl);
+ PRINT("set ctrl = 0x%x\n",ctrl & ~(FPGAI2C_REG_CTRL_EN|FPGAI2C_REG_CTRL_IEN));
/* make sure the device is disabled */
- oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN));
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_CONTROL, ctrl & ~(FPGAI2C_REG_CTRL_EN|FPGAI2C_REG_CTRL_IEN));
/*
- * I²C Frequency depends on host clock
+ * I2C Frequency depends on host clock
* input clock of 100MHz
* prescale to 100MHz / ( 5*100kHz) -1 = 199 = 0x4F 100000/(5*100)-1=199=0xc7
*/
- printk(KERN_DEBUG "calculate prescale\n");
prescale = (i2c->ip_clock_khz / (5 * i2c->bus_clock_khz)) - 1;
- printk(KERN_DEBUG "calculate prescale = 0x%x\n",prescale);
prescale = clamp(prescale, 0, 0xffff);
- printk(KERN_DEBUG "calculate clamp prescale = 0x%x\n",prescale);
diff = i2c->ip_clock_khz / (5 * (prescale + 1)) - i2c->bus_clock_khz;
- printk(KERN_DEBUG "calculate diff = 0x%x\n",diff);
if (abs(diff) > i2c->bus_clock_khz / 10) {
- printk(KERN_ERR "Unsupported clock settings: core: %d KHz, bus: %d KHz\n",
+ PRINT("Unsupported clock settings: core: %d KHz, bus: %d KHz\n",
i2c->ip_clock_khz, i2c->bus_clock_khz);
return -EINVAL;
}
- printk(KERN_DEBUG "OCI2C_PRELOW(%d) set = 0x%x\n",OCI2C_PRELOW,prescale & 0xff);
- oc_setreg(i2c, OCI2C_PRELOW, prescale & 0xff);
- printk(KERN_DEBUG "OCI2C_PRHIGH(%d) set = 0x%x\n",OCI2C_PREHIGH,prescale >> 8);
- oc_setreg(i2c, OCI2C_PREHIGH, prescale >> 8);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_PRELOW, prescale & 0xff);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_PREHIGH, prescale >> 8);
- printk(KERN_DEBUG "Init the device\n");
/* Init the device */
- oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
- printk(KERN_DEBUG "OCI2C_CONTROL(0x%x) set: 0x%x\n", OCI2C_CONTROL, ctrl | OCI2C_CTRL_IEN | OCI2C_CTRL_EN);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_IACK);
if (!use_irq)
- oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_EN);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_CONTROL, ctrl | FPGAI2C_REG_CTRL_EN);
else
- oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_IEN | OCI2C_CTRL_EN);
+ fpgai2c_reg_set(i2c, FPGAI2C_REG_CONTROL, ctrl | FPGAI2C_REG_CTRL_IEN | FPGAI2C_REG_CTRL_EN);
- //ocores_dump(i2c);
+ fpgai2c_dump(i2c);
/* Initialize interrupt handlers if not already done */
init_waitqueue_head(&i2c->wait);
@@ -672,21 +741,21 @@ static int ocores_init(struct ocores_i2c *i2c)
}
-static u32 ocores_func(struct i2c_adapter *adap)
+static u32 fpgai2c_func(struct i2c_adapter *adap)
{
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
}
-static const struct i2c_algorithm ocores_algorithm = {
- .master_xfer = ocores_xfer,
- .functionality = ocores_func,
+static const struct i2c_algorithm fpgai2c_algorithm = {
+ .master_xfer = fpgai2c_xfer,
+ .functionality = fpgai2c_func,
};
static int i2c_pci_add_bus (struct i2c_adapter *adap)
{
int ret = 0;
/* Register new adapter */
- adap->algo = &ocores_algorithm;
+ adap->algo = &fpgai2c_algorithm;
ret = i2c_add_numbered_adapter(adap);
return ret;
}
@@ -694,27 +763,20 @@ static int i2c_pci_add_bus (struct i2c_adapter *adap)
static int i2c_init_internal_data(void)
{
int i;
- printk(KERN_DEBUG "%s(), line:%d\n", __func__, __LINE__);
+ PRINT("%s(), line:%d\n", __func__, __LINE__);
- for( i = 0; i < I2C_PCI_MAX_BUS; i++ )
+ for( i = 0; i < total_i2c_pci_bus; i++ )
{
- opencores_i2c[i].reg_shift = 0; /* 8 bit registers */
- opencores_i2c[i].reg_io_width = 1; /* 8 bit read/write */
- opencores_i2c[i].timeout = 1000;//1ms
- opencores_i2c[i].ip_clock_khz = 100000;/* input clock of 100MHz */
- opencores_i2c[i].bus_clock_khz = 100;
- //opencores_i2c[i].base = fpga_base_addr + OCORES_I2C_BASE + i*OCORES_CH_OFFSET;
- opencores_i2c[i].base = fpga_base_addr + i*OCORES_CH_OFFSET;
- mutex_init(&opencores_i2c[i].lock);
- ocores_init(&opencores_i2c[i]);
+ fpgalogic_i2c[i].reg_shift = 0; /* 8 bit registers */
+ fpgalogic_i2c[i].reg_io_width = 1; /* 8 bit read/write */
+ fpgalogic_i2c[i].timeout = 500;//1000;//1ms
+ fpgalogic_i2c[i].ip_clock_khz = 100000;//100000;/* input clock of 100MHz */
+ fpgalogic_i2c[i].bus_clock_khz = 100;
+ fpgalogic_i2c[i].base = fpga_base_addr + i*FPGALOGIC_CH_OFFSET;
+ mutex_init(&fpgalogic_i2c[i].lock);
+ fpgai2c_init(&fpgalogic_i2c[i]);
}
-#if 0
- printk(KERN_DEBUG "FPGA PCIE access test\n");
- writel(0xdeadbeef, fpga_base_addr + 0x04);
- printk(KERN_DEBUG "%s(), fpga_base_addr + 0x8000:0x%x\n", __func__, readl(fpga_base_addr + 0x8000));
- printk(KERN_DEBUG "%s(), SCRTCH_REG:0x%x\n", __func__, readl(fpga_base_addr + 0x04));
-#endif
return 0;
}
@@ -723,31 +785,80 @@ static int i2c_pci_init (void)
{
int i;
- memset (&i2c_pci_adap, 0, sizeof(i2c_pci_adap));
- memset (&opencores_i2c, 0, sizeof(opencores_i2c));
+ if (num_bus == 0) {
+ board_rev_type = ioread32(fpga_ctl_addr + MB_BRD_REV_TYPE);
+
+ if ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_00) {
+ num_bus = I2C_PCI_MAX_BUS_REV00;
+ } else if (((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_01) ||
+ ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_02) ||
+ ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_03)) {
+ switch (board_rev_type & MB_BRD_TYPE_MASK){
+ case BRD_TYPE_S5212_NON_NEBS:
+ case BRD_TYPE_S5212_NEBS:
+ num_bus = I2C_PCI_BUS_NUM_5;
+ break;
+ case BRD_TYPE_S5224_NON_NEBS:
+ case BRD_TYPE_S5224_NEBS:
+ num_bus = I2C_PCI_BUS_NUM_7;
+ break;
+ case BRD_TYPE_Z9232_NON_NEBS:
+ case BRD_TYPE_Z9232_NEBS:
+ case BRD_TYPE_S5232_NON_NEBS:
+ case BRD_TYPE_S5232_NEBS:
+ num_bus = I2C_PCI_BUS_NUM_8;
+ break;
+ case BRD_TYPE_S5248_NON_NEBS:
+ case BRD_TYPE_S5248_NEBS:
+ num_bus = I2C_PCI_BUS_NUM_10;
+ break;
+ case BRD_TYPE_Z9264_NON_NEBS:
+ case BRD_TYPE_Z9264_NEBS:
+ num_bus = I2C_PCI_BUS_NUM_12;
+ break;
+ case BRD_TYPE_S5296_NON_NEBS:
+ case BRD_TYPE_S5296_NEBS:
+ num_bus = I2C_PCI_BUS_NUM_16;
+ break;
+ default:
+ num_bus = I2C_PCI_BUS_NUM_16;
+ printk("Wrong BRD_TYPE: 0x%x\n", board_rev_type);
+ break;
+ }
+ } else {
+ printk("Wrong board_rev_type 0x%x\n", board_rev_type);
+ }
+ }
+
+ printk("board_rev_type 0x%x, num_bus 0x%x\n", board_rev_type, num_bus);
+ total_i2c_pci_bus = num_bus;
+
+ memset (&i2c_pci_adap, 0, sizeof(i2c_pci_adap));
+ memset (&fpgalogic_i2c, 0, sizeof(fpgalogic_i2c));
for(i=0; i < i2c_bus_controller_numb; i++)
mutex_init(&i2c_xfer_lock[i]);
/* Initialize driver's itnernal data structures */
i2c_init_internal_data();
- for (i = 0 ; i < I2C_PCI_MAX_BUS ; i ++) {
+ for (i = 0 ; i < total_i2c_pci_bus; i ++) {
i2c_pci_adap[i].owner = THIS_MODULE;
i2c_pci_adap[i].class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
- i2c_pci_adap[i].algo_data = &opencores_i2c[i];
- /* /dev/i2c-600 ~ /dev/i2c-600 for Open core I2C channel controller 1-7 */
+ i2c_pci_adap[i].algo_data = &fpgalogic_i2c[i];
+ /* /dev/i2c-600 ~ /dev/i2c-615 for FPGA LOGIC I2C channel controller 1-7 */
i2c_pci_adap[i].nr = i+600;
sprintf( i2c_pci_adap[ i ].name, "i2c-pci-%d", i );
/* Add the bus via the algorithm code */
if( i2c_pci_add_bus( &i2c_pci_adap[ i ] ) != 0 )
{
- printk(KERN_ERR "Cannot add bus %d to algorithm layer\n", i );
+ PRINT("Cannot add bus %d to algorithm layer\n", i );
return( -ENODEV );
}
- i2c_set_adapdata(&i2c_pci_adap[i], &opencores_i2c[i]);
- printk( KERN_DEBUG "Registered bus id: %s\n", kobject_name(&i2c_pci_adap[ i ].dev.kobj));
+ i2c_set_adapdata(&i2c_pci_adap[i], &fpgalogic_i2c[i]);
+
+ PRINT( "Registered bus id: %s\n", kobject_name(&i2c_pci_adap[ i ].dev.kobj));
}
return 0;
@@ -756,7 +867,7 @@ static int i2c_pci_init (void)
static void i2c_pci_deinit(void)
{
int i;
- for( i = 0; i < I2C_PCI_MAX_BUS; i++ ){
+ for( i = 0; i < total_i2c_pci_bus; i++ ){
i2c_del_adapter(&i2c_pci_adap[i]);
}
@@ -773,34 +884,34 @@ static struct pci_dev* find_upstream_dev (struct pci_dev *dev)
bus = dev->bus;
if (bus == 0) {
- printk (KERN_DEBUG "Device doesn't have an associated bus!\n");
+ PRINT ( "Device doesn't have an associated bus!\n");
return 0;
}
bridge = bus->self;
if (bridge == 0) {
- printk (KERN_DEBUG "Can't get the bridge for the bus!\n");
+ PRINT ( "Can't get the bridge for the bus!\n");
return 0;
}
- printk (KERN_DEBUG "Upstream device %x/%x, bus:slot.func %02x:%02x.%02x\n",
+ PRINT ( "Upstream device %x/%x, bus:slot.func %02x:%02x.%02x\n",
bridge->vendor, bridge->device,
bridge->bus->number, PCI_SLOT(bridge->devfn), PCI_FUNC(bridge->devfn));
- printk (KERN_DEBUG "List of downstream devices:");
+ PRINT ( "List of downstream devices:");
list_for_each_entry (cur, &bus->devices, bus_list) {
if (cur != 0) {
- printk (KERN_DEBUG " %x/%x", cur->vendor, cur->device);
+ PRINT ( " %x/%x", cur->vendor, cur->device);
if (cur == dev) {
found_dev = 1;
}
}
}
- printk (KERN_DEBUG "\n");
+ PRINT ( "\n");
if (found_dev) {
return bridge;
} else {
- printk (KERN_DEBUG "Couldn't find upstream device!\n");
+ PRINT ( "Couldn't find upstream device!\n");
return 0;
}
}
@@ -815,7 +926,7 @@ static int scan_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev)
if (bar_start) {
unsigned long bar_end = pci_resource_end(dev, i);
unsigned long bar_flags = pci_resource_flags(dev, i);
- printk (KERN_DEBUG "BAR[%d] 0x%08lx-0x%08lx flags 0x%08lx",
+ PRINT ( "BAR[%d] 0x%08lx-0x%08lx flags 0x%08lx",
i, bar_start, bar_end, bar_flags);
}
}
@@ -846,31 +957,34 @@ static int map_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev)
}
if (bar_length < 1) {
- printk ( "BAR #%d length is less than 1 byte\n", i);
+ PRINT ( "BAR #%d length is less than 1 byte\n", i);
continue;
}
- //printk ( "bar_start=%llx, bar_end=%llx, bar_length=%lx, flag=%lx\n", bar_start,
- // bar_end, bar_length, pci_resource_flags(dev, i));
+ PRINT ( "bar_start=%llx, bar_end=%llx, bar_length=%lx, flag=%lx\n", bar_start,
+ bar_end, bar_length, pci_resource_flags(dev, i));
/* map the device memory or IO region into kernel virtual
* address space */
- fpgapci->bar[i] = ioremap_nocache (bar_start + OCORES_I2C_BASE, I2C_PCI_MAX_BUS * OCORES_CH_OFFSET);
+ fpgapci->bar[i] = ioremap_nocache (bar_start + FPGALOGIC_I2C_BASE, I2C_PCI_MAX_BUS * FPGALOGIC_CH_OFFSET);
+
if (!fpgapci->bar[i]) {
- printk ( "Could not map BAR #%d.\n", i);
+ PRINT ( "Could not map BAR #%d.\n", i);
return -1;
}
- //printk ( "BAR[%d] mapped at 0x%p with length %lu.", i,
- // fpgapci->bar[i], bar_length);
+ PRINT ( "BAR[%d] mapped at 0x%p with length %lu.", i,
+ fpgapci->bar[i], bar_length);
if(i == 0) //FPGA register is in the BAR[0]
{
+
fpga_phys_addr = bar_start;
+ fpga_ctl_addr = ioremap_nocache (bar_start, FPGA_CTL_REG_SIZE);
fpga_base_addr = fpgapci->bar[i];
}
- printk (KERN_DEBUG "BAR[%d] mapped at 0x%p with length %lu.\n", i,
+ PRINT ( "BAR[%d] mapped at 0x%p with length %lu.\n", i,
fpgapci->bar[i], bar_length);
}
return 0;
@@ -896,32 +1010,183 @@ static void free_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev)
* @param int interrupt number relative to global interrupt number
* @return Returns error code or zero if success
* */
-static int register_intr_handler(struct pci_dev *dev, int c)
+static int register_intr_handler(struct pci_dev *dev, int irq_num_id)
{
int err = 0;
struct fpgapci_dev *fpgapci = 0;
fpgapci = (struct fpgapci_dev*) dev_get_drvdata(&dev->dev);
if (fpgapci == 0) {
- printk (KERN_ERR ": fpgapci_dev is 0\n");
+ PRINT ( ": fpgapci_dev is 0\n");
return err;
}
+ if ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_00) {
+ /* Request interrupt line for unique function
+ * alternatively function will be called from free_irq as well
+ * with flag IRQF_SHARED */
+ switch(irq_num_id) {
+ /* Currently we only support test vector 2 for FPGA Logic I2C channel
+ * controller 1-7 interrupt*/
+ case FPGA_MSI_VECTOR_ID_8:
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
+ FPGA_PCI_NAME, &fpgalogic_i2c[0]);
+ fpgapci->irq_assigned++;
+ break;
+ case FPGA_MSI_VECTOR_ID_9:
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
+ FPGA_PCI_NAME, &fpgalogic_i2c[1]);
+ fpgapci->irq_assigned++;
+ break;
+ case FPGA_MSI_VECTOR_ID_10:
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
+ FPGA_PCI_NAME, &fpgalogic_i2c[2]);
+ fpgapci->irq_assigned++;
+ break;
+ case FPGA_MSI_VECTOR_ID_11:
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
+ FPGA_PCI_NAME, &fpgalogic_i2c[3]);
+ fpgapci->irq_assigned++;
+ break;
+ case FPGA_MSI_VECTOR_ID_12:
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
+ FPGA_PCI_NAME, &fpgalogic_i2c[4]);
+ fpgapci->irq_assigned++;
+ break;
+ case FPGA_MSI_VECTOR_ID_13:
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
+ FPGA_PCI_NAME, &fpgalogic_i2c[5]);
+ fpgapci->irq_assigned++;
+ break;
+ case FPGA_MSI_VECTOR_ID_14:
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
+ FPGA_PCI_NAME, &fpgalogic_i2c[6]);
+ fpgapci->irq_assigned++;
+ break;
- /* Request interrupt line for unique function
- * alternatively function will be called from free_irq as well with flag IRQF_SHARED */
- switch(c) {
- /*Currently we only support test vector 2 for Open core I2C channel controller 1-7 interrupt*/
- case 0:
- err = request_irq(dev->irq + c, ocores_isr, IRQF_EARLY_RESUME, FPGA_PCI_NAME, &opencores_i2c[0]);
- fpgapci->irq_assigned++;
- printk(KERN_DEBUG "Interrupt Line %d assigned with return value %d\n", dev->irq + c, err);
- break;
+ default:
+ PRINT("No more interrupt handler for number (%d)\n",
+ dev->irq + irq_num_id);
+ break;
+ }
+ } else if (((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_01) ||
+ ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_02) ||
+ ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_03)) {
+ /* FPGA SPEC 4.3.1.34, First i2c channel mapped to vector 8 */
+ switch (irq_num_id) {
+ case FPGA_MSI_VECTOR_ID_8:
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
+ FPGA_PCI_NAME, &fpgalogic_i2c[0]);
+ fpgapci->irq_assigned++;
+ break;
+ case FPGA_MSI_VECTOR_ID_9:
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
+ FPGA_PCI_NAME, &fpgalogic_i2c[1]);
+ fpgapci->irq_assigned++;
+ break;
+ case FPGA_MSI_VECTOR_ID_10:
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
+ FPGA_PCI_NAME, &fpgalogic_i2c[2]);
+ fpgapci->irq_assigned++;
+ break;
+ case FPGA_MSI_VECTOR_ID_11:
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
+ FPGA_PCI_NAME, &fpgalogic_i2c[3]);
+ fpgapci->irq_assigned++;
+ break;
+ case FPGA_MSI_VECTOR_ID_12:
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
+ FPGA_PCI_NAME, &fpgalogic_i2c[4]);
+ fpgapci->irq_assigned++;
+ break;
+ case FPGA_MSI_VECTOR_ID_13:
+ if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_5) {
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
+ IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[5]);
+ fpgapci->irq_assigned++;
+ }
+ break;
+ case FPGA_MSI_VECTOR_ID_14:
+ if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_5) {
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
+ IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[6]);
+ fpgapci->irq_assigned++;
+ }
+ break;
+ case FPGA_MSI_VECTOR_ID_15:
+ /*it is an external interrupt number. Ignore this case */
+ break;
+ case FPGA_MSI_VECTOR_ID_16:
+ if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_7) {
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
+ IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[7]);
+ fpgapci->irq_assigned++;
+ }
+ break;
+ case FPGA_MSI_VECTOR_ID_17:
+ if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_8) {
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
+ IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[8]);
+ fpgapci->irq_assigned++;
+ }
+ break;
+ case FPGA_MSI_VECTOR_ID_18:
+ if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_8) {
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
+ IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[9]);
+ fpgapci->irq_assigned++;
+ }
+ break;
+ case FPGA_MSI_VECTOR_ID_19:
+ if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_10) {
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
+ IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[10]);
+ fpgapci->irq_assigned++;
+ }
+ break;
+ case FPGA_MSI_VECTOR_ID_20:
+ if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_10) {
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
+ IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[11]);
+ fpgapci->irq_assigned++;
+ }
+ break;
+ case FPGA_MSI_VECTOR_ID_21:
+ if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) {
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
+ IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[12]);
+ fpgapci->irq_assigned++;
+ }
+ break;
+ case FPGA_MSI_VECTOR_ID_22:
+ if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) {
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
+ IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[13]);
+ fpgapci->irq_assigned++;
+ }
+ break;
+ case FPGA_MSI_VECTOR_ID_23:
+ if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) {
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
+ IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[14]);
+ fpgapci->irq_assigned++;
+ }
+ break;
+ case FPGA_MSI_VECTOR_ID_24:
+ if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) {
+ err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
+ IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[15]);
+ fpgapci->irq_assigned++;
+ }
+ break;
- default:
- printk(KERN_DEBUG "No more interrupt handler for number (%d)\n", dev->irq + c);
- break;
+ default:
+ PRINT("No more interrupt handler for number (%d)\n",
+ dev->irq + irq_num_id);
+ break;
+ }
}
+
return err;
}
/* Mask for MSI Multi message enable bits */
@@ -987,16 +1252,14 @@ static void msi_set_enable(struct pci_dev *dev, int enable)
int request_private_bits = 4;
pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
- printk(KERN_DEBUG "pos = 0x%x\n", pos);
+
if (pos) {
pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
maxvec = 1 << ((control & PCI_MSI_FLAGS_QMASK) >> 1);
- printk(KERN_DEBUG "control = 0x%x maxvec = 0x%x\n", control, maxvec);
+ PRINT("control = 0x%x maxvec = 0x%x\n", control, maxvec);
control &= ~PCI_MSI_FLAGS_ENABLE;
-#if 0
- if (enable)
- control |= PCI_MSI_FLAGS_ENABLE;
-#else
+
+
/*
* The PCI 2.3 spec mandates that there are at most 32
* interrupts. If this device asks for more, only give it one.
@@ -1008,74 +1271,23 @@ static void msi_set_enable(struct pci_dev *dev, int enable)
/* Update the number of IRQs the device has available to it */
control &= ~PCI_MSI_FLAGS_QSIZE;
control |= (request_private_bits << 4);
-#endif
pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
}
}
-static void msi_setup_enable(struct pci_dev *dev, int request_private_bits)
-{
- int pos,maxvec;
- u16 control;
- int configured_private_bits = 4;
-
- pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
-
- /*
- * Read the MSI config to figure out how many IRQs this device
- * wants. Most devices only want 1, which will give
- * configured_private_bits and request_private_bits equal 0.
- */
- pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
-
- /*
- * If the number of private bits has been configured then use
- * that value instead of the requested number. This gives the
- * driver the chance to override the number of interrupts
- * before calling pci_enable_msi().
- */
- configured_private_bits = (control & PCI_MSI_FLAGS_QSIZE) >> 4;
- if (configured_private_bits == 0) {
- /* Nothing is configured, so use the hardware requested size */
- request_private_bits = (control & PCI_MSI_FLAGS_QMASK) >> 1;
- }
- else {
- /*
- * Use the number of configured bits, assuming the
- * driver wanted to override the hardware request
- * value.
- */
- request_private_bits = configured_private_bits;
- }
-
- /*
- * The PCI 2.3 spec mandates that there are at most 32
- * interrupts. If this device asks for more, only give it one.
- */
- if (request_private_bits > 5) {
- request_private_bits = 0;
- }
-
- /* Update the number of IRQs the device has available to it */
- control &= ~PCI_MSI_FLAGS_QSIZE;
- control |= (request_private_bits << 4);
- pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
-}
/**
* @brief Enables pcie-device and claims/remaps neccessary bar resources
* @param dev Pointer to pci-device, which should be allocated
* @return Returns error code or zero if success
* */
-static int claim_device(struct fpgapci_dev *fpgapci,struct pci_dev *dev)
+static int fpgapci_setup_device(struct fpgapci_dev *fpgapci,struct pci_dev *dev)
{
int err = 0;
- u16 msi_offset;
- u16 mc_val;
/* wake up the pci device */
err = pci_enable_device(dev);
if(err) {
- printk(KERN_ERR "failed to enable pci device %d\n", err);
+ PRINT("failed to enable pci device %d\n", err);
goto error_pci_en;
}
@@ -1084,13 +1296,12 @@ static int claim_device(struct fpgapci_dev *fpgapci,struct pci_dev *dev)
* and only MSI should be used
*/
- //dev->msi_enabled = 0;
pci_set_master(dev);
/* Setup the BAR memory regions */
err = pci_request_regions(dev, DRIVER_NAME);
if (err) {
- printk(KERN_ERR "failed to enable pci device %d\n", err);
+ PRINT("failed to enable pci device %d\n", err);
goto error_pci_req;
}
@@ -1111,166 +1322,37 @@ static int claim_device(struct fpgapci_dev *fpgapci,struct pci_dev *dev)
error_pci_en:
return -ENODEV;
}
-/**
- * @brief Configures pcie-device and bit_mask settings
- * @param dev Pointer to pci-device, which should be allocated
- * @return Returns error code or zero if success
- * */
-static int configure_device(struct pci_dev *dev)
-{
- return 0;
-}
-
-/*
- * Check if the controller supports the interrupt type requested. If it
- * supports returns the offset, otherwise it will return invalid for the
- * caller to indicate that the controller does not support the capability
- * type.
- */
-int check_cntlr_cap(struct pci_dev *dev, enum fpga_irq_type cap_type,
- u16 *offset)
-{
- u16 val = 0;
- u16 pci_offset = 0;
- int ret_val = -EINVAL;
-
- if (pci_read_config_word(dev, PCI_DEVICE_STATUS, &val) < 0) {
- printk(KERN_ERR "pci_read_config failed...\n");
- return -EINVAL;
- }
- printk(KERN_DEBUG "PCI_DEVICE_STATUS = 0x%X\n", val);
- if (!(val & CL_MASK)) {
- printk(KERN_ERR "Controller does not support Capability list...\n");
- return -EINVAL;
- } else {
- if (pci_read_config_word(dev, CAP_REG, &pci_offset) < 0) {
- printk(KERN_ERR "pci_read_config failed...\n");
- return -EINVAL;
- }
- }
- printk(KERN_DEBUG "pci_offset = 0x%x\n", pci_offset);
- /* Interrupt Type MSI-X*/
- if (cap_type == INT_MSIX) {
- /* Loop through Capability list */
- while (pci_offset) {//0x40
- if (pci_read_config_word(dev, pci_offset, &val) < 0) {
- printk(KERN_ERR "pci_read_config failed...\n");
- return -EINVAL;
- }
- /* exit when we find MSIX_capbility offset */
- if ((val & ~NEXT_MASK) == MSIXCAP_ID) {
- /* write msix cap offset */
- *offset = pci_offset;
- ret_val = 1;
- /* break from while loop */
- break;
- }
- /* Next Capability offset. */
- pci_offset = (val & NEXT_MASK) >> 8;
- } /* end of while loop */
-
- } else if (cap_type == INT_MSI_SINGLE || cap_type == INT_MSI_MULTI) {
- /* Loop through Capability list */
- while (pci_offset) {//0x40
- if (pci_read_config_word(dev, pci_offset, &val) < 0) {
- printk(KERN_ERR "pci_read_config failed...\n");
- return -EINVAL;
- }
- printk(KERN_DEBUG "val = 0x%x ~NEXT_MASK= 0x%x val & ~NEXT_MASK = 0x%x\n", val,~NEXT_MASK, val & ~NEXT_MASK);
- /* exit when we find MSIX_capbility offset */
- if ((val & ~NEXT_MASK) == MSICAP_ID) {
- /* write the msi offset */
- *offset = pci_offset;
- ret_val = 1;
- printk(KERN_DEBUG "*offset = 0x%x\n", *offset);
- /* break from while loop */
- break;
- }
- /* Next Capability offset. */
- pci_offset = (val & NEXT_MASK) >> 8;
- printk(KERN_DEBUG "Next Capability offset pci_offset = 0x%x\n", pci_offset);
- } /* end of while loop */
-
- } else {
- printk(KERN_DEBUG "Invalid capability type specified...\n");
- ret_val = -EINVAL;
- }
-
- return ret_val;
-}
-
-static int claim_msi(struct fpgapci_dev *fpgapci,struct pci_dev *dev)
+static int fpgapci_configure_msi(struct fpgapci_dev *fpgapci,struct pci_dev *dev)
{
int err = 0, i;
- int nvec, request_vec;
- u16 msi_offset;
- u16 mc_val;
-
- /* set up MSI interrupt vector to max size */
- nvec = pci_msi_vec_count(dev);
- printk(KERN_DEBUG "Have %d MSI vectors\n", nvec);
-#if 0
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 0))// || defined(WITH_BACKPORTS)
- err = pci_enable_msi_range(dev, nvec, nvec);
-#else
- err = pci_enable_msi_block(dev, nvec + 1);
-#endif
-#endif
- printk(KERN_DEBUG "Check MSI capability\n");
- /* Check if the card Supports MSI capability */
- if (check_cntlr_cap(dev, INT_MSI_MULTI, &msi_offset) < 0) {
- printk(KERN_ERR "Controller does not support for MSI capability!!\n");
- return -EINVAL;
- }
- /* compute MSI MC offset if MSI is supported */
- printk(KERN_DEBUG "check_cntlr_cap return msi_offset = 0x%x\n", msi_offset);
- msi_offset += 2;
- printk(KERN_DEBUG "msi_offset = 0x%x\n", msi_offset);
- /* Read MSI-MC value */
- pci_read_config_word(dev, msi_offset, &mc_val);
- printk(KERN_DEBUG "read msi_offset(0x%x) mc_val = 0x%x\n", msi_offset, mc_val);
- printk(KERN_DEBUG "(1 << ((mc_val & MSI_MME) >> 4)) = 0x%x\n",(1 << ((mc_val & MSI_MME) >> 4)));
- if (nvec > (1 << ((mc_val & MSI_MME) >> 4))) { // power 2
- printk(KERN_DEBUG "IRQs = %d exceed MSI MME = %d\n", nvec,
- (1 << ((mc_val & MSI_MME) >> 4)));
- /* does not support the requested irq's*/
- }
+ int request_vec;
+
msi_set_enable(dev,1);
- printk(KERN_DEBUG "Check MSI capability after msi_set_enable\n");
+ PRINT("Check MSI capability after msi_set_enable\n");
- /* Check if the card Supports MSI capability */
- if (check_cntlr_cap(dev, INT_MSI_MULTI, &msi_offset) < 0) {
- printk(KERN_DEBUG "Controller does not support for MSI capability!!\n");
- return -EINVAL;
- }
- /* compute MSI MC offset if MSI is supported */
- printk(KERN_DEBUG "check_cntlr_cap return msi_offset = 0x%x\n", msi_offset);
- msi_offset += 2;
- printk(KERN_DEBUG "msi_offset = 0x%x\n", msi_offset);
- /* Read MSI-MC value */
- pci_read_config_word(dev, msi_offset, &mc_val);
- printk(KERN_DEBUG "read msi_offset(0x%x) mc_val = 0x%x\n", msi_offset, mc_val);
-
- printk(KERN_DEBUG "(1 << ((mc_val & MSI_MME) >> 4)) = 0x%x\n",(1 << ((mc_val & MSI_MME) >> 4)));
- if (nvec > (1 << ((mc_val & MSI_MME) >> 4))) { // power 2
- printk(KERN_DEBUG "IRQs = %d exceed MSI MME = %d\n", nvec,
- (1 << ((mc_val & MSI_MME) >> 4)));
- /* does not support the requested irq's*/
- }
/*Above 4.1.12*/
-#if 1
- request_vec = 1;
+ request_vec = total_i2c_pci_bus;
err = pci_alloc_irq_vectors(dev, request_vec, pci_msi_vec_count(dev),
PCI_IRQ_MSI);//PCI_IRQ_AFFINITY | PCI_IRQ_MSI);
-#endif
if (err <= 0) {
- printk(KERN_ERR "Cannot set MSI vector (%d)\n", err);
+ PRINT("Cannot set MSI vector (%d)\n", err);
goto error_no_msi;
} else {
- printk(KERN_ERR "Got %d MSI vectors starting at %d\n", err, dev->irq);
+ PRINT("Got %d MSI vectors starting at %d\n", err, dev->irq);
+ if ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_00) {
+ if (err < MSI_VECTOR_REV_00) {
+ goto error_disable_msi;
+ }
+ } else if (((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_01) ||
+ ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_02) ||
+ ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_03)) {
+ if (err < MSI_VECTOR_REV_01) {
+ goto error_disable_msi;
+ }
+ }
}
fpgapci->irq_first = dev->irq;
fpgapci->irq_length = err;
@@ -1280,7 +1362,7 @@ static int claim_msi(struct fpgapci_dev *fpgapci,struct pci_dev *dev)
for(i = 0; i < fpgapci->irq_length; i++) {
err = register_intr_handler(dev, i);
if (err) {
- printk(KERN_ERR "Cannot request Interrupt number %d\n", i);
+ PRINT("Cannot request Interrupt number %d\n", i);
goto error_pci_req_irq;
}
}
@@ -1288,8 +1370,15 @@ static int claim_msi(struct fpgapci_dev *fpgapci,struct pci_dev *dev)
return 0;
error_pci_req_irq:
- //for(i = i-1; i >= 0; i--)
- free_irq(fpgapci->irq_first + 0, &opencores_i2c[0]);
+ for(i = 0; i < fpgapci->irq_assigned; i++)
+ {
+ PRINT("free_irq %d i =%d\n",fpgapci->irq_first + i,i);
+ if (i < 7)
+ free_irq(fpgapci->irq_first + 8 + i, &fpgalogic_i2c[i]);
+ else
+ free_irq(fpgapci->irq_first + 8 + i + 1, &fpgalogic_i2c[i]);
+ }
+error_disable_msi:
pci_disable_msi(fpgapci->pci_dev);
error_no_msi:
return -ENOSPC;
@@ -1299,14 +1388,15 @@ static int fpgapci_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
struct fpgapci_dev *fpgapci = 0;
- printk (KERN_DEBUG " vendor = 0x%x, device = 0x%x, class = 0x%x, bus:slot.func = %02x:%02x.%02x\n",
+#ifdef TEST
+ PRINT ( " vendor = 0x%x, device = 0x%x, class = 0x%x, bus:slot.func = %02x:%02x.%02x\n",
dev->vendor, dev->device, dev->class,
dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
-
+#endif
fpgapci = kzalloc(sizeof(struct fpgapci_dev), GFP_KERNEL);
if (!fpgapci) {
- printk(KERN_ERR "Couldn't allocate memory!\n");
+ PRINT( "Couldn't allocate memory!\n");
goto fail_kzalloc;
}
@@ -1315,15 +1405,12 @@ static int fpgapci_probe(struct pci_dev *dev, const struct pci_device_id *id)
fpgapci->upstream = find_upstream_dev (dev);
- if(claim_device(fpgapci,dev)) {
+ if(fpgapci_setup_device(fpgapci,dev)) {
goto error_no_device;
}
- if(configure_device(dev)) {
- goto error_cannot_configure;
- }
if (use_irq) {
- if(claim_msi(fpgapci,dev)) {
+ if(fpgapci_configure_msi(fpgapci,dev)) {
goto error_cannot_configure;
}
}
@@ -1332,36 +1419,48 @@ static int fpgapci_probe(struct pci_dev *dev, const struct pci_device_id *id)
return 0;
/* ERROR HANDLING */
error_cannot_configure:
- printk(KERN_ERR "error_cannot_configure\n");
+ printk("error_cannot_configure\n");
free_bars (fpgapci, dev);
pci_release_regions(dev);
pci_disable_device(dev);
error_no_device:
i2c_pci_deinit();
- printk(KERN_ERR "error_no_device\n");
+ printk("error_no_device\n");
fail_kzalloc:
return -1;
+
+
}
static void fpgapci_remove(struct pci_dev *dev)
{
struct fpgapci_dev *fpgapci = 0;
- //int i;
- printk (KERN_DEBUG ": dev is %p\n", dev);
+ int i;
+ PRINT (": dev is %p\n", dev);
if (dev == 0) {
- printk (KERN_ERR ": dev is 0\n");
+ PRINT ( ": dev is 0\n");
return;
}
fpgapci = (struct fpgapci_dev*) dev_get_drvdata(&dev->dev);
if (fpgapci == 0) {
- printk (KERN_ERR ": fpgapci_dev is 0\n");
+ PRINT ( ": fpgapci_dev is 0\n");
return;
}
i2c_pci_deinit();
+ //
if (use_irq)
- free_irq(fpgapci->irq_first + 0, &opencores_i2c[0]);
+ {
+ for(i = 0; i < fpgapci->irq_assigned; i++)
+ {
+ PRINT("free_irq %d i =%d\n",fpgapci->irq_first + i,i);
+ if (i < 7)
+ free_irq(fpgapci->irq_first + 8 + i, &fpgalogic_i2c[i]);
+ else
+ free_irq(fpgapci->irq_first + 8 + i + 1, &fpgalogic_i2c[i]);
+ }
+ }
pci_disable_msi(fpgapci->pci_dev);
free_bars (fpgapci, dev);
pci_disable_device(dev);
@@ -1391,7 +1490,7 @@ static int __init fpgapci_init(void)
{
if (pci_register_driver(&fpgapci_driver)) {
- printk(KERN_DEBUG "pci_unregister_driver\n");
+ PRINT("pci_unregister_driver\n");
pci_unregister_driver(&fpgapci_driver);
return -ENODEV;
}
@@ -1401,7 +1500,8 @@ static int __init fpgapci_init(void)
static void __exit fpgapci_exit(void)
{
- printk (KERN_DEBUG "fpgapci_exit");
+ PRINT ("fpgapci_exit");
+
/* unregister this driver from the PCI bus driver */
pci_unregister_driver(&fpgapci_driver);
@@ -1411,8 +1511,6 @@ static void __exit fpgapci_exit(void)
module_init (fpgapci_init);
module_exit (fpgapci_exit);
MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Joyce_Yu@Dell.com");
-MODULE_DESCRIPTION ("Driver for FPGA Opencores I2C bus");
-MODULE_SUPPORTED_DEVICE ("FPGA Opencores I2C bus");
-
-
+MODULE_AUTHOR("joyce_yu@dell.com");
+MODULE_DESCRIPTION ("Driver for FPGA Logic I2C bus");
+MODULE_SUPPORTED_DEVICE ("FPGA Logic I2C bus");
diff --git a/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/platform_sensors.py
index c16aee1d4b8c..3e2e1657818d 100755
--- a/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/platform_sensors.py
+++ b/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/platform_sensors.py
@@ -189,10 +189,14 @@ def print_psu(psu):
# psu1_fan_status = int(get_pmc_register('PSU1_status'),16)
print ' PSU1:'
- print ' FAN Temperature: ',\
- get_pmc_register('PSU1_temp')
+ print ' FAN Normal Temperature: ',\
+ get_pmc_register('PSU1_Normal_temp')
+ print ' FAN System Temperature: ',\
+ get_pmc_register('PSU1_Sys_temp')
+ print ' FAN Chassis Temperature: ',\
+ get_pmc_register('PSU1_Chass_temp')
print ' FAN AirFlow Temperature: ',\
- get_pmc_register('PSU1_AF_temp')
+ get_pmc_register('PSU1AF_temp')
print ' FAN RPM: ',\
get_pmc_register('PSU1_rpm')
# print ' FAN Status: ', Psu_Fan_Status[psu1_fan_status]
@@ -215,10 +219,14 @@ def print_psu(psu):
# psu2_fan_status = int(get_pmc_register('PSU1_status'),16)
print ' PSU2:'
- print ' FAN Temperature: ',\
- get_pmc_register('PSU2_temp')
+ print ' FAN Normal Temperature: ',\
+ get_pmc_register('PSU2_Normal_temp')
+ print ' FAN System Temperature: ',\
+ get_pmc_register('PSU2_Sys_temp')
+ print ' FAN Chassis Temperature: ',\
+ get_pmc_register('PSU2_Chass_temp')
print ' FAN AirFlow Temperature: ',\
- get_pmc_register('PSU2_AF_temp')
+ get_pmc_register('PSU2AF_temp')
print ' FAN RPM: ',\
get_pmc_register('PSU2_rpm')
# print ' FAN Status: ', Psu_Fan_Status[psu2_fan_status]
diff --git a/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/z9264f_platform.sh b/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/z9264f_platform.sh
index e38914319342..5002ce72c081 100755
--- a/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/z9264f_platform.sh
+++ b/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/z9264f_platform.sh
@@ -17,9 +17,9 @@ init_devnum() {
# Attach/Detach syseeprom on CPU board
sys_eeprom() {
case $1 in
- "new_device") echo 24c02 0x53 > /sys/bus/i2c/devices/i2c-0/$1
+ "new_device") echo 24c16 0x50 > /sys/bus/i2c/devices/i2c-0/$1
;;
- "delete_device") echo 0x53 > /sys/bus/i2c/devices/i2c-0/$1
+ "delete_device") echo 0x50 > /sys/bus/i2c/devices/i2c-0/$1
;;
*) echo "z9264f_platform: sys_eeprom : invalid command !"
;;
@@ -30,34 +30,20 @@ sys_eeprom() {
switch_board_qsfp_mux() {
case $1 in
"new_device")
- for ((i=74;i<=77;i++));
+ for ((i=603;i<=611;i++));
do
- echo "Attaching PCA9548 @ $i"
- echo pca9548 0x$i > /sys/bus/i2c/devices/i2c-604/$1
- sleep 2
+ echo "Attaching PCA9548 @ 0x74"
+ echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-$i/$1
done
- for ((i=74;i<=77;i++));
- do
- echo "Attaching PCA9548 @ $i"
- echo pca9548 0x$i > /sys/bus/i2c/devices/i2c-603/$1
- sleep 2
- done
;;
"delete_device")
- for ((i=74;i<=77;i++));
+ for ((i=603;i<=611;i++));
do
- echo "Detaching PCA9548 @ $i"
- echo 0x$i > /sys/bus/i2c/devices/i2c-604/$1
- sleep 2
+ echo "Detaching PCA9548 @ 0x74"
+ echo 0x74 > /sys/bus/i2c/devices/i2c-$i/$1
done
- for ((i=74;i<=77;i++));
- do
- echo "Detaching PCA9548 @ $i"
- echo 0x$i > /sys/bus/i2c/devices/i2c-603/$1
- sleep 2
- done
;;
*) echo "z9264f_platform: switch_board_qsfp_mux: invalid command !"
;;
@@ -94,9 +80,9 @@ switch_board_modsel() {
resource="/sys/bus/pci/devices/0000:04:00.0/resource0"
for ((i=1;i<=64;i++));
do
- port_addr=$( 16384 + ((i - 1) * 16))
+ port_addr=$(( 16384 + ((i - 1) * 16)))
hex=$( printf "0x%x" $port_addr )
- python /bin/pcisysfs.py --set --offset $hex --val 0x41 --res $resource > /dev/null 2>&1
+ python /usr/bin/pcisysfs.py --set --offset $hex --val 0x41 --res $resource > /dev/null 2>&1
done
}
init_devnum
@@ -104,6 +90,8 @@ init_devnum
if [ "$1" == "init" ]; then
modprobe i2c-dev
modprobe i2c-mux-pca954x force_deselect_on_exit=1
+ modprobe ipmi_devintf
+ modprobe ipmi_si
modprobe i2c_ocores
modprobe dell_z9264f_fpga_ocores
sys_eeprom "new_device"
diff --git a/platform/broadcom/sonic-platform-modules-dell/z9264f/systemd/platform-modules-z9264f.service b/platform/broadcom/sonic-platform-modules-dell/z9264f/systemd/platform-modules-z9264f.service
new file mode 100644
index 000000000000..b89f61ea6226
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-dell/z9264f/systemd/platform-modules-z9264f.service
@@ -0,0 +1,13 @@
+[Unit]
+Description=Dell Z9264f Platform modules
+Before=pmon.service
+DefaultDependencies=no
+
+[Service]
+Type=oneshot
+ExecStart=/usr/local/bin/z9264f_platform.sh init
+ExecStop=/usr/local/bin/z9264f_platform.sh deinit
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/mellanox/docker-syncd-mlnx/start.sh b/platform/mellanox/docker-syncd-mlnx/start.sh
index 7753b134f7ce..61ccd2db8933 100755
--- a/platform/mellanox/docker-syncd-mlnx/start.sh
+++ b/platform/mellanox/docker-syncd-mlnx/start.sh
@@ -8,8 +8,3 @@ supervisorctl start syncd
supervisorctl start mlnx-sfpd
-BOOT_TYPE="$(cat /proc/cmdline | grep -o 'SONIC_BOOT_TYPE=\S*' | cut -d'=' -f2)"
-if [[ x"$BOOT_TYPE" == x"fastfast" ]] && [[ -f /var/warmboot/issu_started ]]; then
- rm -f /var/warmboot/issu_started
- /usr/bin/ffb &>/dev/null &
-fi
diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk
index 8ec35a22cfe3..99414ff9459a 100644
--- a/platform/mellanox/fw.mk
+++ b/platform/mellanox/fw.mk
@@ -1,6 +1,6 @@
# mellanox firmware
-MLNX_FW_VERSION = 13.1910.0608
+MLNX_FW_VERSION = 13.1910.0906
MLNX_FW_FILE = fw-SPC-rel-$(subst .,_,$(MLNX_FW_VERSION))-EVB.mfa
$(MLNX_FW_FILE)_URL = $(MLNX_SDK_BASE_URL)/$(MLNX_FW_FILE)
SONIC_ONLINE_FILES += $(MLNX_FW_FILE)
diff --git a/platform/mellanox/mlnx-ffb.sh b/platform/mellanox/mlnx-ffb.sh
index d06721081a5d..c87ea56f08f5 100755
--- a/platform/mellanox/mlnx-ffb.sh
+++ b/platform/mellanox/mlnx-ffb.sh
@@ -62,6 +62,19 @@ check_sdk_upgrade()
return "${CHECK_RESULT}"
}
+check_ffb()
+{
+ check_issu_enabled || {
+ echo "ISSU is not enabled on this HWSKU"
+ return "${FFB_FAILURE}"
+ }
+ check_sdk_upgrade || {
+ echo "SDK upgrade check failued"
+ return "${FFB_FAILURE}"
+ }
+ return "${FFB_SUCCESS}";
+}
+
# Perform ISSU start
issu_start()
{
@@ -70,8 +83,6 @@ issu_start()
EXIT_CODE=$?
- touch /host/warmboot/issu_started
-
return $EXIT_CODE
}
diff --git a/platform/mellanox/mlnx-issu/scripts/ffb b/platform/mellanox/mlnx-issu/scripts/ffb
deleted file mode 100755
index e862083d2942..000000000000
--- a/platform/mellanox/mlnx-issu/scripts/ffb
+++ /dev/null
@@ -1,69 +0,0 @@
-#!/usr/bin/env python
-"""
-Part of Mellanox platform specific fastfast boot implementation for warm-boot.
-Notifies SYNCD proccess once boot is finished after warm-reboot.
-Once SYNCD received such notification it should set appropriate SAI attribute.
-Then SAI will notify SDK to end ISSU mode for the FFB.
-"""
-
-
-import time
-import swsssdk
-from threading import Timer
-
-
-class FFB(object):
- """Provides implementation for Mellanox fastfast boot"""
- DB_WARM_TABLE_KEY = 'WARM_RESTART_TABLE|bgp'
- DB_STATE_ENTRY_NAME = 'state'
- DB_STATE_TYPE_RECONCILED = 'reconciled'
- DB_CHANNEL_NAME = 'MLNX_FFB'
- DB_CHANNEL_MSG = '["SET","ISSU_END"]' # message should be in the following format: ["",""]
- SUB_THREAD_TIMEOUT = 1
- STOP_TIMER_TIMEOUT = 180
-
- def __init__(self):
- self.state_db = swsssdk.SonicV2Connector()
- self.state_db.connect(self.state_db.STATE_DB)
-
- self.prevState = self.state_db.get(self.state_db.STATE_DB, self.DB_WARM_TABLE_KEY, self.DB_STATE_ENTRY_NAME)
-
- self.pubSub = self.state_db.redis_clients[self.state_db.STATE_DB].pubsub()
- self.pubSub.psubscribe(**{'__key*@6__:{}'.format(self.DB_WARM_TABLE_KEY): self.eventHandler})
-
- self.timeoutTimer = Timer(self.STOP_TIMER_TIMEOUT, self.finish)
-
- def run(self):
- # Start event thread in order to get required events
- self.eventThread = self.pubSub.run_in_thread(sleep_time=self.SUB_THREAD_TIMEOUT)
- # Start oneshot timer in order to exit in case required event is not received during defined timeout
- self.timeoutTimer.start()
-
- def finish(self):
- # Stop event thread and timeout timer
- self.eventThread.stop()
- self.timeoutTimer.cancel()
-
- # Publish "FFB END" event to SYNCD process
- time.sleep(60) # W/A: Wait until configuration is applied to HW since it takes some time
- self.state_db.publish(self.state_db.STATE_DB, self.DB_CHANNEL_NAME, self.DB_CHANNEL_MSG)
-
- def eventHandler(self, msg):
- # Only "set" operations are needed so just skip all others
- if msg['data'] != 'hset':
- return
-
- state = self.state_db.get(self.state_db.STATE_DB, self.DB_WARM_TABLE_KEY, self.DB_STATE_ENTRY_NAME)
-
- if (state != self.prevState) and (state == self.DB_STATE_TYPE_RECONCILED):
- self.finish()
- else:
- self.prevState = state
-
-
-def main():
- FFB().run()
-
-
-if __name__ == '__main__':
- main()
diff --git a/platform/mellanox/mlnx-issu/setup.py b/platform/mellanox/mlnx-issu/setup.py
index d1a733d6dce8..614c9a0bbe46 100755
--- a/platform/mellanox/mlnx-issu/setup.py
+++ b/platform/mellanox/mlnx-issu/setup.py
@@ -10,6 +10,5 @@
maintainer_email='stepanb@mellanox.com',
scripts=[
'scripts/issu',
- 'scripts/ffb',
]
)
diff --git a/platform/mellanox/mlnx-sai.mk b/platform/mellanox/mlnx-sai.mk
index 4d422cfedfa8..d5d3d53830a4 100644
--- a/platform/mellanox/mlnx-sai.mk
+++ b/platform/mellanox/mlnx-sai.mk
@@ -1,7 +1,7 @@
# Mellanox SAI
-MLNX_SAI_VERSION = SAIRel1.13.1-master
-MLNX_SAI_REVISION = 673e8fbb10d5cba194daf237ffdc5edd974fc1b0
+MLNX_SAI_VERSION = SAIRel1.13.3-master
+MLNX_SAI_REVISION = 7cc737246fce514372cf8fd447360c5f11e7c8b9
export MLNX_SAI_VERSION MLNX_SAI_REVISION
diff --git a/platform/mellanox/sdk.mk b/platform/mellanox/sdk.mk
index 28d7ff923ad9..c7ca2a513072 100644
--- a/platform/mellanox/sdk.mk
+++ b/platform/mellanox/sdk.mk
@@ -1,5 +1,5 @@
-MLNX_SDK_BASE_URL = https://github.com/Mellanox/SAI-Implementation/raw/8bdec819ad01450c08addd69e43ed36bf0941aad/sdk
-MLNX_SDK_VERSION = 4.2.9108
+MLNX_SDK_BASE_URL = https://github.com/Mellanox/SAI-Implementation/raw/543d9e8b5e8c6c58805b3579a0d9d4796d496812/sdk
+MLNX_SDK_VERSION = 4.3.0132
MLNX_SDK_RDEBS += $(APPLIBS) $(IPROUTE2_MLNX) $(SX_ACL_RM) $(SX_COMPLIB) \
$(SX_EXAMPLES) $(SX_GEN_UTILS) $(SX_SCEW) $(SX_SDN_HAL) \
$(SXD_LIBS) $(TESTX)
diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index e90bb63544ce..60f97c33ccb5 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit e90bb63544cea69d12470de60f3bc9f885b2476b
+Subproject commit 60f97c33ccb5b218c68b8c3fe94a48719ed09435
diff --git a/src/sonic-swss b/src/sonic-swss
index 95c3739b8477..8c8779a06263 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 95c3739b8477080e5ea1361065ac2187c36d18a1
+Subproject commit 8c8779a062631ec5396858d3bac64b9a53d2cb7c
diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index edbfeec663f3..e8caaead527d 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit edbfeec663f32585cbf3468a88deb950fed3bb69
+Subproject commit e8caaead527d46d42e41e99b884f41c57f70018b
diff --git a/src/sonic-utilities b/src/sonic-utilities
index 1d20e146294d..3ce8952ca43c 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 1d20e146294d54481fb685566b95184ba2b09b1c
+Subproject commit 3ce8952ca43c2d5015ae90b13aa8a4644bab4c19