From 2e88f2da734164bb6364ef606e5c3017ad4b0d24 Mon Sep 17 00:00:00 2001 From: Rob Tillaart Date: Sat, 25 May 2024 18:39:41 +0200 Subject: [PATCH] fix --- README.md | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/README.md b/README.md index 7068ae7..0a65e9f 100644 --- a/README.md +++ b/README.md @@ -241,14 +241,14 @@ Read the datasheet carefully! | constant | mask | description | |:-----------------------|:------:|:--------------| -| MCP23S17_IOCR_BANK | 0x80 | Controls how the registers are addressed. -| MCP23S17_IOCR_MIRROR | 0x40 | INT Pins Mirror bit. -| MCP23S17_IOCR_SEQOP | 0x20 | Sequential Operation mode bit. -| MCP23S17_IOCR_DISSLW | 0x10 | Slew Rate control bit for SDA output. -| MCP23S17_IOCR_HAEN | 0x08 | Hardware Address Enable bit (MCP23S17 only). -| MCP23S17_IOCR_ODR | 0x04 | Configures the INT pin as an open-drain output. -| MCP23S17_IOCR_INTPOL | 0x02 | This bit sets the polarity of the INT output pin. -| MCP23S17_IOCR_NI | 0x01 | Not implemented. +| MCP23x17_IOCR_BANK | 0x80 | Controls how the registers are addressed. +| MCP23x17_IOCR_MIRROR | 0x40 | INT Pins Mirror bit. +| MCP23x17_IOCR_SEQOP | 0x20 | Sequential Operation mode bit. +| MCP23x17_IOCR_DISSLW | 0x10 | Slew Rate control bit for SDA output. +| MCP23x17_IOCR_HAEN | 0x08 | Hardware Address Enable bit (MCP23S17 only). +| MCP23x17_IOCR_ODR | 0x04 | Configures the INT pin as an open-drain output. +| MCP23x17_IOCR_INTPOL | 0x02 | This bit sets the polarity of the INT output pin. +| MCP23x17_IOCR_NI | 0x01 | Not implemented. Two dedicated functions are added: (MCP23S17 only)