From 2371fb870130023a03ca745ba3f623f64ee483f8 Mon Sep 17 00:00:00 2001 From: Ivan Chikish Date: Fri, 14 Apr 2023 07:40:03 +0300 Subject: [PATCH] SPU LLVM: use atomic loads in read channel count --- rpcs3/Emu/Cell/SPURecompiler.cpp | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/rpcs3/Emu/Cell/SPURecompiler.cpp b/rpcs3/Emu/Cell/SPURecompiler.cpp index fe9c264b2794..eedbbd5868fe 100644 --- a/rpcs3/Emu/Cell/SPURecompiler.cpp +++ b/rpcs3/Emu/Cell/SPURecompiler.cpp @@ -6230,8 +6230,8 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator else { const auto val = m_ir->CreateLoad(get_type(), ptr); - val->setAtomic(llvm::AtomicOrdering::Unordered); - m_ir->CreateStore(m_ir->getInt64(0), ptr)->setAtomic(llvm::AtomicOrdering::Unordered); + val->setAtomic(llvm::AtomicOrdering::Acquire); + m_ir->CreateStore(m_ir->getInt64(0), ptr)->setAtomic(llvm::AtomicOrdering::Release); val0 = val; } @@ -6316,7 +6316,9 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator } case SPU_RdEventMask: { - res.value = m_ir->CreateTrunc(m_ir->CreateLShr(m_ir->CreateLoad(get_type(), spu_ptr(&spu_thread::ch_events)), 32), get_type()); + const auto value = m_ir->CreateLoad(get_type(), spu_ptr(&spu_thread::ch_events)); + value->setAtomic(llvm::AtomicOrdering::Acquire); + res.value = m_ir->CreateTrunc(m_ir->CreateLShr(value, 32), get_type()); break; } case SPU_RdEventStat: @@ -6357,6 +6359,7 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator llvm::Value* get_rchcnt(u32 off, u64 inv = 0) { const auto val = m_ir->CreateLoad(get_type(), _ptr(m_thread, off)); + val->setAtomic(llvm::AtomicOrdering::Acquire); const auto shv = m_ir->CreateLShr(val, spu_channel::off_count); return m_ir->CreateTrunc(m_ir->CreateXor(shv, u64{inv}), get_type()); } @@ -6422,7 +6425,9 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator } case SPU_RdInMbox: { - res.value = m_ir->CreateLoad(get_type(), spu_ptr(&spu_thread::ch_in_mbox)); + const auto value = m_ir->CreateLoad(get_type(), spu_ptr(&spu_thread::ch_in_mbox)); + value->setAtomic(llvm::AtomicOrdering::Acquire); + res.value = value; res.value = m_ir->CreateLShr(res.value, 8); res.value = m_ir->CreateAnd(res.value, 7); break;