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tests/cpu_esp: tests for ESP specific modules #12971
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@kaspar030 @benpicco What do you think about such tests? That would allow Murdock to detect compilation or even runtime problems for optional ESP features. I know, it is the only CPU that defines so many specific tests 😎 But these tests are necessary to cover all optional features. |
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Sorry, forgot about this.
But yea we should definitely have a compile-test for each driver.
I'm not sure about copying entire tests just to try out another config option, we might get away with less code duplication by just having a (test) board that has these options enabled by default.
The application corresponds exactly to the application `tests/periph_i2c`. | ||
It is only for testing the timer implementation using hardware counters. | ||
In fact, the application is nothing more than the `tests/periph_i2c` | ||
application compiled with the following command: |
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What timer implementation gets used on the esp for tests/periph_i2c
?
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The hardware implementation esp_i2c_hw
doesn't require a timer. The bit-banging software implementation uses busy waiting.
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Why would you default to bit-banging when there is a hardware i2c?
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Because it is buggy, instable and slower than the software implementation.
The application corresponds exactly to the application `tests/periph_timer`. | ||
It is only for testing the timer implementation using hardware counters. | ||
In fact, the application is nothing more than the `tests/periph_timer` | ||
application compiled with the following command: |
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Instead of copying every test to have a version with hardware counters, why not add a test-esp board that has
USEMODULE += esp_hw_counter
What is used by default instead? When would the user chose to use hardware counters?
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ESP32 has two counters and four 64-bit timers that can be used as periph_timer
. By default, the 64-bit timers are used.
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Not a single test application - just use the existing tests
tests/periph_i2c
,tests/periph_timer
but have a board that uses the other timer / i2c implementation by default.
At least that's how I understand the problem.
But I wouldn't like to expose this test board in the boards
directory.
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Maybe adding an external board that lives inside the test works.
I'm not sure what the latest state of compatibility with external boards and in-tree boards was, but if that works it would probably be the cleanest solution.
Also please rebase. |
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I'm not sure about copying entire tests just to try out another config option, we might get away with less code duplication by just having a (test) board that has these options enabled by default.
You mean we should have a single test application that contains a test board definition with all required functions and all modules enabled? Tricky, but really a good idea. I really like hacks like this 🕶️
Not a single test application - just use the existing tests |
Please rebase |
The test is just a copy of tests/periph_timer but uses the hardware counter for timers (module esp_hw_counter).
The test is just a copy of tests/periph_i2c but uses the hardware module for I2C (module esp_i2c_hw).
The test is just a copy of tests/malloc but uses the heap of the SDK (module esp_idf_heap) instead of the heap provided by the newlib. If feature esp_spi_ram is provided, the module esp_esp_ram is enabled. Thus the test is good for testing modules esp_idf_heap and esp_spi_ram.
The application corresponds exactly to the application `tests/shell`. It is only for testing the ESP-specific logging functions enabled by the `esp_log_startup` and `esp_log_tagged` modules.
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Rebased, but I just saw that the discussion about a virtual test board got stuck when the online semester came. I'm sorry, the PR seems to be not finished yet. |
I don't think we should block this because |
This issue has been automatically marked as stale because it has not had recent activity. It will be closed if no further activity occurs. If you want me to ignore this issue, please mark it with the "State: don't stale" label. Thank you for your contributions. |
Still in progress. |
Since there seems to be no good other way right now, let's get this in as is. |
I have removed the |
Closed in favor of #17314. |
Contribution description
A number of optional features of ESP boards have to be explicitly activated by enabling the corresponding modules. However, because these modules are not enabled by default, the CI compilation test cannot detect potential compilation problems. As a result, PRs can be merged that cause compilation problems when an optional ESP feature is enabled through the corresponding module.
To make it possible for CI compilation tests to recognize potential compilation problems when optional ESP features are enabled, a number of specific tests are provided by this PR. Some of them are only for compilation tests, but others can also be used to test the optional feature.
cpu_esp_eth
:Compile test for module
esp_eth
using a shell-based GNRC networking application for ESP32 boards that provides featureesp_eth
.cpu_esp_hw_counter
:Uses
tests/periph_timer
with hardware counters on ESP32 boards (moduleesp_hw_counter
).cpu_esp_i2c_hw
:Uses
tests/periph_i2c
with hardware I2C on ESP32 boards (moduleesp_i2c_hw
).cpu_esp_heap
:Uses
tests/malloc
with SDK heap on ESP8266/ESP32 boards (moduleesp_idf_heap
) and the SPI RAM (moduleesp_spi_ram
) for ESP32 boards that provide the featureesp_spi_ram
.cpu_esp_log
:Uses
tests/shell
with enabled startup information (moduleesp_log_startup
) and tagged output format (moduleesp_log_tagged
).cpu_esp_wifi
:Compile test for module
esp_wifi
using a shell-based GNRC networking application .Testing procedure
Compilation and automatic tests should succeed on Murdock.
Issues/PRs references
Tracked in issue #12960