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[TRACKING] Fixes for automatic tests of ESP32 boards. #12763

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16 of 17 tasks
gschorcht opened this issue Nov 21, 2019 · 2 comments
Open
16 of 17 tasks

[TRACKING] Fixes for automatic tests of ESP32 boards. #12763

gschorcht opened this issue Nov 21, 2019 · 2 comments
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Area: cpu Area: CPU/MCU ports Area: tests Area: tests and testing framework Platform: ESP Platform: This PR/issue effects ESP-based platforms Type: bug The issue reports a bug / The PR fixes a bug (including spelling errors) Type: tracking The issue tracks and organizes the sub-tasks of a larger effort

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@gschorcht
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gschorcht commented Nov 21, 2019

Description

Automatic tests for ESP32 didn't work because of problems to reset ESP32 boards using esptool.py. With PR #12752 it will become possible to reset ESP32 boards and to perform automatic tests.

However, a number of tests are not working due to several open problems. This issue tracks the tests that are not working for ESP32 and their fixes.

Open Test Problems

Test stability issues

@gschorcht gschorcht self-assigned this Nov 21, 2019
@gschorcht gschorcht added the Type: bug The issue reports a bug / The PR fixes a bug (including spelling errors) label Nov 21, 2019
@aabadie aabadie added the Platform: ESP Platform: This PR/issue effects ESP-based platforms label Nov 22, 2019
@gschorcht gschorcht added the Type: tracking The issue tracks and organizes the sub-tasks of a larger effort label Nov 28, 2019
@aabadie
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aabadie commented Jan 28, 2020

@gschorcht, there's only one item left in this tracking issue. Do you think this is fixable ? Or maybe it's already fixed ?

@gschorcht
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Unfortunately, the reason is still not really clear. It seems that the system locks when the hardware timer is read while the interrupts are disabled in BENCHMARK_FUNC. When I remove the irq_disable/irq_enable in BENCHMARK_FUNC, everything is fine. Maybe it's a race condition between the hardware timer read operation and a timer interrupt that is pending. I tried to debug it with OCD but when the system locks, OCD is not working anymore because interrupts are not handled anymore, even not high priority interrupts.

BTW, when I was investigating the problem I was wondering whether it is really a good idea to disable all interrupts during the benchmark test. There are platforms that require at least the timer interrupts to get benchmark tests working. For example, the results you get with ATmega boards and the tests/periph_gpio benchmark tests are completely nonsense because timer is not running during the benchmark tests. I know, ISRs must not affect the benchmark results. But if the timer interrupt is required to keep the timer working, disabling the interrupts is counter productive.

@aabadie aabadie added Area: tests Area: tests and testing framework Area: cpu Area: CPU/MCU ports labels May 20, 2021
@MrKevinWeiss MrKevinWeiss added this to the Release 2021.07 milestone Jun 22, 2021
@MrKevinWeiss MrKevinWeiss removed this from the Release 2021.07 milestone Jul 15, 2021
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Labels
Area: cpu Area: CPU/MCU ports Area: tests Area: tests and testing framework Platform: ESP Platform: This PR/issue effects ESP-based platforms Type: bug The issue reports a bug / The PR fixes a bug (including spelling errors) Type: tracking The issue tracks and organizes the sub-tasks of a larger effort
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