Merge #19943 #19978

19943: cpu/stm32: FMC used for low-level LCD parallel interface r=maribu a=gschorcht ### Contribution description This PR provides the implementation of the LCD low-level MCU 8080 parallel interface using the FMC peripheral. ### Testing procedure ``` BOARD=stm32f723e-disco make -C tests/drivers/st77xx flash ``` and ``` BOARD=stm32l496g-disco make -C tests/drivers/st77xx flash ``` should work on top of PR #19941. Drawing operations should be much faster. ### Issues/PRs references Depends on PR #19941 19978: treewide: fix typos to make codespell happy r=maribu a=maribu ### Contribution description - fixes typos in comments and docs (no generated firmware changes expected) - fixes a typo in a string in a GUI of a utility program - add some false positives to the ignore list ### Testing procedure - No generated binaries (except for the GUI version of the utility program to flash the MSB-A2) should change - The diff should not look too scary ### Issues/PRs references None Co-authored-by: Gunar Schorcht <[email protected]> Co-authored-by: Marian Buschsieweke <[email protected]>
RIOT-OS · Oct 16, 2023 · 554efb7 · 554efb7
3 parents 3a4ec8d + c548efd + 50490ed
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diff --git a/CODING_CONVENTIONS.md b/CODING_CONVENTIONS.md
@@ -257,7 +257,7 @@ Wrong:
   functionality.
 * Every function must be documented - including parameters and return value.
 
-An examplary doxygen documentation in a header file can look like this.
+An exemplary doxygen documentation in a header file can look like this.
 
 ```
 /*

diff --git a/boards/airfy-beacon/doc.txt b/boards/airfy-beacon/doc.txt
@@ -82,7 +82,7 @@ SUBSYSTEMS=="usb", ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3748", \
 # If you share your linux system with other users, or just don't like the
 # idea of write permission for everybody, you can replace MODE:="0666" with
 # OWNER:="yourusername" to create the device owned by you, or with
-# GROUP:="somegroupname" and mange access using standard unix groups.
+# GROUP:="somegroupname" and manage access using standard unix groups.
 
 > sudo cp 49-stlinkv2.rules /etc/udev/rules.d/
 > sudo udevadm control --reload-rules

diff --git a/boards/frdm-k64f/doc.txt b/boards/frdm-k64f/doc.txt
@@ -55,7 +55,7 @@ See also the ARMmbed
 [instructions](https://developer.mbed.org/platforms/FRDM-K64F/#getting-started-
 with-mbed).
 
-## Updating the Booloader
+## Updating the Bootloader
 A update of CMSIS-DAP firmware is necessary to using the board with OpenOCD.
 A good step by step guide is available
 [here](https://developer.mbed.org/handbook/Firmware-FRDM-K64F).

diff --git a/boards/iotlab-m3/doc.txt b/boards/iotlab-m3/doc.txt
@@ -76,7 +76,7 @@ b <breakpoint>
 c
 ```
 For best debugging experience also change the `-Os` flag in
-`Makefile.inlcude`'s `CFLAGS` variable to `-O0`.
+`Makefile.include`'s `CFLAGS` variable to `-O0`.
 
 ## Details
 The M3 Open Node can reset, debug and program the STM32 on JTAG through the

diff --git a/boards/lsn50/doc.txt b/boards/lsn50/doc.txt
@@ -7,7 +7,7 @@
 
 This board is a waterproof board with a LoRa SX1276 radio.
 
-![LSN50](https://wiki.dragino.com/images/thumb/e/e9/Introdution.png/600px-Introdution.png)
+![LSN50](https://docs.zephyrproject.org/latest/_images/dragino_lsn50.jpg)
 
 Documentation of the board is available
 [here](https://wiki.dragino.com/index.php?title=Lora_Sensor_Node-LSN50).

diff --git a/boards/spark-core/doc.txt b/boards/spark-core/doc.txt
@@ -52,7 +52,7 @@ SUBSYSTEMS=="usb", ATTRS{idVendor}=="1d50", ATTRS{idProduct}=="607f", \
 # If you share your linux system with other users, or just don't like the
 # idea of write permission for everybody, you can replace MODE:="0666" with
 # OWNER:="yourusername" to create the device owned by you, or with
-# GROUP:="somegroupname" and mange access using standard unix groups.
+# GROUP:="somegroupname" and manage access using standard unix groups.
 
 sudo cp 50-openmoko.rules  /etc/udev/rules.d/
 sudo udevadm control --reload-rules

diff --git a/boards/stm32f723e-disco/Kconfig b/boards/stm32f723e-disco/Kconfig
@@ -39,6 +39,7 @@ config BOARD_STM32F723E_DISCO
     select HAVE_FT5X06
     select HAVE_ST7789
     select HAVE_LCD_PARALLEL_16BIT if MODULE_ST7789
+    select HAVE_LCD_PARALLEL_LL_MCU if MODULE_ST7789
 
     select MODULE_PERIPH_UART_HW_FC if HAS_PERIPH_UART_HW_FC && MODULE_PERIPH_UART
     # Workaround due to stdout only working with stdin enabled

diff --git a/boards/stm32f723e-disco/Makefile.dep b/boards/stm32f723e-disco/Makefile.dep
@@ -25,6 +25,8 @@ endif
 
 ifneq (,$(filter st7789,$(USEMODULE)))
   USEMODULE += lcd_parallel_16bit
+  USEMODULE += lcd_parallel_ll_mcu
+  FEATURES_REQUIRED += periph_fmc_nor_sram
 endif
 
 # TODO: remove the stdin dependency

diff --git a/boards/stm32f723e-disco/include/periph_conf.h b/boards/stm32f723e-disco/include/periph_conf.h
@@ -42,6 +42,7 @@
 #else
 #include "cfg_usb_otg_fs.h"
 #endif
+#include "lcd_fmc.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -325,6 +326,29 @@ static const fmc_bank_conf_t fmc_bank_config[] = {
                            .bus_turnaround = 3, },  /* 3 HCLKs a 4.63 ns */
         },
     },
+    /* bank 1, subbank 2 is used for LCD with asynchronuous
+     * access in Mode 1, i.e. write timings are not used */
+    {
+        .bank = FMC_BANK_1,
+        .mem_type = FMC_SRAM,
+        .data_width = FMC_BUS_WIDTH_16BIT,
+        .address = 0x64000000,  /* Bank 1, subbank 2 is mapped to 0x64000000 */
+        .size = 4,              /* 1 word for command @ 0x64000000 and
+                                     1 word for data @ 0x64000001 */
+        .nor_sram = {
+            .sub_bank = 2,
+            .ext_mode = false,                      /* Mode 1 used, no separate w_timing */
+                                                    /* timing requirements for ST7789H2:
+                                                       - t_AST min 0 ns (Address setup time)
+                                                       - t_DST min 10 ns (Data setup time)
+                                                       - t_WRL min 15 ns (WE LOW time)
+                                                       - t_WRH min 15 ns (WE HIGH time)
+                                                       - t_WRC min 66 ns (WE cycle time) */
+            .r_timing = {  .addr_setup = 2,         /* t_AST = 10 ns (2 HCLKs a 4.63 ns) */
+                           .data_setup = 8,         /* t_DST = 37 ns (8 HCLKs a 4.63 ns) */
+                           .bus_turnaround = 5, },  /* t_WRH = 23 ns (5 HCLKs a 4.63 ns) */
+        },
+    },
 };
 
 /**
@@ -333,6 +357,25 @@ static const fmc_bank_conf_t fmc_bank_config[] = {
 #define FMC_BANK_NUMOF  ARRAY_SIZE(fmc_bank_config)
 /** @} */
 
+/**
+ * @brief   Descriptors of FMC banks used for LCDs
+ */
+static const lcd_fmc_desc_t lcd_fmc_desc[] = {
+    {
+        .bank = FMC_BANK_CONFIG(1), /* second bank (fmc_bank_config[1]) is used */
+        .cmd_offset = 0x0,          /* address 0x64000000 (offset 0x0) used for commands */
+        .data_offset = 0x2,         /* address 0x64000002 (offset 0x2) used for commands */
+    }
+};
+
+/**
+ * @brief   Number of LCDs using FMC banks
+ *
+ * Because it is used by the preprocessor it has to be a number.
+ * The @ref ARRAY_SIZE can't be used here.
+ */
+#define LCD_FMC_NUMOF  1
+
 #ifdef __cplusplus
 }
 #endif

diff --git a/boards/stm32l496g-disco/Kconfig b/boards/stm32l496g-disco/Kconfig
@@ -45,6 +45,7 @@ config BOARD_STM32L496G_DISCO
     select HAVE_FT5X06
     select HAVE_ST7789
     select HAVE_LCD_PARALLEL_16BIT if MODULE_ST7789
+    select HAVE_LCD_PARALLEL_LL_MCU if MODULE_ST7789
 
     select MODULE_PERIPH_LPUART if MODULE_PERIPH_UART
     select MODULE_PERIPH_UART_HW_FC if MODULE_PERIPH_UART && !MODULE_PERIPH_SPI_STMOD && HAS_PERIPH_UART_HW_FC

diff --git a/boards/stm32l496g-disco/Makefile.dep b/boards/stm32l496g-disco/Makefile.dep
@@ -28,4 +28,6 @@ endif
 
 ifneq (,$(filter st7789,$(USEMODULE)))
   USEMODULE += lcd_parallel_16bit
+  USEMODULE += lcd_parallel_ll_mcu
+  FEATURES_REQUIRED += periph_fmc_nor_sram
 endif
diff --git a/boards/stm32l496g-disco/include/periph_conf.h b/boards/stm32l496g-disco/include/periph_conf.h
@@ -30,6 +30,7 @@
 #include "clk_conf.h"
 #include "cfg_rtt_default.h"
 #include "cfg_usb_otg_fs.h"
+#include "lcd_fmc.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -253,12 +254,55 @@ static const fmc_bank_conf_t fmc_bank_config[] = {
                            .bus_turnaround = 1, },  /* 1 HCLK a 12.5 ns */
         },
     },
+    /* bank 1, subbank 1 is used for LCD with asynchronuous
+     * access in Mode 1, i.e. write timings are not used */
+    {
+        .bank = FMC_BANK_1,
+        .mem_type = FMC_SRAM,
+        .data_width = FMC_BUS_WIDTH_16BIT,
+        .address = 0x60000000,  /* Bank 1, subbank 1 is mapped to 0x60000000 */
+        .size = 2,              /* 1 word for command @ 0x60000000 and
+                                   1 word for data @ 0x60080000 */
+        .nor_sram = {
+            .sub_bank = 1,
+            .ext_mode = false,                      /* Mode 1 used, no separate w_timing */
+                                                    /* timing requirements for ST7789H2:
+                                                       - t_AST min 0 ns (Address setup time)
+                                                       - t_DST min 10 ns (Data setup time)
+                                                       - t_WRL min 15 ns (WE LOW time)
+                                                       - t_WRH min 15 ns (WE HIGH time)
+                                                       - t_WRC min 66 ns (WE cycle time) */
+            .r_timing = {  .addr_setup = 1,         /* t_AST = 12 ns (1 HCLKs a 12.5 ns) */
+                           .data_setup = 3,         /* t_DST = 37 ns (3 HCLKs a 12.5 ns) */
+                           .bus_turnaround = 2, },  /* t_WRH = 25 ns (2 HCLKs a 12.5 ns) */
+        },
+    },
 };
 
 /**
  * @brief   Number of configured FMC banks
  */
 #define FMC_BANK_NUMOF  ARRAY_SIZE(fmc_bank_config)
+
+/**
+ * @brief   Descriptors of FMC banks used for LCDs
+ */
+static const lcd_fmc_desc_t lcd_fmc_desc[] = {
+    {
+        .bank = FMC_BANK_CONFIG(1), /* second bank (fmc_bank_config[1]) is used */
+        .cmd_offset = 0x0,          /* address 0x60000000 (offset 0x00000) used for commands */
+        .data_offset = 0x80000,     /* address 0x60080000 (offset 0x80000) used for data */
+    }
+};
+
+/**
+ * @brief   Number of LCDs using FMC banks
+ *
+ * Because it is used by the preprocessor it has to be a number.
+ * The @ref ARRAY_SIZE can't be used here.
+ */
+#define LCD_FMC_NUMOF  1
+
 /** @} */
 
 /**

diff --git a/core/include/mutex.h b/core/include/mutex.h
@@ -392,7 +392,7 @@ void mutex_unlock_and_sleep(mutex_t *mutex);
  *          @ref mutex_lock_cancelable. (You can reinitialize the same memory
  *          to safely reuse it.)
  * @warning You ***MUST NOT*** call this function once the thread referred to by
- *          @p mc re-uses the mutex object referred to by @p mc (not counting
+ *          @p mc reuses the mutex object referred to by @p mc (not counting
  *          the call to @ref mutex_lock_cancelable @p mc was used in).
  * @note    It is safe to call this function from IRQ context, e.g. from a timer
  *          interrupt.

diff --git a/core/msg.c b/core/msg.c
@@ -216,7 +216,7 @@ static int _msg_send_oneway(msg_t *m, kernel_pid_t target_pid)
 
         sched_set_status(target, STATUS_PENDING);
 
-        /* Interrupts are disabled here, we can set / re-use
+        /* Interrupts are disabled here, we can set / reuse
            sched_context_switch_request. */
         sched_context_switch_request = 1;
 
@@ -280,7 +280,7 @@ int msg_send_receive(msg_t *m, msg_t *reply, kernel_pid_t target_pid)
     sched_set_status(me, STATUS_REPLY_BLOCKED);
     me->wait_data = reply;
 
-    /* we re-use (abuse) reply for sending, because wait_data might be
+    /* we reuse (abuse) reply for sending, because wait_data might be
      * overwritten if the target is not in RECEIVE_BLOCKED */
     *reply = *m;
     /* msg_send blocks until reply received */

diff --git a/cpu/esp8266/periph/adc.c b/cpu/esp8266/periph/adc.c
@@ -37,7 +37,7 @@ int adc_init(adc_t line)
 {
     CHECK_PARAM_RET (line < ADC_NUMOF, -1)
 
-    /* no special inialization needed */
+    /* no special initialization needed */
     return 0;
 }
 

diff --git a/cpu/esp_common/esp-wifi/doc.txt b/cpu/esp_common/esp-wifi/doc.txt
@@ -88,7 +88,7 @@ following configuration parameters have to be defined:
 Parameter          | Default   | Description
 :------------------|:----------|:------------
 WIFI_SSID          | "RIOT_AP" | SSID of the AP to be used.
-WIFI_EAP_ID        | none      | Optional anonymous identity used in phase 1 (outer) EAP authentication. If it is not defined, the user name defined for phase 2 (inner) EAP authentication is used as idendity in phase 1.
+WIFI_EAP_ID        | none      | Optional anonymous identity used in phase 1 (outer) EAP authentication. If it is not defined, the user name defined for phase 2 (inner) EAP authentication is used as identity in phase 1.
 WIFI_EAP_USER      | none      | User name used in phase 2 (inner) EAP authentication.
 WIFI_EAP_PASS      | none      | Password used in phase 2 (inner) EAP authentication.
 ESP_WIFI_STACKSIZE | #THREAD_STACKSIZE_DEFAULT | Stack size used for the WiFi netdev driver thread.

diff --git a/cpu/nrf52/radio/nrf802154/nrf802154_radio.c b/cpu/nrf52/radio/nrf802154/nrf802154_radio.c
@@ -566,7 +566,7 @@ void isr_radio(void)
         case STATE_ACK:
             _state = STATE_IDLE;
 
-            /* We disable the radio to avoid unwanted emmissions (see ERRATA
+            /* We disable the radio to avoid unwanted emissions (see ERRATA
              * ID 204, "Switching between TX and RX causes unwanted emissions")
              */
             _disable();

diff --git a/cpu/sam0_common/periph/timer.c b/cpu/sam0_common/periph/timer.c
@@ -310,7 +310,7 @@ unsigned int timer_read(tim_t tim)
         return 0;
     }
 
-    /* request syncronisation */
+    /* request synchronisation */
 #ifdef TC_CTRLBSET_CMD_READSYNC_Val
     dev(tim)->CTRLBSET.reg = TC_CTRLBSET_CMD_READSYNC;
      /* work around a possible hardware bug where it takes some

diff --git a/cpu/sam0_common/sam0_sdhc/sdhc.c b/cpu/sam0_common/sam0_sdhc/sdhc.c
@@ -1038,7 +1038,7 @@ static bool sdio_test_type(sdhc_state_t *state)
 
     /*
      * Wait card ready
-     * Timeout 1s = 400KHz / ((6+4)*8) cylces = 5000 retry
+     * Timeout 1s = 400KHz / ((6+4)*8) cycles = 5000 retry
      * 6 = cmd byte size
      * 4(SPI) 6(MCI) = response byte size
      */

diff --git a/cpu/stm32/Kconfig b/cpu/stm32/Kconfig
@@ -78,6 +78,7 @@ rsource "periph/Kconfig.fmc"
 
 if TEST_KCONFIG
 
+rsource "lcd_fmc/Kconfig"
 rsource "periph/Kconfig"
 rsource "stmclk/Kconfig"
 rsource "vectors/Kconfig"

diff --git a/cpu/stm32/Makefile b/cpu/stm32/Makefile
@@ -6,4 +6,8 @@ ifneq (,$(filter bootloader_stm32,$(USEMODULE)))
   DIRS += bootloader
 endif
 
+ifneq (,$(filter lcd_fmc,$(USEMODULE)))
+  DIRS += lcd_fmc
+endif
+
 include $(RIOTBASE)/Makefile.base
diff --git a/cpu/stm32/Makefile.dep b/cpu/stm32/Makefile.dep
@@ -54,6 +54,10 @@ ifneq (,$(filter stm32_eth,$(USEMODULE)))
   endif
 endif
 
+ifneq (,$(filter lcd_parallel_ll_mcu,$(USEMODULE)))
+  USEMODULE += lcd_fmc
+endif
+
 ifneq (,$(filter periph_can,$(FEATURES_USED)))
   FEATURES_REQUIRED += periph_gpio
   FEATURES_REQUIRED += periph_gpio_irq

diff --git a/cpu/stm32/cpu_init.c b/cpu/stm32/cpu_init.c
@@ -219,7 +219,7 @@ static inline uint32_t _multi_read_reg32(volatile uint32_t *addr, bool *glitch)
  * Think of this as a STM32-specific version of the Rowhammer attack.
  *
  * RDP may not be set correctly due to manufacturing error, glitch or
- * intentional attack.  It's done thrice to reduce the probablility of a
+ * intentional attack.  It's done thrice to reduce the probability of a
  * glitch attack succeeding amongst all of the multireads desgned to make it
  * tougher.
  *

diff --git a/cpu/stm32/include/lcd_fmc.h b/cpu/stm32/include/lcd_fmc.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (C) 2023 Gunar Schorcht
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @defgroup    cpu_stm32_lcd_fmc STM32 FMC/FSMC LCD low-level parallel interface driver
+ * @ingroup     cpu_stm32
+ *
+ * @{
+ */
+
+#ifndef LCD_FMC_H
+#define LCD_FMC_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief   Number of LCDs using FMC banks
+ *
+ * It represents the number of elements in LCD FMC bank descriptor array of
+ * type @ref lcd_fmc_desc_t. Because it is used by the preprocessor, it has
+ * to be defined as a number. It is not possible to use the @ref ARRAY_SIZE
+ * macro here.
+ *
+ * @note `LCD_FMC_NUMOF` has to be equal to the number of elements in the
+ *       LCD FMC bank descriptor array of type @ref lcd_fmc_desc_t.
+ */
+#if DOXYGEN
+#define LCD_FMC_NUMOF  1
+#endif
+
+/**
+ * @brief   Descriptor of the FMC bank used for a LCD
+ *
+ * The board definition has to specify the array @ref lcd_fmc_desc of type
+ * @ref lcd_fmc_desc_t which defines the FMC banks and the address offsets used
+ * for the LCD displays that are connected to FMC banks.
+ *
+ * @note In the case that multiple LCDs are connected to FMC banks, the FMC
+ *       bank descriptors for LCDs of type @ref lcd_fmc_desc_t
+ *       must be defined in same order as the LCD devices.
+ */
+typedef struct {
+    const fmc_bank_conf_t *bank;    /**< FMC bank config used for the LCD */
+    uint32_t cmd_offset;            /**< offset to the bank address used for commands */
+    uint32_t data_offset;           /**< offset to the bank address used for data */
+} lcd_fmc_desc_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LCD_FMC_H */
+/** @} */