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Merge pull request #20337 from benpicco/boards/weact-g030f6
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boards/weact-g030f6: add support for minimal break-out board
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benpicco authored Feb 5, 2024
2 parents e83ab21 + e207848 commit 0eddf4a
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1 change: 1 addition & 0 deletions boards/stm32g0316-disco/Makefile.features
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Expand Up @@ -3,6 +3,7 @@ CPU_MODEL = stm32g031j6

# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_gpio
FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_rtt
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
1 change: 1 addition & 0 deletions boards/stm32g0316-disco/include/periph_conf.h
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Expand Up @@ -45,6 +45,7 @@ static const timer_conf_t timer_config[] = {
};

#define TIMER_0_ISR isr_tim1_cc
#define TIMER_0_MAX_VALUE 0xffff

#define TIMER_NUMOF ARRAY_SIZE(timer_config)
/** @} */
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3 changes: 3 additions & 0 deletions boards/weact-g030f6/Makefile
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@@ -0,0 +1,3 @@
MODULE = board

include $(RIOTBASE)/Makefile.base
3 changes: 3 additions & 0 deletions boards/weact-g030f6/Makefile.dep
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@@ -0,0 +1,3 @@
ifneq (,$(filter saul_default,$(USEMODULE)))
USEMODULE += saul_gpio
endif
8 changes: 8 additions & 0 deletions boards/weact-g030f6/Makefile.features
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@@ -0,0 +1,8 @@
CPU = stm32
CPU_MODEL = stm32g030f6

# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_gpio
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
FEATURES_PROVIDED += periph_rtc
18 changes: 18 additions & 0 deletions boards/weact-g030f6/Makefile.include
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@@ -0,0 +1,18 @@
# we use shared STM32 configuration snippets
INCLUDES += -I$(RIOTBASE)/boards/common/stm32/include

# define the default port depending on the host OS
PORT_LINUX ?= /dev/ttyACM0
PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.SLAB_USBtoUART*)))

# setup serial terminal
include $(RIOTMAKE)/tools/serial.inc.mk

PROGRAMMER ?= openocd
OPENOCD_DEBUG_ADAPTER ?= stlink

# openocd programmer is supported
PROGRAMMERS_SUPPORTED += openocd

# this board uses openocd
include $(RIOTMAKE)/tools/openocd.inc.mk
3 changes: 3 additions & 0 deletions boards/weact-g030f6/dist/openocd.cfg
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@@ -0,0 +1,3 @@
source [find target/stm32g0x.cfg]

$_TARGETNAME configure -rtos auto
37 changes: 37 additions & 0 deletions boards/weact-g030f6/doc.txt
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@@ -0,0 +1,37 @@
/**
@defgroup boards_weact-g030f6 WeAct-G030F6 board
@ingroup boards
@brief Support for the WeAct-G030F6 board

## Overview

WeAct-G030F6 is a cheap little board based on the STM32G030F6P6 MCU.
It does not come with a programmer or USB connection, so an external
programmer (ST-Link, DAP-Link, etc) has to be used.

It is available on sites like AliExpress for less than 2€.

## Hardware

![WeAct-G030F6P4](https://github.com/RIOT-OS/RIOT/assets/1301112/d42a25e0-d331-4cae-ba48-1edfa01f35f9)

### MCU
| MCU | STM32G030F6P6 |
|:---------------- |:--------------------- |
| Family | ARM Cortex-M0+ |
| Vendor | ST Microelectronics |
| RAM | 8KiB |
| Flash | 32KiB |
| Frequency | up to 64MHz |
| FPU | no |
| Timers | 8 (2x watchdog, 1 SysTick, 5x 16-bit) |
| ADCs | 1x 12-bit |
| UARTs | 2 |
| SPIs | 2 |
| I2Cs | 2 |
| RTC | 1 |
| Vcc | 2.0V - 3.6V |
| Datasheet | [Datasheet](https://www.st.com/resource/en/datasheet/stm32g030f6.pdf) |
| Reference Manual | [Reference Manual](https://www.st.com/resource/en/reference_manual/rm0454-stm32g0x0-advanced-armbased-32bit-mcus-stmicroelectronics.pdf) |

*/
43 changes: 43 additions & 0 deletions boards/weact-g030f6/include/board.h
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@@ -0,0 +1,43 @@
/*
* Copyright (C) 2024 ML!PA Consulting GmbH
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/

/**
* @ingroup boards_weact-g030f6
* @{
*
* @file
* @brief Board specific definitions for WeAct-G030F6
*
* @author Benjamin Valentin <[email protected]>
*/

#ifndef BOARD_H
#define BOARD_H

#include "cpu.h"
#include "periph_conf.h"
#include "periph_cpu.h"

#ifdef __cplusplus
extern "C" {
#endif

#define LED0_PIN_NUM 4
#define LED0_PORT_NUM PORT_A

#define BTN0_PIN GPIO_PIN(PORT_A, 14)
#define BTN0_MODE GPIO_IN

#ifdef __cplusplus
}
#endif

#include "stm32_leds.h"

#endif /* BOARD_H */
/** @} */
52 changes: 52 additions & 0 deletions boards/weact-g030f6/include/gpio_params.h
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@@ -0,0 +1,52 @@
/*
* Copyright (C) 2024 ML!PA Consulting GmbH
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/

/**
* @ingroup boards_weact-g030f6
* @{
*
* @file
* @brief Board specific configuration of direct mapped GPIOs
*
* @author Benjamin Valentin <[email protected]>
*/

#ifndef GPIO_PARAMS_H
#define GPIO_PARAMS_H

#include "board.h"
#include "saul/periph.h"

#ifdef __cplusplus
extern "C" {
#endif

/**
* @brief GPIO pin configuration
*/
static const saul_gpio_params_t saul_gpio_params[] =
{
{
.name = "LED(blue)",
.pin = LED0_PIN,
.mode = GPIO_OUT,
.flags= SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR,
},
{
.name = "Button(A14)",
.pin = BTN0_PIN,
.mode = BTN0_MODE,
},
};

#ifdef __cplusplus
}
#endif

#endif /* GPIO_PARAMS_H */
/** @} */
79 changes: 79 additions & 0 deletions boards/weact-g030f6/include/periph_conf.h
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@@ -0,0 +1,79 @@
/*
* Copyright (C) 2024 ML!PA Consulting GmbH
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/

/**
* @ingroup boards_weact-g030f6
* @{
*
* @file
* @brief Configuration of CPU peripherals for WeAct-G030F6
*
* @author Benjamin Valentin <[email protected]>
*/

#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H

#include <stdint.h>

#include "cpu.h"
#include "periph_cpu.h"
#include "clk_conf.h"

#ifdef __cplusplus
extern "C" {
#endif

/**
* @name Timer configuration
* @{
*/
static const timer_conf_t timer_config[] = {
{
.dev = TIM1,
.max = 0x0000ffff,
.rcc_mask = RCC_APBENR2_TIM1EN,
.bus = APB12,
.irqn = TIM1_CC_IRQn
}
};

#define TIMER_0_ISR isr_tim1_cc
#define TIMER_0_MAX_VALUE 0xffff

#define TIMER_NUMOF ARRAY_SIZE(timer_config)
/** @} */

/**
* @name UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{
.dev = USART2,
.rcc_mask = RCC_APBENR1_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF1,
.tx_af = GPIO_AF1,
.bus = APB1,
.irqn = USART2_IRQn,
},
};

#define UART_0_ISR (isr_usart2)

#define UART_NUMOF ARRAY_SIZE(uart_config)
/** @} */

#ifdef __cplusplus
}
#endif

#endif /* PERIPH_CONF_H */
/** @} */
26 changes: 21 additions & 5 deletions cpu/stm32/periph/rtc_all.c
Original file line number Diff line number Diff line change
Expand Up @@ -49,6 +49,11 @@
#define EXTI_REG_FTSR (EXTI->FTSR1)
#define EXTI_REG_PR (EXTI->PR1)
#define EXTI_REG_IMR (EXTI->IMR1)
#elif defined(CPU_FAM_STM32G0)
#define EXTI_REG_RTSR (EXTI->RTSR1)
#define EXTI_REG_FTSR (EXTI->FTSR1)
#define EXTI_REG_PR (EXTI->RPR1)
#define EXTI_REG_IMR (EXTI->IMR1)
#elif defined(CPU_FAM_STM32L5)
#define EXTI_REG_IMR (EXTI->IMR1)
#else
Expand All @@ -59,9 +64,10 @@
#endif

/* map some RTC register names and bitfield */
#if defined(CPU_FAM_STM32G4)
#if defined(CPU_FAM_STM32G4) || defined(CPU_FAM_STM32G0)
#define RTC_REG_ISR RTC->ICSR

#define RTC_REG_SR RTC->SR
#define RTC_REG_SCR RTC->SCR
#define RTC_ISR_RSF RTC_ICSR_RSF
#define RTC_ISR_INIT RTC_ICSR_INIT
#define RTC_ISR_INITF RTC_ICSR_INITF
Expand All @@ -83,6 +89,9 @@
defined(CPU_FAM_STM32L5)
#define IRQN (RTC_IRQn)
#define ISR_NAME isr_rtc
#elif defined(CPU_FAM_STM32G0)
#define IRQN (RTC_TAMP_IRQn)
#define ISR_NAME isr_rtc_tamp
#else
#define IRQN (RTC_Alarm_IRQn)
#define ISR_NAME isr_rtc_alarm
Expand All @@ -101,6 +110,11 @@
#define EXTI_FTSR_BIT (EXTI_FTSR1_FT17)
#define EXTI_RTSR_BIT (EXTI_RTSR1_RT17)
#define EXTI_PR_BIT (EXTI_PR1_PIF17)
#elif defined(CPU_FAM_STM32G0)
#define EXTI_IMR_BIT (EXTI_IMR1_IM11)
#define EXTI_FTSR_BIT (EXTI_FTSR1_FT11)
#define EXTI_RTSR_BIT (EXTI_RTSR1_RT11)
#define EXTI_PR_BIT (EXTI_RPR1_RPIF11)
#else
#if defined(CPU_FAM_STM32L0)
#define EXTI_IMR_BIT (EXTI_IMR_IM17)
Expand Down Expand Up @@ -252,9 +266,11 @@ void rtc_init(void)

/* select input clock and enable the RTC */
stmclk_dbp_unlock();
#if defined(CPU_FAM_STM32L5)
#if defined(CPU_FAM_STM32L5)
periph_clk_en(APB1, RCC_APB1ENR1_RTCAPBEN);
#endif
#elif defined(CPU_FAM_STM32G0)
periph_clk_en(APB1, RCC_APBENR1_RTCAPBEN);
#endif
EN_REG &= ~(CLKSEL_MASK);
#if IS_ACTIVE(CONFIG_BOARD_HAS_LSE)
EN_REG |= (CLKSEL_LSE | EN_BIT);
Expand Down Expand Up @@ -398,7 +414,7 @@ void rtc_poweroff(void)

void ISR_NAME(void)
{
#if !defined(CPU_FAM_STM32L5)
#if !defined(CPU_FAM_STM32L5) && !defined(CPU_FAM_STM32G0)
if (RTC_REG_ISR & RTC_ISR_ALRAF) {
if (isr_ctx.cb != NULL) {
isr_ctx.cb(isr_ctx.arg);
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1 change: 1 addition & 0 deletions examples/asymcute_mqttsn/Makefile.ci
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Expand Up @@ -48,6 +48,7 @@ BOARD_INSUFFICIENT_MEMORY := \
stm32l0538-disco \
telosb \
waspmote-pro \
weact-g030f6 \
yunjia-nrf51822 \
z1 \
zigduino \
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1 change: 1 addition & 0 deletions examples/benchmark_udp/Makefile.ci
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Expand Up @@ -37,6 +37,7 @@ BOARD_INSUFFICIENT_MEMORY := \
stm32l0538-disco \
telosb \
waspmote-pro \
weact-g030f6 \
z1 \
zigduino \
#
1 change: 1 addition & 0 deletions examples/cord_ep/Makefile.ci
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Expand Up @@ -40,6 +40,7 @@ BOARD_INSUFFICIENT_MEMORY := \
stm32l0538-disco \
telosb \
waspmote-pro \
weact-g030f6 \
z1 \
zigduino \
#
1 change: 1 addition & 0 deletions examples/cord_epsim/Makefile.ci
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Expand Up @@ -32,5 +32,6 @@ BOARD_INSUFFICIENT_MEMORY := \
stm32l0538-disco \
telosb \
waspmote-pro \
weact-g030f6 \
z1 \
#
1 change: 1 addition & 0 deletions examples/cord_lc/Makefile.ci
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Expand Up @@ -37,5 +37,6 @@ BOARD_INSUFFICIENT_MEMORY := \
stm32l0538-disco \
telosb \
waspmote-pro \
weact-g030f6 \
z1 \
#
1 change: 1 addition & 0 deletions examples/dtls-echo/Makefile.ci
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Expand Up @@ -55,6 +55,7 @@ BOARD_INSUFFICIENT_MEMORY := \
stm32mp157c-dk2 \
telosb \
waspmote-pro \
weact-g030f6 \
yunjia-nrf51822 \
z1 \
zigduino \
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1 change: 1 addition & 0 deletions examples/dtls-sock/Makefile.ci
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Expand Up @@ -58,6 +58,7 @@ BOARD_INSUFFICIENT_MEMORY := \
stm32mp157c-dk2 \
telosb \
waspmote-pro \
weact-g030f6 \
yunjia-nrf51822 \
z1 \
zigduino \
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