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Leverage rustworkx node and edge count hints in transpiler #12812

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6 changes: 5 additions & 1 deletion qiskit/converters/circuit_to_dag.py
Original file line number Diff line number Diff line change
Expand Up @@ -55,7 +55,11 @@ def circuit_to_dag(circuit, copy_operations=True, *, qubit_order=None, clbit_ord
circ.rz(0.5, q[1]).c_if(c, 2)
dag = circuit_to_dag(circ)
"""
dagcircuit = DAGCircuit()
num_bits = circuit.num_qubits + circuit.num_clbits + circuit.num_vars
num_ops = len(circuit.data)
node_count = 2 * num_bits + num_ops
edge_count = num_bits + num_ops
dagcircuit = DAGCircuit(_node_count_hint=node_count, _edge_count_hint=edge_count)
dagcircuit.name = circuit.name
dagcircuit.global_phase = circuit.global_phase
dagcircuit.calibrations = circuit.calibrations
Expand Down
11 changes: 8 additions & 3 deletions qiskit/dagcircuit/dagcircuit.py
Original file line number Diff line number Diff line change
Expand Up @@ -73,7 +73,7 @@ class DAGCircuit:

# pylint: disable=invalid-name

def __init__(self):
def __init__(self, _node_count_hint=0, _edge_count_hint=0):
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"""Create an empty circuit."""

# Circuit name. Generally, this corresponds to the name
Expand Down Expand Up @@ -113,7 +113,9 @@ def __init__(self):
# Input nodes have out-degree 1 and output nodes have in-degree 1.
# Edges carry wire labels and each operation has
# corresponding in- and out-edges with the same wire labels.
self._multi_graph = rx.PyDAG()
self._multi_graph = rx.PyDAG(
node_count_hint=_node_count_hint, edge_count_hint=_edge_count_hint
)

# Map of qreg/creg name to Register object.
self.qregs = OrderedDict()
Expand Down Expand Up @@ -686,7 +688,10 @@ def copy_empty_like(self, *, vars_mode: _VarsMode = "alike"):
Returns:
DAGCircuit: An empty copy of self.
"""
target_dag = DAGCircuit()
target_dag = DAGCircuit(
_node_count_hint=self._multi_graph.num_nodes(),
_edge_count_hint=self._multi_graph.num_edges(),
)
target_dag.name = self.name
target_dag._global_phase = self._global_phase
target_dag.duration = self.duration
Expand Down
5 changes: 4 additions & 1 deletion qiskit/synthesis/one_qubit/one_qubit_decompose.py
Original file line number Diff line number Diff line change
Expand Up @@ -163,7 +163,10 @@ def build_circuit(self, gates, global_phase) -> QuantumCircuit | DAGCircuit:

from qiskit.dagcircuit import dagcircuit

dag = dagcircuit.DAGCircuit()
dag = dagcircuit.DAGCircuit(
_node_count_hint=len(gates) + 2,
_edge_count_hint=len(gates) + 1,
)
dag.global_phase = global_phase
dag.add_qubits(qr)
for gate_entry in gates:
Expand Down
5 changes: 4 additions & 1 deletion qiskit/synthesis/two_qubit/two_qubit_decompose.py
Original file line number Diff line number Diff line change
Expand Up @@ -649,7 +649,10 @@ def __call__(
)
q = QuantumRegister(2)

dag = DAGCircuit()
dag = DAGCircuit(
_node_count_hint=4 + len(sequence),
_edge_count_hint=2 + len(sequence),
)
dag.global_phase = sequence.global_phase
dag.add_qreg(q)
for gate, params, qubits in sequence:
Expand Down
5 changes: 4 additions & 1 deletion qiskit/transpiler/passes/basis/basis_translator.py
Original file line number Diff line number Diff line change
Expand Up @@ -615,7 +615,10 @@ def _compose_transforms(basis_transforms, source_basis, source_dag):
placeholder_gate = Gate(gate_name, gate_num_qubits, list(placeholder_params))
placeholder_gate.params = list(placeholder_params)

dag = DAGCircuit()
dag = DAGCircuit(
_node_count_hint=gate_num_qubits * 2,
_edge_count_hint=gate_num_qubits,
)
qr = QuantumRegister(gate_num_qubits)
dag.add_qreg(qr)
dag.apply_operation_back(placeholder_gate, qr, (), check=False)
Expand Down
13 changes: 10 additions & 3 deletions qiskit/transpiler/passes/layout/apply_layout.py
Original file line number Diff line number Diff line change
Expand Up @@ -52,13 +52,20 @@ def run(self, dag):
raise TranspilerError(
"No 'layout' is found in property_set. Please run a Layout pass in advance."
)
if len(layout) != (1 + max(layout.get_physical_bits())):
layout_qubits = len(layout)
if layout_qubits != (1 + max(layout.get_physical_bits())):
raise TranspilerError("The 'layout' must be full (with ancilla).")

post_layout = self.property_set["post_layout"]
q = QuantumRegister(len(layout), "q")
q = QuantumRegister(layout_qubits, "q")

new_dag = DAGCircuit()
dag_qubits = dag.num_qubits()
node_count = dag._multi_graph.num_nodes() + 2 * (layout_qubits - dag_qubits)
edge_count = dag._multi_graph.num_edges() + layout_qubits - dag_qubits
new_dag = DAGCircuit(
_node_count_hint=node_count,
_edge_count_hint=edge_count,
)
new_dag.add_qreg(q)
for var in dag.iter_input_vars():
new_dag.add_input_var(var)
Expand Down
5 changes: 4 additions & 1 deletion qiskit/transpiler/passes/layout/disjoint_utils.py
Original file line number Diff line number Diff line change
Expand Up @@ -111,7 +111,10 @@ def split_barriers(dag: DAGCircuit):
barrier_uuid = f"{node.op.label}_uuid={uuid.uuid4()}"
else:
barrier_uuid = f"_none_uuid={uuid.uuid4()}"
split_dag = DAGCircuit()
split_dag = DAGCircuit(
_node_count_hint=3 * num_qubits,
_edge_count_hint=2 * num_qubits,
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Usual question for me, how did you reach a node count (hint) of 3*num_qubits here?

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The dagcircuit being built here is taking a n qubit barrier and splitting it into n 1 qubit barriers so we can compute the connected components of the circuit. So if it's a 3q barrier it would looks something like:

dag_barrier

So there are 3 nodes for every qubit and 2 edges.

)
split_dag.add_qubits([Qubit() for _ in range(num_qubits)])
for i in range(num_qubits):
split_dag.apply_operation_back(
Expand Down
13 changes: 12 additions & 1 deletion qiskit/transpiler/passes/layout/sabre_layout.py
Original file line number Diff line number Diff line change
Expand Up @@ -303,7 +303,18 @@ def run(self, dag):
# `ApplyLayout` transpiler pass (which usually does this step), because we're about to apply
# the layout and routing together as part of resolving the Sabre result.
physical_qubits = QuantumRegister(self.coupling_map.size(), "q")
mapped_dag = DAGCircuit()
num_nodes = 2 * (len(physical_qubits) + dag.num_clbits() + dag.num_vars)
num_edges = 0
for component in components:
component_dag = component.dag
size = len(component_dag._multi_graph) - 2 * len(component_dag._wires)
num_nodes += size
num_edges += component_dag._multi_graph.num_edges()

mapped_dag = DAGCircuit(
_node_count_hint=num_nodes,
_edge_count_hint=num_edges,
)
mapped_dag.add_qreg(physical_qubits)
mapped_dag.add_clbits(dag.clbits)
for creg in dag.cregs.values():
Expand Down
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