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Optimize consecutive RZZ gates into a single RZZ gate #13428
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Is this issue limited to the rzz gates and not other gates like ryy rzx etc.? |
Not limited to RZZ. But I don't mind RYY and RZX because RZZ becomes a basis gate of devices that supports fractional gates. RYY and RZX are not basis gates of any device. |
There is a synthesis algorithm Here is an example of the output of this algorithm on the circuit suggested below:
outputs:
This algorithm should be added to the unitary synthesis tranpiler pass (#13320). |
@melechlapson - |
Thank you for your information, @ShellyGarion. I would like to use the algorithm as a transpiler pass. So I wait for #13320. |
What should we add?
Since the fractional gates are available, RZZ can be used as a basis gate.
But, optimization of consecutive RZZ gates does not seem to be enough as follows.
It would be nice to merge them into a single RZZ.
output (both 1.2.4 and main branch)
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