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Spice models run slowly because of the solver trying to balance currents between transistor models, however most analog blocks are signal-flow and well-behaved. If you use AI digital-twinning you can create (event-driven) behavioral models of analog blocks with little loss in accuracy. The technique is described here (as "plant emulation") -
Does anyone want to team up on doing digital twinning dynamically with a view to dropping the expensive modeling in favor of the behavioral once trained? E.g. dynamically matching digital standard cell libraries so we can do power modeling.
LMS/neural-network stuff should be available in PyTorch.
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Spice models run slowly because of the solver trying to balance currents between transistor models, however most analog blocks are signal-flow and well-behaved. If you use AI digital-twinning you can create (event-driven) behavioral models of analog blocks with little loss in accuracy. The technique is described here (as "plant emulation") -
https://www.amazon.com/gp/product/0470226099
Does anyone want to team up on doing digital twinning dynamically with a view to dropping the expensive modeling in favor of the behavioral once trained? E.g. dynamically matching digital standard cell libraries so we can do power modeling.
LMS/neural-network stuff should be available in PyTorch.
https://towardsdatascience.com/three-ways-to-build-a-neural-network-in-pytorch-8cea49f9a61a
(long term goal is to reverse that flow for circuit synthesis).
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