Tasks

This is a revolving list of tasks that we need to do. Priorities change constantly.

Table of Contents Current Items Unassigned bpadalino jynik Future Items

Current Items

Unassigned

• Figure out why linux has a bandwidth allocation issue after a ^c from a program
• Discipline VCTCXO using 1pps from GPSDO
• Discipline VCTCXO using 10MHz external reference
• Parse NMEA messages from GPS in FPGA for timestamping
• Add ability to 'reset on next 1pps' signal for TX/RX sample synchronization
• Fix or remove FS USB descriptors.

bpadalino

• Automatic IQ Calibration
• Create and simulate HDL models
• Create signal generator block for FPGA

jynik

• Developing test and release cycle plans on the wiki. Needs to cover versioning & tagging schemes, branch usage, and tests required to pass before version release **at a minimum**. litghost as opened and issue and provided some initial ideas.
• Create coding style & patch/pull request guidelines document
• Create a BUGS/Getting Help document detailing information to gather and provide when posting issues to the forum or IRC
• Embedded sweeping spectrum analyzer demo based upon fosphor
  • Pending on FPGA FFT block

Future Items

• Si5338 MIMO/Expansion clock settings
• Create impulse latency RTT mode for FPGA
• TX -> RX Loopback mode in HDL