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UEXT_ESP32.kicad_pcb
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UEXT_ESP32.kicad_pcb
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(kicad_pcb (version 20171130) (host pcbnew 5.0.1)
(general
(thickness 1.6)
(drawings 14)
(tracks 133)
(zones 0)
(modules 10)
(nets 44)
)
(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user hide)
(33 F.Adhes user hide)
(34 B.Paste user hide)
(35 F.Paste user hide)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user hide)
(39 F.Mask user hide)
(40 Dwgs.User user hide)
(41 Cmts.User user hide)
(42 Eco1.User user hide)
(43 Eco2.User user hide)
(44 Edge.Cuts user)
(45 Margin user hide)
(46 B.CrtYd user hide)
(47 F.CrtYd user hide)
(48 B.Fab user hide)
(49 F.Fab user hide)
)
(setup
(last_trace_width 0.4)
(user_trace_width 0.25)
(user_trace_width 0.3)
(user_trace_width 0.4)
(user_trace_width 0.5)
(trace_clearance 0.2)
(zone_clearance 0.3)
(zone_45_only no)
(trace_min 0.2)
(segment_width 0.2)
(edge_width 0.15)
(via_size 0.8)
(via_drill 0.4)
(via_min_size 0.4)
(via_min_drill 0.3)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0)
(solder_mask_min_width 0.25)
(aux_axis_origin 0 0)
(visible_elements FFFFFF7F)
(pcbplotparams
(layerselection 0x010fc_ffffffff)
(usegerberextensions false)
(usegerberattributes false)
(usegerberadvancedattributes false)
(creategerberjobfile false)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15.000000)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 GND)
(net 2 "Net-(U1-Pad7)")
(net 3 "Net-(U1-Pad11)")
(net 4 "Net-(U1-Pad12)")
(net 5 +3V3)
(net 6 "Net-(U1-Pad16)")
(net 7 "Net-(U1-Pad4)")
(net 8 "Net-(U1-Pad5)")
(net 9 "Net-(U1-Pad6)")
(net 10 "Net-(U1-Pad8)")
(net 11 "Net-(U1-Pad9)")
(net 12 "Net-(U1-Pad10)")
(net 13 "Net-(U1-Pad13)")
(net 14 "Net-(U1-Pad14)")
(net 15 "Net-(U1-Pad17)")
(net 16 "Net-(U1-Pad18)")
(net 17 "Net-(U1-Pad19)")
(net 18 "Net-(U1-Pad20)")
(net 19 "Net-(U1-Pad21)")
(net 20 "Net-(U1-Pad22)")
(net 21 "Net-(U1-Pad23)")
(net 22 "Net-(U1-Pad26)")
(net 23 "Net-(U1-Pad29)")
(net 24 "Net-(U1-Pad30)")
(net 25 "Net-(U1-Pad31)")
(net 26 "Net-(U1-Pad32)")
(net 27 "Net-(U1-Pad33)")
(net 28 /UEXT_TX)
(net 29 /UEXT_RX)
(net 30 "Net-(U1-Pad36)")
(net 31 "Net-(U1-Pad37)")
(net 32 /RESET)
(net 33 /GPIO2)
(net 34 /GPIO0)
(net 35 /FTDI_TX)
(net 36 /FTDI_RX)
(net 37 /DTR)
(net 38 "Net-(Q1-Pad1)")
(net 39 "Net-(Q2-Pad1)")
(net 40 /RTS)
(net 41 "Net-(J1-Pad9)")
(net 42 "Net-(J1-Pad6)")
(net 43 "Net-(J1-Pad5)")
(net_class Default "Dies ist die voreingestellte Netzklasse."
(clearance 0.2)
(trace_width 0.25)
(via_dia 0.8)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net +3V3)
(add_net /DTR)
(add_net /FTDI_RX)
(add_net /FTDI_TX)
(add_net /GPIO0)
(add_net /GPIO2)
(add_net /RESET)
(add_net /RTS)
(add_net /UEXT_RX)
(add_net /UEXT_TX)
(add_net GND)
(add_net "Net-(J1-Pad5)")
(add_net "Net-(J1-Pad6)")
(add_net "Net-(J1-Pad9)")
(add_net "Net-(Q1-Pad1)")
(add_net "Net-(Q2-Pad1)")
(add_net "Net-(U1-Pad10)")
(add_net "Net-(U1-Pad11)")
(add_net "Net-(U1-Pad12)")
(add_net "Net-(U1-Pad13)")
(add_net "Net-(U1-Pad14)")
(add_net "Net-(U1-Pad16)")
(add_net "Net-(U1-Pad17)")
(add_net "Net-(U1-Pad18)")
(add_net "Net-(U1-Pad19)")
(add_net "Net-(U1-Pad20)")
(add_net "Net-(U1-Pad21)")
(add_net "Net-(U1-Pad22)")
(add_net "Net-(U1-Pad23)")
(add_net "Net-(U1-Pad26)")
(add_net "Net-(U1-Pad29)")
(add_net "Net-(U1-Pad30)")
(add_net "Net-(U1-Pad31)")
(add_net "Net-(U1-Pad32)")
(add_net "Net-(U1-Pad33)")
(add_net "Net-(U1-Pad36)")
(add_net "Net-(U1-Pad37)")
(add_net "Net-(U1-Pad4)")
(add_net "Net-(U1-Pad5)")
(add_net "Net-(U1-Pad6)")
(add_net "Net-(U1-Pad7)")
(add_net "Net-(U1-Pad8)")
(add_net "Net-(U1-Pad9)")
)
(module Connector_PinSocket_2.54mm:PinSocket_2x05_P2.54mm_Vertical (layer B.Cu) (tedit 5A19A42B) (tstamp 5C84B77B)
(at 161.46 89.42 180)
(descr "Through hole straight socket strip, 2x05, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated")
(tags "Through hole socket strip THT 2x05 2.54mm double row")
(path /5C810B01)
(fp_text reference J1 (at -1.27 2.77 180) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value UEXT (at -1.27 -12.93 180) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start -3.81 1.27) (end 0.27 1.27) (layer B.Fab) (width 0.1))
(fp_line (start 0.27 1.27) (end 1.27 0.27) (layer B.Fab) (width 0.1))
(fp_line (start 1.27 0.27) (end 1.27 -11.43) (layer B.Fab) (width 0.1))
(fp_line (start 1.27 -11.43) (end -3.81 -11.43) (layer B.Fab) (width 0.1))
(fp_line (start -3.81 -11.43) (end -3.81 1.27) (layer B.Fab) (width 0.1))
(fp_line (start -3.87 1.33) (end -1.27 1.33) (layer B.SilkS) (width 0.12))
(fp_line (start -3.87 1.33) (end -3.87 -11.49) (layer B.SilkS) (width 0.12))
(fp_line (start -3.87 -11.49) (end 1.33 -11.49) (layer B.SilkS) (width 0.12))
(fp_line (start 1.33 -1.27) (end 1.33 -11.49) (layer B.SilkS) (width 0.12))
(fp_line (start -1.27 -1.27) (end 1.33 -1.27) (layer B.SilkS) (width 0.12))
(fp_line (start -1.27 1.33) (end -1.27 -1.27) (layer B.SilkS) (width 0.12))
(fp_line (start 1.33 1.33) (end 1.33 0) (layer B.SilkS) (width 0.12))
(fp_line (start 0 1.33) (end 1.33 1.33) (layer B.SilkS) (width 0.12))
(fp_line (start -4.34 1.8) (end 1.76 1.8) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.76 1.8) (end 1.76 -11.9) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.76 -11.9) (end -4.34 -11.9) (layer B.CrtYd) (width 0.05))
(fp_line (start -4.34 -11.9) (end -4.34 1.8) (layer B.CrtYd) (width 0.05))
(fp_text user %R (at -1.27 -5.08 90) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(pad 1 thru_hole rect (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 5 +3V3))
(pad 2 thru_hole oval (at -2.54 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 1 GND))
(pad 3 thru_hole oval (at 0 -2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 28 /UEXT_TX))
(pad 4 thru_hole oval (at -2.54 -2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 29 /UEXT_RX))
(pad 5 thru_hole oval (at 0 -5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 43 "Net-(J1-Pad5)"))
(pad 6 thru_hole oval (at -2.54 -5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 42 "Net-(J1-Pad6)"))
(pad 7 thru_hole oval (at 0 -7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 34 /GPIO0))
(pad 8 thru_hole oval (at -2.54 -7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 33 /GPIO2))
(pad 9 thru_hole oval (at 0 -10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 41 "Net-(J1-Pad9)"))
(pad 10 thru_hole oval (at -2.54 -10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 32 /RESET))
(model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_2x05_P2.54mm_Vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Connector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC) (tstamp 5C834617)
(at 154.12 83 270)
(descr "Through hole straight pin header, 1x06, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x06 2.54mm single row")
(path /5C815F35)
(fp_text reference J2 (at 0 -2.33 270) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Conn_01x06 (at 0 15.03 270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 -1.27) (end 1.27 13.97) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 13.97) (end -1.27 13.97) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 13.97) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start -1.33 14.03) (end 1.33 14.03) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end -1.33 14.03) (layer F.SilkS) (width 0.12))
(fp_line (start 1.33 1.27) (end 1.33 14.03) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.8 -1.8) (end -1.8 14.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 14.5) (end 1.8 14.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.8 14.5) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 6.35) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 1 GND))
(pad 2 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 40 /RTS))
(pad 3 thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 5 +3V3))
(pad 4 thru_hole oval (at 0 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 35 /FTDI_TX))
(pad 5 thru_hole oval (at 0 10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 36 /FTDI_RX))
(pad 6 thru_hole oval (at 0 12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 37 /DTR))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x06_P2.54mm_Vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module LibreSolar:R_0603_1608 (layer F.Cu) (tedit 59175D4F) (tstamp 5C8341F9)
(at 159.8 82.8 90)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
(path /5C80FEC3)
(attr smd)
(fp_text reference R2 (at 0 -1.4 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 10k (at 0 1.5 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.4 0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.4 0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.4 -0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.4 -0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.35 -0.55) (end 0.35 -0.55) (layer F.SilkS) (width 0.12))
(fp_line (start 0.35 0.55) (end -0.35 0.55) (layer F.SilkS) (width 0.12))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_text user %R (at 0 0 90) (layer F.Fab)
(effects (font (size 0.5 0.5) (thickness 0.075)))
)
(pad 2 smd roundrect (at 0.8 0 90) (size 0.8 0.9) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2)
(net 37 /DTR))
(pad 1 smd roundrect (at -0.8 0 90) (size 0.8 0.9) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2)
(net 39 "Net-(Q2-Pad1)"))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module LibreSolar:R_0603_1608 (layer F.Cu) (tedit 59175D4F) (tstamp 5C8341E8)
(at 159.8 85.6 90)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
(path /5C80EE54)
(attr smd)
(fp_text reference R1 (at -2 0 180) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 10k (at 0 1.5 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0 90) (layer F.Fab)
(effects (font (size 0.5 0.5) (thickness 0.075)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.35 0.55) (end -0.35 0.55) (layer F.SilkS) (width 0.12))
(fp_line (start -0.35 -0.55) (end 0.35 -0.55) (layer F.SilkS) (width 0.12))
(fp_line (start -1.4 -0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.4 -0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.4 0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.4 0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05))
(pad 1 smd roundrect (at -0.8 0 90) (size 0.8 0.9) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2)
(net 38 "Net-(Q1-Pad1)"))
(pad 2 smd roundrect (at 0.8 0 90) (size 0.8 0.9) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2)
(net 40 /RTS))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module LibreSolar:SOT-23 (layer F.Cu) (tedit 59B43E66) (tstamp 5C8341D7)
(at 162.6 86.5 270)
(descr "SOT-23, Standard")
(tags SOT-23)
(path /5C80F37A)
(attr smd)
(fp_text reference Q2 (at -0.1 -2.4 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value MMBT3904 (at 0 2.5 270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.5 0.5) (thickness 0.075)))
)
(fp_line (start -0.7 -0.95) (end -0.7 1.5) (layer F.Fab) (width 0.1))
(fp_line (start -0.15 -1.52) (end 0.7 -1.52) (layer F.Fab) (width 0.1))
(fp_line (start -0.7 -0.95) (end -0.15 -1.52) (layer F.Fab) (width 0.1))
(fp_line (start 0.7 -1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1))
(fp_line (start -0.7 1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1))
(fp_line (start 0.76 1.58) (end 0.76 0.65) (layer F.SilkS) (width 0.12))
(fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer F.SilkS) (width 0.12))
(fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.75 -1.75) (end 1.75 1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.75 1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 1.75) (end -1.75 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start 0.76 -1.58) (end -1.4 -1.58) (layer F.SilkS) (width 0.12))
(fp_line (start 0.76 1.58) (end -0.7 1.58) (layer F.SilkS) (width 0.12))
(pad 1 smd roundrect (at -1.05 -0.95 270) (size 1 0.9) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2)
(net 39 "Net-(Q2-Pad1)"))
(pad 2 smd roundrect (at -1.05 0.95 270) (size 1 0.9) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2)
(net 40 /RTS))
(pad 3 smd roundrect (at 1.05 0 270) (size 1 0.9) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2)
(net 32 /RESET))
(model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module LibreSolar:SOT-23 (layer F.Cu) (tedit 59B43E66) (tstamp 5C8341C2)
(at 162.6 83 270)
(descr "SOT-23, Standard")
(tags SOT-23)
(path /5C80ED46)
(attr smd)
(fp_text reference Q1 (at 0 -2.4 270) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value MMBT3904 (at 0 2.5 270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0.76 1.58) (end -0.7 1.58) (layer F.SilkS) (width 0.12))
(fp_line (start 0.76 -1.58) (end -1.4 -1.58) (layer F.SilkS) (width 0.12))
(fp_line (start -1.75 1.75) (end -1.75 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.75 1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.75 -1.75) (end 1.75 1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer F.SilkS) (width 0.12))
(fp_line (start 0.76 1.58) (end 0.76 0.65) (layer F.SilkS) (width 0.12))
(fp_line (start -0.7 1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1))
(fp_line (start 0.7 -1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1))
(fp_line (start -0.7 -0.95) (end -0.15 -1.52) (layer F.Fab) (width 0.1))
(fp_line (start -0.15 -1.52) (end 0.7 -1.52) (layer F.Fab) (width 0.1))
(fp_line (start -0.7 -0.95) (end -0.7 1.5) (layer F.Fab) (width 0.1))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.5 0.5) (thickness 0.075)))
)
(pad 3 smd roundrect (at 1.05 0 270) (size 1 0.9) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2)
(net 34 /GPIO0))
(pad 2 smd roundrect (at -1.05 0.95 270) (size 1 0.9) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2)
(net 37 /DTR))
(pad 1 smd roundrect (at -1.05 -0.95 270) (size 1 0.9) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2)
(net 38 "Net-(Q1-Pad1)"))
(model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module LibreSolar:LIBRESOLAR_LOGO (layer B.Cu) (tedit 58C27829) (tstamp 5C2E9282)
(at 156 98 180)
(path /5C2E747A)
(fp_text reference LOGO1 (at 2 5.3 180) (layer B.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value LibreSolar_Logo (at 2.1 -3.9 180) (layer B.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user "Libre Solar" (at 2.3 -1.3 180) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_poly (pts (xy 0.5525 -0.0425) (xy 3.4085 -0.0425) (xy 3.4085 -0.0255) (xy 0.5525 -0.0255)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.5355 -0.0255) (xy 3.4425 -0.0255) (xy 3.4425 -0.0085) (xy 0.5355 -0.0085)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.5015 -0.0085) (xy 3.4595 -0.0085) (xy 3.4595 0.0085) (xy 0.5015 0.0085)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.4845 0.0085) (xy 3.4935 0.0085) (xy 3.4935 0.0255) (xy 0.4845 0.0255)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.4675 0.0255) (xy 3.5105 0.0255) (xy 3.5105 0.0425) (xy 0.4675 0.0425)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.4505 0.0425) (xy 3.5275 0.0425) (xy 3.5275 0.0595) (xy 0.4505 0.0595)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.4165 0.0595) (xy 3.5445 0.0595) (xy 3.5445 0.0765) (xy 0.4165 0.0765)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.3995 0.0765) (xy 3.5615 0.0765) (xy 3.5615 0.0935) (xy 0.3995 0.0935)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.3825 0.0935) (xy 3.5785 0.0935) (xy 3.5785 0.1105) (xy 0.3825 0.1105)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.3655 0.1105) (xy 3.5955 0.1105) (xy 3.5955 0.1275) (xy 0.3655 0.1275)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.3485 0.1275) (xy 3.6125 0.1275) (xy 3.6125 0.1445) (xy 0.3485 0.1445)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.3315 0.1445) (xy 3.6465 0.1445) (xy 3.6465 0.1615) (xy 0.3315 0.1615)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.3145 0.1615) (xy 3.6635 0.1615) (xy 3.6635 0.1785) (xy 0.3145 0.1785)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.2975 0.1785) (xy 3.6805 0.1785) (xy 3.6805 0.1955) (xy 0.2975 0.1955)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.2805 0.1955) (xy 3.6975 0.1955) (xy 3.6975 0.2125) (xy 0.2805 0.2125)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.2635 0.2125) (xy 3.7145 0.2125) (xy 3.7145 0.2295) (xy 0.2635 0.2295)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.2465 0.2295) (xy 3.7315 0.2295) (xy 3.7315 0.2465) (xy 0.2465 0.2465)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.2295 0.2465) (xy 3.7485 0.2465) (xy 3.7485 0.2635) (xy 0.2295 0.2635)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.2125 0.2635) (xy 3.7655 0.2635) (xy 3.7655 0.2805) (xy 0.2125 0.2805)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.1955 0.2805) (xy 3.7825 0.2805) (xy 3.7825 0.2975) (xy 0.1955 0.2975)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.1785 0.2975) (xy 3.7995 0.2975) (xy 3.7995 0.3145) (xy 0.1785 0.3145)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.1615 0.3145) (xy 3.8165 0.3145) (xy 3.8165 0.3315) (xy 0.1615 0.3315)) (layer B.SilkS) (width 0))
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(fp_poly (pts (xy 0.1105 0.3655) (xy 3.8505 0.3655) (xy 3.8505 0.3825) (xy 0.1105 0.3825)) (layer B.SilkS) (width 0))
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(fp_poly (pts (xy 0.0765 0.3995) (xy 3.8845 0.3995) (xy 3.8845 0.4165) (xy 0.0765 0.4165)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.0595 0.4165) (xy 3.9015 0.4165) (xy 3.9015 0.4335) (xy 0.0595 0.4335)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.0425 0.4335) (xy 3.9185 0.4335) (xy 3.9185 0.4505) (xy 0.0425 0.4505)) (layer B.SilkS) (width 0))
(fp_poly (pts (xy 0.0255 0.4505) (xy 3.9355 0.4505) (xy 3.9355 0.4675) (xy 0.0255 0.4675)) (layer B.SilkS) (width 0))
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(fp_poly (pts (xy -0.0085 0.5015) (xy 3.9865 0.5015) (xy 3.9865 0.5185) (xy -0.0085 0.5185)) (layer B.SilkS) (width 0))
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(fp_poly (pts (xy 5.6355 0.7905) (xy 5.6525 0.7905) (xy 5.6525 0.8075) (xy 5.6355 0.8075)) (layer B.SilkS) (width 0))
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(fp_poly (pts (xy 5.6185 0.8075) (xy 5.6525 0.8075) (xy 5.6525 0.8245) (xy 5.6185 0.8245)) (layer B.SilkS) (width 0))
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(fp_poly (pts (xy 5.6015 0.8245) (xy 5.6525 0.8245) (xy 5.6525 0.8415) (xy 5.6015 0.8415)) (layer B.SilkS) (width 0))
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(at 145.4 97 180)
(descr "Open Source Hardware Logo")
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(path /5C2E769C)
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