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SPSS-v1-3.qsf
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# -------------------------------------------------------------------------- #
#
# Copyright (C) 2017 Intel Corporation. All rights reserved.
# Your use of Intel Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Intel Program License
# Subscription Agreement, the Intel Quartus Prime License Agreement,
# the Intel FPGA IP License Agreement, or other applicable license
# agreement, including, without limitation, that your use is for
# the sole purpose of programming logic devices manufactured by
# Intel and sold by Intel or its authorized distributors. Please
# refer to the applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus Prime
# Version 17.1.0 Build 590 10/25/2017 SJ Lite Edition
# Date created = 13:59:41 kwiecień 06, 2018
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# v0-1_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus Prime software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY "Cyclone IV E"
set_global_assignment -name DEVICE EP4CE22F17C6
set_global_assignment -name TOP_LEVEL_ENTITY Main
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 17.1.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "13:15:51 CZERWIEC 10, 2018"
set_global_assignment -name LAST_QUARTUS_VERSION "17.1.0 Lite Edition"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
set_global_assignment -name NOMINAL_CORE_SUPPLY_VOLTAGE 1.2V
set_global_assignment -name PROJECT_IP_REGENERATION_POLICY ALWAYS_REGENERATE_IP
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS OFF
set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name NUM_PARALLEL_PROCESSORS 2
set_global_assignment -name VHDL_INPUT_VERSION VHDL_2008
set_global_assignment -name VHDL_SHOW_LMF_MAPPING_MESSAGES OFF
set_location_assignment PIN_L3 -to LED[7]
set_location_assignment PIN_B1 -to LED[6]
set_location_assignment PIN_F3 -to LED[5]
set_location_assignment PIN_D1 -to LED[4]
set_location_assignment PIN_A11 -to LED[3]
set_location_assignment PIN_B13 -to LED[2]
set_location_assignment PIN_A13 -to LED[1]
set_location_assignment PIN_A15 -to LED[0]
set_location_assignment PIN_M1 -to DIPSW[0]
set_location_assignment PIN_B9 -to DIPSW[2]
set_location_assignment PIN_M15 -to DIPSW[3]
set_location_assignment PIN_R8 -to CLOCK_50
set_location_assignment PIN_F1 -to storage_inout.EEPROM_SDA
set_location_assignment PIN_F2 -to storage_inout.EEPROM_SCL
set_location_assignment PIN_A7 -to display_out.MLTPLX_CH[0]
set_location_assignment PIN_B7 -to display_out.MLTPLX_CH[1]
set_location_assignment PIN_B6 -to display_out.MLTPLX_CH[2]
set_location_assignment PIN_A5 -to display_out.MLTPLX_CH[3]
set_location_assignment PIN_D6 -to display_out.REG_CLK
set_location_assignment PIN_A6 -to display_out.REG_DATA
set_location_assignment PIN_D5 -to display_out.REG_LATCH
set_location_assignment PIN_P2 -to storage_out.SDRAM_addr[0]
set_location_assignment PIN_N5 -to storage_out.SDRAM_addr[1]
set_location_assignment PIN_N6 -to storage_out.SDRAM_addr[2]
set_location_assignment PIN_M8 -to storage_out.SDRAM_addr[3]
set_location_assignment PIN_P8 -to storage_out.SDRAM_addr[4]
set_location_assignment PIN_T7 -to storage_out.SDRAM_addr[5]
set_location_assignment PIN_N8 -to storage_out.SDRAM_addr[6]
set_location_assignment PIN_T6 -to storage_out.SDRAM_addr[7]
set_location_assignment PIN_R1 -to storage_out.SDRAM_addr[8]
set_location_assignment PIN_P1 -to storage_out.SDRAM_addr[9]
set_location_assignment PIN_N2 -to storage_out.SDRAM_addr[10]
set_location_assignment PIN_N1 -to storage_out.SDRAM_addr[11]
set_location_assignment PIN_L4 -to storage_out.SDRAM_addr[12]
set_location_assignment PIN_M7 -to storage_out.SDRAM_bank_addr[0]
set_location_assignment PIN_M6 -to storage_out.SDRAM_bank_addr[1]
set_location_assignment PIN_L1 -to storage_out.SDRAM_cas_n
set_location_assignment PIN_R4 -to storage_out.SDRAM_clk
set_location_assignment PIN_L7 -to storage_out.SDRAM_clock_enable
set_location_assignment PIN_P6 -to storage_out.SDRAM_cs_n
set_location_assignment PIN_R6 -to storage_out.SDRAM_data_mask[0]
set_location_assignment PIN_T5 -to storage_out.SDRAM_data_mask[1]
set_location_assignment PIN_L2 -to storage_out.SDRAM_ras_n
set_location_assignment PIN_C2 -to storage_out.SDRAM_we_n
set_location_assignment PIN_G2 -to storage_inout.SDRAM_data[0]
set_location_assignment PIN_G1 -to storage_inout.SDRAM_data[1]
set_location_assignment PIN_L8 -to storage_inout.SDRAM_data[2]
set_location_assignment PIN_K5 -to storage_inout.SDRAM_data[3]
set_location_assignment PIN_K2 -to storage_inout.SDRAM_data[4]
set_location_assignment PIN_J2 -to storage_inout.SDRAM_data[5]
set_location_assignment PIN_J1 -to storage_inout.SDRAM_data[6]
set_location_assignment PIN_R7 -to storage_inout.SDRAM_data[7]
set_location_assignment PIN_T4 -to storage_inout.SDRAM_data[8]
set_location_assignment PIN_T2 -to storage_inout.SDRAM_data[9]
set_location_assignment PIN_T3 -to storage_inout.SDRAM_data[10]
set_location_assignment PIN_R3 -to storage_inout.SDRAM_data[11]
set_location_assignment PIN_R5 -to storage_inout.SDRAM_data[12]
set_location_assignment PIN_P3 -to storage_inout.SDRAM_data[13]
set_location_assignment PIN_N3 -to storage_inout.SDRAM_data[14]
set_location_assignment PIN_K1 -to storage_inout.SDRAM_data[15]
set_location_assignment PIN_R10 -to sensors_inout.HUM_DAT
set_location_assignment PIN_A9 -to sensors_in.ADC_SDAT
set_location_assignment PIN_B14 -to sensors_out.ADC_SCLK
set_location_assignment PIN_B10 -to sensors_out.ADC_SADDR
set_location_assignment PIN_A10 -to sensors_out.ADC_CS_N
set_location_assignment PIN_G16 -to sensors_out.PM_ILED
set_location_assignment PIN_P11 -to sensors_inout.PRESS_SCL
set_location_assignment PIN_T10 -to sensors_inout.PRESS_SDA
set_location_assignment PIN_R11 -to sensors_out.PRESS_SDO
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_location_assignment PIN_J15 -to KEYS[0]
set_location_assignment PIN_E1 -to KEYS[1]
set_location_assignment PIN_F9 -to comms_in.BT_RX
set_location_assignment PIN_E8 -to comms_out.BT_TX
set_location_assignment PIN_E9 -to comms_out.BT_WAKE_HW
set_location_assignment PIN_F8 -to comms_out.BT_WAKE_SW
set_global_assignment -name VHDL_FILE drivers/sm410564_formats.vhdl -library drivers
set_global_assignment -name VHDL_FILE drivers/sm410564_a.vhdl -library drivers
set_global_assignment -name VHDL_FILE drivers/sm410564.vhdl -library drivers
set_global_assignment -name VHDL_FILE drivers/shift_reg_a.vhdl -library drivers
set_global_assignment -name VHDL_FILE drivers/shift_reg.vhdl -library drivers
set_global_assignment -name VHDL_FILE modules/Display_a.vhdl -library modules
set_global_assignment -name VHDL_FILE modules/Display.vhdl -library modules
set_global_assignment -name QIP_FILE ext/div_signed.qip -library ext
set_global_assignment -name QIP_FILE ext/div24.qip -library ext
set_global_assignment -name VHDL_FILE utils/clock_divider_a.vhdl -library utils
set_global_assignment -name VHDL_FILE utils/clock_divider.vhdl -library utils
set_global_assignment -name VHDL_FILE modules/Storage_a.vhdl -library modules
set_global_assignment -name VHDL_FILE modules/Storage.vhdl -library modules
set_global_assignment -name VHDL_FILE ext/sdram_controller.vhdl -library ext
set_global_assignment -name VERILOG_FILE ext/sdram_controller.v -library ext
set_global_assignment -name VHDL_FILE ext/i2c_master.vhdl -library ext
set_global_assignment -name VHDL_FILE drivers/eeprom_a.vhdl -library drivers
set_global_assignment -name VHDL_FILE drivers/eeprom.vhdl -library drivers
set_global_assignment -name VHDL_FILE drivers/sdram_a.vhdl -library drivers
set_global_assignment -name VHDL_FILE drivers/sdram.vhdl -library drivers
set_global_assignment -name VHDL_FILE Main_a.vhdl
set_global_assignment -name VHDL_FILE Main.vhdl
set_global_assignment -name VHDL_FILE utils/types.vhdl -library utils
set_global_assignment -name VHDL_FILE modules/Sensor_a.vhdl -library modules
set_global_assignment -name VHDL_FILE modules/Sensor.vhdl -library modules
set_global_assignment -name VHDL_FILE modules/Scheduler_a.vhdl -library modules
set_global_assignment -name VHDL_FILE modules/Scheduler.vhdl -library modules
set_global_assignment -name VHDL_FILE modules/DataProcessor_a.vhdl -library modules
set_global_assignment -name VHDL_FILE modules/DataProcessor.vhdl -library modules
set_global_assignment -name VHDL_FILE ext/spi_master.vhdl -library ext
set_global_assignment -name QIP_FILE ext/div16.qip -library ext
set_global_assignment -name VHDL_FILE drivers/lps331ap_a.vhdl -library drivers
set_global_assignment -name VHDL_FILE drivers/lps331ap.vhdl -library drivers
set_global_assignment -name VHDL_FILE drivers/gp2y1010_a.vhdl -library drivers
set_global_assignment -name VHDL_FILE drivers/gp2y1010.vhdl -library drivers
set_global_assignment -name VHDL_FILE drivers/dht11_a.vhdl -library drivers
set_global_assignment -name VHDL_FILE drivers/dht11.vhdl -library drivers
set_global_assignment -name VHDL_FILE drivers/de0nano_adc_a.vhdl -library drivers
set_global_assignment -name VHDL_FILE drivers/de0nano_adc.vhdl -library drivers
set_global_assignment -name QIP_FILE ext/mult24.qip
set_global_assignment -name VHDL_FILE drivers/rn4020_utils.vhdl -library drivers
set_global_assignment -name VHDL_FILE drivers/rn4020_a.vhdl -library drivers
set_global_assignment -name VHDL_FILE drivers/rn4020.vhdl -library drivers
set_global_assignment -name VHDL_FILE modules/Communications_a.vhdl -hdl_version VHDL_2008 -library modules
set_global_assignment -name VHDL_FILE modules/Communications.vhdl -library modules
set_global_assignment -name VHDL_FILE ext/uart.vhdl -library ext
set_global_assignment -name QIP_FILE ext/sdram_clk_pll.qip
set_global_assignment -name ENABLE_DA_RULE "A109, A110"
set_global_assignment -name DISABLE_DA_RULE "C101, C102, C103, C104, C105, C106, R101, R102, R103, R104, R105, T101, T102, A101, A102, A103, A104, A105, A106, A107, A108, S101, S102, S103, S104, D101, D102, D103"
set_location_assignment LAB_X12_Y16_N0 -to "Communications:communications_mod|rn4020:rn4020_drv|Mux359~49"
set_global_assignment -name SEARCH_PATH utils
set_global_assignment -name SEARCH_PATH modules
set_global_assignment -name SEARCH_PATH ext
set_global_assignment -name SEARCH_PATH drivers
set_location_assignment PIN_T8 -to comms_in.BT_CONNECTED
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top