spi write read n frames
Transmit data on the specified SPI channel and read the response. This VI breaks the transmission up into multiple frames where each frame consists of setting CS active, shifting out a subset of the data bytes, then setting CS idle.
SPI is full duplex, therefore the write and read operations take place simultaneously.
SPI Channel specifies the SPI channel to write/read to.
Data is a U8 array of data bytes to shift out starting with Data[0] to Data[n-1].
SPI Frame Size specifies the number of bytes shifted out between toggling CS.
CS Channel specifies the Chip Select (DIO) channel to use during the SPI transaction.
CS Logic Level specifies the polarity of the chip select output. Active low is most common and results in CS starting in the idle/high state and data being trasnmitted after CS is driven to the active/low state.
CS Configuration
Specifies the chip select (slave select) configuration.
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CS Channel specifies the digital output channel to use as chip select.
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CS Logic Level specifies the polarity of the chip select output. Active low is most common and results in CS starting in the idle/high state and data being trasnmitted after CS is driven to the active/low state.
SPI Channel (0)
Specifies the SPI channel to write/read. If the LINX device has a single SPI master it is channel 0. If the LINX device has more than one SPI master the logical first SPI master is channel 0, the next is channel 1, etc.
LINX Resource
Contains LINX connection resources.
Data
The data to transmit. The first element in the array is the first to be transmitted.
SPI Frame Size (0)
Specifies the number of bytes to transmit between toggling chip select.
Error In
Describes error conditions that occur before this node runs. This input provides standard error in functionality.
LINX Resource
Contains LINX connection resources.
Read Data
Returns the data read from the SPI slave device.
Error Out
Contains error information. This output provides standard error out functionality.