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SDCC ASxxxx Assemblers
and
SDCC ASLINK Relocating Linker
CHAPTER 1 THE ASSEMBLER 1-1
1.1 THE ASXXXX ASSEMBLERS 1-1
1.1.1 Assembly Pass 1 1-2
1.1.2 Assembly Pass 2 1-2
1.1.3 Assembly Pass 3 1-2
1.2 SOURCE PROGRAM FORMAT 1-3
1.2.1 Statement Format 1-3
1.2.1.1 Label Field 1-3
1.2.1.2 Operator Field 1-5
1.2.1.3 Operand Field 1-5
1.2.1.4 Comment Field 1-6
1.3 SYMBOLS AND EXPRESSIONS 1-6
1.3.1 Character Set 1-6
1.3.2 User-Defined Symbols 1-10
1.3.3 Reusable Symbols 1-10
1.3.4 Current Location Counter 1-12
1.3.5 Numbers 1-13
1.3.6 Terms 1-14
1.3.7 Expressions 1-14
1.4 GENERAL ASSEMBLER DIRECTIVES 1-16
1.4.1 .module Directive 1-16
1.4.2 .title Directive 1-16
1.4.3 .sbttl Directive 1-17
1.4.4 .list and .nlist Directives 1-17
1.4.5 .page Directive 1-18
1.4.8 .byte, .db, and .fcb Directives 1-20
1.4.9 .word, .dw, and .fdb Directives 1-21
1.4.10 .3byte and .triple Directives 1-21
1.4.11 .4byte and .quad Directive 1-22
1.4.12 .blkb, .ds, .rmb, and .rs Directives 1-22
1.4.13 .blkw, .blk3, and .blk4 Directives 1-22
1.4.14 .ascii, .str, and .fcc Directives 1-23
1.4.15 .ascis and .strs Directives 1-23
1.4.16 .asciz and .strz Directives 1-24
1.4.18 .radix Directive 1-25
1.4.19 .even Directive 1-25
1.4.20 .odd Directive 1-25
1.4.21 .bndry Directive 1-26
1.4.22 .area Directive 1-27
1.4.24 .org Directive 1-30
1.4.25 .globl Directive 1-31
1.4.26 .local Directive 1-31
1.4.27 .equ, .gblequ, and .lclequ Directives 1-32
1.4.28 .if, .else, and .endif Directives 1-33
1.4.29 .iff, .ift, and .iftf Directives 1-34
1.4.30 .ifxx Directives 1-35
1.4.31 .ifdef Directive 1-36
1.4.32 .ifndef Directive 1-37
1.4.33 .ifb Directive 1-38
1.4.34 .ifnb Directive 1-39
1.4.35 .ifidn Directive 1-40
1.4.36 .ifdif Directive 1-41
Page ii
1.4.37 Alternate .if Directive Forms 1-42
1.4.38 Immediate Conditional Assembly Directives 1-43
1.4.39 .include Directive 1-44
1.4.40 .define and .undefine Directives 1-45
1.4.41 .setdp Directive 1-46
1.4.42 .16bit, .24bit, and .32bit Directives 1-48
1.4.45 .end Directive 1-49
1.5 INVOKING ASXXXX 1-50
1.6 ERRORS 1-52
1.7 LISTING FILE 1-54
1.8 SYMBOL TABLE FILE 1-56
1.9 OBJECT FILE 1-57
CHAPTER 2 THE MACRO PROCESSOR 2-1
2.1 DEFINING MACROS 2-1
2.1.1 .macro Directive 2-2
2.1.2 .endm Directive 2-3
2.1.3 .mexit Directive 2-3
2.2 CALLING MACROS 2-4
2.3 ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS 2-5
2.3.1 Macro Nesting 2-6
2.3.2 Special Characters in Macro Arguments 2-7
2.3.3 Passing Numerical Arguments as Symbols 2-7
2.3.4 Number of Arguments in Macro Calls 2-9
2.3.5 Creating Local Symbols Automatically 2-9
2.3.6 Concatenation of Macro Arguments 2-10
2.4 MACRO ATTRIBUTE DIRECTIVES 2-11
2.4.1 .narg Directive 2-12
2.4.2 .nchr Directive 2-13
2.4.3 .ntyp Directive 2-14
2.4.4 .nval Directive 2-14
2.5 INDEFINITE REPEAT BLOCK DIRECTIVES 2-15
2.5.1 .irp Directive 2-16
2.5.2 .irpc Directive 2-17
2.6 REPEAT BLOCK DIRECTIVE 2-18
2.6.1 .rept 2-18
2.7 MACRO DELETION DIRECTIVE 2-19
2.7.1 .mdelete 2-19
2.8 MACRO INVOCATION DETAILS 2-19
2.9 BUILDING A MACRO LIBRARY 2-20
2.9.1 .mlib Macro Directive 2-21
2.9.2 .mcall Macro Directive 2-22
2.10 EXAMPLE MACRO CROSS ASSEMBLERS 2-24
CHAPTER 3 THE LINKER 3-1
3.1 ASLINK RELOCATING LINKER 3-1
3.2 INVOKING ASLINK 3-2
3.3 LIBRARY PATH(S) AND FILE(S) 3-5
3.4 ASLINK PROCESSING 3-6
Page iii
3.6 ASXXXX VERSION 3.XX LINKING 3-15
3.6.1 Object Module Format 3-15
3.6.2 Header Line 3-15
3.6.3 Module Line 3-16
3.6.4 Area Line 3-16
3.6.5 Symbol Line 3-16
3.6.6 T Line 3-16
3.6.7 R Line 3-17
3.6.8 P Line 3-17
3.6.9 24-Bit and 32-Bit Addressing 3-18
3.6.10 ASlink V3.xx Error Messages 3-18
3.7 INTEL IHX OUTPUT FORMAT (16-BIT) 3-21
3.8 INTEL I86 OUTPUT FORMAT (24 OR 32-BIT) 3-22
3.9 MOTORLA S1-S9 OUTPUT FORMAT (16-BIT) 3-23
CHAPTER 4 BUILDING ASXXXX AND ASLINK 4-1
4.1 BUILDING ASXXXX AND ASLINK WITH LINUX 4-2
4.2 BUILDING ASXXXX AND ASLINK UNDER CYGWIN 4-2
4.3 BUILDING ASXXXX AND ASLINK WITH DJGPP 4-3
4.4 BUILDING ASXXXX AND ASLINK WITH BORLAND'S
TURBO C++ 3.0 4-3
4.4.1 Graphical User Interface 4-3
4.4.2 Command Line Interface 4-4
4.5 BUILDING ASXXXX AND ASLINK WITH
MS VISUAL C++ 6.0 4-5
4.5.1 Graphical User Interface 4-5
4.5.2 Command Line Interface 4-5
4.6 BUILDING ASXXXX AND ASLINK WITH
MS VISUAL STUDIO 2005 4-6
4.6.1 Graphical User Interface 4-6
4.6.2 Command Line Interface 4-6
4.7 BUILDING ASXXXX AND ASLINK WITH
MS VISUAL STUDIO 2010 4-7
4.7.1 Graphical User Interface 4-7
4.7.2 Command Line Interface 4-7
4.8 BUILDING ASXXXX AND ASLINK WITH
OPEN WATCOM V1.9 4-8
Page iv
4.8.1 Graphical User Interface 4-8
4.8.2 Command Line Interface 4-8
4.9 BUILDING ASXXXX AND ASLINK WITH
SYMANTEC C/C++ V7.2 4-9
4.9.1 Graphical User Interface 4-9
4.9.2 Command Line Interface 4-9
4.10 THE _CLEAN.BAT AND _PREP.BAT FILES 4-10
APPENDIX AK AS68(HC[S])08 ASSEMBLER AK-1
AK.1 PROCESSOR SPECIFIC DIRECTIVES AK-1
AK.1.1 .hc08 Directive AK-1
AK.1.2 .hcs08 Directive AK-1
AK.1.3 .6805 Directive AK-2
AK.1.4 .hc05 Directive AK-2
AK.1.5 The .__.CPU. Variable AK-2
AK.2 68HC(S)08 REGISTER SET AK-3
AK.3 68HC(S)08 INSTRUCTION SET AK-3
AK.3.1 Control Instructions AK-4
AK.3.2 Bit Manipulation Instructions AK-4
AK.3.3 Branch Instructions AK-4
AK.3.4 Complex Branch Instructions AK-5
AK.3.5 Read-Modify-Write Instructions AK-5
AK.3.6 Register\Memory Instructions AK-6
AK.3.7 Double Operand Move Instruction AK-6
AK.3.8 16-Bit <H:X> Index Register Instructions AK-6
AK.3.9 Jump and Jump to Subroutine Instructions AK-6
Page ix
APPENDIX AR AS8051 ASSEMBLER AR-1
AR.1 ACKNOWLEDGMENT AR-1
AR.2 8051 REGISTER SET AR-1
AR.3 8051 INSTRUCTION SET AR-2
AR.3.1 Inherent Instructions AR-2
AR.3.2 Move Instructions AR-3
AR.3.3 Single Operand Instructions AR-3
AR.3.4 Two Operand Instructions AR-4
AR.3.5 Call and Return Instructions AR-4
AR.3.6 Jump Instructions AR-4
AR.3.7 Predefined Symbols: SFR Map AR-5
AR.3.8 Predefined Symbols: SFR Bit Addresses AR-6
AR.3.9 Predefined Symbols: Control Bits AR-7
Page x
APPENDIX AT AS8XCXXX ASSEMBLER AT-1
AT.1 ACKNOWLEDGMENTS AT-1
AT.2 AS8XCXXX ASSEMBLER DIRECTIVES AT-1
AT.2.1 Processor Selection Directives AT-1
AT.2.2 .cpu Directive AT-2
AT.2.3 Processor Addressing Range Directives AT-3
AT.2.4 The .__.CPU. Variable AT-3
AT.2.5 DS80C390 Addressing Mode Directive AT-4
AT.2.6 The .msb Directive AT-4
AT.3 DS8XCXXX REGISTER SET AT-6
AT.4 DS8XCXXX INSTRUCTION SET AT-6
AT.4.1 Inherent Instructions AT-7
AT.4.2 Move Instructions AT-7
AT.4.3 Single Operand Instructions AT-7
AT.4.4 Two Operand Instructions AT-8
AT.4.5 Call and Return Instructions AT-8
AT.4.6 Jump Instructions AT-8
AT.5 DS8XCXXX SPECIAL FUNCTION REGISTERS AT-9
AT.5.1 SFR Map AT-9
AT.5.2 Bit Addressable Registers: Generic AT-10
AT.5.3 Bit Addressable Registers: Specific AT-11
AT.5.4 Optional Symbols: Control Bits AT-12
AT.6 DS80C310 SPECIAL FUNCTION REGISTERS AT-13
AT.6.1 SFR Map AT-13
AT.6.2 Bit Addressable Registers: Generic AT-14
AT.6.3 Bit Addressable Registers: Specific AT-15
AT.6.4 Optional Symbols: Control Bits AT-16
AT.7 DS80C320/DS80C323 SPECIAL FUNCTION REGISTERS AT-17
AT.7.1 SFR Map AT-17
AT.7.2 Bit Addressable Registers: Generic AT-18
AT.7.3 Bit Addressable Registers: Specific AT-19
AT.7.4 Optional Symbols: Control Bits AT-20
AT.8 DS80C390 SPECIAL FUNCTION REGISTERS AT-21
AT.8.1 SFR Map AT-21
AT.8.2 Bit Addressable Registers: Generic AT-22
AT.8.3 Bit Addressable Registers: Specific AT-23
AT.8.4 Optional Symbols: Control Bits AT-24
AT.9 DS83C520/DS87C520 SPECIAL FUNCTION REGISTERS AT-26
AT.9.1 SFR Map AT-26
AT.9.2 Bit Addressable Registers: Generic AT-27
AT.9.3 Bit Addressable Registers: Specific AT-28
AT.9.4 Optional Symbols: Control Bits AT-29
AT.10 DS83C530/DS87C530 SPECIAL FUNCTION REGISTERS AT-30
AT.10.1 SFR Map AT-30
AT.10.2 Bit Addressable Registers: Generic AT-31
AT.10.3 Bit Addressable Registers: Specific AT-32
AT.10.4 Optional Symbols: Control Bits AT-33
AT.11 DS83C550/DS87C550 SPECIAL FUNCTION REGISTERS AT-34
AT.11.1 SFR Map AT-34
AT.11.2 Bit Addressable Registers: Generic AT-36
AT.11.3 Bit Addressable Registers: Specific AT-37
AT.11.4 Optional Symbols: Control Bits AT-39
Page xi
APPENDIX AY ASGB ASSEMBLER AY-1
AY.1 ACKNOWLEDGEMENT AY-1
AY.2 INTRODUCTION AY-1
AY.3 GAMEBOY REGISTER SET AND CONDITIONS AY-1
AY.4 GAMEBOY INSTRUCTION SET AY-2
AY.4.1 .tile Directive AY-2
AY.4.2 Potentially Controversial Mnemonic Selection AY-4
AY.4.2.1 Auto-Indexing Loads AY-4
AY.4.2.2 Input and Output Operations AY-4
AY.4.2.3 The 'stop' Instruction AY-5
AY.4.3 Inherent Instructions AY-5
AY.4.4 Implicit Operand Instructions AY-5
AY.4.5 Load Instructions AY-6
AY.4.6 Call/Return Instructions AY-6
AY.4.7 Jump Instructions AY-6
AY.4.8 Bit Manipulation Instructions AY-6
AY.4.9 Input and Output Instructions AY-7
AY.4.10 Register Pair Instructions AY-7
APPENDIX BC ASRAB ASSEMBLER BC-1
BC.1 ACKNOWLEDGMENT BC-1
BC.2 PROCESSOR SPECIFIC DIRECTIVES BC-1
BC.2.1 .r2k Directive BC-2
BC.2.2 .hd64 Directive BC-2
BC.2.3 .z80 Directive BC-2
BC.2.4 The .__.CPU. Variable BC-3
BC.3 RABBIT 2000/3000 ADDRESSING AND INSTRUCTIONS BC-4
BC.3.1 Instruction Symbols BC-4
BC.3.2 Rabbit Instructions BC-6
BC.4 Z80/HD64180 ADDRESSING AND INSTRUCTIONS BC-8
BC.4.1 Inherent Instructions BC-9
BC.4.2 Implicit Operand Instructions BC-9
BC.4.3 Load Instruction BC-10
BC.4.4 Call/Return Instructions BC-10
BC.4.5 Jump and Jump to Subroutine Instructions BC-10
BC.4.6 Bit Manipulation Instructions BC-11
BC.4.7 Interrupt Mode and Reset Instructions BC-11
BC.4.8 Input and Output Instructions BC-11
BC.4.9 Register Pair Instructions BC-11
BC.4.10 HD64180 Specific Instructions BC-12
Page xiii
APPENDIX BI ASZ80 ASSEMBLER BI-1
BI.1 .z80 DIRECTIVE BI-1
BI.2 .hd64 DIRECTIVE BI-1
BI.3 THE .__.CPU. VARIABLE BI-2
BI.4 Z80 REGISTER SET AND CONDITIONS BI-2
BI.5 Z80 INSTRUCTION SET BI-3
BI.5.1 Inherent Instructions BI-4
BI.5.2 Implicit Operand Instructions BI-4
BI.5.3 Load Instruction BI-5
BI.5.4 Call/Return Instructions BI-5
BI.5.5 Jump and Jump to Subroutine Instructions BI-5
BI.5.6 Bit Manipulation Instructions BI-6
BI.5.7 Interrupt Mode and Reset Instructions BI-6
BI.5.8 Input and Output Instructions BI-6
BI.5.9 Register Pair Instructions BI-6
BI.5.10 HD64180/Z180 Specific Instructions BI-7
Page 2
P R E F A C E
The ASxxxx assemblers were written following the style of
several unfinished cross assemblers found in the Digital Equip-
ment Corporation Users Society (DECUS) distribution of the C
programming language. The incomplete DECUS code was provided
with no documentation as to the input syntax or the output
format. I wish to thank the author for inspiring me to begin
the development of this set of assemblers.
The ASLINK program was written as a companion to the ASxxxx
assemblers, its design and implementation was not derived from
any other work.
I would greatly appreciate receiving the details of any
changes, additions, or errors pertaining to these programs and
will attempt to incorporate any fixes or generally useful
changes in a future update to these programs.
Alan R. Baldwin
Kent State University
Physics Department
Kent, Ohio 44242
U.S.A.
http://shop-pdp.net
http://shop-pdp.kent.edu/
tel: (330) 672 2531
fax: (330) 672 2959
Page 3
E N D U S E R L I C E N S E A G R E E M E N T
Copyright (C) 1989-2012 Alan R. Baldwin
This program is free software: you can redistribute it
and/or modify it under the terms of the GNU General Public
License as published by the Free Software Foundation, either
version 3 of the License, or (at your option) any later version.
This program is distributed in the hope that it will be use-
ful, but WITHOUT ANY WARRANTY; without even the implied war-
ranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU General Public License for more details.
You should have received a copy of the GNU General Public
License along with this program. If not, see
<http://www.gnu.org/licenses/>.
Page 4
C O N T R I B U T O R S
Thanks to Marko Makela for his contribution of the AS6500 cross
assembler.
Marko Makela
Sillitie 10 A
01480 Vantaa
Finland
Internet: Marko dot Makela at Helsinki dot Fi
EARN/BitNet: msmakela at finuh
Thanks to John Hartman for his contribution of the AS8051 cross
assembler and updates to the ASxxxx and ASLINK internals.
John L. Hartman
jhartman at compuserve dot com
noice at noicedebugger dot com
Thanks to G. Osborn for his contributions to LKS19.C and
LKIHX.C.
G. Osborn
gary at s-4 dot com
Thanks to Ken Hornstein for his contribution of object libraries
contained in LKLIBR.C.
Ken Hornstein
kenh at cmf dot nrl dot navy dot mil
Page 5
Thanks to Bill McKinnon for his contributions to the AS8XCXXX
cross assembler for the DS8XCXXX series of microprocessors.
Bill McKinnon
w_mckinnon at conknet dot com
Thanks to Roger Ivie for his contribution of the ASGB cross as-
sembler for the GameBoy.
Roger Ivie
ivie at cc dot usu dot edu
Thanks to Uwe Steller for his contribution of the AS740 cross
assembler.
Uwe Stellar
Uwe dot Steller at t-online dot de
Thanks to Shujen Chen for his contribution of the AS1802 cross
assembler.
Shugen Chen
DeVry University
Tinley Park IL
schen at tp dot devry dot edu
Thanks to Edgar Puehringer for his contribution of the AS61860
cross assembler.
Edgar Puehringer
edgar_pue at yahoo dot com
Page 6
Thanks to Ulrich Raich and Razaq Ijoduola for their contribution
of the ASRAB cross assembler.
Ulrich Raich and Razaq Ijoduola
PS Division
CERN
CH-1211 Geneva-23
Ulrich dot Raich at cern dot ch
Thanks to Patrick Head for his contribution of the ASEZ80 cross
assembler.
Patrick Head
patrick at phead dot net
Thanks to Boisy G. Pitre for contributing the .ifeq, .ifne,
.ifgt, .iflt, .ifle, and .ifge conditional directives and the
Tandy Color Computer Disk Basic binary output for ASLINK.
Boisy G. Pitre
boisy at boisypitre dot com
Thanks to Mike McCarty for his contributions to the processor
cycle count option of the ASxxxx Assemblers.
Mike McCarty
mike dot mccarty at sbcglobal dot net
Thanks to Mengjin Su for his contribution of the PIC18Fxxx Ex-
tended Instructions.
Mengjin Su
msu at micron dot com
Page 7
Thanks to Carl Rash for his contribution of the Visual Studio
2010 project files.
Carl Rash
crash at triad dot rr dot com
Page 8
ASxxxx Cross Assemblers, Version 5.05, August 2012
Submitted by Alan R. Baldwin,
Kent State University, Kent, Ohio
Operating System: Linux, Windows, MS-DOS
or other supporting ANSI C.
Source Langauge: C
Abstract:
The ASxxxx assemblers are a series of microprocessor assem-
blers written in the C programming language. This collection
contains cross assemblers for the 1802, S2650, SC/MP, MPS430,
61860, 6500, 6800(6802/6808), 6801(6803/HD6303), 6804, 6805,
68HC(S)08, 6809, 68HC11, 68HC(S)12, 68HC16, 740,
8048(8041/8022/8021) 8051, 8085(8080), DS8xCxxx, AVR, EZ80,
F2MC8L/FX, F8/3870, GameBoy(Z80), H8/3xx, Cypress PSoC(M8C),
PIC, Rabbit 2000/3000, asst6, asst7, asst8, Z8, and Z80(HD64180)
series microprocessors. Each assembler has a device specific
section which includes: (1) device description, byte order, and
file extension information, (2) a table of assembler general
directives, special directives, assembler mnemonics and asso-
ciated operation codes, (3) machine specific code for processing
the device mnemonics, addressing modes, and special directives.
The assemblers have a common device independent section which
handles the details of file input/output, symbol table genera-
tion, program/data areas, expression analysis, and assembler
directive processing.
The assemblers provide the following features: (1) alpha-
betized, formatted symbol table listings, (2) relocatable object
modules, (3) global symbols for linking object modules, (4) con-
ditional assembly directives, (5) reusable local symbols, (6)
include-file processing, and (7) a general macro processing
facility.
The companion program ASLINK is a relocating linker perform-
ing the following functions: (1) bind multiple object modules
into a single memory image, (2) resolve inter-module symbol
references, (3) resolve undefined symbols from specified
librarys of object modules, (4) process absolute, relative, con-
catenated, and overlay attributes in data and program sections,
(5) perform byte and word program-counter relative (pc or pcr)
addressing calculations, (6) define absolute symbol values at
link time, (7) define absolute area base address values at link
time, (8) produce an Intel Hex record, Motorola S record or
Tandy CoCo Disk Basic output file, (9) produce a map of the
linked memory image, and (10) update the ASxxxx assembler
listing files with the absolute linked addresses and data.
Page 9
The assemblers and linker have been tested using Linux and
DJGPP, Cygwin, Symantec C/C++ V7.2, Borland Turbo C++ 3.0, Open
Watcom V1.9, VC6, Visual Studio 2005, and Visual Studio 2010.
Complete source code and documentation for the assemblers and
linker is included with the distribution. Additionally, test
code for each assembler and several microprocessor monitors (
ASSIST05 for the 6805, MONDEB and ASSIST09 for the 6809, and
BUFFALO 2.5 for the 6811) are included as working examples of
use of these assemblers.
CHAPTER 1
THE ASSEMBLER
1.1 THE ASXXXX ASSEMBLERS
The ASxxxx assemblers are a series of microprocessor assem-
blers written in the C programming language. Each assembler has
a device specific section which includes:
1. device description, byte order, and file extension in-
formation
2. a table of the assembler general directives, special
device directives, assembler mnemonics and associated
operation codes
3. machine specific code for processing the device mnemon-
ics, addressing modes, and special directives
The device specific information is detailed in the appendices.
The assemblers have a common device independent section which
handles the details of file input/output, symbol table genera-
tion, program/data areas, expression analysis, and assembler
directive processing.
The assemblers provide the following features:
1. Command string control of assembly functions
2. Alphabetized, formatted symbol table listing
3. Relocatable object modules
4. Global symbols for linking object modules
5. Conditional assembly directives
THE ASSEMBLER PAGE 1-2
THE ASXXXX ASSEMBLERS
6. Program sectioning directives
ASxxxx assembles one or more source files into a single relo-
catable ascii object file. The output of the ASxxxx assemblers
consists of an ascii relocatable object file(*.rel), an assembly
listing file(*.lst), and a symbol file(*.sym).
1.1.1 Assembly Pass 1
During pass 1, ASxxxx opens all source files and performs a
rudimentary assembly of each source statement. During this pro-
cess all symbol tables are built, program sections defined, and
number of bytes for each assembled source line is estimated.
At the end of pass 1 all undefined symbols may be made global
(external) using the ASxxxx switch -g, otherwise undefined sym-
bols will be flagged as errors during succeeding passes.
1.1.2 Assembly Pass 2
During pass 2 the ASxxxx assembler resolves forward refer-
ences and determines the number of bytes for each assembled
line. The number of bytes used by a particular assembler in-
struction may depend upon the addressing mode, whether the in-
struction allows multiple forms based upon the relative distance
to the addressed location, or other factors. Pass 2 resolves
these cases and determines the address of all symbols.
1.1.3 Assembly Pass 3
Pass 3 by the assembler generates the listing file, the relo-
catable output file, and the symbol tables. Also during pass 3
the errors will be reported.
The relocatable object file is an ascii file containing sym-
bol references and definitions, program area definitions, and
the relocatable assembled code, the linker ASLINK will use this
information to generate an absolute load file (Intel or Motorola
formats).
THE ASSEMBLER PAGE 1-3
SOURCE PROGRAM FORMAT
1.2 SOURCE PROGRAM FORMAT
1.2.1 Statement Format
A source program is composed of assembly-language statements.
Each statement must be completed on one line. A line may con-
tain a maximum of 128 characters, longer lines are truncated and
lost.
An ASxxxx assembler statement may have as many as four
fields. These fields are identified by their order within the
statement and/or by separating characters between fields. The
general format of the ASxxxx statement is:
[label:] Operator Operand [;Comment(s)]
The label and comment fields are optional. The operator and
operand fields are interdependent. The operator field may be an
assembler directive or an assembly mnemonic. The operand field
may be optional or required as defined in the context of the
operator.
ASxxxx interprets and processes source statements one at a
time. Each statement causes a particular operation to be per-
formed.
1.2.1.1 Label Field -
A label is a user-defined symbol which is assigned the value
of the current location counter and entered into the user de-
fined symbol table. The current location counter is used by
ASxxxx to assign memory addresses to the source program state-
ments as they are encountered during the assembly process. Thus
a label is a means of symbolically referring to a specific
statement.
When a program section is absolute, the value of the current
location counter is absolute; its value references an absolute
memory address. Similarly, when a program section is relocat-
able, the value of the current location counter is relocatable.
A relocation bias calculated at link time is added to the ap-
parent value of the current location counter to establish its
effective absolute address at execution time. (The user can
also force the linker to relocate sections defined as absolute.
This may be required under special circumstances.)
If present, a label must be the first field in a source
statement and must be terminated by a colon (:). For example,
THE ASSEMBLER PAGE 1-4
SOURCE PROGRAM FORMAT
if the value of the current location counter is absolute
01F0(H), the statement:
abcd: nop
assigns the value 01F0(H) to the label abcd. If the location
counter value were relocatable, the final value of abcd would be
01F0(H)+K, where K represents the relocation bias of the program
section, as calculated by the linker at link time.
More than one label may appear within a single label field.
Each label so specified is assigned the same address value. For
example, if the value of the current location counter is
1FF0(H), the multiple labels in the following statement are each
assigned the value 1FF0(H):
abcd: aq: $abc: nop
Multiple labels may also appear on successive lines. For ex-
ample, the statements
abcd:
aq:
$abc: nop
likewise cause the same value to be assigned to all three la-
bels.
A double colon (::) defines the label as a global symbol.
For example, the statement
abcd:: nop
establishes the label abcd as a global symbol. The distinguish-
ing attribute of a global symbol is that it can be referenced
from within an object module other than the module in which the
symbol is defined. References to this label in other modules
are resolved when the modules are linked as a composite execut-
able image.
The legal characters for defining labels are:
A through Z
a through z
0 through 9
. (Period)
$ (Dollar sign)
_ (underscore)
A label may be any length, however only the first 79
characters are significant and, therefore must be unique among
all labels in the source program (not necessarily among
THE ASSEMBLER PAGE 1-5
SOURCE PROGRAM FORMAT
separately compiled modules). An error code(s) (m or p) will be
generated in the assembly listing if the first 79 characters in
two or more labels are the same. The m code is caused by the
redeclaration of the symbol or its reference by another state-
ment. The p code is generated because the symbols location is
changing on each pass through the source file.
The label must not start with the characters 0-9, as this
designates a reusable symbol with special attributes described
in a later section.
The label must not start with the sequence $$, as this
represents the temporary radix 16 for constants.
1.2.1.2 Operator Field -
The operator field specifies the action to be performed. It
may consist of an instruction mnemonic (op code) or an assembler
directive.
When the operator is an instruction mnemonic, a machine in-
struction is generated and the assembler evaluates the addresses
of the operands which follow. When the operator is a directive
ASxxxx performs certain control actions or processing operations
during assembly of the source program.
Leading and trailing spaces or tabs in the operator field
have no significance; such characters serve only to separate
the operator field from the preceeding and following fields.
An operator is terminated by a space, tab or end of line.
1.2.1.3 Operand Field -
When the operator is an instruction mnemonic (op code), the
operand field contains program variables that are to be
evaluated/manipulated by the operator.
Operands may be expressions or symbols, depending on the
operator. Multiple expressions used in the operand fields may
be separated by a comma. An operand should be preceeded by an
operator field; if it is not, the statement will give an error
(q or o). All operands following instruction mnemonics are
treated as expressions.
The operand field is terminated by a semicolon when the field
is followed by a comment. For example, in the following
statement:
label: lda abcd,x ;Comment field
THE ASSEMBLER PAGE 1-6
SOURCE PROGRAM FORMAT
the tab between lda and abcd terminates the operator field and
defines the beginning of the operand field; a comma separates
the operands abcd and x; and a semicolon terminates the operand
field and defines the beginning of the comment field. When no
comment field follows, the operand field is terminated by the
end of the source line.
1.2.1.4 Comment Field -
The comment field begins with a semicolon and extends through
the end of the line. This field is optional and may contain any
7-bit ascii character except null.
Comments do not affect assembly processing or program execu-
tion.
1.3 SYMBOLS AND EXPRESSIONS
This section describes the generic components of the ASxxxx
assemblers: the character set, the conventions observed in con-
structing symbols, and the use of numbers, operators, and ex-
pressions.
1.3.1 Character Set
The following characters are legal in ASxxxx source programs:
1. The letters A through Z. Both upper- and lower-case
letters are acceptable. The assemblers, by default,
are case sensitive, i.e. ABCD and abcd are not the
same symbols. (The assemblers can be made case insen-
sitive by using the -z command line option.)
2. The digits 0 through 9
3. The characters . (period), $ (dollar sign), and _ (un-
derscore).
4. The special characters listed in Tables 1 through 6.