From 1f93988fff8f2006295e14e7a2b2f21f353bc287 Mon Sep 17 00:00:00 2001
From: 82marbag <69267416+82marbag@users.noreply.github.com>
Date: Mon, 31 Jan 2022 18:00:05 -0500
Subject: [PATCH] Add PAT support

Support Page Attribute Tables (PAT)

Signed-off-by: Daniele Ahmed <ahmeddan@amazon.com>
---
 arch/x86/pat.c               | 43 ++++++++++++++++++++++++++++++++++++
 include/arch/x86/page.h      | 25 +++++++++++++++++++++
 include/arch/x86/processor.h |  2 ++
 3 files changed, 70 insertions(+)
 create mode 100644 arch/x86/pat.c

diff --git a/arch/x86/pat.c b/arch/x86/pat.c
new file mode 100644
index 00000000..c0ed70ab
--- /dev/null
+++ b/arch/x86/pat.c
@@ -0,0 +1,43 @@
+/*
+ * Copyright © 2022 Amazon.com, Inc. or its affiliates.
+ * All Rights Reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <pagetable.h>
+
+#define PAT_FIELD_BIT_POS(field) (8 * field)
+
+void pat_set_type(pat_field_t field, pat_memory_type_t type) {
+    /* TODO: cpuid: check this feature is implemented */
+    unsigned long value = rdmsr(MSR_PAT);
+    value = value & ~(0x7 << PAT_FIELD_BIT_POS(field));
+    value = value | (type << PAT_FIELD_BIT_POS(field));
+    wrmsr(MSR_PAT, value);
+}
+
+pat_memory_type_t pat_get_type(pat_field_t field) {
+    /* TODO: cpuid: check this feature is implemented */
+    unsigned long value = rdmsr(MSR_PAT);
+    value = value >> PAT_FIELD_BIT_POS(field);
+    return value & 0x7;
+}
\ No newline at end of file
diff --git a/include/arch/x86/page.h b/include/arch/x86/page.h
index 8def5426..2a324579 100644
--- a/include/arch/x86/page.h
+++ b/include/arch/x86/page.h
@@ -123,6 +123,28 @@
 
 #ifndef __ASSEMBLY__
 
+enum pat_field {
+    PA0 = 0,
+    PA1,
+    PA2,
+    PA3,
+    PA4,
+    PA5,
+    PA6,
+    PA7,
+};
+typedef enum pat_field pat_field_t;
+
+enum pat_memory_type {
+    UC = 0, /* Uncacheable */
+    WC = 1, /* Write Combining */
+    WT = 4, /* Write Through */
+    WP,     /* Write Protected */
+    WB,     /* Write Back */
+    UC_,    /* Uncached */
+};
+typedef enum pat_memory_type pat_memory_type_t;
+
 typedef unsigned long paddr_t;
 typedef unsigned long mfn_t;
 
@@ -143,6 +165,9 @@ extern void *vmap(void *va, mfn_t mfn, unsigned int order,
 
 extern void vunmap(void *va, unsigned int order);
 
+extern void pat_set_type(pat_field_t field, pat_memory_type_t type);
+extern pat_memory_type_t pat_get_type(pat_field_t field);
+
 /* Static declarations */
 
 static inline mfn_t paddr_to_mfn(paddr_t pa) { return (mfn_t)(pa >> PAGE_SHIFT); }
diff --git a/include/arch/x86/processor.h b/include/arch/x86/processor.h
index 9f33376c..86096c10 100644
--- a/include/arch/x86/processor.h
+++ b/include/arch/x86/processor.h
@@ -91,6 +91,8 @@
 /*
  * Model Specific Registers (MSR)
  */
+#define MSR_PAT 0x277
+
 #define MSR_APIC_BASE 0x0000001B
 
 #define MSR_EFER   0xc0000080      /* Extended Feature Enable Register */