From 9188f827720e5e7b7f3603bdd610700de545c10e Mon Sep 17 00:00:00 2001 From: gitlab-runner Date: Thu, 21 May 2020 10:17:44 -0500 Subject: [PATCH] Upload psoc6pdl 1.5.2.3446 --- RELEASE.md | 34 +- .../html/group__group__ctb.html | 2 + .../group__group__ctb__functions__init.html | 1 + .../html/group__group__sd__host.html | 4 +- ...roup__sd__host__low__level__functions.html | 2 +- ...p__sd__host__macros__general__purpose.html | 14 +- ...oup__sd__host__macros__general__purpose.js | 2 +- .../html/group__group__syslib.html | 12 +- .../html/navtreeindex11.js | 2 +- .../html/search/all_3.js | 2 +- drivers/include/cy_ctb.h | 10 +- drivers/include/cy_sd_host.h | 729 +++++++++--------- drivers/include/cy_syslib.h | 45 +- drivers/source/cy_ctb.c | 7 +- drivers/source/cy_sd_host.c | 14 +- drivers/source/cy_syslib.c | 8 +- .../connectivity_wifi-1.0.cypersonality | 10 +- .../connectivity_wifi-1.0.cypersonality | 10 +- version.xml | 2 +- 19 files changed, 489 insertions(+), 421 deletions(-) diff --git a/RELEASE.md b/RELEASE.md index 4892936..9251ec0 100644 --- a/RELEASE.md +++ b/RELEASE.md @@ -1,28 +1,34 @@ -# PSoC 6 Peripheral Driver Library v1.5.1 +# PSoC 6 Peripheral Driver Library v1.5.2 -Please refer to the [README.md](./README.md) and the [PDL API Reference Manual](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/index.html) for a complete description of the Peripheral Driver Library. +Please refer to the [README.md](./README.md) and the +[PDL API Reference Manual](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/index.html) +for a complete description of the Peripheral Driver Library. -### New Features +## New Features -* New ECO calculation algorithm +* No new features -### Updated Personalities +## Updated Personalities -* ECO 2.0 - added new parameter C0; narrowed the frequency range to 16..35 MHz; updated the calculation algorithm per ECO Trimming section of the device TRM. +* WiFi - Fix build warning in the generated code. Minor parameter name updates. -### Updated Drivers +## Updated Drivers -* [SysClk 2.0](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__sysclk.html) +* [SD Host 1.50](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__sd__host.html) +* [CTB 1.10.2](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__ctb.html) +* [SysLib 2.50.3](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__syslib.html) -### Known Issues +## Known Issues -None +See the Known Issues section of +[SysLib](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__syslib.html) +driver. -### Defect Fixes +## Defect Fixes See the Changelog section of each Driver in the [PDL API Reference](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/modules.html) for all fixes and updates. -### Supported Software and Tools +## Supported Software and Tools This version of PDL was validated for compatibility with the following Software and Tools: @@ -36,7 +42,7 @@ This version of PDL was validated for compatibility with the following Software | ARM Compiler 6 | 6.13 | | FreeRTOS | 10.0.1 | -### More information +## More information * [Peripheral Driver Library README.md](./README.md) * [Peripheral Driver Library API Reference Manual](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/index.html) @@ -46,6 +52,6 @@ This version of PDL was validated for compatibility with the following Software * [PSoC 6 Technical Reference Manuals](https://www.cypress.com/search/all/PSoC%206%20Technical%20Reference%20Manual?f%5b0%5d=meta_type%3Atechnical_documents&f%5b1%5d=resource_meta_type%3A583) * [PSoC 6 MCU Datasheets](https://www.cypress.com/search/all?f%5b0%5d=meta_type%3Atechnical_documents&f%5b1%5d=resource_meta_type%3A575&f%5b2%5d=field_related_products%3A114026) * [Cypress Semiconductor](http://www.cypress.com) - + --- © Cypress Semiconductor Corporation, 2020. diff --git a/docs/pdl_api_reference_manual/html/group__group__ctb.html b/docs/pdl_api_reference_manual/html/group__group__ctb.html index 10b6b66..7c936c3 100644 --- a/docs/pdl_api_reference_manual/html/group__group__ctb.html +++ b/docs/pdl_api_reference_manual/html/group__group__ctb.html @@ -235,6 +235,8 @@

VersionChangesReason for Change +1.10.2 The Cy_CTB_Init function description is expanded with a clarification note. Documentation enhancement based on a usability feedback. + 1.10.1 Added header guard CY_IP_MXS40PASS to the source file. To enable the PDL compilation with wounded out IP blocks. 1.10 Flattened the organization of the driver source code into the single source directory and the single include directory. Driver library directory-structure simplification. diff --git a/docs/pdl_api_reference_manual/html/group__group__ctb__functions__init.html b/docs/pdl_api_reference_manual/html/group__group__ctb__functions__init.html index 9dd737a..7ce6d44 100644 --- a/docs/pdl_api_reference_manual/html/group__group__ctb__functions__init.html +++ b/docs/pdl_api_reference_manual/html/group__group__ctb__functions__init.html @@ -139,6 +139,7 @@

Note
This function call disables a whole CTB block, call Cy_CTB_Enable after this function call.
Parameters
diff --git a/docs/pdl_api_reference_manual/html/group__group__sd__host.html b/docs/pdl_api_reference_manual/html/group__group__sd__host.html index fa242fb..9d05540 100644 --- a/docs/pdl_api_reference_manual/html/group__group__sd__host.html +++ b/docs/pdl_api_reference_manual/html/group__group__sd__host.html @@ -201,7 +201,9 @@

- + + + diff --git a/docs/pdl_api_reference_manual/html/group__group__sd__host__low__level__functions.html b/docs/pdl_api_reference_manual/html/group__group__sd__host__low__level__functions.html index 2ff0011..41fa780 100644 --- a/docs/pdl_api_reference_manual/html/group__group__sd__host__low__level__functions.html +++ b/docs/pdl_api_reference_manual/html/group__group__sd__host__low__level__functions.html @@ -1745,7 +1745,7 @@

Cy_SysPm_CpuEnterDeepSleep. To do it, register this function as a callback before calling Cy_SysPm_CpuEnterDeepSleep : specify CY_SYSPM_DEEPSLEEP as the callback type and call Cy_SysPm_RegisterCallback.

-
Note
When waking up from Deep Sleep, the SD Host driver requires up to 100ms for clock stabilization. By default the SD Host driver will wait this length of time on power up. The waiting loop is implemented in this function. If the application is time sensitive this delay can be overridden by the application by defining CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP to a lower value. This allows the application to perform other operations while the clock is stabilizing in the background. However, the application must still make sure that the SD Host clock has had time to stabilize before attempting to use the SD card. The recommended way to override the value is to specify this as a custom define on the compiler command line. This can be done by appending the entry to the DEFINES variable in the application Makefile. Eg: DEFINES+=CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP=40.
+
Note
When waking up from Deep Sleep, the SD Host driver requires up to 1 us for clock stabilization. By default the SD Host driver will wait this length of time on power up. The waiting loop is implemented in this function. If the application is time sensitive this delay can be overridden by the application by defining CY_SD_HOST_CLK_RAMP_UP_TIME_US_WAKEUP. This allows the application to perform other operations while the clock is stabilizing in the background. However, the application must still make sure that the SD Host clock has had time to stabilize before attempting to use the SD card. The recommended way to override the value is to specify this as a custom define on the compiler command line. This can be done by appending the entry to the DEFINES variable in the application Makefile. Eg: DEFINES+=CY_SD_HOST_CLK_RAMP_UP_TIME_US_WAKEUP=40.
Parameters

basePointer to structure describing registers
VersionChangesReason for Change
1.40 Added a possibility to customize the SD clock rump up time during wakeup from deep sleep, see Cy_SD_Host_DeepSleepCallback description for details. Workaround for cases of specific wakeup timing requirements.
1.50 The default value of the SD-clock rump-up time during a wakeup from Deep Sleep is reduced to 1 us, for details, see Cy_SD_Host_DeepSleepCallback description. Optimization for cases of specific wakeup timing requirements.
1.40 Added a possibility to customize the SD-clock rump-up time during a wakeup from Deep Sleep, for details, see Cy_SD_Host_DeepSleepCallback description. Workaround for cases of specific wakeup timing requirements.
1.30 The internal function implementation is changed. Code efficiency enhancement, minor defect fixing.
diff --git a/docs/pdl_api_reference_manual/html/group__group__sd__host__macros__general__purpose.html b/docs/pdl_api_reference_manual/html/group__group__sd__host__macros__general__purpose.html index 578c753..f62ea52 100644 --- a/docs/pdl_api_reference_manual/html/group__group__sd__host__macros__general__purpose.html +++ b/docs/pdl_api_reference_manual/html/group__group__sd__host__macros__general__purpose.html @@ -121,9 +121,9 @@ - - - + + + @@ -245,19 +245,19 @@

-

◆ CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP

+ +

◆ CY_SD_HOST_CLK_RAMP_UP_TIME_US_WAKEUP

callbackParamsThe pointer to the callback parameters structure cy_stc_syspm_callback_params_t.
#define CY_SD_HOST_CLK_RAMP_UP_TIME_MS   (100UL)
 The host power ramp up time. More...
 
#define CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP   (CY_SD_HOST_CLK_RAMP_UP_TIME_MS)
 The host power ramp up time during wake up from deep sleep. More...
 
#define CY_SD_HOST_CLK_RAMP_UP_TIME_US_WAKEUP   (1U)
 The default host power ramp up time during wake up from deep sleep. More...
 
#define CY_SD_HOST_ADMA_NOP   (0x0UL)
 Does not execute the current line and go to next line. More...
 
- +
#define CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP   (CY_SD_HOST_CLK_RAMP_UP_TIME_MS)#define CY_SD_HOST_CLK_RAMP_UP_TIME_US_WAKEUP   (1U)
-

The host power ramp up time during wake up from deep sleep.

+

The default host power ramp up time during wake up from deep sleep.

diff --git a/docs/pdl_api_reference_manual/html/group__group__sd__host__macros__general__purpose.js b/docs/pdl_api_reference_manual/html/group__group__sd__host__macros__general__purpose.js index b033683..ac217ce 100644 --- a/docs/pdl_api_reference_manual/html/group__group__sd__host__macros__general__purpose.js +++ b/docs/pdl_api_reference_manual/html/group__group__sd__host__macros__general__purpose.js @@ -9,7 +9,7 @@ var group__group__sd__host__macros__general__purpose = [ "CY_SD_HOST_CLK_50M", "group__group__sd__host__macros__general__purpose.html#ga95bf272bd4e2dd460dfe330557505c10", null ], [ "CY_SD_HOST_CLK_100M", "group__group__sd__host__macros__general__purpose.html#ga96a4333dde183a4825f3f7414db30f1b", null ], [ "CY_SD_HOST_CLK_RAMP_UP_TIME_MS", "group__group__sd__host__macros__general__purpose.html#gaa56807ade05f5f8ff34fa71e8f1f8eb8", null ], - [ "CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP", "group__group__sd__host__macros__general__purpose.html#gadd91111c5e80b2cc62f1adf75de3183c", null ], + [ "CY_SD_HOST_CLK_RAMP_UP_TIME_US_WAKEUP", "group__group__sd__host__macros__general__purpose.html#gae6b0b7d64c1290282c330f76b0ccb65d", null ], [ "CY_SD_HOST_ADMA_NOP", "group__group__sd__host__macros__general__purpose.html#gaf84a4e57cec03657fee98b7643c23c19", null ], [ "CY_SD_HOST_ADMA_RSV", "group__group__sd__host__macros__general__purpose.html#gaaa71743bf44b0ca95198ac626797a673", null ], [ "CY_SD_HOST_ADMA_TRAN", "group__group__sd__host__macros__general__purpose.html#ga139636b3d397af09581d8e52eea267d1", null ], diff --git a/docs/pdl_api_reference_manual/html/group__group__syslib.html b/docs/pdl_api_reference_manual/html/group__group__syslib.html index 30f5b32..deabe50 100644 --- a/docs/pdl_api_reference_manual/html/group__group__syslib.html +++ b/docs/pdl_api_reference_manual/html/group__group__syslib.html @@ -123,7 +123,7 @@

CY_ASSERT_CLASS_3 CY_ASSERT_L3 A parameter that is an enum constant

Firmware defines which ASSERT class is enabled by defining CY_ASSERT_LEVEL. This is a compiler command line argument, similar to how the DEBUG / NDEBUG macro is passed.
- Enabling any class also enables any lower-numbered class. CY_ASSERT_CLASS_3 is the default level, and it enables asserts for all three classes. The following example shows the command-line option to enable all the assert levels:

-D CY_ASSERT_LEVEL=CY_ASSERT_CLASS_3
Note
The use of special characters, such as spaces, parenthesis, etc. must be protected with quotes.
+Enabling any class also enables any lower-numbered class. CY_ASSERT_CLASS_3 is the default level, and it enables asserts for all three classes. The following example shows the command-line option to enable all the assert levels:

-D CY_ASSERT_LEVEL=CY_ASSERT_CLASS_3
Note
The use of special characters, such as spaces, parenthesis, etc. must be protected with quotes.

After CY_ASSERT_LEVEL is defined, firmware can use one of the three level macros to make an assertion. For example, if the parameter can vary between devices, firmware uses the L1 macro.

CY_ASSERT_L1(clkPath < SRSS_NUM_CLKPATH);

If the parameter has bounds, firmware uses L2.

CY_ASSERT_L2(trim <= CY_CTB_TRIM_VALUE_MAX);

If the parameter is an enum, firmware uses L3.

CY_ASSERT_L3(config->LossAction <= CY_SYSCLK_CSV_ERROR_FAULT_RESET);

Each check uses the appropriate level macro for the kind of parameter being checked. If a particular assert class/level is not enabled, then the assert does nothing.

More Information

@@ -138,12 +138,22 @@

18.4 R Unions shall not be used. The unions are used for CFSR, HFSR and SHCSR Fault Status Registers content access as a word in code and as a structure during debug. +

+Known Issues

+ + + + + +
IssueWorkaround
The function malloc() does not return an error when the allocation size is bigger than the heap size. PDL does not implement the _sbrk function. The user needs to add custom _sbrk function.

Changelog

+ + diff --git a/docs/pdl_api_reference_manual/html/navtreeindex11.js b/docs/pdl_api_reference_manual/html/navtreeindex11.js index f6651f6..09665a2 100644 --- a/docs/pdl_api_reference_manual/html/navtreeindex11.js +++ b/docs/pdl_api_reference_manual/html/navtreeindex11.js @@ -246,7 +246,7 @@ var NAVTREEINDEX11 = "group__group__sd__host__macros__general__purpose.html#gaabfaa15e95d13ce6d6f01ed1bea6403d":[2,22,0,0,14], "group__group__sd__host__macros__general__purpose.html#gacf618278189cb5512c296ffa9ed6ad45":[2,22,0,0,19], "group__group__sd__host__macros__general__purpose.html#gadaca91a1646b33428af0929365c93d6a":[2,22,0,0,1], -"group__group__sd__host__macros__general__purpose.html#gadd91111c5e80b2cc62f1adf75de3183c":[2,22,0,0,9], +"group__group__sd__host__macros__general__purpose.html#gae6b0b7d64c1290282c330f76b0ccb65d":[2,22,0,0,9], "group__group__sd__host__macros__general__purpose.html#gaf3aaee64fb2fe72750694dda06acabd4":[2,22,0,0,20], "group__group__sd__host__macros__general__purpose.html#gaf84a4e57cec03657fee98b7643c23c19":[2,22,0,0,10], "group__group__sd__host__macros__present__status.html":[2,22,0,7] diff --git a/docs/pdl_api_reference_manual/html/search/all_3.js b/docs/pdl_api_reference_manual/html/search/all_3.js index ba0cb8a..1baef53 100644 --- a/docs/pdl_api_reference_manual/html/search/all_3.js +++ b/docs/pdl_api_reference_manual/html/search/all_3.js @@ -2685,7 +2685,7 @@ var searchData= ['cy_5fsd_5fhost_5fclk_5f25m',['CY_SD_HOST_CLK_25M',['../group__group__sd__host__macros__general__purpose.html#gaa05748a150a5904a69c084e798fa126c',1,'cy_sd_host.h']]], ['cy_5fsd_5fhost_5fclk_5f50m',['CY_SD_HOST_CLK_50M',['../group__group__sd__host__macros__general__purpose.html#ga95bf272bd4e2dd460dfe330557505c10',1,'cy_sd_host.h']]], ['cy_5fsd_5fhost_5fclk_5framp_5fup_5ftime_5fms',['CY_SD_HOST_CLK_RAMP_UP_TIME_MS',['../group__group__sd__host__macros__general__purpose.html#gaa56807ade05f5f8ff34fa71e8f1f8eb8',1,'cy_sd_host.h']]], - ['cy_5fsd_5fhost_5fclk_5framp_5fup_5ftime_5fms_5fwakeup',['CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP',['../group__group__sd__host__macros__general__purpose.html#gadd91111c5e80b2cc62f1adf75de3183c',1,'cy_sd_host.h']]], + ['cy_5fsd_5fhost_5fclk_5framp_5fup_5ftime_5fus_5fwakeup',['CY_SD_HOST_CLK_RAMP_UP_TIME_US_WAKEUP',['../group__group__sd__host__macros__general__purpose.html#gae6b0b7d64c1290282c330f76b0ccb65d',1,'cy_sd_host.h']]], ['cy_5fsd_5fhost_5fcmd13_5faddress_5ferror',['CY_SD_HOST_CMD13_ADDRESS_ERROR',['../group__group__sd__host__macros__card__status.html#ga7b11b0d8cce7284c6a7628fd2675cb8b',1,'cy_sd_host.h']]], ['cy_5fsd_5fhost_5fcmd13_5fake_5fseq_5ferror',['CY_SD_HOST_CMD13_AKE_SEQ_ERROR',['../group__group__sd__host__macros__card__status.html#gab3cb2578c9f18b85da3c184592c0f3eb',1,'cy_sd_host.h']]], ['cy_5fsd_5fhost_5fcmd13_5fapp_5fcmd',['CY_SD_HOST_CMD13_APP_CMD',['../group__group__sd__host__macros__card__status.html#ga131ce046b41fa05798b27fa900061070',1,'cy_sd_host.h']]], diff --git a/drivers/include/cy_ctb.h b/drivers/include/cy_ctb.h index 760c22b..fba32dc 100644 --- a/drivers/include/cy_ctb.h +++ b/drivers/include/cy_ctb.h @@ -1,12 +1,12 @@ /***************************************************************************//** * \file cy_ctb.h -* \version 1.10.1 +* \version 1.10.2 * * Header file for the CTB driver * ******************************************************************************** * \copyright -* Copyright 2017-2019 Cypress Semiconductor Corporation +* Copyright 2017-2020 Cypress Semiconductor Corporation * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -287,6 +287,12 @@ *
VersionChangesReason for Change
2.50.3 Add section Known Issues Documentation update and clarification.
2.50.1 Used the core library defines for the message codes forming. Improve PDL code base.
2.50 Moved following macros to the core library: CY_LO8,CY_HI8,CY_LO16,CY_HI16,CY_SWAP_ENDIAN16,CY_SWAP_ENDIAN32, CY_SWAP_ENDIAN64,CY_GET_REG8,CY_SET_REG8,CY_GET_REG16,CY_SET_REG16, CY_GET_REG24,CY_SET_REG24,CY_GET_REG32,CY_SET_REG32,_CLR_SET_FLD32U, CY_REG32_CLR_SET,_CLR_SET_FLD16U,CY_REG16_CLR_SET,_CLR_SET_FLD8U, CY_REG8_CLR_SET,_BOOL2FLD,_FLD2BOOL,CY_SYSLIB_DIV_ROUND, CY_SYSLIB_DIV_ROUNDUP,CY_NOINIT,CY_SECTION,CY_UNUSED,CY_NOINLINE, CY_ALIGN,CY_RAMFUNC_BEGIN,CY_RAMFUNC_END. Use at least version 1.1 of the core library: https://github.com/cypresssemiconductorco/core-lib. Improve PDL code base.
* * +* +* +* +* +* * * * diff --git a/drivers/include/cy_sd_host.h b/drivers/include/cy_sd_host.h index ca98f6e..989dafb 100644 --- a/drivers/include/cy_sd_host.h +++ b/drivers/include/cy_sd_host.h @@ -1,8 +1,8 @@ /***************************************************************************//** * \file cy_sd_host.h -* \version 1.40 +* \version 1.50 * -* This file provides constants and parameter values for +* This file provides constants and parameter values for * the SD Host Controller driver. * ******************************************************************************** @@ -26,14 +26,14 @@ /** * \addtogroup group_sd_host * \{ -* This driver provides the user an easy method for accessing standard +* This driver provides the user an easy method for accessing standard * Host Controller Interface (HCI) registers and provides some simple -* functionality on top of the HCI for reading and writing data to +* functionality on top of the HCI for reading and writing data to * an SD card, eMMc card or a SDIO device. * -* The functions and other declarations used in this driver are in cy_sd_host.h. -* You can include cy_pdl.h (ModusToolbox only) to get access to all functions -* and declarations in the PDL. +* The functions and other declarations used in this driver are in cy_sd_host.h. +* You can include cy_pdl.h (ModusToolbox only) to get access to all functions +* and declarations in the PDL. * * Features: * * Supports data transfer using CPU, SDMA, ADMA2 and ADMA3 modes @@ -45,8 +45,8 @@ * * - Supports the 4-bit interface * * - Supports Ultra High Speed (UHS-I) mode * * - Supports Default Speed (DS), High Speed (HS), SDR12, SDR25 and SDR50 speed modes -* * - Supports SDIO card interrupts in both 1-bit and 4-bit modes -* * - Supports Standard capacity (SDSC), High capacity (SDHC) +* * - Supports SDIO card interrupts in both 1-bit and 4-bit modes +* * - Supports Standard capacity (SDSC), High capacity (SDHC) * and Extended capacity (SDXC) memory * * - Supports CRC and check for command and data packets * * - Supports packet timeouts @@ -57,7 +57,7 @@ * * - Supports CRC and check for command and data packets * * - Supports packet timeouts * -* Unsupported Features: +* Unsupported Features: * * Wrap address transfers * * eMMC boot operation * * Suspend/Resume operation in an SDIO card @@ -68,20 +68,20 @@ * * Command queuing * * The SD, eMMC, and SDIO cards have the similar physical interface: -* clock, command line, and data lines. +* clock, command line, and data lines. * The SD card is removable and requires the SD card connector to connect -* to the PSoC device. This connector also has the card_mech_write_prot switch +* to the PSoC device. This connector also has the card_mech_write_prot switch * for mechanical write protection and the card_detect_n switch for card detection. * The eMMC card also has DAT4-DAT7 pins for 8-bit mode and the EMMC_RESET pin. * \image html sd_card_connector.png -* The driver has a low-level and high-level APIs. -* The low-level functions provide an easy method to read and write registers. -* Also, these functions allow valid interaction with an SD Card, eMMC card, +* The driver has a low-level and high-level APIs. +* The low-level functions provide an easy method to read and write registers. +* Also, these functions allow valid interaction with an SD Card, eMMC card, * and SDIO card. * The high-level functions provide an easy mechanism to enumerate a device, -* read, write, and erase data. They are RTOS-friendly. -* When starting a command, these functions do not wait until the command completes. -* The interrupt and flags are used to check when the transfer completes. +* read, write, and erase data. They are RTOS-friendly. +* When starting a command, these functions do not wait until the command completes. +* The interrupt and flags are used to check when the transfer completes. * This allows to put RTOS delays in the user code. * * \section group_sd_host_section_Configuration_Considerations Configuration Considerations @@ -104,7 +104,7 @@ * * \subsection group_sd_host_pins Assign and Configure Pins * Only dedicated SD Host pins can be used for SD Host operation. The HSIOM -* register must be configured to connect the block to the pins. Also, the SD Host +* register must be configured to connect the block to the pins. Also, the SD Host * pins must be configured in Strong Drive, Input buffer on: * * \snippet sd_host/snippet/main.c SD_HOST_CFG_PINS @@ -115,15 +115,15 @@ * \snippet sd_host/snippet/main.c SD_HOST_CFG_ASSIGN_CLOCK * * \subsection group_sd_host_intr Configure Interrupt (Optional) -* The user can set up the interrupt for SD Host operation. +* The user can set up the interrupt for SD Host operation. * The user is responsible for writing its own Interrupt handler. * The Interrupt must be called in the interrupt handler for the selected SDHC * instance. Also this interrupt must be enabled in the NVIC otherwise * it will not work. -* It is the user's responsibility to clear the normal and error interrupt statuses. -* The interrupt statuses can be read using \ref Cy_SD_Host_GetNormalInterruptStatus -* and \ref Cy_SD_Host_GetErrorInterruptStatus. -* To clear the interrupt statuses, use \ref Cy_SD_Host_ClearNormalInterruptStatus +* It is the user's responsibility to clear the normal and error interrupt statuses. +* The interrupt statuses can be read using \ref Cy_SD_Host_GetNormalInterruptStatus +* and \ref Cy_SD_Host_GetErrorInterruptStatus. +* To clear the interrupt statuses, use \ref Cy_SD_Host_ClearNormalInterruptStatus * and \ref Cy_SD_Host_ClearErrorInterruptStatus. * * \snippet sd_host/snippet/main.c SD_HOST_INTR_A @@ -131,8 +131,8 @@ * * \subsection group_sd_host_config Configure SD Host * To set up the SD Host driver, provide the configuration parameters in the -* \ref cy_stc_sd_host_init_config_t structure. Set the emmc parameter to true for -* the eMMC-device, otherwise set it to false. Set dmaType if DMA mode +* \ref cy_stc_sd_host_init_config_t structure. Set the emmc parameter to true for +* the eMMC-device, otherwise set it to false. Set dmaType if DMA mode * is used for read/write operations. The other parameters are optional for * operation. To initialize the driver, call the \ref Cy_SD_Host_Init * function providing a pointer to the filled \ref cy_stc_sd_host_init_config_t @@ -140,13 +140,13 @@ * * \snippet sd_host/snippet/main.c SD_HOST_CONTEXT * \snippet sd_host/snippet/main.c SD_HOST_CFG -* +* * The SD, eMMC or SDIO card can be configured using the \ref Cy_SD_Host_InitCard * function as a pointer to the filled \ref cy_stc_sd_host_sd_card_config_t * structure and allocated \ref cy_stc_sd_host_context_t. * * \subsection group_sd_host_card_init Initialize the card -* Finally, enable the card operation calling +* Finally, enable the card operation calling * \ref Cy_SD_Host_InitCard. * * \snippet sd_host/snippet/main.c SD_HOST_ENABLE_CARD_INIT @@ -162,21 +162,21 @@ * * \subsubsection group_sd_host_master_hl Use High-Level Functions * Call \ref Cy_SD_Host_Read or \ref Cy_SD_Host_Write to -* communicate with the SD memory device. These functions do not block -* in DMA mode and only start a transaction. After a transaction starts, +* communicate with the SD memory device. These functions do not block +* in DMA mode and only start a transaction. After a transaction starts, * the user should check the further data-transaction complete event. * The example below shows sending and reading data in DMA mode. * * \snippet sd_host/snippet/main.c SD_HOST_WRITE_READ_ADMA2 * * \subsubsection group_sd_host_master_ll Use Low-Level Functions -* Call \ref Cy_SD_Host_InitDataTransfer to initialize the SD block -* for a data transfer. It does not start a transfer. To start a transfer -* call \ref Cy_SD_Host_SendCommand after calling this function. -* If DMA is not used for Data transfer then the buffer needs to be filled +* Call \ref Cy_SD_Host_InitDataTransfer to initialize the SD block +* for a data transfer. It does not start a transfer. To start a transfer +* call \ref Cy_SD_Host_SendCommand after calling this function. +* If DMA is not used for Data transfer then the buffer needs to be filled * with data first if this is a write. * Wait the transfer complete event. -* ADMA3 mode requires calling \ref Cy_SD_Host_InitDataTransfer to +* ADMA3 mode requires calling \ref Cy_SD_Host_InitDataTransfer to * initialize the DMA transaction. The ADMA3 mode example is shown below. * * \snippet sd_host/snippet/main.c SD_HOST_WRITE_READ_ADMA3 @@ -185,46 +185,46 @@ * eMMC cards use the same API for writing and reading data. * Additionally, eMMC requires configuring GPIO pins for DAT signals * in 8-bit mode and card_emmc_reset_n pin if needed. -* The emmc member of \ref cy_stc_sd_host_init_config_t structure must +* The emmc member of \ref cy_stc_sd_host_init_config_t structure must * be set to "true". * * \subsection group_sd_host_sdio_combo_card_mode eMMC SDIO or Combo Card Operation -* \ref Cy_SD_Host_InitCard() initializes all types of cards and +* \ref Cy_SD_Host_InitCard() initializes all types of cards and * automatically detects the card type: SD, SDIO or Combo card. -* SDIO cards have their input-output (I/O) functions that can be -* controlled using the GPIO driver. +* SDIO cards have their input-output (I/O) functions that can be +* controlled using the GPIO driver. * Combo Cards can use both I/O and memory API. * * \section group_sd_host_lp Low Power Support * The SD Host does not operate in Hibernate and Deep Sleep modes but it * can automatically continue write/read operation after restoring from -* Deep Sleep mode. SD CLK must be disabled before going to Deep Sleep mode +* Deep Sleep mode. SD CLK must be disabled before going to Deep Sleep mode * and can be enabled after wake up from Deep Sleep mode. -* To reduce the power consumption in Active mode, the user can stop -* the clock of the SD bus but the following interrupts can be allowed: -* Card Insert, Card Removal and SDIO Interrupt. +* To reduce the power consumption in Active mode, the user can stop +* the clock of the SD bus but the following interrupts can be allowed: +* Card Insert, Card Removal and SDIO Interrupt. * * \section group_sd_host_remove_insert SD Card Removal and Insertion -* SD card removal or insertion can be detected by calling -* \ref Cy_SD_Host_GetNormalInterruptStatus which returns -* the card removal or card insertion events -* (CY_SD_HOST_CARD_REMOVAL or CY_SD_HOST_CARD_INSERTION bits). -* These events should be reset using -* \ref Cy_SD_Host_ClearNormalInterruptStatus when they occur. -* When the card is removed, the SDHC block disables the CMD/DAT output. -* It is recommended to set DAT pins to -* the Digital High-Z (CY_GPIO_DM_HIGHZ) drive mode when -* card removal is detected. This can be doing using the GPIO driver. -* When the card is inserted, the SDHC block automatically disables -* the card power and clock. After card insertion, -* the user should set the DAT pins drive mode back to Strong Drive, +* SD card removal or insertion can be detected by calling +* \ref Cy_SD_Host_GetNormalInterruptStatus which returns +* the card removal or card insertion events +* (CY_SD_HOST_CARD_REMOVAL or CY_SD_HOST_CARD_INSERTION bits). +* These events should be reset using +* \ref Cy_SD_Host_ClearNormalInterruptStatus when they occur. +* When the card is removed, the SDHC block disables the CMD/DAT output. +* It is recommended to set DAT pins to +* the Digital High-Z (CY_GPIO_DM_HIGHZ) drive mode when +* card removal is detected. This can be doing using the GPIO driver. +* When the card is inserted, the SDHC block automatically disables +* the card power and clock. After card insertion, +* the user should set the DAT pins drive mode back to Strong Drive, * Input buffer on (CY_GPIO_DM_STRONG), and then call \ref Cy_SD_Host_InitCard. -* \note If CARD_INTERRUPT is enabled and DAT pins are not set to -* Digital High-Z drive mode then the interrupt will continuously -* trigger because the DAT1 line is driven low upon card re-insertion. -* The user will have to detect the card removal in the ISR handler, -* apply the power to the card using \ref Cy_SD_Host_EnableCardVoltage, -* set to the DAT pins drive mode to the Digital High-Z (CY_GPIO_DM_HIGHZ) +* \note If CARD_INTERRUPT is enabled and DAT pins are not set to +* Digital High-Z drive mode then the interrupt will continuously +* trigger because the DAT1 line is driven low upon card re-insertion. +* The user will have to detect the card removal in the ISR handler, +* apply the power to the card using \ref Cy_SD_Host_EnableCardVoltage, +* set to the DAT pins drive mode to the Digital High-Z (CY_GPIO_DM_HIGHZ) * and clear CY_SD_HOST_CARD_INTERRUPT bit * using \ref Cy_SD_Host_ClearNormalInterruptStatus. * @@ -233,15 +233,15 @@ * during the card initialization. The SD Host driver always starts talking * to the card at 3.3V and then later switches to 1.8V. There is no internal * regulator in the PSoC 6 to change SD signals from 3.3V to 1.8V. -* Thus, an external regulator is needed for the VDDIO of the PSoC device -* to provide the ability to go from 3.3V to 1.8V. -* The SD Host driver sets the io_volt_sel pin to high which is used to -* control the external regulator. +* Thus, an external regulator is needed for the VDDIO of the PSoC device +* to provide the ability to go from 3.3V to 1.8V. +* The SD Host driver sets the io_volt_sel pin to high which is used to +* control the external regulator. * \image html sd_host_low_voltage_signaling.png * * \section group_sd_host_more_information More Information * -* Refer to the appropriate device technical reference manual (TRM) for +* Refer to the appropriate device technical reference manual (TRM) for * a detailed description of the registers. * * \section group_sd_host_MISRA MISRA-C Compliance @@ -275,9 +275,17 @@ *
VersionChangesReason for Change
1.10.2The \ref Cy_CTB_Init function description is expanded with a +* clarification note.Documentation enhancement based on a usability feedback.
1.10.1Added header guard CY_IP_MXS40PASS to the source file.To enable the PDL compilation with wounded out IP blocks.
* * +* +* +* +* +* * -* +* * * * @@ -304,7 +312,7 @@ * *
VersionChangesReason for Change
1.50The default value of the SD-clock rump-up time during a wakeup +* from Deep Sleep is reduced to 1 us, for details, +* see \ref Cy_SD_Host_DeepSleepCallback description.Optimization for cases of specific wakeup timing requirements.
1.40Added a possibility to customize the SD clock rump up time during wakeup from deep sleep, -* see \ref Cy_SD_Host_DeepSleepCallback description for details.Added a possibility to +* customize the SD-clock rump-up time during a wakeup from Deep Sleep, +* for details, see \ref Cy_SD_Host_DeepSleepCallback description.Workaround for cases of specific wakeup timing requirements.
1.10The PLL and CLK disable sequence in \ref Cy_SD_Host_DisableSdClk() * is changed to disable CLK first.
-* The Low-Power Support section is updated with additional +* The Low-Power Support section is updated with additional * information about disabling CLK.
* The context initialization in \ref Cy_SD_Host_Init() is corrected.
* Updated the Write/Read sequence in \ref Cy_SD_Host_Read() and @@ -324,23 +332,23 @@ * \defgroup group_sd_host_macros_general_purpose General Purpose Macros * \defgroup group_sd_host_macros_card_states Card States * \{ -* The masks below can be used to check the CURRENT_STATE bitfield -* of the \ref Cy_SD_Host_GetCardStatus function return value. +* The masks below can be used to check the CURRENT_STATE bitfield +* of the \ref Cy_SD_Host_GetCardStatus function return value. * \} * \defgroup group_sd_host_macros_card_status Card Status (CMD13) Bits * \{ -* The masks below can be used with the -* \ref Cy_SD_Host_GetCardStatus function. +* The masks below can be used with the +* \ref Cy_SD_Host_GetCardStatus function. * \} * \defgroup group_sd_host_macros_scr SCR Register Masks * \{ -* The masks below can be used with the -* \ref Cy_SD_Host_GetScr function. +* The masks below can be used with the +* \ref Cy_SD_Host_GetScr function. * \} * \defgroup group_sd_host_macros_cid CID Register Masks * \{ -* The masks below can be used with the -* \ref Cy_SD_Host_GetCid function. +* The masks below can be used with the +* \ref Cy_SD_Host_GetCid function. * \} * \defgroup group_sd_host_macros_csd CSD Register Masks * \{ @@ -349,18 +357,18 @@ * \} * \defgroup group_sd_host_macros_events SD Host Events * \{ -* The constants below can be used with -* \ref Cy_SD_Host_GetNormalInterruptStatus, -* \ref Cy_SD_Host_ClearNormalInterruptStatus, -* \ref Cy_SD_Host_GetErrorInterruptStatus and -* \ref Cy_SD_Host_ClearErrorInterruptStatus functions. +* The constants below can be used with +* \ref Cy_SD_Host_GetNormalInterruptStatus, +* \ref Cy_SD_Host_ClearNormalInterruptStatus, +* \ref Cy_SD_Host_GetErrorInterruptStatus and +* \ref Cy_SD_Host_ClearErrorInterruptStatus functions. * Each event is encoded in a separate bit, and therefore it is possible to * notify about multiple events. * \} * \defgroup group_sd_host_macros_present_status SD Host Present Status * \{ -* The constants below can be used with the -* \ref Cy_SD_Host_GetPresentState function. +* The constants below can be used with the +* \ref Cy_SD_Host_GetPresentState function. * Each status is encoded in a separate bit, and therefore it is possible to * notify about multiple statuses. * \} @@ -388,7 +396,7 @@ #if defined(CY_IP_MXSDHC) #if defined (__CC_ARM) - #pragma anon_unions + #pragma anon_unions #endif /* C binding of definitions if building with C++ compiler */ @@ -416,8 +424,8 @@ extern "C" #define CY_SD_HOST_BLOCK_SIZE (512UL) /**< The SD memory card block size. */ -#define CY_SD_HOST_SDSC_ADDR_SHIFT (9U) /**< This constant is used to get the - * address for the SDSC card using the +#define CY_SD_HOST_SDSC_ADDR_SHIFT (9U) /**< This constant is used to get the + * address for the SDSC card using the * shift operation instead of multiply to 512. */ @@ -427,11 +435,22 @@ extern "C" #define CY_SD_HOST_CLK_100M (100UL * 1000UL * 1000UL) /**< Clk = 100 MHz. */ #define CY_SD_HOST_CLK_RAMP_UP_TIME_MS (100UL) /**< The host power ramp up time. */ -#ifndef CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP -#define CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP (CY_SD_HOST_CLK_RAMP_UP_TIME_MS) /**< The host power ramp up time during wake up from deep sleep. */ -#endif /* !defined CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP */ -/* ADMA constants. */ +#ifndef CY_SD_HOST_CLK_RAMP_UP_TIME_US_WAKEUP /* Define of the CY_SD_HOST_CLK_RAMP_UP_TIME_US_WAKEUP + * suppresses CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP + */ + #ifndef CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP /* + * This is legacy constant. + * It is left here just for backward compatibility. + * Do not use it in new designs. + */ + #define CY_SD_HOST_CLK_RAMP_UP_TIME_US_WAKEUP (1U) /**< The default host power ramp up time during wake up from deep sleep. */ + #else + #define CY_SD_HOST_CLK_RAMP_UP_TIME_US_WAKEUP (CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP * 1000U) + #endif /* !defined CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP */ +#endif /* !defined CY_SD_HOST_CLK_RAMP_UP_TIME_US_WAKEUP */ + +/* ADMA constants. */ #define CY_SD_HOST_ADMA_NOP (0x0UL) /**< Does not execute the current line and go to next line. */ #define CY_SD_HOST_ADMA_RSV (0x2UL) /**< Reserved. */ #define CY_SD_HOST_ADMA_TRAN (0x4UL) /**< Transfers data of one descriptor line. */ @@ -481,17 +500,17 @@ extern "C" * \{ */ -#define CY_SD_HOST_CMD13_OUT_OF_RANGE (31U) /**< The command's argument is out of range. */ -#define CY_SD_HOST_CMD13_ADDRESS_ERROR (30U) /**< The address does not match the block length. */ -#define CY_SD_HOST_CMD13_BLOCK_LEN_ERROR (29U) /**< The block length is not allowed for this card. */ -#define CY_SD_HOST_CMD13_ERASE_SEQ_ERROR (28U) /**< An error in the sequence of erase commands occurred. */ -#define CY_SD_HOST_CMD13_ERASE_PARAM (27U) /**< An invalid selection of write blocks for erase occurred. */ -#define CY_SD_HOST_CMD13_WP_VIOLATION (26U) /**< The host attempts to write to a protected block - * or to the permanent write-protected card. - */ +#define CY_SD_HOST_CMD13_OUT_OF_RANGE (31U) /**< The command's argument is out of range. */ +#define CY_SD_HOST_CMD13_ADDRESS_ERROR (30U) /**< The address does not match the block length. */ +#define CY_SD_HOST_CMD13_BLOCK_LEN_ERROR (29U) /**< The block length is not allowed for this card. */ +#define CY_SD_HOST_CMD13_ERASE_SEQ_ERROR (28U) /**< An error in the sequence of erase commands occurred. */ +#define CY_SD_HOST_CMD13_ERASE_PARAM (27U) /**< An invalid selection of write blocks for erase occurred. */ +#define CY_SD_HOST_CMD13_WP_VIOLATION (26U) /**< The host attempts to write to a protected block + * or to the permanent write-protected card. + */ #define CY_SD_HOST_CMD13_CARD_IS_LOCKED (25U) /**< The card is locked by the host. */ -#define CY_SD_HOST_CMD13_LOCK_ULOCK_FAILED (24U) /**< A sequence or password error occurred - * has been detected in the lock/unlock card command. +#define CY_SD_HOST_CMD13_LOCK_ULOCK_FAILED (24U) /**< A sequence or password error occurred + * has been detected in the lock/unlock card command. */ #define CY_SD_HOST_CMD13_COM_CRC_ERROR (23U) /**< The CRC of the previous command failed. */ #define CY_SD_HOST_CMD13_ILLEGAL_COMMAND (22U) /**< The command is not legal for the card state. */ @@ -499,29 +518,29 @@ extern "C" #define CY_SD_HOST_CMD13_CC_ERROR (20U) /**< An internal card-controller error. */ #define CY_SD_HOST_CMD13_ERROR (19U) /**< A general or unknown error occurred. */ #define CY_SD_HOST_CMD13_CSD_OVERWRITE (16U) /**< Can be either one of the following - * errors: + * errors: * - The read only section of the CSD * does not match the card content. * - An attempt to reverse the copy (set * as original) or permanent WP - * (unprotected) bits was made. + * (unprotected) bits was made. */ #define CY_SD_HOST_CMD13_WP_ERASE_SKIP (15U) /**< Set when only partial address space - * was erased due to existing write protected blocks + * was erased due to existing write protected blocks * or a temporary or permanent write protected - * card was erased. + * card was erased. */ #define CY_SD_HOST_CMD13_CARD_ECC_DISABLED (14U) /**< The command has been executed - * without using the internal ECC. - */ + * without using the internal ECC. + */ #define CY_SD_HOST_CMD13_CURRENT_STATE (9U) /**< The state of the card. */ #define CY_SD_HOST_CMD13_READY_FOR_DATA (8U) /**< The buffer is empty on the bus. */ #define CY_SD_HOST_CMD13_APP_CMD (5U) /**< The card will expect ACMD, or an * indication that the command has - * been interpreted as ACMD. + * been interpreted as ACMD. */ #define CY_SD_HOST_CMD13_AKE_SEQ_ERROR (3U) /**< Error in the sequence of the - * authentication process. + * authentication process. */ #define CY_SD_HOST_CMD13_CURRENT_STATE_MSK (0x00001E00UL) /**< The current state mask of the card. */ @@ -533,26 +552,26 @@ extern "C" * \{ */ -#define CY_SD_HOST_SCR_SCR_STRUCTURE (0x000000F0UL) /**< Version number of the related SCR structure +#define CY_SD_HOST_SCR_SCR_STRUCTURE (0x000000F0UL) /**< Version number of the related SCR structure * in the SD Memory Card Physical Layer Specification. */ #define CY_SD_HOST_SCR_SD_SPEC (0x0000000FUL) /**< Describes the SD Memory Card Physical Layer * Specification version supported by this card. */ - -#define CY_SD_HOST_SCR_DATA_STAT_AFTER_ERASE (0x00008000UL) /**< Defines the data status after erase, - * whether it is '0' or '1' (the status is + +#define CY_SD_HOST_SCR_DATA_STAT_AFTER_ERASE (0x00008000UL) /**< Defines the data status after erase, + * whether it is '0' or '1' (the status is * card vendor dependent). */ -#define CY_SD_HOST_SCR_SD_SECURITY (0x00007000UL) /**< Describes the security algorithm +#define CY_SD_HOST_SCR_SD_SECURITY (0x00007000UL) /**< Describes the security algorithm * supported by the card. */ -#define CY_SD_HOST_SCR_SD_BUS_WIDTHS (0x00000F00UL) /**< Describes all the DAT bus widths that +#define CY_SD_HOST_SCR_SD_BUS_WIDTHS (0x00000F00UL) /**< Describes all the DAT bus widths that * are supported by this card. - */ + */ /** \} group_sd_host_macros_scr */ @@ -561,67 +580,67 @@ extern "C" * \{ */ -#define CY_SD_HOST_SCR_CID_MDT (0x00000FFFUL) /**< The manufacturing date is composed of - * two hexadecimal digits (contained in cid[0]), - * one is 8 bits representing the year(y) and the +#define CY_SD_HOST_SCR_CID_MDT (0x00000FFFUL) /**< The manufacturing date is composed of + * two hexadecimal digits (contained in cid[0]), + * one is 8 bits representing the year(y) and the * other is 4 bits representing the month (m). * The "m" field [11:8] is the month code. 1 = January. * The "y" field [19:12] is the year code. 0 = 2000. - * As an example, the binary value of the Date field - * for production date "April 2018" will be: + * As an example, the binary value of the Date field + * for production date "April 2018" will be: * 00010010 0100. */ - -#define CY_SD_HOST_SCR_CID_PSN_LSB (0xFFFF0000UL) /**< The mask for LSB part of the Serial Number - * (contained in cid[0]). The Serial Number is + +#define CY_SD_HOST_SCR_CID_PSN_LSB (0xFFFF0000UL) /**< The mask for LSB part of the Serial Number + * (contained in cid[0]). The Serial Number is * 32 bits of binary number. */ -#define CY_SD_HOST_SCR_CID_PSN_MSB (0x0000FFFFUL) /**< The mask for MSB part of the Serial Number - * (contained in cid[1]). The Serial Number is +#define CY_SD_HOST_SCR_CID_PSN_MSB (0x0000FFFFUL) /**< The mask for MSB part of the Serial Number + * (contained in cid[1]). The Serial Number is * 32 bits of binary number. */ - -#define CY_SD_HOST_SCR_CID_PRV (0x00FF0000UL) /**< The product revision is composed of two - * Binary Coded Decimal (BCD) digits (contained in cid[1]), - * four bits each, representing an "n.m" revision number. + +#define CY_SD_HOST_SCR_CID_PRV (0x00FF0000UL) /**< The product revision is composed of two + * Binary Coded Decimal (BCD) digits (contained in cid[1]), + * four bits each, representing an "n.m" revision number. * The "n" is the most significant nibble and "m" is the * least significant nibble. - * As an example, the PRV binary value field for product + * As an example, the PRV binary value field for product * revision "6.2" will be: 0110 0010b. */ -#define CY_SD_HOST_SCR_CID_PNM_LSB (0xFF000000UL) /**< The mask for LSB part (the first 8 bits) of the - * product name (contained in cid[1]). The product - * name is a string, 5-character ASCII string. - * As an example, the PNM hex value field for product name +#define CY_SD_HOST_SCR_CID_PNM_LSB (0xFF000000UL) /**< The mask for LSB part (the first 8 bits) of the + * product name (contained in cid[1]). The product + * name is a string, 5-character ASCII string. + * As an example, the PNM hex value field for product name * "EB1QT" will be: 0x4542315154. */ - -#define CY_SD_HOST_SCR_CID_PNM_MSB (0xFFFFFFFFUL) /**< The mask for MSB part (the last 32 bits) of the - * product name (contained in cid[2]). The product + +#define CY_SD_HOST_SCR_CID_PNM_MSB (0xFFFFFFFFUL) /**< The mask for MSB part (the last 32 bits) of the + * product name (contained in cid[2]). The product * name is a string, 5-character ASCII string. - * As an example, the PNM hex value field for product name + * As an example, the PNM hex value field for product name * "EB1QT" will be: 0x4542315154. */ -#define CY_SD_HOST_SCR_CID_OID (0x0000FFFFUL) /**< The mask for the OID (contained in cid[3]). +#define CY_SD_HOST_SCR_CID_OID (0x0000FFFFUL) /**< The mask for the OID (contained in cid[3]). * The OID is a 2-character ASCII string that - * identifies the card OEM and/or the card contents - * (when used as a distribution media either on ROM or - * FLASH cards). The OID number is controlled, defined, - * and allocated to a SD Memory Card manufacturer by - * the SD-3C, LLC. This procedure is established to ensure + * identifies the card OEM and/or the card contents + * (when used as a distribution media either on ROM or + * FLASH cards). The OID number is controlled, defined, + * and allocated to a SD Memory Card manufacturer by + * the SD-3C, LLC. This procedure is established to ensure * uniqueness of the CID register. - * As an example, the OID hex value field for the card OEM + * As an example, the OID hex value field for the card OEM * "SM" will be: 0x534D. */ -#define CY_SD_HOST_SCR_CID_MID (0x00FF0000UL) /**< The mask for the MID (contained in cid[3]). - * MID is a 8-bit binary number that identifies the - * card manufacturer. The MID number is controlled, +#define CY_SD_HOST_SCR_CID_MID (0x00FF0000UL) /**< The mask for the MID (contained in cid[3]). + * MID is a 8-bit binary number that identifies the + * card manufacturer. The MID number is controlled, * defined, and allocated to a SD Memory Card manufacturer - * by the SD-3C, LLC. This procedure is established to + * by the SD-3C, LLC. This procedure is established to * ensure uniqueness of the CID register. */ @@ -638,10 +657,10 @@ extern "C" * This field is fixed to 0Eh, which indicates 1 ms. */ -#define CY_SD_HOST_CSD_V2_NSAC (0x000000FFUL) /**< The data read access-time in CLK cycles (NSAC*100) +#define CY_SD_HOST_CSD_V2_NSAC (0x000000FFUL) /**< The data read access-time in CLK cycles (NSAC*100) * (contained in csd[3]). * This field is fixed to 00h. NSAC should not - * be used to calculate time-out values + * be used to calculate time-out values * for CSD Version 2.0. */ @@ -650,69 +669,69 @@ extern "C" */ #define CY_SD_HOST_CSD_V2_CCC (0x00FFF000UL) /**< The card command classes (contained in csd[2]). - * The card command class register CCC defines which - * command classes are supported by this card. - * A value of 1 in a CCC bit means that the + * The card command class register CCC defines which + * command classes are supported by this card. + * A value of 1 in a CCC bit means that the * corresponding command class is supported. */ #define CY_SD_HOST_CSD_V2_READ_BL_LEN (0x00000F00UL) /**< The max. read data block length (contained in csd[2]). - * This field is fixed to 9h, which + * This field is fixed to 9h, which * indicates READ_BL_LEN=512 Byte. */ #define CY_SD_HOST_CSD_V2_READ_BL_PARTIAL (0x00000080UL) /**< The partial blocks for read allowed (contained in csd[2]). - * This field is fixed to 0, which indicates - * partial block read is inhibited and only unit + * This field is fixed to 0, which indicates + * partial block read is inhibited and only unit * of block access is allowed. */ #define CY_SD_HOST_CSD_V2_WRITE_BLK_MISALIGN (0x00000040UL) /**< The write block misalignment (contained in csd[2]). - * This field is fixed to 0, which indicates - * write access crossing physical block boundaries + * This field is fixed to 0, which indicates + * write access crossing physical block boundaries * is always disabled in High Capacity SD Memory Card. */ #define CY_SD_HOST_CSD_V2_READ_BLK_MISALIGN (0x00000020UL) /**< The read block misalignment (contained in csd[2]). - * This field is fixed to 0, which indicates - * read access crossing physical block boundaries + * This field is fixed to 0, which indicates + * read access crossing physical block boundaries * is always disabled in High Capacity SD Memory Card. */ #define CY_SD_HOST_CSD_V2_DSR_IMP (0x00000010UL) /**< The DSR implemented (contained in csd[2]). - * Defines if the configurable driver stage is + * Defines if the configurable driver stage is * integrated on the card. */ #define CY_SD_HOST_CSD_V2_C_SIZE_MASK (0x3FFFFF00UL) /**< The device size (contained in csd[1]). - * This parameter is used to calculate the - * user data area capacity in the SD memory card + * This parameter is used to calculate the + * user data area capacity in the SD memory card * (not include the protected area). - * The user data area capacity is calculated + * The user data area capacity is calculated * from C_SIZE as follows: * memory capacity = (C_SIZE+1) * 512K byte. */ #define CY_SD_HOST_CSD_V2_ERASE_BLK_EN (0x00000040UL) /**< The erase single block enable (contained in csd[1]). - * This field is fixed to 1, which means the + * This field is fixed to 1, which means the * host can erase one or multiple units of 512 bytes. */ #define CY_SD_HOST_CSD_V2_SECTOR_SIZE_MSB (0x0000003FUL) /**< The MSB of erase sector size (6 MSB bits contained in csd[1]). - * SECTOR_SIZE is fixed to 7Fh, which indicates 64 KBytes. - * This value does not relate to erase operation. - * Version 2.00 cards indicates memory boundary by + * SECTOR_SIZE is fixed to 7Fh, which indicates 64 KBytes. + * This value does not relate to erase operation. + * Version 2.00 cards indicates memory boundary by * AU size and this field should not be used. */ -#define CY_SD_HOST_CSD_V2_SECTOR_SIZE_LSB (0x80000000UL) /**< The LSB of erase sector size +#define CY_SD_HOST_CSD_V2_SECTOR_SIZE_LSB (0x80000000UL) /**< The LSB of erase sector size * (1 LSB bit of SECTOR_SIZE contained in csd[0]). */ #define CY_SD_HOST_CSD_V2_WP_GRP_SIZE (0x7F000000UL) /**< The write protect group size (contained in csd[0]). * This field is fixed to 00h. The High Capacity * SD Memory Card does not support write protected groups. - */ + */ #define CY_SD_HOST_CSD_V2_WP_GRP_ENABLE (0x00800000UL) /**< The write protect group enable (contained in csd[0]). * This field is fixed to 0. The High Capacity SD Memory @@ -721,52 +740,52 @@ extern "C" #define CY_SD_HOST_CSD_V2_R2W_FACTOR (0x001C0000UL) /**< The write speed factor (contained in csd[0]). * This field is fixed to 2h, which indicates 4 multiples. - */ + */ #define CY_SD_HOST_CSD_V2_WRITE_BL_LEN (0x0003C000UL) /**< The max. write data block length (contained in csd[0]). - * This field is fixed to 9h, which indicates + * This field is fixed to 9h, which indicates * WRITE_BL_LEN=512 Byte. - */ + */ #define CY_SD_HOST_CSD_V2_WRITE_BL_PARTIAL (0x00002000UL) /**< The partial blocks for write allowed (contained in csd[0]). - * This field is fixed to 0, which indicates partial - * block read is inhibited and only unit of block + * This field is fixed to 0, which indicates partial + * block read is inhibited and only unit of block * access is allowed. */ - + #define CY_SD_HOST_CSD_V2_FILE_FORMAT_GRP (0x00000080UL) /**< The File format group (contained in csd[0]). * This field is set to 0. Host should not use this field. - */ + */ #define CY_SD_HOST_CSD_V2_COPY (0x00000040UL) /**< The copy flag (OTP) (contained in csd[0]). - * Defines if the contents is original (=0) or - * has been copied (=1). The COPY bit for OTP and MTP - * devices, sold to end consumers, is set to 1, - * which identifies the card contents as a copy. + * Defines if the contents is original (=0) or + * has been copied (=1). The COPY bit for OTP and MTP + * devices, sold to end consumers, is set to 1, + * which identifies the card contents as a copy. * The COPY bit is a one time programmable bit. */ #define CY_SD_HOST_CSD_V2_PERM_WRITE_PROTECT (0x00000020UL) /**< The permanent write protection (contained in csd[0]). - * Permanently protects the entire card content - * against overwriting or erasing (all write and erase - * commands for this card are permanently disabled). - * The default value is 0, i.e. not permanently write + * Permanently protects the entire card content + * against overwriting or erasing (all write and erase + * commands for this card are permanently disabled). + * The default value is 0, i.e. not permanently write * protected. - */ + */ #define CY_SD_HOST_CSD_V2_TMP_WRITE_PROTECT (0x00000010UL) /**< The temporary write protection (contained in csd[0]). - * Temporarily protects the entire card content - * from being overwritten or erased (all write - * and erase commands for this card are temporarily - * disabled). This bit can be set and reset. + * Temporarily protects the entire card content + * from being overwritten or erased (all write + * and erase commands for this card are temporarily + * disabled). This bit can be set and reset. * The default value is 0, i.e. not write protected. - */ - + */ + #define CY_SD_HOST_CSD_V2_FILE_FORMAT (0x0000000CUL) /**< The File format (contained in csd[0]). * This field is set to 0. Host should not use this field. - */ - - + */ + + /** \} group_sd_host_macros_csd */ /** @@ -775,57 +794,57 @@ extern "C" */ /** -* Command complete. In SD/eMMC mode, this event is set +* Command complete. In SD/eMMC mode, this event is set * after detecting the end bit of a response except for Auto CMD12 and Auto CMD23. * This event is not generated when the Response Interrupt is disabled. */ #define CY_SD_HOST_CMD_COMPLETE (0x0001U) /** -* Transfer complete. This event is set when a read/write +* Transfer complete. This event is set when a read/write * transfer and a command with the Busy Status are completed. */ #define CY_SD_HOST_XFER_COMPLETE (0x0002U) /** -* Block gap. This event is set when both read/write -* transactions are stopped at the block gap due to a +* Block gap. This event is set when both read/write +* transactions are stopped at the block gap due to a * Stop-at-Block-Gap Request. */ #define CY_SD_HOST_BGAP (0x0004U) /** -* DMA Interrupt. This event is set if the Host Controller -* detects a SDMA Buffer Boundary during a transfer. +* DMA Interrupt. This event is set if the Host Controller +* detects a SDMA Buffer Boundary during a transfer. * For ADMA, the Host controller generates this -* interrupt by setting the Int field in the -* descriptor table. +* interrupt by setting the Int field in the +* descriptor table. * This interrupt is not generated after a Transfer * Complete. */ #define CY_SD_HOST_DMA_INTERRUPT (0x0008U) /** -* The Buffer Write is ready. This event is set if +* The Buffer Write is ready. This event is set if * the Buffer Write Enable changes from 0 to 1. */ #define CY_SD_HOST_BUF_WR_READY (0x0010U) /** -* The Buffer Read is ready. This event is set if +* The Buffer Read is ready. This event is set if * the Buffer Read Enable changes from 0 to 1. */ #define CY_SD_HOST_BUF_RD_READY (0x0020U) /** -* Card insertion. This event is set if +* Card insertion. This event is set if * the Card Inserted in the Present State * register changes from 0 to 1. */ #define CY_SD_HOST_CARD_INSERTION (0x0040U) /** -* Card removal. This event is set if +* Card removal. This event is set if * the Card Inserted in the Present State * register changes from 1 to 0. */ @@ -853,28 +872,28 @@ extern "C" #define CY_SD_HOST_CQE_EVENT (0x4000U) /** -* Error Interrupt. -* If any of the bits in the Error Interrupt Status +* Error Interrupt. +* If any of the bits in the Error Interrupt Status * register are set, then this bit is set. */ #define CY_SD_HOST_ERR_INTERRUPT (0x8000U) /** -* Command timeout error. In SD/eMMC Mode, -* this event is set only if no response is returned +* Command timeout error. In SD/eMMC Mode, +* this event is set only if no response is returned * within 64 SD clock cycles from the end bit of the * command. If the Host Controller detects a CMD line conflict, * along with Command CRC Error bit, this event is set to 1, -* without waiting for 64 SD/eMMC card clock cycles. +* without waiting for 64 SD/eMMC card clock cycles. */ #define CY_SD_HOST_CMD_TOUT_ERR (0x0001U) /** -* Command CRC error. A Command CRC Error is generated +* Command CRC error. A Command CRC Error is generated * in SD/eMMC mode when: * 1. A response is returned and the Command Timeout * Error is set to 0 (indicating no timeout), -* this bit is set to 1 when detecting a CRC error +* this bit is set to 1 when detecting a CRC error * in the command response. * 2. The Host Controller detects a CMD line conflict by * monitoring the CMD line when a command is issued. If @@ -890,14 +909,14 @@ extern "C" /** * Command End Bit error. * This bit is set after detecting that the end bit of a command -* response is 0 in SD/eMMC mode. +* response is 0 in SD/eMMC mode. */ #define CY_SD_HOST_CMD_END_BIT_ERR (0x0004U) /** * Command Index error. * This bit is set if a Command Index error occurs in the -* command response in SD/eMMC mode. +* command response in SD/eMMC mode. */ #define CY_SD_HOST_CMD_IDX_ERR (0x0008U) @@ -1011,7 +1030,7 @@ extern "C" * This bit is applicable for SD/eMMC mode and is generated if * either the DAT line active or Read transfer active is set to 1. If * this bit is set to 0, it indicates that the Host Controller can -* issue subsequent SD/eMMC commands. +* issue subsequent SD/eMMC commands. */ #define CY_SD_HOST_CMD_CMD_INHIBIT_DAT (0x00000002UL) @@ -1025,7 +1044,7 @@ extern "C" * write transfer is executing on the SD/eMMC bus. * For a command with the Busy status, this status indicates whether the * command executing busy is executing on an SD or eMMC -* bus. +* bus. */ #define CY_SD_HOST_DAT_LINE_ACTIVE (0x00000004UL) @@ -1033,7 +1052,7 @@ extern "C" * DAT[7:4] Line Signal Level. * These bits are used to check the DAT line level to recover from * errors and for debugging. These bits reflect the value of the -* sd_dat_in (upper nibble) signal. +* sd_dat_in (upper nibble) signal. */ #define CY_SD_HOST_DAT_7_4 (0x000000F0UL) @@ -1169,8 +1188,8 @@ extern "C" /****************************************************************************** * Enumerations *****************************************************************************/ - -/** SD command types. */ + +/** SD command types. */ typedef enum { CY_SD_HOST_CMD_NORMAL = 0U, /**< Other commands */ @@ -1182,7 +1201,7 @@ typedef enum /** SD Host auto command enable selection. */ typedef enum { - CY_SD_HOST_AUTO_CMD_NONE = 0U, /**< Auto command disable. */ + CY_SD_HOST_AUTO_CMD_NONE = 0U, /**< Auto command disable. */ CY_SD_HOST_AUTO_CMD_12 = 1U, /**< Auto command 12 enable. */ CY_SD_HOST_AUTO_CMD_23 = 2U, /**< Auto command 23 enable. */ CY_SD_HOST_AUTO_CMD_AUTO = 3U /**< Auto command Auto enable. */ @@ -1192,27 +1211,27 @@ typedef enum typedef enum { CY_SD_HOST_RESET_DATALINE = 0U, /**< Reset the data circuit only. */ - CY_SD_HOST_RESET_CMD_LINE = 1U, /**< Reset the command circuit only. */ - CY_SD_HOST_RESET_ALL = 2U /**< Reset the whole SD Host controller. */ + CY_SD_HOST_RESET_CMD_LINE = 1U, /**< Reset the command circuit only. */ + CY_SD_HOST_RESET_ALL = 2U /**< Reset the whole SD Host controller. */ }cy_en_sd_host_reset_t; /** SD Host error interrupt types. */ typedef enum { CY_SD_HOST_ADMA_ST_STOP = 0U, /**< Stop DMA - The SYS_ADR register points to - * a location next to the error descriptor. + * a location next to the error descriptor. */ CY_SD_HOST_ADMA_ST_FDS = 1U, /**< Fetch Descriptor - The SYS_ADR register - * points to the error descriptor. + * points to the error descriptor. */ CY_SD_HOST_ADMA_ST_TFR = 3U, /**< Transfer Data - SYS_ADR register points - * to a location next to the error descriptor. + * to a location next to the error descriptor. */ CY_SD_HOST_ADMA_LEN_ERR = 4U /**< The ADMA Length Mismatch error. */ }cy_en_sd_host_adma_error_t; /** Auto CMD Status error codes. */ -typedef enum +typedef enum { CY_SD_HOST_AUTO_CMD12_NOT_EXEC = 0U, /**< Auto CMD12 Not Executed. */ CY_SD_HOST_AUTO_CMD_TOUT_ERR = 1U, /**< Auto CMD Timeout Error. */ @@ -1220,11 +1239,11 @@ typedef enum CY_SD_HOST_AUTO_CMD_EBIT_ERR = 3U, /**< Auto CMD End Bit Error. */ CY_SD_HOST_AUTO_CMD_IDX_ERR = 4U, /**< Auto CMD Index Error. */ CY_SD_HOST_AUTO_CMD_RESP_ERR = 5U, /**< Auto CMD Response Error. */ - CY_SD_HOST_CMD_NOT_ISSUED_AUTO_CMD12 = 7U /**< Command Not Issued By Auto CMD12 Error. */ + CY_SD_HOST_CMD_NOT_ISSUED_AUTO_CMD12 = 7U /**< Command Not Issued By Auto CMD12 Error. */ } cy_en_sd_host_auto_cmd_status_t; /** SD host error codes. */ -typedef enum +typedef enum { CY_SD_HOST_SUCCESS = 0U, /**< Successful. */ CY_SD_HOST_ERROR = CY_SD_HOST_ID | CY_PDL_STATUS_ERROR | 1U, /**< Non-specific error code. */ @@ -1238,15 +1257,15 @@ typedef enum } cy_en_sd_host_status_t; /** The widths of the data bus. */ -typedef enum +typedef enum { CY_SD_HOST_BUS_WIDTH_1_BIT = 0U, /**< The 1-bit mode data transfer width. */ CY_SD_HOST_BUS_WIDTH_4_BIT = 1U, /**< The 4-bit mode data transfer width. */ - CY_SD_HOST_BUS_WIDTH_8_BIT = 2U /**< The 8-bit mode data transfer width. */ + CY_SD_HOST_BUS_WIDTH_8_BIT = 2U /**< The 8-bit mode data transfer width. */ } cy_en_sd_host_bus_width_t; /** The bus speed modes. */ -typedef enum +typedef enum { CY_SD_HOST_BUS_SPEED_DEFAULT = 0U, /**< Default Speed mode: 3.3V signaling at 25 MHz SDClk. */ CY_SD_HOST_BUS_SPEED_HIGHSPEED = 1U, /**< High Speed mode: 3.3V signaling at 50 MHz SDClk. */ @@ -1258,44 +1277,44 @@ typedef enum } cy_en_sd_host_bus_speed_mode_t; /** The SD bus voltage select. */ -typedef enum +typedef enum { - CY_SD_HOST_IO_VOLT_3_3V = 0U, /**< 3.3V.*/ + CY_SD_HOST_IO_VOLT_3_3V = 0U, /**< 3.3V.*/ CY_SD_HOST_IO_VOLT_1_8V = 1U /**< 1.8V. */ } cy_en_sd_host_io_voltage_t; /** Erase type. */ -typedef enum +typedef enum { - CY_SD_HOST_ERASE_ERASE = 0U, /**< The ERASE operation.*/ + CY_SD_HOST_ERASE_ERASE = 0U, /**< The ERASE operation.*/ CY_SD_HOST_ERASE_DISCARD = 1U, /**< The DISCARD operation. */ CY_SD_HOST_ERASE_FULE = 2U, /**< The Full User Area Logical Erase (FULE) operation. */ - CY_SD_HOST_ERASE_SECURE = 3U, /**< The secure purge according to - * Secure Removal Type in EXT_CSD - * on the erase groups identified by the - * startAddr&endAddr parameters and - * any copies of those erase groups. + CY_SD_HOST_ERASE_SECURE = 3U, /**< The secure purge according to + * Secure Removal Type in EXT_CSD + * on the erase groups identified by the + * startAddr&endAddr parameters and + * any copies of those erase groups. */ - CY_SD_HOST_ERASE_SECURE_TRIM_STEP_2 = 4U, /**< The secure purge operation on - * the write blocks according to - * Secure Removal Type in EXT_CSD - * and copies of those write blocks + CY_SD_HOST_ERASE_SECURE_TRIM_STEP_2 = 4U, /**< The secure purge operation on + * the write blocks according to + * Secure Removal Type in EXT_CSD + * and copies of those write blocks * that were previously identified - * using \ref Cy_SD_Host_Erase with + * using \ref Cy_SD_Host_Erase with * CY_SD_HOST_ERASE_SECURE_TRIM_STEP_1 */ - CY_SD_HOST_ERASE_SECURE_TRIM_STEP_1 = 5U, /**< Mark the write blocks, indicated - * by the startAddr&endAddr parameters, + CY_SD_HOST_ERASE_SECURE_TRIM_STEP_1 = 5U, /**< Mark the write blocks, indicated + * by the startAddr&endAddr parameters, * for secure erase. */ - CY_SD_HOST_ERASE_TRIM = 6U /**< Trim the write blocks identified by - * the startAddr&endAddr parameters. The controller + CY_SD_HOST_ERASE_TRIM = 6U /**< Trim the write blocks identified by + * the startAddr&endAddr parameters. The controller * can perform the actual erase at convenient time. - */ + */ } cy_en_sd_host_erase_type_t; /** Card type. */ -typedef enum +typedef enum { CY_SD_HOST_SD = 0U, /**< The Secure Digital card (SD). */ CY_SD_HOST_SDIO = 1U, /**< The CD Input Output card (SDIO). */ @@ -1316,7 +1335,7 @@ typedef enum CY_SD_HOST_UNSUPPORTED = 4U /**< Not supported. */ }cy_en_sd_host_card_capacity_t; -/** SDHC response types. */ +/** SDHC response types. */ typedef enum { CY_SD_HOST_RESPONSE_NONE = 0U, /**< No Response. */ @@ -1334,7 +1353,7 @@ typedef enum }cy_en_sd_host_dma_type_t; /** Write Protect type enum. */ -typedef enum +typedef enum { CY_SD_HOST_PERMANENT = 0U, /**< The permanent write protect. */ CY_SD_HOST_ENABLE_TEMPORARY = 1U, /**< The temporary write protect. */ @@ -1357,16 +1376,16 @@ typedef struct { bool emmc; /**< Set to true of eMMC otherwise false. */ cy_en_sd_host_dma_type_t dmaType; /**< Selects the DMA type to be used. */ - bool enableLedControl; /**< If true the SD clock controls one IO - * used to indicate when the card - * is being accessed. + bool enableLedControl; /**< If true the SD clock controls one IO + * used to indicate when the card + * is being accessed. */ } cy_stc_sd_host_init_config_t; /** SD/eMMC card configuration structure. */ typedef struct { - bool lowVoltageSignaling; /**< If true, the host supports the 1.8V signaling. */ + bool lowVoltageSignaling; /**< If true, the host supports the 1.8V signaling. */ cy_en_sd_host_bus_width_t busWidth; /**< The desired bus width. */ cy_en_sd_host_card_type_t *cardType; /**< The card type. */ uint32_t *rca; /**< The pointer to where to store the cards relative card address. */ @@ -1382,9 +1401,9 @@ typedef struct bool enableAutoResponseErrorCheck; /**< If true the hardware checks the response for errors. */ cy_en_sd_host_response_type_t respType; /**< The response type. */ bool enableIdxCheck; /**< Checks the index of the response. */ - bool dataPresent; /**< true: Data is present to - * be transferred using the DAT line, - * false: Commands use the CMD line only. + bool dataPresent; /**< true: Data is present to + * be transferred using the DAT line, + * false: Commands use the CMD line only. */ cy_en_sd_host_cmd_type_t cmdType; /**< The command type. */ } cy_stc_sd_host_cmd_config_t; @@ -1392,17 +1411,17 @@ typedef struct /** The SD Host data transfer configuration structure. */ typedef struct { - uint32_t blockSize; /**< The size of the data block. */ - uint32_t numberOfBlock; /**< The number of blocks to send. */ - bool enableDma; /**< Enables DMA for the transaction. */ - cy_en_sd_host_auto_cmd_t autoCommand; /**< Selects which auto commands are used if any. */ - bool read; /**< true = Read from the card, false = Write to the card. */ - uint32_t* data; /**< The pointer to data to send/receive or - * the pointer to the DMA descriptor. - */ - uint32_t dataTimeout; /**< The timeout value for the transfer. */ - bool enableIntAtBlockGap; /**< Enables the interrupt generation at the block gap. */ - bool enReliableWrite; /**< For EMMC enables the reliable write. */ + uint32_t blockSize; /**< The size of the data block. */ + uint32_t numberOfBlock; /**< The number of blocks to send. */ + bool enableDma; /**< Enables DMA for the transaction. */ + cy_en_sd_host_auto_cmd_t autoCommand; /**< Selects which auto commands are used if any. */ + bool read; /**< true = Read from the card, false = Write to the card. */ + uint32_t* data; /**< The pointer to data to send/receive or + * the pointer to the DMA descriptor. + */ + uint32_t dataTimeout; /**< The timeout value for the transfer. */ + bool enableIntAtBlockGap; /**< Enables the interrupt generation at the block gap. */ + bool enReliableWrite; /**< For EMMC enables the reliable write. */ }cy_stc_sd_host_data_config_t; /** SD Host Write/Read structure. */ @@ -1414,15 +1433,15 @@ typedef struct cy_en_sd_host_auto_cmd_t autoCommand; /**< Selects which auto commands are used if any. */ uint32_t dataTimeout; /**< The timeout value for the transfer. */ bool enReliableWrite; /**< For EMMC cards, enables the reliable write. */ - bool enableDma; /**< Enables DMA for the transaction. */ + bool enableDma; /**< Enables DMA for the transaction. */ } cy_stc_sd_host_write_read_config_t; /** Context structure. */ typedef struct -{ +{ cy_en_sd_host_dma_type_t dmaType; /**< Defines the DMA type to be used. */ cy_en_sd_host_card_capacity_t cardCapacity; /**< The standard card or the card with the high capacity. */ - uint32_t maxSectorNum; /**< The SD card maximum number of the sectors. */ + uint32_t maxSectorNum; /**< The SD card maximum number of the sectors. */ uint32_t RCA; /**< The relative card address. */ cy_en_sd_host_card_type_t cardType; /**< The card type. */ uint32_t csd[4]; /**< The Card-Specific Data register. */ @@ -1442,30 +1461,30 @@ typedef struct /* High level section */ -cy_en_sd_host_status_t Cy_SD_Host_InitCard(SDHC_Type *base, - cy_stc_sd_host_sd_card_config_t *config, +cy_en_sd_host_status_t Cy_SD_Host_InitCard(SDHC_Type *base, + cy_stc_sd_host_sd_card_config_t *config, cy_stc_sd_host_context_t *context); -cy_en_sd_host_status_t Cy_SD_Host_Read(SDHC_Type *base, +cy_en_sd_host_status_t Cy_SD_Host_Read(SDHC_Type *base, cy_stc_sd_host_write_read_config_t *config, cy_stc_sd_host_context_t const *context); cy_en_sd_host_status_t Cy_SD_Host_Write(SDHC_Type *base, cy_stc_sd_host_write_read_config_t *config, cy_stc_sd_host_context_t const *context); -cy_en_sd_host_status_t Cy_SD_Host_Erase(SDHC_Type *base, - uint32_t startAddr, - uint32_t endAddr, - cy_en_sd_host_erase_type_t eraseType, +cy_en_sd_host_status_t Cy_SD_Host_Erase(SDHC_Type *base, + uint32_t startAddr, + uint32_t endAddr, + cy_en_sd_host_erase_type_t eraseType, cy_stc_sd_host_context_t const *context); - -/** \} group_sd_host_high_level_functions */ - + +/** \} group_sd_host_high_level_functions */ + /** * \addtogroup group_sd_host_low_level_functions * \{ */ -cy_en_sd_host_status_t Cy_SD_Host_Init(SDHC_Type *base, - const cy_stc_sd_host_init_config_t* config, +cy_en_sd_host_status_t Cy_SD_Host_Init(SDHC_Type *base, + const cy_stc_sd_host_init_config_t* config, cy_stc_sd_host_context_t *context); void Cy_SD_Host_DeInit(SDHC_Type *base); void Cy_SD_Host_Enable(SDHC_Type *base); @@ -1474,27 +1493,27 @@ __STATIC_INLINE void Cy_SD_Host_EnableSdClk(SDHC_Type *base); __STATIC_INLINE void Cy_SD_Host_DisableSdClk(SDHC_Type *base); cy_en_sd_host_status_t Cy_SD_Host_SetSdClkDiv(SDHC_Type *base, uint16_t clkDiv); bool Cy_SD_Host_IsWpSet(SDHC_Type const *base); -cy_en_sd_host_status_t Cy_SD_Host_SetHostBusWidth(SDHC_Type *base, +cy_en_sd_host_status_t Cy_SD_Host_SetHostBusWidth(SDHC_Type *base, cy_en_sd_host_bus_width_t width); -cy_en_sd_host_status_t Cy_SD_Host_SetBusWidth(SDHC_Type *base, +cy_en_sd_host_status_t Cy_SD_Host_SetBusWidth(SDHC_Type *base, cy_en_sd_host_bus_width_t width, cy_stc_sd_host_context_t const *context); -cy_en_sd_host_status_t Cy_SD_Host_SetHostSpeedMode(SDHC_Type *base, +cy_en_sd_host_status_t Cy_SD_Host_SetHostSpeedMode(SDHC_Type *base, cy_en_sd_host_bus_speed_mode_t speedMode); -cy_en_sd_host_status_t Cy_SD_Host_SetBusSpeedMode(SDHC_Type *base, - cy_en_sd_host_bus_speed_mode_t speedMode, +cy_en_sd_host_status_t Cy_SD_Host_SetBusSpeedMode(SDHC_Type *base, + cy_en_sd_host_bus_speed_mode_t speedMode, cy_stc_sd_host_context_t const *context); -cy_en_sd_host_status_t Cy_SD_Host_SelBusVoltage(SDHC_Type *base, - bool enable18VSignal, +cy_en_sd_host_status_t Cy_SD_Host_SelBusVoltage(SDHC_Type *base, + bool enable18VSignal, cy_stc_sd_host_context_t *context); void Cy_SD_Host_EnableCardVoltage(SDHC_Type *base); void Cy_SD_Host_DisableCardVoltage(SDHC_Type *base); -cy_en_sd_host_status_t Cy_SD_Host_GetResponse(SDHC_Type const *base, - uint32_t *responsePtr, +cy_en_sd_host_status_t Cy_SD_Host_GetResponse(SDHC_Type const *base, + uint32_t *responsePtr, bool largeResponse); -cy_en_sd_host_status_t Cy_SD_Host_SendCommand(SDHC_Type *base, +cy_en_sd_host_status_t Cy_SD_Host_SendCommand(SDHC_Type *base, cy_stc_sd_host_cmd_config_t const *config); -cy_en_sd_host_status_t Cy_SD_Host_InitDataTransfer(SDHC_Type *base, +cy_en_sd_host_status_t Cy_SD_Host_InitDataTransfer(SDHC_Type *base, cy_stc_sd_host_data_config_t const *dataConfig); __STATIC_INLINE uint32_t Cy_SD_Host_BufferRead(SDHC_Type const *base); __STATIC_INLINE cy_en_sd_host_status_t Cy_SD_Host_BufferWrite(SDHC_Type *base, uint32_t data); @@ -1510,29 +1529,29 @@ __STATIC_INLINE uint32_t Cy_SD_Host_GetAdmaErrorStatus(SDHC_Type const *base); __STATIC_INLINE void Cy_SD_Host_EMMC_Reset(SDHC_Type *base); cy_en_sd_host_status_t Cy_SD_Host_AbortTransfer(SDHC_Type *base, cy_stc_sd_host_context_t const *context); -cy_en_sd_host_status_t Cy_SD_Host_WriteProtect(SDHC_Type *base, +cy_en_sd_host_status_t Cy_SD_Host_WriteProtect(SDHC_Type *base, cy_en_sd_host_write_protect_t writeProtect, cy_stc_sd_host_context_t *context); uint32_t Cy_SD_Host_GetCardStatus(SDHC_Type *base, cy_stc_sd_host_context_t const *context); -cy_en_sd_host_status_t Cy_SD_Host_GetSdStatus(SDHC_Type *base, +cy_en_sd_host_status_t Cy_SD_Host_GetSdStatus(SDHC_Type *base, uint32_t *sdStatus, cy_stc_sd_host_context_t const *context); uint32_t Cy_SD_Host_GetOcr(SDHC_Type *base, cy_stc_sd_host_context_t const *context); cy_en_sd_host_status_t Cy_SD_Host_GetCid(SDHC_Type *base, uint32_t *cid); -cy_en_sd_host_status_t Cy_SD_Host_GetCsd(SDHC_Type *base, - uint32_t *csd, +cy_en_sd_host_status_t Cy_SD_Host_GetCsd(SDHC_Type *base, + uint32_t *csd, cy_stc_sd_host_context_t *context); -cy_en_sd_host_status_t Cy_SD_Host_GetExtCsd(SDHC_Type *base, - uint32_t *extCsd, +cy_en_sd_host_status_t Cy_SD_Host_GetExtCsd(SDHC_Type *base, + uint32_t *extCsd, cy_stc_sd_host_context_t *context); uint32_t Cy_SD_Host_GetRca(SDHC_Type *base); -cy_en_sd_host_status_t Cy_SD_Host_GetScr(SDHC_Type *base, - uint32_t *scr, +cy_en_sd_host_status_t Cy_SD_Host_GetScr(SDHC_Type *base, + uint32_t *scr, cy_stc_sd_host_context_t const *context); uint32_t Cy_SD_Host_GetPresentState(SDHC_Type const *base); bool Cy_SD_Host_IsCardConnected(SDHC_Type const *base); void Cy_SD_Host_SoftwareReset(SDHC_Type *base, cy_en_sd_host_reset_t reset); -cy_en_syspm_status_t Cy_SD_Host_DeepSleepCallback(cy_stc_syspm_callback_params_t *callbackParams, +cy_en_syspm_status_t Cy_SD_Host_DeepSleepCallback(cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode); /** \} group_sd_host_low_level_functions */ @@ -1555,7 +1574,7 @@ __STATIC_INLINE uint32_t Cy_SD_Host_GetErrorInterruptEnable(SDHC_Type const *bas __STATIC_INLINE void Cy_SD_Host_SetErrorInterruptMask(SDHC_Type *base, uint32_t interruptMask); __STATIC_INLINE uint32_t Cy_SD_Host_GetErrorInterruptMask(SDHC_Type const *base); -/** \} group_sd_host_interrupt_functions */ +/** \} group_sd_host_interrupt_functions */ /** * \addtogroup group_sd_host_low_level_functions @@ -1576,7 +1595,7 @@ __STATIC_INLINE uint32_t Cy_SD_Host_GetErrorInterruptMask(SDHC_Type const *base) __STATIC_INLINE void Cy_SD_Host_EnableSdClk(SDHC_Type *base) { /* Check for NULL pointer */ - if (NULL != base) + if (NULL != base) { SDHC_CORE_CLK_CTRL_R(base) = (uint16_t)((uint32_t)SDHC_CORE_CLK_CTRL_R(base) | SDHC_CORE_CLK_CTRL_R_SD_CLK_EN_Msk | @@ -1598,17 +1617,17 @@ __STATIC_INLINE void Cy_SD_Host_EnableSdClk(SDHC_Type *base) __STATIC_INLINE void Cy_SD_Host_DisableSdClk(SDHC_Type *base) { /* Check for NULL pointer */ - if (NULL != base) + if (NULL != base) { /* Disable SD CLK */ - SDHC_CORE_CLK_CTRL_R(base) = _CLR_SET_FLD16U(SDHC_CORE_CLK_CTRL_R(base), + SDHC_CORE_CLK_CTRL_R(base) = _CLR_SET_FLD16U(SDHC_CORE_CLK_CTRL_R(base), SDHC_CORE_CLK_CTRL_R_SD_CLK_EN, 0UL); - + /* Wait for at least 3 card clock periods */ Cy_SysLib_DelayUs(CY_SD_HOST_3_PERIODS_US); /* Disable PLL */ - SDHC_CORE_CLK_CTRL_R(base) = _CLR_SET_FLD16U(SDHC_CORE_CLK_CTRL_R(base), + SDHC_CORE_CLK_CTRL_R(base) = _CLR_SET_FLD16U(SDHC_CORE_CLK_CTRL_R(base), SDHC_CORE_CLK_CTRL_R_PLL_ENABLE, 0UL); } } @@ -1618,7 +1637,7 @@ __STATIC_INLINE void Cy_SD_Host_DisableSdClk(SDHC_Type *base) * Function Name: Cy_SD_Host_BufferRead ****************************************************************************//** * -* Reads 32-bits of data from the read buffer. +* Reads 32-bits of data from the read buffer. * Only use this function if not using SD block DMA to transfer data from buffer. * * \param *base @@ -1630,7 +1649,7 @@ __STATIC_INLINE void Cy_SD_Host_DisableSdClk(SDHC_Type *base) *******************************************************************************/ __STATIC_INLINE uint32_t Cy_SD_Host_BufferRead(SDHC_Type const *base) { - /* Return the Buffer Data Port Register value */ + /* Return the Buffer Data Port Register value */ return SDHC_CORE_BUF_DATA_R(base); } @@ -1655,11 +1674,11 @@ __STATIC_INLINE cy_en_sd_host_status_t Cy_SD_Host_BufferWrite(SDHC_Type *base, { cy_en_sd_host_status_t ret = CY_SD_HOST_ERROR_INVALID_PARAMETER; - /* Check for the NULL pointer */ + /* Check for the NULL pointer */ if (NULL != base) { - SDHC_CORE_BUF_DATA_R(base) = data; - + SDHC_CORE_BUF_DATA_R(base) = data; + ret = CY_SD_HOST_SUCCESS; } @@ -1678,9 +1697,9 @@ __STATIC_INLINE cy_en_sd_host_status_t Cy_SD_Host_BufferWrite(SDHC_Type *base, * *******************************************************************************/ __STATIC_INLINE void Cy_SD_Host_StopAtBlockGap(SDHC_Type *base) -{ - SDHC_CORE_BGAP_CTRL_R(base) = _CLR_SET_FLD8U(SDHC_CORE_BGAP_CTRL_R(base), - SDHC_CORE_BGAP_CTRL_R_STOP_BG_REQ, +{ + SDHC_CORE_BGAP_CTRL_R(base) = _CLR_SET_FLD8U(SDHC_CORE_BGAP_CTRL_R(base), + SDHC_CORE_BGAP_CTRL_R_STOP_BG_REQ, 1UL); } @@ -1696,7 +1715,7 @@ __STATIC_INLINE void Cy_SD_Host_StopAtBlockGap(SDHC_Type *base) * *******************************************************************************/ __STATIC_INLINE void Cy_SD_Host_ContinueFromBlockGap(SDHC_Type *base) -{ +{ SDHC_CORE_BGAP_CTRL_R(base) = (uint8_t)(((uint32_t)SDHC_CORE_BGAP_CTRL_R(base) & ~SDHC_CORE_BGAP_CTRL_R_STOP_BG_REQ_Msk) | /* Clear the Stop At Block Gap Request bit. */ SDHC_CORE_BGAP_CTRL_R_CONTINUE_REQ_Msk); /* Set the Continue Request bit. */ @@ -1743,10 +1762,10 @@ __STATIC_INLINE cy_en_sd_host_status_t Cy_SD_Host_EnableAutoCmd23(SDHC_Type *ba cy_en_sd_host_status_t ret = CY_SD_HOST_ERROR_INVALID_PARAMETER; /* Check for the NULL pointer */ - if (NULL != base) - { - SDHC_CORE_XFER_MODE_R(base) = _CLR_SET_FLD16U(SDHC_CORE_XFER_MODE_R(base), - SDHC_CORE_XFER_MODE_R_AUTO_CMD_ENABLE, + if (NULL != base) + { + SDHC_CORE_XFER_MODE_R(base) = _CLR_SET_FLD16U(SDHC_CORE_XFER_MODE_R(base), + SDHC_CORE_XFER_MODE_R_AUTO_CMD_ENABLE, 2UL); ret = CY_SD_HOST_SUCCESS; @@ -1767,9 +1786,9 @@ __STATIC_INLINE cy_en_sd_host_status_t Cy_SD_Host_EnableAutoCmd23(SDHC_Type *ba * *******************************************************************************/ __STATIC_INLINE void Cy_SD_Host_DisableAutoCmd23(SDHC_Type *base) -{ - SDHC_CORE_XFER_MODE_R(base) = _CLR_SET_FLD16U(SDHC_CORE_XFER_MODE_R(base), - SDHC_CORE_XFER_MODE_R_AUTO_CMD_ENABLE, +{ + SDHC_CORE_XFER_MODE_R(base) = _CLR_SET_FLD16U(SDHC_CORE_XFER_MODE_R(base), + SDHC_CORE_XFER_MODE_R_AUTO_CMD_ENABLE, 0UL); } @@ -1792,10 +1811,10 @@ __STATIC_INLINE cy_en_sd_host_status_t Cy_SD_Host_EnableAsyncInterrupt(SDHC_Typ cy_en_sd_host_status_t ret = CY_SD_HOST_ERROR_INVALID_PARAMETER; /* Check for the NULL pointer */ - if (NULL != base) + if (NULL != base) { - SDHC_CORE_HOST_CTRL2_R(base) = _CLR_SET_FLD16U(SDHC_CORE_HOST_CTRL2_R(base), - SDHC_CORE_HOST_CTRL2_R_ASYNC_INT_ENABLE, + SDHC_CORE_HOST_CTRL2_R(base) = _CLR_SET_FLD16U(SDHC_CORE_HOST_CTRL2_R(base), + SDHC_CORE_HOST_CTRL2_R_ASYNC_INT_ENABLE, 1UL); } @@ -1815,9 +1834,9 @@ __STATIC_INLINE cy_en_sd_host_status_t Cy_SD_Host_EnableAsyncInterrupt(SDHC_Typ * *******************************************************************************/ __STATIC_INLINE void Cy_SD_Host_DisableAsyncInterrupt(SDHC_Type *base) -{ - SDHC_CORE_HOST_CTRL2_R(base) = _CLR_SET_FLD16U(SDHC_CORE_HOST_CTRL2_R(base), - SDHC_CORE_HOST_CTRL2_R_ASYNC_INT_ENABLE, +{ + SDHC_CORE_HOST_CTRL2_R(base) = _CLR_SET_FLD16U(SDHC_CORE_HOST_CTRL2_R(base), + SDHC_CORE_HOST_CTRL2_R_ASYNC_INT_ENABLE, 0UL); } @@ -1856,22 +1875,22 @@ __STATIC_INLINE uint32_t Cy_SD_Host_GetAdmaErrorStatus(SDHC_Type const *base) * *******************************************************************************/ __STATIC_INLINE void Cy_SD_Host_EMMC_Reset(SDHC_Type *base) -{ - SDHC_CORE_EMMC_CTRL_R(base) = _CLR_SET_FLD16U(SDHC_CORE_EMMC_CTRL_R(base), - SDHC_CORE_EMMC_CTRL_R_EMMC_RST_N, +{ + SDHC_CORE_EMMC_CTRL_R(base) = _CLR_SET_FLD16U(SDHC_CORE_EMMC_CTRL_R(base), + SDHC_CORE_EMMC_CTRL_R_EMMC_RST_N, 0UL); - + /* Wait RST_n pulse width of 1 us */ Cy_SysLib_DelayUs(CY_SD_HOST_EMMC_T_RSTW_US); - SDHC_CORE_EMMC_CTRL_R(base) = _CLR_SET_FLD16U(SDHC_CORE_EMMC_CTRL_R(base), - SDHC_CORE_EMMC_CTRL_R_EMMC_RST_N, + SDHC_CORE_EMMC_CTRL_R(base) = _CLR_SET_FLD16U(SDHC_CORE_EMMC_CTRL_R(base), + SDHC_CORE_EMMC_CTRL_R_EMMC_RST_N, 1UL); - + /* Wait RST_n to Command time (74 cycles of clock signal required - * before issuing CMD1 or CMD0 with argument 0xFFFFFFFA) - 200 us + * before issuing CMD1 or CMD0 with argument 0xFFFFFFFA) - 200 us */ - Cy_SysLib_DelayUs(CY_SD_HOST_EMMC_T_RSCA_US); + Cy_SysLib_DelayUs(CY_SD_HOST_EMMC_T_RSCA_US); } /** \} group_sd_host_low_level_functions */ @@ -1918,7 +1937,7 @@ __STATIC_INLINE uint32_t Cy_SD_Host_GetNormalInterruptStatus(SDHC_Type const *ba * *******************************************************************************/ __STATIC_INLINE void Cy_SD_Host_ClearNormalInterruptStatus(SDHC_Type *base, uint32_t status) -{ +{ SDHC_CORE_NORMAL_INT_STAT_R(base) = (uint16_t)status; } @@ -1937,7 +1956,7 @@ __STATIC_INLINE void Cy_SD_Host_ClearNormalInterruptStatus(SDHC_Type *base, uint * *******************************************************************************/ __STATIC_INLINE void Cy_SD_Host_SetNormalInterruptEnable(SDHC_Type *base, uint32_t interrupt) -{ +{ SDHC_CORE_NORMAL_INT_STAT_EN_R(base) = (uint16_t)interrupt; } @@ -1979,7 +1998,7 @@ __STATIC_INLINE uint32_t Cy_SD_Host_GetNormalInterruptEnable(SDHC_Type const *ba * *******************************************************************************/ __STATIC_INLINE void Cy_SD_Host_SetNormalInterruptMask(SDHC_Type *base, uint32_t interruptMask) -{ +{ SDHC_CORE_NORMAL_INT_SIGNAL_EN_R(base) = (uint16_t)interruptMask; } @@ -2053,7 +2072,7 @@ __STATIC_INLINE void Cy_SD_Host_ClearErrorInterruptStatus(SDHC_Type *base, uint3 * Function Name: Cy_SD_Host_SetErrorInterruptEnable ****************************************************************************//** * -* Setting a bit in this register allows for the bit to be active in +* Setting a bit in this register allows for the bit to be active in * the Int status register. * * \param *base @@ -2064,7 +2083,7 @@ __STATIC_INLINE void Cy_SD_Host_ClearErrorInterruptStatus(SDHC_Type *base, uint3 * *******************************************************************************/ __STATIC_INLINE void Cy_SD_Host_SetErrorInterruptEnable(SDHC_Type *base, uint32_t interrupt) -{ +{ SDHC_CORE_ERROR_INT_STAT_EN_R(base) = (uint16_t)interrupt; } @@ -2106,7 +2125,7 @@ __STATIC_INLINE uint32_t Cy_SD_Host_GetErrorInterruptEnable(SDHC_Type const *bas * *******************************************************************************/ __STATIC_INLINE void Cy_SD_Host_SetErrorInterruptMask(SDHC_Type *base, uint32_t interruptMask) -{ +{ SDHC_CORE_ERROR_INT_SIGNAL_EN_R(base) = (uint16_t)interruptMask; } @@ -2131,7 +2150,7 @@ __STATIC_INLINE uint32_t Cy_SD_Host_GetErrorInterruptMask(SDHC_Type const *base) ret = (uint32_t)SDHC_CORE_ERROR_INT_SIGNAL_EN_R(base); return ret; -} +} /** \} group_sd_host_interrupt_functions */ diff --git a/drivers/include/cy_syslib.h b/drivers/include/cy_syslib.h index 65d8d72..c865e7e 100644 --- a/drivers/include/cy_syslib.h +++ b/drivers/include/cy_syslib.h @@ -1,6 +1,6 @@ /***************************************************************************//** * \file cy_syslib.h -* \version 2.50.2 +* \version 2.50.3 * * Provides an API declaration of the SysLib driver. * @@ -28,9 +28,9 @@ * The system libraries provide APIs that can be called in the user application * to handle the timing, logical checking or register. * -* The functions and other declarations used in this driver are in cy_syslib.h. -* You can include cy_pdl.h (ModusToolbox only) to get access to all functions -* and declarations in the PDL. +* The functions and other declarations used in this driver are in cy_syslib.h. +* You can include cy_pdl.h (ModusToolbox only) to get access to all functions +* and declarations in the PDL. * * The SysLib driver contains a set of different system functions. These functions * can be called in the application routine. Major features of the system library: @@ -62,7 +62,7 @@ * name and line number of the ASSERT into global variables, cy_assertFileName * and cy_assertLine . It then calls the Cy_SysLib_Halt() function. * \note Firmware can redefine the Cy_SysLib_AssertFailed() function for custom processing. -* +* * The PDL source code uses this assert mechanism extensively. It is recommended * that you enable asserts when debugging firmware. \n * Assertion Classes and Levels
@@ -89,15 +89,15 @@ *
* Firmware defines which ASSERT class is enabled by defining CY_ASSERT_LEVEL. * This is a compiler command line argument, similar to how the DEBUG / NDEBUG -* macro is passed. \n +* macro is passed. \n * Enabling any class also enables any lower-numbered class. * CY_ASSERT_CLASS_3 is the default level, and it enables asserts for all three * classes. The following example shows the command-line option to enable all * the assert levels: * \code -D CY_ASSERT_LEVEL=CY_ASSERT_CLASS_3 \endcode * \note The use of special characters, such as spaces, parenthesis, etc. must -* be protected with quotes. -* +* be protected with quotes. +* * After CY_ASSERT_LEVEL is defined, firmware can use * one of the three level macros to make an assertion. For example, if the * parameter can vary between devices, firmware uses the L1 macro. @@ -135,19 +135,38 @@ * * * +* \section group_syslib_errata Known Issues +* +* +* +* +* +* +* +*
IssueWorkaround
The function malloc() does not return an error when the allocation +* size is bigger than the heap size. +* PDL does not implement the _sbrk function. The user needs to add +* custom _sbrk function. +*
+* * \section group_syslib_changelog Changelog * * * +* +* +* +* * * * * * -* * -* * * @@ -526,7 +545,7 @@ typedef double float64_t; /**< Specific-length typedef for the basic numerical * Defines for the Assert Classes and Levels */ -/** +/** * Class 1 - The highest class, safety-critical functions which rely on parameters that could be * changed between different PSoC devices */ diff --git a/drivers/source/cy_ctb.c b/drivers/source/cy_ctb.c index 18ceabb..9caed72 100644 --- a/drivers/source/cy_ctb.c +++ b/drivers/source/cy_ctb.c @@ -1,13 +1,13 @@ /***************************************************************************//** * \file cy_ctb.c -* \version 1.10.1 +* \version 1.10.2 * * \brief * Provides the public functions for the CTB driver. * ******************************************************************************** * \copyright -* Copyright 2017-2019 Cypress Semiconductor Corporation +* Copyright 2017-2020 Cypress Semiconductor Corporation * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -153,6 +153,9 @@ const cy_stc_ctb_fast_config_oa1_t Cy_CTB_Fast_Opamp1_Vdac_Ref_Pin5 = * * Initialize or restore the CTB and both opamps according to the * provided settings. Parameters are usually set only once, at initialization. +* +* \note This function call disables a whole CTB block, +* call \ref Cy_CTB_Enable after this function call. * * \param base * Pointer to structure describing registers diff --git a/drivers/source/cy_sd_host.c b/drivers/source/cy_sd_host.c index ec7b9d1..ee2830e 100644 --- a/drivers/source/cy_sd_host.c +++ b/drivers/source/cy_sd_host.c @@ -1,6 +1,6 @@ /******************************************************************************* * \file cy_sd_host.c -* \version 1.40 +* \version 1.50 * * \brief * This file provides the driver code to the API for the SD Host Controller @@ -4829,18 +4829,18 @@ uint32_t Cy_SD_Host_GetPresentState(SDHC_Type const *base) * \ref Cy_SysPm_CpuEnterDeepSleep : specify \ref CY_SYSPM_DEEPSLEEP as the callback * type and call \ref Cy_SysPm_RegisterCallback. * -* \note When waking up from Deep Sleep, the SD Host driver requires up to 100ms +* \note When waking up from Deep Sleep, the SD Host driver requires up to 1 us * for clock stabilization. By default the SD Host driver will wait this length * of time on power up. The waiting loop is implemented in this function. * If the application is time sensitive this delay can be overridden by the -* application by defining \ref CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP to a lower -* value. This allows the application to perform other operations while the clock +* application by defining \ref CY_SD_HOST_CLK_RAMP_UP_TIME_US_WAKEUP. +* This allows the application to perform other operations while the clock * is stabilizing in the background. However, the application must still make sure * that the SD Host clock has had time to stabilize before attempting to use the * SD card. The recommended way to override the value is to specify this as -* a custom define on the compiler command line. This can be done by appending +* a custom define on the compiler command line. This can be done by appending * the entry to the DEFINES variable in the application Makefile. -* Eg: DEFINES+=CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP=40. +* Eg: DEFINES+=CY_SD_HOST_CLK_RAMP_UP_TIME_US_WAKEUP=40. * * \param callbackParams * The pointer to the callback parameters structure @@ -4894,7 +4894,7 @@ cy_en_syspm_status_t Cy_SD_Host_DeepSleepCallback(cy_stc_syspm_callback_params_t Cy_SD_Host_EnableSdClk(locBase); /* Wait for the stable CLK */ - Cy_SysLib_Delay(CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP); + Cy_SysLib_DelayUs(CY_SD_HOST_CLK_RAMP_UP_TIME_US_WAKEUP); ret = CY_SYSPM_SUCCESS; } diff --git a/drivers/source/cy_syslib.c b/drivers/source/cy_syslib.c index 3e61aae..95e9d14 100644 --- a/drivers/source/cy_syslib.c +++ b/drivers/source/cy_syslib.c @@ -1,6 +1,6 @@ /***************************************************************************//** * \file cy_syslib.c -* \version 2.50.2 +* \version 2.50.3 * * Description: * Provides system API implementation for the SysLib driver. @@ -71,7 +71,7 @@ * \param milliseconds The number of milliseconds to delay. * * \note The function calls \ref Cy_SysLib_DelayCycles() API to generate a delay. -* If the function parameter (milliseconds) is bigger than +* If the function parameter (milliseconds) is bigger than * CY_DELAY_MS_OVERFLOW constant, then an additional loop runs to prevent * an overflow in parameter passed to \ref Cy_SysLib_DelayCycles() API. * @@ -294,7 +294,7 @@ void Cy_SysLib_ClearResetReason(void) */ SRSS_RES_CAUSE = 0xFFFFFFFFU; SRSS_RES_CAUSE2 = 0xFFFFFFFFU; - + if(0U != _FLD2VAL(SRSS_PWR_HIBERNATE_TOKEN, SRSS_PWR_HIBERNATE)) { /* Clears PWR_HIBERNATE token */ @@ -556,7 +556,7 @@ void Cy_SysLib_SetWaitStates(bool ulpMode, uint32_t clkHfMHz) waitStates = (clkHfMHz <= cy_device->flashCtlMainWs0Freq) ? 0UL : ((clkHfMHz <= cy_device->flashCtlMainWs1Freq) ? 1UL : ((clkHfMHz <= cy_device->flashCtlMainWs2Freq) ? 2UL : - ((clkHfMHz <= cy_device->flashCtlMainWs3Freq) ? 3UL : + ((clkHfMHz <= cy_device->flashCtlMainWs3Freq) ? 3UL : ((clkHfMHz <= cy_device->flashCtlMainWs4Freq) ? 4UL : 5UL)))); } diff --git a/personalities/peripheral/connectivity_wifi-1.0.cypersonality b/personalities/peripheral/connectivity_wifi-1.0.cypersonality index 766a225..8133516 100644 --- a/personalities/peripheral/connectivity_wifi-1.0.cypersonality +++ b/personalities/peripheral/connectivity_wifi-1.0.cypersonality @@ -170,8 +170,8 @@ - - + + @@ -205,14 +205,14 @@ - + - + @@ -234,7 +234,7 @@ - + diff --git a/personalities_2.0/peripheral/connectivity_wifi-1.0.cypersonality b/personalities_2.0/peripheral/connectivity_wifi-1.0.cypersonality index 766a225..8133516 100644 --- a/personalities_2.0/peripheral/connectivity_wifi-1.0.cypersonality +++ b/personalities_2.0/peripheral/connectivity_wifi-1.0.cypersonality @@ -170,8 +170,8 @@ - - + + @@ -205,14 +205,14 @@ - + - + @@ -234,7 +234,7 @@ - + diff --git a/version.xml b/version.xml index 59221fe..245b239 100644 --- a/version.xml +++ b/version.xml @@ -1 +1 @@ -1.5.1.2655 +1.5.2.3446
VersionChangesReason for Change
2.50.3Add section Known Issues +* Documentation update and clarification.
2.50.1Used the core library defines for the message codes forming. * Improve PDL code base.
2.50Moved following macros to the core library: -* CY_LO8,CY_HI8,CY_LO16,CY_HI16,CY_SWAP_ENDIAN16,CY_SWAP_ENDIAN32, -* CY_SWAP_ENDIAN64,CY_GET_REG8,CY_SET_REG8,CY_GET_REG16,CY_SET_REG16, +* Moved following macros to the core library: +* CY_LO8,CY_HI8,CY_LO16,CY_HI16,CY_SWAP_ENDIAN16,CY_SWAP_ENDIAN32, +* CY_SWAP_ENDIAN64,CY_GET_REG8,CY_SET_REG8,CY_GET_REG16,CY_SET_REG16, * CY_GET_REG24,CY_SET_REG24,CY_GET_REG32,CY_SET_REG32,_CLR_SET_FLD32U, * CY_REG32_CLR_SET,_CLR_SET_FLD16U,CY_REG16_CLR_SET,_CLR_SET_FLD8U, * CY_REG8_CLR_SET,_BOOL2FLD,_FLD2BOOL,CY_SYSLIB_DIV_ROUND, @@ -204,7 +223,7 @@ *
Added register access layer. Use register access macros instead * of direct register access using dereferenced pointers.Makes register access device-independent, so that the PDL does +* Makes register access device-independent, so that the PDL does * not need to be recompiled for each supported part number.