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Copy pathcy_capsense_selftest_v3.c
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cy_capsense_selftest_v3.c
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/***************************************************************************//**
* \file cy_capsense_selftest_v3.c
* \version 5.0
*
* \brief
* This file provides the source code to the Built-in Self-test (BIST)
* functions.
*
********************************************************************************
* \copyright
* Copyright 2021-2024, Cypress Semiconductor Corporation (an Infineon company)
* or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
*******************************************************************************/
#include <stddef.h>
#include <string.h>
#include "cy_syslib.h"
#include "cy_sysclk.h"
#include "cycfg_capsense_defines.h"
#include "cycfg_peripherals.h"
#include "cy_capsense_common.h"
#include "cy_capsense_sensing.h"
#include "cy_capsense_sensing_v3.h"
#include "cy_capsense_generator_v3.h"
#include "cy_capsense_selftest_v3.h"
#include "cy_gpio.h"
#if (CY_CAPSENSE_PLATFORM_BLOCK_FIFTH_GEN)
#include "cy_msc.h"
#endif
#if (defined(CY_IP_M0S8MSCV3))
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_BIST_EN)
/*******************************************************************************
* Common local definitions for self-test
*******************************************************************************/
/* Port Data Register macros for BIST */
#define CY_CAPSENSE_BIST_DR_PIN2GND (0u)
#define CY_CAPSENSE_BIST_DR_PIN2VDD (1u)
/* Electrode capacitance measurement macros for BIST */
#define CY_CAPSENSE_BIST_CAP_SLOT_SCAN (0u)
#define CY_CAPSENSE_BIST_CAP_ELTD_SCAN (1u)
#define CY_CAPSENSE_BIST_CAP_SHIELD_SCAN (2u)
/** The number of BIST sense mode configurations for capacitance measurements (CSD + CSX) */
#define CY_CAPSENSE_BIST_SENSE_MODE_CONFIG_NUMBER (2u)
#define CY_CAPSENSE_BIST_ELTD_CAP_MODCLK_DIV_DEFAULT (1u)
#define CY_CAPSENSE_BIST_ELTD_CAP_MAX_MODCLK (48000000u)
#define CY_CAPSENSE_BIST_ELTD_CAP_SNSCLK_DIV_DEFAULT (256u)
#define CY_CAPSENSE_BIST_SHIELD_CAP_SNSCLK_DIV_DEFAULT (1024u)
#define CY_CAPSENSE_BIST_SNS_CLK_MIN_DIVIDER (4u)
#define CY_CAPSENSE_BIST_SNS_CLK_MAX_DIVIDER (4096u)
#define CY_CAPSENSE_BIST_ELTD_CAP_SUBCONV_NUM_DEFAULT (100u)
#define CY_CAPSENSE_BIST_SHIELD_CAP_REF_CDAC_DEFAULT (200u)
#define CY_CAPSENSE_BIST_ELTD_CAP_REF_CDAC_DEFAULT (100u)
#define CY_CAPSENSE_BIST_MUTUAL_CAP_REF_CDAC_DEFAULT (50u)
#define CY_CAPSENSE_BIST_WATCHDOG_MARGIN_COEFF (3u)
#define CY_CAPSENSE_BIST_CAP_MEAS_WDT_CYCLES_PER_LOOP (5u)
#define CY_CAPSENSE_BIST_V3_ELTD_CAP_CYCLES_NUM (1u)
#define CY_CAPSENSE_BIST_CAP_MEAS_CDAC_LSB_FF_DIV_1000 (8860u)
#define CY_CAPSENSE_BIST_CP_MAX_VALUE (200000u)
#define CY_CAPSENSE_BIST_CSH_MAX_VALUE (1600000u)
#define CY_CAPSENSE_BIST_PROMILLE_FACTOR (1000u)
/** Initialization of sensing method template variable */
#define CY_CAPSENSE_BIST_SENSING_METHOD_BASE_TEMPLATE \
{ \
.ctl = \
((CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_CTL_FLD_SENSE_EN << MSC_CTL_SENSE_EN_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_CTL_FLD_MSCCMP_EN << MSC_CTL_MSCCMP_EN_Pos) | \
((uint32_t)CY_CAPSENSE_SCAN_MODE_INT_DRIVEN << MSC_CTL_OPERATING_MODE_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_CTL_FLD_BUF_MODE << MSC_CTL_BUF_MODE_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_CTL_FLD_CLK_MSC_RATIO << MSC_CTL_CLK_MSC_RATIO_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_CTL_FLD_ENABLED << MSC_CTL_ENABLED_Pos)), \
.spare = 0x00uL, \
.scanCtl1 = 0x00uL, \
.scanCtl2 = 0x00uL, \
.initCtl1 = 0x00uL, \
.initCtl2 = 0x00uL, \
.initCtl3 = 0x00uL, \
.initCtl4 = 0x00uL, \
.senseDutyCtl = \
((CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SENSE_DUTY_CTL_FLD_PHASE_WIDTH << MSC_SENSE_DUTY_CTL_PHASE_WIDTH_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SENSE_DUTY_CTL_FLD_PHASE_SHIFT_CYCLES << MSC_SENSE_DUTY_CTL_PHASE_SHIFT_CYCLES_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SENSE_DUTY_CTL_FLD_PHASE_WIDTH_SEL << MSC_SENSE_DUTY_CTL_PHASE_WIDTH_SEL_Pos)), \
.sensePeriodCtl = 0x00uL, \
.filterCtl = 0x00uL, \
.ccompCdacCtl = 0x00uL, \
.ditherCdacCtl = 0x00uL, \
.cswCtl = 0x00uL, \
.swSelGpio = 0x00uL, \
.swSelCdacRe = \
((CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CDAC_RE_FLD_SW_RETCA << MSC_SW_SEL_CDAC_RE_SW_RETCA_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CDAC_RE_FLD_SW_RECB << MSC_SW_SEL_CDAC_RE_SW_RECB_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CDAC_RE_FLD_SW_RETV << MSC_SW_SEL_CDAC_RE_SW_RETV_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CDAC_RE_FLD_SW_RETG << MSC_SW_SEL_CDAC_RE_SW_RETG_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CDAC_RE_FLD_SW_REBV << MSC_SW_SEL_CDAC_RE_SW_REBV_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CDAC_RE_FLD_SW_REBG << MSC_SW_SEL_CDAC_RE_SW_REBG_Pos)), \
.swSelCdacCo = 0x00uL, \
.swSelCdacCf = 0x00uL, \
.swSelCmod1 = \
((CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD1_FLD_SW_C1CA << MSC_SW_SEL_CMOD1_SW_C1CA_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD1_FLD_SW_C1CB << MSC_SW_SEL_CMOD1_SW_C1CB_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD1_FLD_SW_C1CC << MSC_SW_SEL_CMOD1_SW_C1CC_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD1_FLD_SW_C1CV << MSC_SW_SEL_CMOD1_SW_C1CV_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD1_FLD_SW_C1CG << MSC_SW_SEL_CMOD1_SW_C1CG_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD1_FLD_REF_MODE << MSC_SW_SEL_CMOD1_REF_MODE_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD1_FLD_ENABLED << MSC_SW_SEL_CMOD1_ENABLED_Pos)), \
.swSelCmod2 = \
((CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD2_FLD_SW_C2CA << MSC_SW_SEL_CMOD2_SW_C2CA_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD2_FLD_SW_C2CB << MSC_SW_SEL_CMOD2_SW_C2CB_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD2_FLD_SW_C2CC << MSC_SW_SEL_CMOD2_SW_C2CC_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD2_FLD_SW_C2CV << MSC_SW_SEL_CMOD2_SW_C2CV_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD2_FLD_SW_C2CG << MSC_SW_SEL_CMOD2_SW_C2CG_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD2_FLD_REF_MODE << MSC_SW_SEL_CMOD2_REF_MODE_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD2_FLD_ENABLED << MSC_SW_SEL_CMOD2_ENABLED_Pos)), \
.swSelCmod3 = \
((CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD3_FLD_SW_C3CA << MSC_SW_SEL_CMOD3_SW_C3CA_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD3_FLD_SW_C3CB << MSC_SW_SEL_CMOD3_SW_C3CB_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD3_FLD_SW_C3CC << MSC_SW_SEL_CMOD3_SW_C3CC_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD3_FLD_SW_C3CV << MSC_SW_SEL_CMOD3_SW_C3CV_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD3_FLD_SW_C3CG << MSC_SW_SEL_CMOD3_SW_C3CG_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD3_FLD_REF_MODE << MSC_SW_SEL_CMOD3_REF_MODE_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD3_FLD_ENABLED << MSC_SW_SEL_CMOD3_ENABLED_Pos)), \
.swSelCmod4 = \
((CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD4_FLD_SW_C4CA << MSC_SW_SEL_CMOD4_SW_C4CA_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD4_FLD_SW_C4CB << MSC_SW_SEL_CMOD4_SW_C4CB_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD4_FLD_SW_C4CC << MSC_SW_SEL_CMOD4_SW_C4CC_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD4_FLD_SW_C4CV << MSC_SW_SEL_CMOD4_SW_C4CV_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD4_FLD_SW_C4CG << MSC_SW_SEL_CMOD4_SW_C4CG_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD4_FLD_REF_MODE << MSC_SW_SEL_CMOD4_REF_MODE_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_SW_SEL_CMOD4_FLD_ENABLED << MSC_SW_SEL_CMOD4_ENABLED_Pos)), \
.obsCtl = 0x00uL, \
.status1 = 0x00uL, \
.status2 = 0x00uL, \
.status3 = 0x00uL, \
.resultFifoStatus = 0x00uL, \
.resultFifoRd = 0x00uL, \
.intr = \
((CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_INTR_FLD_SUB_SAMPLE << MSC_INTR_SUB_SAMPLE_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_INTR_FLD_SAMPLE << MSC_INTR_SAMPLE_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_INTR_FLD_SCAN << MSC_INTR_SCAN_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_INTR_FLD_INIT << MSC_INTR_INIT_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_INTR_FLD_FRAME << MSC_INTR_FRAME_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_INTR_FLD_FIFO_UNDERFLOW << MSC_INTR_FIFO_UNDERFLOW_Pos) | \
(CY_CAPSENSE_SM_BASE_FULL_WAVE_REG_INTR_FLD_FIFO_OVERFLOW << MSC_INTR_FIFO_OVERFLOW_Pos)), \
.intrSet = 0x00uL, \
.intrMask = 0x00uL, \
.intrMasked = 0x00uL, \
.frameCmd = 0x00uL, \
.sensorConfig = \
{ \
.snsSwSelCswMask2 = 0x00uL, \
.snsSwSelCswMask1 = 0x00uL, \
.snsSwSelCswMask0 = 0x00uL, \
.snsScanCtl = 0x00uL, \
.snsCdacCtl = 0x00uL, \
.snsCtl = 0x00uL, \
}, \
.swSelCsw = \
{ \
[0u] = 0x00uL, \
[1u] = 0x00uL, \
[2u] = 0x00uL, \
[3u] = 0x00uL, \
[4u] = 0x00uL, \
[5u] = 0x00uL, \
[6u] = 0x00uL, \
[7u] = 0x00uL, \
[8u] = 0x00uL, \
[9u] = 0x00uL, \
[10u] = 0x00uL, \
[11u] = 0x00uL, \
[12u] = 0x00uL, \
[13u] = 0x00uL, \
[14u] = 0x00uL, \
[15u] = 0x00uL, \
[16u] = 0x00uL, \
[17u] = 0x00uL, \
[18u] = 0x00uL, \
[19u] = 0x00uL, \
[20u] = 0x00uL, \
[21u] = 0x00uL, \
[22u] = 0x00uL, \
[23u] = 0x00uL, \
[24u] = 0x00uL, \
[25u] = 0x00uL, \
[26u] = 0x00uL, \
[27u] = 0x00uL, \
[28u] = 0x00uL, \
[29u] = 0x00uL, \
[30u] = 0x00uL, \
[31u] = 0x00uL, \
}, \
.swSelCswFunc = \
{ \
[CY_CAPSENSE_CTRLMUX_PIN_STATE_RX] = (CY_CAPSENSE_SM_REG_SW_SEL_CSW0_RX_VALUE), \
[CY_CAPSENSE_CTRLMUX_PIN_STATE_TX] = (CY_CAPSENSE_SM_REG_SW_SEL_CSW1_TX_VALUE), \
[CY_CAPSENSE_CTRLMUX_PIN_STATE_TX_NEGATIVE] = 0x00uL, \
[CY_CAPSENSE_CTRLMUX_PIN_STATE_GND] = (CY_CAPSENSE_SM_REG_SW_SEL_CSW4_GND_VALUE), \
[CY_CAPSENSE_CTRLMUX_PIN_STATE_SNS] = (CY_CAPSENSE_SM_REG_SW_SEL_CSW3_SNS_VALUE), \
[CY_CAPSENSE_CTRLMUX_PIN_STATE_HIGH_Z] = (CY_CAPSENSE_SM_REG_SW_SEL_CSW5_HIGH_Z_VALUE), \
[CY_CAPSENSE_CTRLMUX_PIN_STATE_SHIELD] = 0x00uL, \
[CY_CAPSENSE_CTRLMUX_PIN_STATE_VDDA2] = (CY_CAPSENSE_SM_REG_SW_SEL_CSW6_VDDA2_VALUE), \
}, \
.mode = \
{ \
[CY_CAPSENSE_CSD_RM_SENSING_METHOD_INDEX] = \
{ \
.senseDutyCtl = \
((CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_GAP_PH0_EN << MSC_MODE_SENSE_DUTY_CTL_PHASE_GAP_PH0_EN_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_GAP_PH1_EN << MSC_MODE_SENSE_DUTY_CTL_PHASE_GAP_PH1_EN_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_GAP_PH2_EN << MSC_MODE_SENSE_DUTY_CTL_PHASE_GAP_PH2_EN_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_GAP_PH3_EN << MSC_MODE_SENSE_DUTY_CTL_PHASE_GAP_PH3_EN_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_GAP_FS2_PH0_EN << MSC_MODE_SENSE_DUTY_CTL_PHASE_GAP_FS2_PH0_EN_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_GAP_FS2_PH1_EN << MSC_MODE_SENSE_DUTY_CTL_PHASE_GAP_FS2_PH1_EN_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PH_GAP_2CYCLE_EN << MSC_MODE_SENSE_DUTY_CTL_PH_GAP_2CYCLE_EN_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_GAP_PH0X_EN << MSC_MODE_SENSE_DUTY_CTL_PHASE_GAP_PH0X_EN_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_GAP_PH1X_EN << MSC_MODE_SENSE_DUTY_CTL_PHASE_GAP_PH1X_EN_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHX_GAP_2CYCLE_EN << MSC_MODE_SENSE_DUTY_CTL_PHX_GAP_2CYCLE_EN_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_SHIFT_EN << MSC_MODE_SENSE_DUTY_CTL_PHASE_SHIFT_EN_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_MODE_SEL << MSC_MODE_SENSE_DUTY_CTL_PHASE_MODE_SEL_Pos)), \
.swSelCdacFl = 0u, \
.swSelTop = \
((CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_CACB << MSC_MODE_SW_SEL_TOP_CACB_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_CACC << MSC_MODE_SW_SEL_TOP_CACC_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_CBCC << MSC_MODE_SW_SEL_TOP_CBCC_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_MBCC << MSC_MODE_SW_SEL_TOP_MBCC_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_AYA_CTL << MSC_MODE_SW_SEL_TOP_AYA_CTL_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_AYB_CTL << MSC_MODE_SW_SEL_TOP_AYB_CTL_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_BYB << MSC_MODE_SW_SEL_TOP_BYB_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_SOSH << MSC_MODE_SW_SEL_TOP_SOSH_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_SHV << MSC_MODE_SW_SEL_TOP_SHV_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_SHG << MSC_MODE_SW_SEL_TOP_SHG_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_BGRF << MSC_MODE_SW_SEL_TOP_BGRF_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_RMF << MSC_MODE_SW_SEL_TOP_RMF_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_MBF << MSC_MODE_SW_SEL_TOP_MBF_Pos)), \
.swSelComp = 0u, \
.swSelSh = \
((CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_C1SH << MSC_MODE_SW_SEL_SH_C1SH_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_C3SH << MSC_MODE_SW_SEL_SH_C3SH_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_SOMB << MSC_MODE_SW_SEL_SH_SOMB_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_CBSO << MSC_MODE_SW_SEL_SH_CBSO_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_SPCS1 << MSC_MODE_SW_SEL_SH_SPCS1_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_SPCS3 << MSC_MODE_SW_SEL_SH_SPCS3_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_FSP << MSC_MODE_SW_SEL_SH_FSP_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_CCSO << MSC_MODE_SW_SEL_SH_CCSO_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_BUF_SEL << MSC_MODE_SW_SEL_SH_BUF_SEL_Pos) | \
(CY_CAPSENSE_SM_CSD_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_BUF_EN << MSC_MODE_SW_SEL_SH_BUF_EN_Pos)), \
}, \
[CY_CAPSENSE_CSX_RM_SENSING_METHOD_INDEX] = \
{ \
.senseDutyCtl = \
((CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_GAP_PH0_EN << MSC_MODE_SENSE_DUTY_CTL_PHASE_GAP_PH0_EN_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_GAP_PH1_EN << MSC_MODE_SENSE_DUTY_CTL_PHASE_GAP_PH1_EN_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_GAP_PH2_EN << MSC_MODE_SENSE_DUTY_CTL_PHASE_GAP_PH2_EN_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_GAP_PH3_EN << MSC_MODE_SENSE_DUTY_CTL_PHASE_GAP_PH3_EN_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_GAP_FS2_PH0_EN << MSC_MODE_SENSE_DUTY_CTL_PHASE_GAP_FS2_PH0_EN_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_GAP_FS2_PH1_EN << MSC_MODE_SENSE_DUTY_CTL_PHASE_GAP_FS2_PH1_EN_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PH_GAP_2CYCLE_EN << MSC_MODE_SENSE_DUTY_CTL_PH_GAP_2CYCLE_EN_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_GAP_PH0X_EN << MSC_MODE_SENSE_DUTY_CTL_PHASE_GAP_PH0X_EN_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_GAP_PH1X_EN << MSC_MODE_SENSE_DUTY_CTL_PHASE_GAP_PH1X_EN_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHX_GAP_2CYCLE_EN << MSC_MODE_SENSE_DUTY_CTL_PHX_GAP_2CYCLE_EN_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_SHIFT_EN << MSC_MODE_SENSE_DUTY_CTL_PHASE_SHIFT_EN_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SENSE_DUTY_CTL_FLD_PHASE_MODE_SEL << MSC_MODE_SENSE_DUTY_CTL_PHASE_MODE_SEL_Pos)), \
.swSelCdacFl = 0u, \
.swSelTop = \
((CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_CACB << MSC_MODE_SW_SEL_TOP_CACB_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_CACC << MSC_MODE_SW_SEL_TOP_CACC_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_CBCC << MSC_MODE_SW_SEL_TOP_CBCC_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_MBCC << MSC_MODE_SW_SEL_TOP_MBCC_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_AYA_CTL << MSC_MODE_SW_SEL_TOP_AYA_CTL_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_AYB_CTL << MSC_MODE_SW_SEL_TOP_AYB_CTL_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_BYB << MSC_MODE_SW_SEL_TOP_BYB_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_SOSH << MSC_MODE_SW_SEL_TOP_SOSH_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_SHV << MSC_MODE_SW_SEL_TOP_SHV_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_SHG << MSC_MODE_SW_SEL_TOP_SHG_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_BGRF << MSC_MODE_SW_SEL_TOP_BGRF_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_RMF << MSC_MODE_SW_SEL_TOP_RMF_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_TOP_FLD_MBF << MSC_MODE_SW_SEL_TOP_MBF_Pos)), \
.swSelComp = 0u, \
.swSelSh = \
((CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_C1SHG << MSC_MODE_SW_SEL_SH_C1SHG_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_C1SH << MSC_MODE_SW_SEL_SH_C1SH_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_C3SHG << MSC_MODE_SW_SEL_SH_C3SHG_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_C3SH << MSC_MODE_SW_SEL_SH_C3SH_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_SOMB << MSC_MODE_SW_SEL_SH_SOMB_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_CBSO << MSC_MODE_SW_SEL_SH_CBSO_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_SPCS1 << MSC_MODE_SW_SEL_SH_SPCS1_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_SPCS3 << MSC_MODE_SW_SEL_SH_SPCS3_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_FSP << MSC_MODE_SW_SEL_SH_FSP_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_CCSO << MSC_MODE_SW_SEL_SH_CCSO_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_BUF_SEL << MSC_MODE_SW_SEL_SH_BUF_SEL_Pos) | \
(CY_CAPSENSE_SM_CSX_FULL_WAVE_CTRL_MUX_REG_MODE0_SW_SEL_SH_FLD_BUF_EN << MSC_MODE_SW_SEL_SH_BUF_EN_Pos)), \
}, \
[2u] = \
{ \
.senseDutyCtl = 0x00uL, \
.swSelCdacFl = 0x00uL, \
.swSelTop = 0x00uL, \
.swSelComp = 0x00uL, \
.swSelSh = 0x00uL, \
}, \
[3u] = \
{ \
.senseDutyCtl = 0x00uL, \
.swSelCdacFl = 0x00uL, \
.swSelTop = 0x00uL, \
.swSelComp = 0x00uL, \
.swSelSh = 0x00uL, \
}, \
}, \
}
/*******************************************************************************
* Function Prototypes
*******************************************************************************/
/******************************************************************************/
/** \cond SECTION_CAPSENSE_INTERNAL */
/** \addtogroup group_capsense_internal *//** \{ */
/******************************************************************************/
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_WDGT_CRC_EN)
static cy_en_capsense_bist_status_t Cy_CapSense_CheckAllWidgetCRC(
cy_stc_capsense_context_t * context);
#endif /* (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_WDGT_CRC_EN)) */
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_SNS_SHORT_EN)
static cy_en_capsense_bist_status_t Cy_CapSense_SnsShortCheckSensor(
uint32_t widgetId,
uint32_t sensorId,
uint32_t mode,
cy_stc_capsense_context_t * context);
static cy_en_capsense_bist_status_t Cy_CapSense_SnsShortCheckElectrode(
uint32_t widgetId,
uint32_t ioSnsId,
uint32_t mode,
const cy_stc_capsense_context_t * context);
static void Cy_CapSense_SnsShortUpdateTestResult(
uint32_t widgetId,
uint32_t sensorId,
cy_stc_capsense_context_t * context);
static cy_en_capsense_bist_status_t Cy_CapSense_SnsShortCheckAllSensors(
cy_stc_capsense_context_t * context);
#endif /* (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_SNS_SHORT_EN) */
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_HW_GROUP_EN)
static void Cy_CapSense_BistSwitchHwConfig(
cy_en_capsense_bist_hw_config_t hwCfg,
uint8_t bistSenseGroup,
uint8_t bistScanMode,
cy_stc_capsense_context_t * context);
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_SNS_SHORT_EN)
static void Cy_CapSense_BistSetPinDr(
cy_stc_capsense_pin_config_t const *ioPtr,
uint32_t value);
static void Cy_CapSense_BistSetPinPc(
cy_stc_capsense_pin_config_t const *ioPtr,
uint32_t value);
#endif
static void Cy_CapSense_BistSwitchAllSnsPinState(
cy_en_capsense_bist_io_state_t desiredPinState,
const cy_stc_capsense_context_t * context);
static void Cy_CapSense_BistSwitchAllExternalCapPinState(
cy_en_capsense_bist_io_state_t desiredPinState,
const cy_stc_capsense_context_t * context);
void Cy_CapSense_BistSetAllSnsPinsState(
uint32_t desiredDriveMode,
uint32_t desiredPinOutput,
en_hsiom_sel_t desiredHsiom,
const cy_stc_capsense_context_t * context);
void Cy_CapSense_BistSetAllCmodPinsState(
uint32_t desiredDriveMode,
uint32_t desiredPinOutput,
en_hsiom_sel_t desiredHsiom,
const cy_stc_capsense_context_t * context);
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_CSD_SHIELD_EN)
static void Cy_CapSense_BistSwitchAllShieldPinState(
cy_en_capsense_bist_io_state_t desiredPinState,
const cy_stc_capsense_context_t * context);
void Cy_CapSense_BistSetAllShieldPinsState(
uint32_t desiredDriveMode,
uint32_t desiredPinOutput,
en_hsiom_sel_t desiredHsiom,
const cy_stc_capsense_context_t * context);
#endif
static void Cy_CapSense_BistSetDmHsiomPinState(
cy_en_capsense_bist_io_state_t desiredPinState,
const cy_stc_capsense_context_t * context);
#endif /* (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_HW_GROUP_EN) */
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_ELTD_CAP_EN)
static cy_en_capsense_bist_status_t Cy_CapSense_MeasureCapacitanceAllElectrodes(
cy_stc_capsense_context_t * context);
#endif
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_SNS_CAP_EN)
static cy_en_capsense_bist_status_t Cy_CapSense_MeasureCapacitanceAllSensors(
cy_stc_capsense_context_t * context);
#endif
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_ELTD_CAP_EN)
static cy_en_capsense_bist_status_t Cy_CapSense_BistMeasureCapacitanceSensor(
uint32_t * cpPtr,
cy_stc_capsense_context_t * context);
#endif
#if ((CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_SNS_CAP_EN) || \
((CY_CAPSENSE_ENABLE == CY_CAPSENSE_CSD_SHIELD_EN) && \
(CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_SH_CAP_EN)))
static cy_en_capsense_bist_status_t Cy_CapSense_BistMeasureCapacitanceSlot(
uint32_t slotId,
cy_stc_capsense_context_t * context);
#endif
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_MEASUREMENT_GROUP_EN)
static cy_capsense_status_t Cy_CapSense_BistMeasureCapacitanceSensorEnable(
cy_stc_capsense_context_t * context);
static void Cy_CapSense_BistMeasureCapacitanceSensorRun(
cy_stc_capsense_context_t * context);
static void Cy_CapSense_BistGenerateBaseConfig(
uint32_t chIndex,
cy_stc_capsense_context_t * context);
static void Cy_CapSense_BistGenerateSensorConfig(
uint32_t chIndex,
uint32_t * ptrSensorCfg,
cy_stc_capsense_context_t * context);
#if (CY_CAPSENSE_SENSOR_CONNECTION_MODE == CY_CAPSENSE_CTRLMUX_SENSOR_CONNECTION_METHOD)
static void Cy_CapSense_BistGenerateSnsCfgMaskReg(
const cy_stc_capsense_electrode_config_t * ptrEltdCfg,
uint32_t * ptrSensorCfg,
uint32_t cswFuncNum);
#endif
#if ((CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_ELTD_CAP_EN) && \
(CY_CAPSENSE_SENSOR_CONNECTION_MODE == CY_CAPSENSE_AMUX_SENSOR_CONNECTION_METHOD))
static void Cy_CapSense_BistConnectEltd(
const cy_stc_capsense_electrode_config_t * ptrEltdConfig,
const cy_stc_capsense_context_t * context);
static void Cy_CapSense_BistDisconnectEltd(
const cy_stc_capsense_electrode_config_t * ptrEltdConfig,
cy_en_capsense_bist_io_state_t desiredPinState,
const cy_stc_capsense_context_t * context);
#endif
static uint32_t Cy_CapSense_BistWatchdogPeriodCalc(
const cy_stc_capsense_context_t * context);
#endif /* (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_MEASUREMENT_GROUP_EN) */
/** \} \endcond */
/*******************************************************************************
* Function Name: Cy_CapSense_RunSelfTest_V3
****************************************************************************//**
*
* Runs built-in self-tests for specified by the test enable mask.
*
* The function performs various self-tests on all the enabled widgets
* and sensors in the project. Select the required set of tests
* using the bit-mask in testEnMask parameter.
*
* Use CY_CAPSENSE_BIST_RUN_AVAILABLE_SELF_TEST_MASK to execute
* all the self-tests or any combination of the masks
* (defined in testEnMask parameter) to specify the desired test list.
*
* To execute a single-element test (i.e. for one widget or one sensor),
* the following low-level functions are available:
* - Cy_CapSense_CheckCRCWidget()
* - Cy_CapSense_CheckIntegritySensorPins()
* - Cy_CapSense_MeasureCapacitanceSensorElectrode()
* - Cy_CapSense_MeasureCapacitanceSlotSensors()
* - Cy_CapSense_MeasureCapacitanceChannelsShield()
*
* Refer to these functions descriptions for detail information
* on the corresponding test.
*
* \note
* The function is available only for the fifth-generation CAPSENSE™.
*
* \param testEnMask
* Specifies the tests to be executed. Each bit corresponds to one test. It is
* possible to launch the function with any combination of the available tests.
* - CY_CAPSENSE_BIST_CRC_WDGT_MASK - Verifies the RAM widget structure CRC
* for all the widgets.
* - CY_CAPSENSE_BIST_SNS_INTEGRITY_MASK - Checks all the sensor pins for a short
* to GND / VDD / other sensors.
* - CY_CAPSENSE_BIST_SNS_CAP_MASK - Measures all the sensors capacitance.
* - CY_CAPSENSE_BIST_ELTD_CAP_MASK - Measures all the electrodes capacitance.
* - CY_CAPSENSE_BIST_SHIELD_CAP_MASK - Measures the shield capacitance.
* - CY_CAPSENSE_BIST_RUN_AVAILABLE_SELF_TEST_MASK
* - Executes all available tests.
*
* \param context
* The pointer to the CAPSENSE™ context structure \ref cy_stc_capsense_context_t.
*
* \return
* Returns a bit-mask with a status of execution of the specified tests:
* - CY_CAPSENSE_BIST_SUCCESS_E - All the tests passed successfully.
* - CY_CAPSENSE_BIST_BAD_PARAM_E - A non-defined test was requested in the
* testEnMask parameter or the context is
* a NULL pointer. The function
* was not performed.
* - CY_CAPSENSE_BIST_HW_BUSY_E - The CAPSENSE™ HW block is busy with a previous
* operation. The function was not performed.
* - CY_CAPSENSE_BIST_ERROR_E - An unexpected fault occurred during
* the measurement, you may need to repeat
* the measurement.
* - CY_CAPSENSE_BIST_FAIL_E - Any of tests specified by the testEnMask
* parameters has faulted.
*
*******************************************************************************/
cy_en_capsense_bist_status_t Cy_CapSense_RunSelfTest_V3(
uint32_t testEnMask,
cy_stc_capsense_context_t * context)
{
cy_en_capsense_bist_status_t result = CY_CAPSENSE_BIST_BAD_PARAM_E;
if (0u == (testEnMask & (~CY_CAPSENSE_BIST_RUN_AVAILABLE_SELF_TEST_MASK)))
{
if (NULL != context)
{
if (CY_CAPSENSE_NOT_BUSY == Cy_CapSense_IsBusy(context))
{
result = CY_CAPSENSE_BIST_SUCCESS_E;
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_WDGT_CRC_EN)
if (0u != (CY_CAPSENSE_BIST_CRC_WDGT_MASK & testEnMask))
{
if (CY_CAPSENSE_BIST_SUCCESS_E != Cy_CapSense_CheckAllWidgetCRC(context))
{
result = CY_CAPSENSE_BIST_FAIL_E;
context->ptrBistContext->testResultMask |= CY_CAPSENSE_BIST_CRC_WDGT_MASK;
}
}
#endif /* (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_WDGT_CRC_EN) */
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_HW_GROUP_EN)
/* The next group of tests is hardware-dependent and they need to switch the configuration to BIST one */
if ((uint32_t)CY_CAPSENSE_SUCCESS_E == Cy_CapSense_SwitchHwConfiguration(CY_CAPSENSE_HW_CONFIG_BIST_FUNCTIONALITY, context))
{
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_SNS_SHORT_EN)
if (0u != (CY_CAPSENSE_BIST_SNS_INTEGRITY_MASK & testEnMask))
{
if (CY_CAPSENSE_BIST_SUCCESS_E != Cy_CapSense_SnsShortCheckAllSensors(context))
{
result = CY_CAPSENSE_BIST_FAIL_E;
context->ptrBistContext->testResultMask |= CY_CAPSENSE_BIST_SNS_INTEGRITY_MASK;
}
}
#endif /* (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_SNS_SHORT_EN) */
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_SNS_CAP_EN)
if (0u != (CY_CAPSENSE_BIST_SNS_CAP_MASK & testEnMask))
{
if (CY_CAPSENSE_BIST_SUCCESS_E != Cy_CapSense_MeasureCapacitanceAllSensors(context))
{
result = CY_CAPSENSE_BIST_FAIL_E;
context->ptrBistContext->testResultMask |= CY_CAPSENSE_BIST_SNS_CAP_MASK;
}
}
#endif /* (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_SNS_CAP_EN) */
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_ELTD_CAP_EN)
if (0u != (CY_CAPSENSE_BIST_ELTD_CAP_MASK & testEnMask))
{
if (CY_CAPSENSE_BIST_SUCCESS_E != Cy_CapSense_MeasureCapacitanceAllElectrodes(context))
{
result = CY_CAPSENSE_BIST_FAIL_E;
context->ptrBistContext->testResultMask |= CY_CAPSENSE_BIST_ELTD_CAP_MASK;
}
}
#endif /* (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_ELTD_CAP_EN) */
#if ((CY_CAPSENSE_ENABLE == CY_CAPSENSE_CSD_SHIELD_EN) &&\
(CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_SH_CAP_EN))
if ((0u != (CY_CAPSENSE_BIST_SHIELD_CAP_MASK & testEnMask)) &&
(CY_CAPSENSE_DISABLE != context->ptrCommonConfig->csdShieldMode))
{
if (CY_CAPSENSE_BIST_SUCCESS_E != Cy_CapSense_MeasureCapacitanceShieldElectrode_V3(0u, context))
{
result = CY_CAPSENSE_BIST_FAIL_E;
context->ptrBistContext->testResultMask |= CY_CAPSENSE_BIST_SHIELD_CAP_MASK;
}
}
#endif /* ((CY_CAPSENSE_ENABLE == CY_CAPSENSE_CSD_SHIELD_EN) &&\
(CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_SH_CAP_EN)) */
}
else
{
result = CY_CAPSENSE_BIST_ERROR_E;
}
#endif /* (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_HW_GROUP_EN) */
}
else
{
result = CY_CAPSENSE_BIST_HW_BUSY_E;
}
}
}
return result;
}
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_WDGT_CRC_EN)
/*******************************************************************************
* Function Name: Cy_CapSense_CheckCRCWidget_V3
****************************************************************************//**
*
* Checks the stored CRC of the \ref cy_stc_capsense_widget_context_t data
* structure of the specified widget.
*
* This function validates the data integrity of the
* \ref cy_stc_capsense_widget_context_t data structure of the specified widget
* by calculating the CRC and comparing it with the stored CRC value of the
* specified widget.
*
* Initially, after the device power up, the Cy_CapSense_Enable() function
* calculates CRC for each widget and stores them in the .ptrWdgtCrc[] array
* of the \ref cy_stc_capsense_bist_context_t structure. The test execution
* compares this stored CRC value with the newly calculated and if the stored
* and calculated CRC values differ:
* 1. The calculated CRC is stored to the .wdgtCrcCalc field
* of the \ref cy_stc_capsense_bist_context_t data structure.
* 2. The widget ID is stored to the .crcWdgtId field.
* 3. The CY_CAPSENSE_BIST_CRC_WDGT_MASK bit is set in the .testResultMask field.
*
* The function never clears the CY_CAPSENSE_BIST_CRC_WDGT_MASK bit.
* If the CY_CAPSENSE_BIST_CRC_WDGT_MASK bit is set, the wdgtCrcCalc
* and .crcWdgtId fields are not updated.
*
* It is recommended to use the Cy_CapSense_SetParam() function to change
* the value of the \ref cy_stc_capsense_widget_context_t data structure elements
* as the CRC is updated by Cy_CapSense_SetParam() function.
*
* You can initiate this test by the Cy_CapSense_RunSelfTest() function with
* the CY_CAPSENSE_BIST_CRC_WDGT_MASK mask as an input.
*
* The function clears the CY_CAPSENSE_WD_WORKING_MASK bit of the .status
* field in \ref cy_stc_capsense_widget_context_t structure if the calculated
* CRC value differs to the stored CRC value.
* Those non-working widgets are skipped by the high-level scanning and
* processing functions. Restoring a widget to its working state should
* be done by the application level.
*
* For details of the used CRC algorithm, refer to the Cy_CapSense_GetCRC()
* function.
*
* \note
* This function is available only for the fifth-generation CAPSENSE™.
*
* \param widgetId
* Specifies the ID number of the widget.
* A macro for the widget ID can be found in the
* CAPSENSE™ Configuration header file (cycfg_capsense.h) defined as
* CY_CAPSENSE_<WidgetName>_WDGT_ID.
*
* \param context
* The pointer to the CAPSENSE™ context structure \ref cy_stc_capsense_context_t.
*
* \return
* Returns a status of the test execution:
* - CY_CAPSENSE_BIST_SUCCESS_E - The stored CRC matches
* the calculated CRC.
* - CY_CAPSENSE_BIST_FAIL_E - The widget CRC differs to
* the stored CRC.
* - CY_CAPSENSE_BIST_BAD_PARAM_E - The input parameters are invalid.
* The test was not executed.
*
*******************************************************************************/
cy_en_capsense_bist_status_t Cy_CapSense_CheckCRCWidget_V3(
uint32_t widgetId,
cy_stc_capsense_context_t * context)
{
uint16_t crcValue;
cy_en_capsense_bist_status_t result = CY_CAPSENSE_BIST_BAD_PARAM_E;
if (NULL != context)
{
if (context->ptrCommonConfig->numWd > widgetId)
{
crcValue = Cy_CapSense_GetCrcWidget(widgetId, context);
if ((context->ptrBistContext->ptrWdgtCrc[widgetId]) != crcValue)
{
/* Write to the self-test data structure widgetId of the first badly-tested widget */
if (0Lu == (context->ptrBistContext->testResultMask & CY_CAPSENSE_BIST_CRC_WDGT_MASK))
{
context->ptrBistContext->wdgtCrcCalc = crcValue;
context->ptrBistContext->crcWdgtId = (uint8_t)widgetId;
context->ptrBistContext->testResultMask |= CY_CAPSENSE_BIST_CRC_WDGT_MASK;
}
/* Marks widget non-working */
(void)Cy_CapSense_SetWidgetStatus(widgetId, 0u, CY_CAPSENSE_WD_WORKING_MASK, context);
result = CY_CAPSENSE_BIST_FAIL_E;
}
else
{
result = CY_CAPSENSE_BIST_SUCCESS_E;
}
}
}
return result;
}
/*******************************************************************************
* Function Name: Cy_CapSense_CheckAllWidgetCRC
****************************************************************************//**
*
* The internal function that checks CRC of all widget structures.
*
* The function calculates CRC of all widget structures and compare it
* to the stored CRCs. It is called by the Cy_CapSense_RunSelfTest() function.
* In the first case of failed comparison the function updates
* testResultMask and returns the status. Next widgets are not checked.
* The function use the Cy_CapSense_CheckCRCWidget() function.
*
* \param context
* The pointer to the CAPSENSE™ context structure \ref cy_stc_capsense_context_t.
*
* \return
* Returns the status of the test processing:
* - CY_CAPSENSE_BIST_SUCCESS_E if all widget CRC are OK;
* - CY_CAPSENSE_BIST_FAIL_E if any widget CRC is wrong.
*
*******************************************************************************/
static cy_en_capsense_bist_status_t Cy_CapSense_CheckAllWidgetCRC(
cy_stc_capsense_context_t * context)
{
cy_en_capsense_bist_status_t result = CY_CAPSENSE_BIST_SUCCESS_E;
uint32_t widgetId;
for (widgetId = 0u; widgetId < context->ptrCommonConfig->numWd; widgetId++)
{
if (CY_CAPSENSE_BIST_SUCCESS_E != (Cy_CapSense_CheckCRCWidget_V3(widgetId, context)))
{
result = CY_CAPSENSE_BIST_FAIL_E;
break;
}
}
return result;
}
/*******************************************************************************
* Function Name: Cy_CapSense_UpdateCrcWidget
****************************************************************************//**
*
* The internal function updates the CRC
* of the \ref cy_stc_capsense_widget_context_t data structure
* for the specified widget.
*
* The function implements the following functionality:
* - Executes the Cy_CapSense_GetCRC() routine for the specified widget.
* - Updates the self-test CRC array with the CRC value, calculated for the
* specified widget.
*
* The CRC value is stored in the special wdgtCrc[CY_CAPSENSE_WIDGET_COUNT] array
* declared in the cycfg_capsense.c file.
*
* \param widgetId
* Specifies the ID number of the widget.
* A macro for the widget ID can be found in the
* CAPSENSE™ Configuration header file (cycfg_capsense.h) defined as
* CY_CAPSENSE_<WidgetName>_WDGT_ID.
*
* \param context
* The pointer to the CAPSENSE™ context structure \ref cy_stc_capsense_context_t.
*
*******************************************************************************/
void Cy_CapSense_UpdateCrcWidget(
uint32_t widgetId,
cy_stc_capsense_context_t * context)
{
uint16_t crcValue;
crcValue = Cy_CapSense_GetCrcWidget(widgetId, context);
/* Write the calculated CRC value to the self-test CRC array */
context->ptrBistContext->ptrWdgtCrc[widgetId] = crcValue;
}
/*******************************************************************************
* Function Name: Cy_CapSense_UpdateAllWidgetCrc
****************************************************************************//**
*
* The internal function that updates CRC of all widget structures.
*
* The function implements the following functionality:
* - Executes the Cy_CapSense_UpdateCrcWidget() for all widgets.
*
* \param context
* The pointer to the CAPSENSE™ context structure \ref cy_stc_capsense_context_t.
*
*******************************************************************************/
void Cy_CapSense_UpdateAllWidgetCrc(cy_stc_capsense_context_t * context)
{
uint32_t wdIndex;
uint32_t wdNum = (uint32_t)context->ptrCommonConfig->numWd;
/* Initialize CRC and status for all widgets */
for (wdIndex = 0u; wdIndex < wdNum; wdIndex++)
{
Cy_CapSense_UpdateCrcWidget(wdIndex, context);
}
}
#endif /* (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_WDGT_CRC_EN) */
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_BSLN_INTEGRITY_EN)
/*******************************************************************************
* Function Name: Cy_CapSense_CheckIntegritySensorBaseline_V3
****************************************************************************//**
*
* Checks if the baseline of the specified sensor is not corrupted
* by comparing it with its inverse copy and checks if the baseline is
* within the specified range.
*
* The function checks whether or not the baseline binary inverted to
* its inverse copy is saved to the self-test baseline-inverse structure
* and is within the user-defined limits. If the baseline does
* not match its inverse copy or if the baseline is out of the user-defined
* limits, the function sets the CY_CAPSENSE_BIST_BSLN_INTEGRITY_MASK bit
* in the .testResultMask field of the \ref cy_stc_capsense_bist_context_t
* structure.
*
* The test is integrated into the CAPSENSE™ Middleware. All CAPSENSE™
* processing functions like Cy_CapSense_ProcessAllWidgets()
* or Cy_CapSense_UpdateSensorBaseline() automatically verify the baseline
* value before using it and update its inverse copy after processing.
* If a baseline update fails, a CY_CAPSENSE_STATUS_BAD_DATA result
* is returned. The baseline initialization functions do not verify the
* baseline and update the baseline inverse copy.
*
* This function does not update the CY_CAPSENSE_WD_WORKING_MASK bit of
* the .status field in \ref cy_stc_capsense_widget_context_t structure
* and is not available in the Cy_CapSense_RunSelfTest() function.
*
* Use this function to verify the uniformity of sensors, for example, at
* mass-production or during an operation phase together with the
* Cy_CapSense_CheckIntegritySensorRawcount() function.
*
* \note
* This function is available only for the fifth-generation CAPSENSE™.
*
* \param widgetId
* Specifies the ID number of the widget.
* A macro for the widget ID can be found in the
* CAPSENSE™ Configuration header file (cycfg_capsense.h) defined as
* CY_CAPSENSE_<WidgetName>_WDGT_ID.
*
* \param sensorId
* Specifies the ID number of the sensor within the widget.
* A macro for the sensor ID within the specified widget can be found in
* the CAPSENSE™ Configuration header file (cycfg_capsense.h) defined as
* CY_CAPSENSE_<WidgetName>_SNS<SensorNumber>_ID.
*
* \param baselineHighLimit
* Specifies the upper limit for a baseline.
*
* \param baselineLowLimit
* Specifies the lower limit for a baseline.
*
* \param context
* The pointer to the CAPSENSE™ context structure \ref cy_stc_capsense_context_t.
*
* \return
* Returns a status of the test execution:
* - CY_CAPSENSE_BIST_SUCCESS_E - The baseline is within the
* specified range.
* - CY_CAPSENSE_BIST_FAIL_E - The test failed and the baseline
* is not binary inverted to its inverse
* copy or is out of the specified limits.
* - CY_CAPSENSE_BIST_BAD_PARAM_E - The input parameter is invalid.
* The test was not executed.
*
*******************************************************************************/
cy_en_capsense_bist_status_t Cy_CapSense_CheckIntegritySensorBaseline_V3(
uint32_t widgetId,
uint32_t sensorId,
uint16_t baselineHighLimit,
uint16_t baselineLowLimit,
cy_stc_capsense_context_t * context)
{
cy_en_capsense_bist_status_t result = CY_CAPSENSE_BIST_BAD_PARAM_E;
uint16_t bslnInv;
uint32_t cxtOffset;
const cy_stc_capsense_sensor_context_t *ptrSnsCxt;
cy_stc_capsense_widget_config_t const *ptrWdgtCfg;
if (NULL != context)
{
if (((uint32_t)context->ptrCommonConfig->numWd > widgetId) &&
((uint32_t)context->ptrWdConfig[widgetId].numSns > sensorId))
{
/* Get a pointer to the specified widget configuration structure */
ptrWdgtCfg = &context->ptrWdConfig[widgetId];
/* Get a pointer to the specified sensor context structure */
ptrSnsCxt = &ptrWdgtCfg->ptrSnsContext[sensorId];
/* Check baselines */
cxtOffset = sensorId;
bslnInv = (uint16_t)(~(ptrWdgtCfg->ptrBslnInv[cxtOffset]));
if ((ptrSnsCxt->bsln != bslnInv) ||
(ptrSnsCxt->bsln > baselineHighLimit) ||
(ptrSnsCxt->bsln < baselineLowLimit))
{
context->ptrBistContext->testResultMask |= CY_CAPSENSE_BIST_BSLN_INTEGRITY_MASK;
result = CY_CAPSENSE_BIST_FAIL_E;
}
if (CY_CAPSENSE_BIST_FAIL_E != result)
{
result = CY_CAPSENSE_BIST_SUCCESS_E;
}
}
}
return result;
}
#endif /* (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_BSLN_INTEGRITY_EN) */
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_TST_RAW_INTEGRITY_EN)
/*******************************************************************************
* Function Name: Cy_CapSense_CheckIntegritySensorRawcount_V3
****************************************************************************//**
*
* Checks the raw count of the specified widget/sensor is within the specified
* range.
*
* The raw count is within a specific range (based on the calibration target)
* for good units. The function checks whether or not the raw count is within
* the user-defined limits in the ranges function arguments.
* If the raw count is out of limits, this function sets the
* CY_CAPSENSE_BIST_RAW_INTEGRITY_MASK bit in the .testResultMask field of the
* \ref cy_stc_capsense_bist_context_t structure.
*
* This function does not update the CY_CAPSENSE_WD_WORKING_MASK bit of
* the .status field in \ref cy_stc_capsense_widget_context_t structure
* and is not available in the Cy_CapSense_RunSelfTest() function.
*
* Use this function to verify the uniformity of sensors, for example, at
* mass-production or during an operation phase together with the
* Cy_CapSense_CheckIntegritySensorBaseline() function.
*
* \note
* This function is available only for the fifth-generation CAPSENSE™.
*
* \param widgetId
* Specifies the ID number of the widget.
* A macro for the widget ID can be found in the
* CAPSENSE™ Configuration header file (cycfg_capsense.h) defined as
* CY_CAPSENSE_<WidgetName>_WDGT_ID.
*
* \param sensorId
* Specifies the ID number of the sensor within the widget.
* A macro for the sensor ID within the specified widget can be found in
* the CAPSENSE™ Configuration header file (cycfg_capsense.h) defined as
* CY_CAPSENSE_<WidgetName>_SNS<SensorNumber>_ID.
*
* \param rawcountHighLimit
* Specifies the upper limit for the widget/sensor raw count.
*
* \param rawcountLowLimit
* Specifies the lower limit for the widget/sensor raw count.
*
* \param context
* The pointer to the CAPSENSE™ context structure \ref cy_stc_capsense_context_t.
*
* \return
* Returns a status of the test execution:
* - CY_CAPSENSE_BIST_SUCCESS_E - The raw count is within the
* specified range.
* - CY_CAPSENSE_BIST_FAIL_E - The test failed and raw count is out
* of the specified limits.
* - CY_CAPSENSE_BIST_BAD_PARAM_E - The input parameter is invalid.
* The test was not executed.
*
*******************************************************************************/