From 81dca013dcd83a0cb5b79a08288440f40393c9f1 Mon Sep 17 00:00:00 2001 From: Paulo Matos Date: Fri, 19 Jul 2024 09:14:38 +0200 Subject: [PATCH] instcountci: X87 Pass and refactoring --- .../FlagM/HotBlocks_32Bit.json | 2369 +- .../FlagM/x87-HalfLife.json | 4494 +- .../FlagM/x87-Oblivion.json | 109383 ++++++--------- .../FlagM/x87-Psychonauts.json | 44740 ++---- unittests/InstructionCountCI/FlagM/x87.json | 4158 +- .../InstructionCountCI/FlagM/x87_f64.json | 3289 +- unittests/InstructionCountCI/x87.json | 4162 +- unittests/InstructionCountCI/x87_f64.json | 3299 +- 8 files changed, 64324 insertions(+), 111570 deletions(-) diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json index 44ae86e9e6..95dc691abd 100644 --- a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json +++ b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json @@ -143,7 +143,7 @@ ] }, "Psychonauts matrix swizzle": { - "ExpectedInstructionCount": 2340, + "ExpectedInstructionCount": 165, "Comment": [ "Hottest block in Windows Psychonauts", "Doing a 4x4 32-bit float matrix swizzle", @@ -264,2337 +264,162 @@ "mov x20, #0xffffffffffffffbc", "str w5, [x9, w20, sxtw]", "ldr w4, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w22, #0x1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w22, w21", - "orr w23, w23, w24", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x24, #0xffffffffffffffc0", - "str s2, [x9, w24, sxtw]", - "lsl w25, w22, w21", - "bic w23, w23, w25", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x21, #0xffffffffffffffc0", + "sub w22, w9, #0x40 (64)", + "str s2, [x22]", "ldr w5, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x5, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w25, w22, w21", - "orr w23, w23, w25", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x25, #0xffffffffffffffc4", - "str s2, [x9, w25, sxtw]", - "lsl w12, w22, w21", - "bic w23, w23, w12", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x22, #0xffffffffffffffc4", + "sub w23, w9, #0x3c (60)", + "str s2, [x23]", "ldr w6, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x6, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w12, w22, w21", - "orr w23, w23, w12", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x12, #0xffffffffffffffc8", - "str s2, [x9, w12, sxtw]", - "lsl w13, w22, w21", - "bic w23, w23, w13", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x23, #0xffffffffffffffc8", + "sub w24, w9, #0x38 (56)", + "str s2, [x24]", "ldr w4, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w13, w22, w21", - "orr w23, w23, w13", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x13, #0xffffffffffffffcc", - "str s2, [x9, w13, sxtw]", - "lsl w14, w22, w21", - "bic w23, w23, w14", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x24, #0xffffffffffffffcc", + "sub w25, w9, #0x34 (52)", + "str s2, [x25]", "ldr w5, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x5, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w14, w22, w21", - "orr w23, w23, w14", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x14, #0xffffffffffffffd0", - "str s2, [x9, w14, sxtw]", - "lsl w15, w22, w21", - "bic w23, w23, w15", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x25, #0xffffffffffffffd0", + "sub w12, w9, #0x30 (48)", + "str s2, [x12]", "ldr w6, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x6, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w15, w22, w21", - "orr w23, w23, w15", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x15, #0xffffffffffffffd4", - "str s2, [x9, w15, sxtw]", - "lsl w16, w22, w21", - "bic w23, w23, w16", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x12, #0xffffffffffffffd4", + "sub w13, w9, #0x2c (44)", + "str s2, [x13]", "ldr w4, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w16, w22, w21", - "orr w23, w23, w16", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x16, #0xffffffffffffffd8", - "str s2, [x9, w16, sxtw]", - "lsl w17, w22, w21", - "bic w23, w23, w17", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x13, #0xffffffffffffffd8", + "sub w14, w9, #0x28 (40)", + "str s2, [x14]", "ldr w5, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x5, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w17, w22, w21", - "orr w23, w23, w17", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x17, #0xffffffffffffffdc", - "str s2, [x9, w17, sxtw]", - "lsl w29, w22, w21", - "bic w23, w23, w29", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x14, #0xffffffffffffffdc", + "sub w15, w9, #0x24 (36)", + "str s2, [x15]", "ldr w6, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x6, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w29, w22, w21", - "orr w23, w23, w29", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x29, #0xffffffffffffffe0", - "str s2, [x9, w29, sxtw]", - "lsl w30, w22, w21", - "bic w23, w23, w30", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x15, #0xffffffffffffffe0", + "sub w16, w9, #0x20 (32)", + "str s2, [x16]", "ldr w4, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w30, w22, w21", - "orr w23, w23, w30", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x30, #0xffffffffffffffe4", - "str s2, [x9, w30, sxtw]", - "lsl w19, w22, w21", - "bic w23, w23, w19", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x16, #0xffffffffffffffe4", + "sub w17, w9, #0x1c (28)", + "str s2, [x17]", "ldr w5, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x5, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w19, w22, w21", - "orr w23, w23, w19", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x19, #0xffffffffffffffe8", - "str s2, [x9, w19, sxtw]", - "lsl w19, w22, w21", - "bic w23, w23, w19", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x17, #0xffffffffffffffe8", + "sub w29, w9, #0x18 (24)", + "str s2, [x29]", "ldr w6, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x6, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w19, w22, w21", - "orr w23, w23, w19", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x19, #0xffffffffffffffec", - "str s2, [x9, w19, sxtw]", - "lsl w19, w22, w21", - "bic w23, w23, w19", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x29, #0xffffffffffffffec", + "sub w30, w9, #0x14 (20)", + "str s2, [x30]", "ldr w4, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w19, w22, w21", - "orr w23, w23, w19", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x19, #0xfffffffffffffff0", - "str s2, [x9, w19, sxtw]", - "lsl w19, w22, w21", - "bic w23, w23, w19", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x30, #0xfffffffffffffff0", + "sub w19, w9, #0x10 (16)", + "str s2, [x19]", "ldr w5, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x5, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w19, w22, w21", - "orr w23, w23, w19", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", "mov x19, #0xfffffffffffffff4", - "str s2, [x9, w19, sxtw]", - "lsl w19, w22, w21", - "bic w23, w23, w19", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "sub w19, w9, #0xc (12)", + "str s2, [x19]", "ldr w6, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x6, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w19, w22, w21", - "orr w23, w23, w19", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", "mov x19, #0xfffffffffffffff8", - "str s2, [x9, w19, sxtw]", - "lsl w19, w22, w21", - "bic w23, w23, w19", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "sub w19, w9, #0x8 (8)", + "str s2, [x19]", "ldr w4, [x9, w20, sxtw]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w21, w22, w20", - "orr w21, w23, w21", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x23, #0xfffffffffffffffc", - "str s2, [x9, w23, sxtw]", - "lsl w19, w22, w20", - "bic w21, w21, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "mov x20, #0xfffffffffffffffc", + "sub w19, w9, #0x4 (4)", + "str s2, [x19]", "ldr w5, [x9, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", + "ldr s2, [x9, w21, sxtw]", "str s2, [x5]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w6, [x9, #8]", - "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w22, sxtw]", + "add w21, w6, #0x4 (4)", + "str s2, [x21]", + "ldr w4, [x9, #8]", + "ldr s2, [x9, w23, sxtw]", + "add w21, w4, #0x8 (8)", + "str s2, [x21]", + "ldr w5, [x9, #8]", + "ldr s2, [x9, w24, sxtw]", + "add w21, w5, #0xc (12)", + "str s2, [x21]", + "ldr w6, [x9, #8]", "ldr s2, [x9, w25, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #4]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w6, #0x10 (16)", + "str s2, [x21]", "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, w12, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #8]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w4, #0x14 (20)", + "str s2, [x21]", "ldr w5, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, w13, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #12]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w5, #0x18 (24)", + "str s2, [x21]", "ldr w6, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, w14, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #16]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w6, #0x1c (28)", + "str s2, [x21]", "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, w15, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #20]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w4, #0x20 (32)", + "str s2, [x21]", "ldr w5, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, w16, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #24]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w5, #0x24 (36)", + "str s2, [x21]", "ldr w6, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, w17, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #28]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w6, #0x28 (40)", + "str s2, [x21]", "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, w29, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #32]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w4, #0x2c (44)", + "str s2, [x21]", "ldr w5, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, w30, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #36]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w5, #0x30 (48)", + "str s2, [x21]", "ldr w6, [x9, #8]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xffffffffffffffe8", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #40]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "mov x21, #0xfffffffffffffff4", + "ldr s2, [x9, w21, sxtw]", + "add w21, w6, #0x34 (52)", + "str s2, [x21]", "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xffffffffffffffec", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #44]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "mov x21, #0xfffffffffffffff8", + "ldr s2, [x9, w21, sxtw]", + "add w21, w4, #0x38 (56)", + "str s2, [x21]", "ldr w5, [x9, #8]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xfffffffffffffff0", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #48]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x9, #8]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xfffffffffffffff4", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #52]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xfffffffffffffff8", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #56]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x9, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #60]", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "ldr s2, [x9, w20, sxtw]", + "add w20, w5, #0x3c (60)", + "str s2, [x20]", "ldr w4, [x9, #8]", "mov x8, x9", "ldr w9, [x8]", "add x8, x8, #0x4 (4)", - "strb w21, [x28, #1298]" + "ldrb w20, [x28, #1019]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w20, w22, w20", + "bic w20, w21, w20", + "strb w20, [x28, #1298]" ] } } diff --git a/unittests/InstructionCountCI/FlagM/x87-HalfLife.json b/unittests/InstructionCountCI/FlagM/x87-HalfLife.json index 4f52eecd85..513d059fa4 100644 --- a/unittests/InstructionCountCI/FlagM/x87-HalfLife.json +++ b/unittests/InstructionCountCI/FlagM/x87-HalfLife.json @@ -13,7 +13,7 @@ }, "Instructions": { "Block1": { - "ExpectedInstructionCount": 2035, + "ExpectedInstructionCount": 1369, "x86Insts": [ "sub esp,0x2c", "mov ecx,dword [esp + 0x34]", @@ -93,7 +93,6 @@ "ldr w5, [x8, #52]", "ldr w6, [x8, #48]", "ldr w4, [x8, #56]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -122,17 +121,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -144,7 +133,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -157,35 +146,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -198,10 +161,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -213,13 +176,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -231,7 +191,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -244,18 +204,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -267,7 +219,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -280,35 +232,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -321,10 +247,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -336,14 +262,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -356,8 +278,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -369,15 +291,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #8]", + "fmov s7, s0", + "str s7, [x20]", + "mov w20, #0x8", + "ldr s7, [x5, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -389,7 +306,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -402,18 +319,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x6, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -425,7 +334,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -438,35 +347,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -479,10 +362,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -494,14 +377,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -514,8 +393,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -527,15 +406,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "fmov s9, s0", + "str s9, [x21]", + "ldr s9, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -547,7 +420,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -560,23 +433,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -589,8 +448,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", @@ -607,24 +466,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "mov w24, #0x0", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov w21, #0x0", + "strb w21, [x28, #1017]", + "add w22, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -651,13 +495,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x22]", "ldr s2, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -686,20 +524,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -712,10 +536,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -727,26 +551,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb w21, [x28, #1017]", + "add w22, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -759,8 +568,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -772,15 +581,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "fmov s5, s0", + "str s5, [x22]", + "ldr s5, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -792,7 +595,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -805,23 +608,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -834,10 +623,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -849,30 +638,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "strb w21, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -887,8 +656,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -900,35 +669,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w21, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -941,8 +685,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", @@ -959,32 +703,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "strb w21, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -997,10 +716,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -1012,35 +731,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb w21, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1053,10 +747,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -1068,27 +762,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "movi v6.2d, #0x0", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1103,8 +780,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v4.d[0]", "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1116,18 +793,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s3, [x8, #16]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1139,7 +808,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s3", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1152,35 +821,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1193,10 +836,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -1208,23 +851,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1239,8 +868,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v4.d[0]", "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1252,18 +881,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s3, [x8, #20]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1275,7 +896,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s3", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1288,35 +909,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1329,10 +924,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -1344,23 +939,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1375,8 +956,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v4.d[0]", "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1388,18 +969,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s3, [x8, #24]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s8, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1411,7 +984,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s3", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1424,35 +997,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1465,10 +1012,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -1480,31 +1027,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1517,10 +1042,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1532,18 +1057,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s3, [x8, #28]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1555,7 +1072,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s3", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1568,35 +1085,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1609,10 +1100,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -1624,23 +1115,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1653,10 +1130,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1668,35 +1145,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q4, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q4, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "strb w21, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1709,10 +1161,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -1724,18 +1176,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1748,10 +1191,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1763,35 +1206,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q4, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q4, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "strb w21, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1804,8 +1222,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", @@ -1822,23 +1240,6 @@ "eor v3.16b, v3.16b, v3.16b", "mov v3.d[0], x0", "mov v3.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1853,8 +1254,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1866,35 +1267,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w21, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1907,8 +1283,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -1925,15 +1301,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1964,32 +1331,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "strb w21, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2002,10 +1344,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -2017,18 +1359,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2041,10 +1374,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2052,39 +1385,14 @@ "ldp x4, x5, [x28, #280]", "ldp x6, x7, [x28, #296]", "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w21, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2097,10 +1405,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2112,20 +1420,46 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov x20, x0", - "ubfx x22, x20, #1, #1", - "ubfx x23, x20, #0, #1", - "ubfx x20, x20, #2, #1", - "orr w22, w22, w20", - "orr w23, w23, w20", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", "rmif x22, #63, #nzCv", "rmif x23, #62, #nZcv", - "eor w26, w20, #0x1", - "strb w21, [x28, #1298]" + "mov w22, #0x1", + "eor w26, w21, #0x1", + "ldrb w21, [x28, #1019]", + "sub w21, w21, #0x3 (3)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", + "str q4, [x0, #1040]", + "add w23, w21, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", + "str q7, [x0, #1040]", + "add w23, w21, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add w23, w21, #0x3 (3)", + "and w23, w23, #0x7", + "sub w20, w20, w21", + "ldrb w21, [x28, #1298]", + "mov w24, #0x707", + "lsr w20, w24, w20", + "orr w20, w21, w20", + "strb w20, [x28, #1298]", + "ldrb w20, [x28, #1298]", + "lsl w21, w22, w23", + "bic w20, w20, w21", + "strb w20, [x28, #1298]" ] }, "Block2": { - "ExpectedInstructionCount": 839, + "ExpectedInstructionCount": 552, "x86Insts": [ "sub esp,0x1c", "mov edx,dword [esp + 0x20]", @@ -2170,7 +1504,6 @@ "subs w8, w8, #0x1c (28)", "ldr w6, [x8, #32]", "ldr w4, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2199,27 +1532,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mov x23, #0xffffffffffffffff", - "mov w24, #0x7fff", - "fmov d3, x23", - "mov v3.d[1], x24", + "mov x20, #0xffffffffffffffff", + "mov w21, #0x7fff", + "fmov d3, x20", + "mov v3.d[1], x21", "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2231,7 +1549,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2244,44 +1562,14 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "mov w12, #0x0", - "strb w12, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "fmov d4, x20", + "mov v4.d[1], x21", + "and v3.16b, v3.16b, v4.16b", + "mov w22, #0x0", + "strb w22, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2294,10 +1582,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2309,43 +1597,20 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov x20, x0", - "ubfx x25, x20, #1, #1", - "ubfx x13, x20, #0, #1", - "ubfx x20, x20, #2, #1", - "orr w25, w25, w20", - "orr w20, w13, w20", - "rmif x25, #63, #nzCv", - "rmif x20, #62, #nZcv", - "csetm x20, hs", - "csel x20, x23, x20, eq", - "dup v2.2d, x20", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #4]", + "mov x23, x0", + "ubfx x24, x23, #1, #1", + "ubfx x25, x23, #0, #1", + "ubfx x23, x23, #2, #1", + "orr w24, w24, w23", + "orr w23, w25, w23", + "rmif x24, #63, #nzCv", + "rmif x23, #62, #nZcv", + "mov w23, #0x1", + "csetm x24, hs", + "csel x24, x20, x24, eq", + "dup v4.2d, x24", + "bit v2.16b, v3.16b, v4.16b", + "ldr s3, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2357,7 +1622,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2370,26 +1635,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "fmov d4, x20", + "mov v4.d[1], x21", + "and v3.16b, v3.16b, v4.16b", + "ldr s4, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2401,7 +1653,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2414,43 +1666,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb w12, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "fmov d5, x20", + "mov v5.d[1], x21", + "and v4.16b, v4.16b, v5.16b", + "strb w22, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2465,8 +1687,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2478,43 +1700,20 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov x20, x0", - "ubfx x25, x20, #1, #1", - "ubfx x13, x20, #0, #1", - "ubfx x20, x20, #2, #1", - "orr w25, w25, w20", - "orr w20, w13, w20", + "mov x24, x0", + "ubfx x25, x24, #1, #1", + "ubfx x12, x24, #0, #1", + "ubfx x24, x24, #2, #1", + "orr w25, w25, w24", + "orr w24, w12, w24", "rmif x25, #63, #nzCv", - "rmif x20, #62, #nZcv", - "csetm x20, hs", - "csel x20, x23, x20, eq", - "dup v2.2d, x20", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #8]", + "rmif x24, #62, #nZcv", + "csetm x24, hs", + "csel x24, x20, x24, eq", + "dup v5.2d, x24", + "bit v3.16b, v4.16b, v5.16b", + "mov w24, #0x8", + "ldr s4, [x6, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2526,7 +1725,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2539,26 +1738,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "fmov d5, x20", + "mov v5.d[1], x21", + "and v4.16b, v4.16b, v5.16b", + "ldr s5, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2570,7 +1756,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2583,43 +1769,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w12, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "fmov d6, x20", + "mov v6.d[1], x21", + "and v5.16b, v5.16b, v6.16b", + "strb w22, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2632,10 +1788,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2647,60 +1803,18 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov x20, x0", - "ubfx x24, x20, #1, #1", - "ubfx x25, x20, #0, #1", - "ubfx x20, x20, #2, #1", - "orr w24, w24, w20", - "orr w20, w25, w20", - "rmif x24, #63, #nzCv", - "rmif x20, #62, #nZcv", - "csetm x20, hs", - "csel x20, x23, x20, eq", - "dup v2.2d, x20", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov x21, x0", + "ubfx x25, x21, #1, #1", + "ubfx x12, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w25, w25, w21", + "orr w21, w12, w21", + "rmif x25, #63, #nzCv", + "rmif x21, #62, #nZcv", + "csetm x21, hs", + "csel x20, x20, x21, eq", + "dup v6.2d, x20", + "bit v4.16b, v5.16b, v6.16b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2713,8 +1827,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -2731,32 +1845,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w12, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "strb w22, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2771,8 +1860,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -2784,18 +1873,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2808,10 +1888,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2826,20 +1906,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2852,10 +1918,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -2867,18 +1933,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2891,10 +1948,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2909,28 +1966,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w21, w21, w20", - "orr w21, w22, w21", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2956,18 +1991,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2982,8 +2008,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2996,19 +2022,40 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "mov x20, x0", - "ubfx x22, x20, #1, #1", - "ubfx x23, x20, #0, #1", + "ubfx x21, x20, #1, #1", + "ubfx x22, x20, #0, #1", "ubfx x20, x20, #2, #1", + "orr w21, w21, w20", "orr w22, w22, w20", - "orr w23, w23, w20", - "rmif x22, #63, #nzCv", - "rmif x23, #62, #nZcv", + "rmif x21, #63, #nzCv", + "rmif x22, #62, #nZcv", "eor w26, w20, #0x1", - "strb w21, [x28, #1298]" + "ldrb w20, [x28, #1019]", + "sub w20, w20, #0x2 (2)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q3, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "add w21, w20, #0x6 (6)", + "and w21, w21, #0x7", + "sub w20, w24, w20", + "ldrb w22, [x28, #1298]", + "mov w24, #0x303", + "lsr w20, w24, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "ldrb w20, [x28, #1298]", + "lsl w21, w23, w21", + "bic w20, w20, w21", + "strb w20, [x28, #1298]" ] }, "Block3": { - "ExpectedInstructionCount": 1132, + "ExpectedInstructionCount": 808, "x86Insts": [ "fld dword [ecx]", "fld dword [edx + 0x4]", @@ -3044,7 +2091,6 @@ "fstp dword [esi]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3073,89 +2119,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3167,7 +2131,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3180,18 +2144,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3203,7 +2159,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3216,19 +2172,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3238,13 +2185,12 @@ "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -3254,15 +2200,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x5, #8]", + "str s6, [x8]", + "ldr s6, [x6, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3274,7 +2217,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3287,35 +2230,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3328,10 +2245,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3343,30 +2260,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3379,10 +2275,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3394,18 +2290,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3418,10 +2305,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -3433,18 +2320,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3456,7 +2335,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3469,11 +2348,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3486,10 +2363,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3501,26 +2378,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "mov w24, #0x0", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mov w20, #0x0", + "strb w20, [x28, #1017]", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3532,7 +2395,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3545,11 +2408,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3562,10 +2423,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3577,30 +2438,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3613,10 +2454,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3631,15 +2472,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3652,10 +2484,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -3670,15 +2502,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s5, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3690,7 +2514,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3703,23 +2527,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3732,10 +2542,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3750,32 +2560,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3788,8 +2573,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -3804,34 +2589,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3844,10 +2604,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3859,30 +2619,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", + "ldr s5, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3894,7 +2635,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3907,11 +2648,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3926,8 +2665,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3939,19 +2678,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x8]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov w20, #0x1", + "strb w20, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3964,8 +2695,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", @@ -3979,18 +2710,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4002,7 +2725,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4015,11 +2738,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4034,8 +2755,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4047,18 +2768,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4071,10 +2783,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -4089,19 +2801,28 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1019]", + "sub w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w21, #0x2 (2)", + "and w22, w22, #0x7", + "ldrb w23, [x28, #1298]", + "lsl w21, w20, w21", + "orr w21, w23, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", + "lsl w22, w20, w22", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1019]", + "add w22, w21, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4133,15 +2854,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w20, w21", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4170,16 +2892,17 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x10]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", + "ldrb w22, [x28, #1298]", + "lsl w20, w20, w21", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", + "add w20, w21, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "Block4": { - "ExpectedInstructionCount": 237, + "ExpectedInstructionCount": 206, "x86Insts": [ "push ebp", "push edi", @@ -4248,10 +2971,9 @@ "ldr w4, [x8, #104]", "add w9, w8, #0x38 (56)", "add w10, w8, #0x30 (48)", - "ldrb w20, [x28, #1019]", - "mov w21, #0x2098", - "movk w21, #0x5, lsl #16", - "ldr d2, [x21]", + "mov w20, #0x2098", + "movk w20, #0x5, lsl #16", + "ldr d2, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4279,23 +3001,13 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "str w10, [x8, #12]", "ldr w11, [x8, #100]", "str w9, [x8, #8]", "ldr w7, [x8, #108]", "str w4, [x8, #40]", "ldr w4, [x8, #96]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4307,7 +3019,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4320,11 +3032,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4337,10 +3047,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4355,11 +3065,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4386,13 +3092,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4421,16 +3121,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4458,26 +3148,28 @@ "ldp x17, x30, [sp], #16", "mov v2.8b, v0.8b", "str d2, [x8]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "mov w20, #0x423", "movk w20, #0x1, lsl #16", - "mov w22, #0xd0bc", - "movk w22, #0x6, lsl #16", - "add w22, w20, w22", + "mov w21, #0xd0bc", + "movk w21, #0x6, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", + "ldrb w20, [x28, #1019]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "mov w23, #0x1", + "lsl w20, w23, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", "ldr x0, [x28, #2280]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block5": { - "ExpectedInstructionCount": 1199, + "ExpectedInstructionCount": 972, "x86Insts": [ "fld dword [esp + 0x80]", "fsub dword [esp + 0x7c]", @@ -4530,7 +3222,6 @@ "test al,al" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4559,17 +3250,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "ldr s3, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4581,7 +3262,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4594,11 +3275,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4611,10 +3290,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -4629,15 +3308,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x8, #136]", "ldr w5, [x8, #140]", "ldr s17, [x8, #124]", "str w6, [x8, #56]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4663,10 +3338,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4678,7 +3352,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4691,36 +3365,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x0", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4733,10 +3380,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4751,27 +3398,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "mov w20, #0x0", + "strb w20, [x28, #1017]", + "ldr s4, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4783,7 +3412,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4796,11 +3425,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4813,10 +3440,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -4831,11 +3458,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4862,13 +3485,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4897,15 +3514,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9]", + "ldr s4, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4917,7 +3526,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4930,11 +3539,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4947,10 +3554,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -4965,16 +3572,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr s16, [x8, #44]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4987,10 +3585,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5005,10 +3603,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9]", + "ldr s4, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5020,7 +3615,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5033,11 +3628,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5050,10 +3643,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5068,11 +3661,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5099,13 +3688,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5134,15 +3717,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, #4]", + "ldr s4, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5154,7 +3729,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5167,11 +3742,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5184,10 +3757,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5202,15 +3775,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5223,10 +3787,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5241,10 +3805,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, #4]", + "ldr s4, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5256,7 +3817,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5269,11 +3830,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5286,10 +3845,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5304,11 +3863,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5335,13 +3890,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5370,15 +3919,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, #8]", + "ldr s4, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5390,7 +3931,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5403,11 +3944,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5420,10 +3959,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5438,15 +3977,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5477,15 +4007,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, #8]", + "ldr s3, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5497,7 +4019,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5510,11 +4032,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5527,10 +4047,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5545,17 +4065,13 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "str w5, [x8, #28]", "str s16, [x8, #16]", "add w5, w8, #0x44 (68)", "str s17, [x8, #12]", "str w5, [x8, #24]", "str w9, [x8, #20]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5582,23 +4098,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", + "str s2, [x21]", "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "ldr s3, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5610,48 +4112,23 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5664,10 +4141,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -5679,34 +4156,16 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov x23, x0", - "ubfx x24, x23, #1, #1", - "ubfx x25, x23, #0, #1", - "ubfx x23, x23, #2, #1", - "orr w24, w24, w23", - "orr w25, w25, w23", - "rmif x24, #63, #nzCv", - "rmif x25, #62, #nZcv", - "eor w26, w23, #0x1", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "mov x20, x0", + "ubfx x21, x20, #1, #1", + "ubfx x22, x20, #0, #1", + "ubfx x20, x20, #2, #1", + "orr w21, w21, w20", + "orr w22, w22, w20", + "rmif x21, #63, #nzCv", + "rmif x22, #62, #nZcv", + "mov w21, #0x1", + "eor w26, w20, #0x1", "cset x20, lo", "csel x20, x20, xzr, ne", "strb w20, [x8, #48]", @@ -5724,7 +4183,13 @@ "movk w22, #0x2, lsl #16", "add w22, w20, w22", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", + "ldrb w20, [x28, #1019]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", + "ldrb w23, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w23, w20", + "strb w20, [x28, #1298]", "ldr x0, [x28, #2280]", "and x3, x22, #0xfffff", "add x0, x0, x3, lsl #4", @@ -5732,7 +4197,7 @@ ] }, "Block6": { - "ExpectedInstructionCount": 1135, + "ExpectedInstructionCount": 925, "x86Insts": [ "push ebp", "push edi", @@ -5786,7 +4251,6 @@ "ldr w7, [x8, #36]", "ldr w4, [x8, #28]", "ldr w6, [x8, #24]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5815,17 +4279,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #4]", + "ldr s3, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5837,7 +4291,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5850,11 +4304,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5867,10 +4319,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5885,13 +4337,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w9, [x8, #40]", "ldr w11, [x8, #44]", "ldr w10, [x8, #48]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4]", + "ldr s3, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5903,7 +4352,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5916,18 +4365,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5939,7 +4380,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5952,11 +4393,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5971,8 +4410,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5984,18 +4423,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6026,15 +4456,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7]", + "ldr s3, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6046,7 +4468,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6059,18 +4481,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov w20, #0x8", + "ldr s4, [x5, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6082,7 +4497,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6095,11 +4510,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6114,8 +4527,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6127,13 +4540,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6145,7 +4555,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6158,18 +4568,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #8]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6181,7 +4583,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6194,11 +4596,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6211,10 +4611,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6226,18 +4626,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6250,10 +4641,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -6265,18 +4656,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6288,7 +4671,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6301,18 +4684,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #8]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6324,7 +4699,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6337,11 +4712,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6354,10 +4727,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6369,13 +4742,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #4]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6387,7 +4757,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6399,19 +4769,11 @@ "ld1 {v2.2d, v3.2d}, [sp], #32", "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #8]", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x5, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6423,7 +4785,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6436,11 +4798,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6453,10 +4813,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6468,18 +4828,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6492,10 +4843,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -6507,18 +4858,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6530,7 +4873,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6543,23 +4886,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6572,8 +4901,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -6587,13 +4916,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6605,7 +4931,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6618,23 +4944,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6647,10 +4959,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6662,18 +4974,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6686,10 +4989,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -6701,18 +5004,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6724,7 +5019,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6737,23 +5032,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6766,10 +5047,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6781,18 +5062,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6805,10 +5077,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -6820,45 +5092,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "mov w24, #0x0", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "movi v6.2d, #0x0", + "mov w21, #0x0", + "strb w21, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6871,10 +5110,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -6886,34 +5125,50 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov x20, x0", - "ubfx x23, x20, #1, #1", - "ubfx x24, x20, #0, #1", - "ubfx x20, x20, #2, #1", - "orr w23, w23, w20", - "orr w24, w24, w20", - "rmif x23, #63, #nzCv", - "rmif x24, #62, #nZcv", - "eor w26, w20, #0x1", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", + "rmif x22, #63, #nzCv", + "rmif x23, #62, #nZcv", + "mov w22, #0x1", + "eor w26, w21, #0x1", + "ldrb w21, [x28, #1019]", + "sub w21, w21, #0x4 (4)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", + "str q5, [x0, #1040]", + "add w23, w21, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", + "str q4, [x0, #1040]", + "add w23, w21, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add w23, w21, #0x3 (3)", "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "add w23, w21, #0x7 (7)", + "and w23, w23, #0x7", + "sub w20, w20, w21", + "ldrb w21, [x28, #1298]", + "mov w24, #0xf0f", + "lsr w20, w24, w20", + "orr w20, w21, w20", + "strb w20, [x28, #1298]", + "ldrb w20, [x28, #1298]", + "lsl w21, w22, w23", + "bic w20, w20, w21", + "strb w20, [x28, #1298]" ] }, "Block7": { - "ExpectedInstructionCount": 1045, + "ExpectedInstructionCount": 852, "x86Insts": [ "fld dword [ebx + 0x4]", "fld dword [ebx]", @@ -6942,7 +5197,6 @@ "fstp dword [edi]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -6971,17 +5225,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7]", + "ldr s3, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6993,7 +5237,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7006,18 +5250,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7029,7 +5265,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7037,23 +5273,15 @@ "msr nzcv, x4", "ldp x4, x5, [x28, #280]", "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7065,7 +5293,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7078,23 +5306,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7107,8 +5321,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -7122,13 +5336,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7140,7 +5351,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7153,23 +5364,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7182,10 +5379,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7197,18 +5394,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7221,10 +5409,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -7236,18 +5424,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7259,7 +5439,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7272,11 +5452,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7289,10 +5467,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7304,26 +5482,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "mov w24, #0x0", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mov w20, #0x0", + "strb w20, [x28, #1017]", + "ldr s6, [x6, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7335,7 +5499,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7348,11 +5512,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7367,8 +5529,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7380,13 +5542,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s6, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7398,7 +5557,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7411,23 +5570,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7440,10 +5585,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7455,18 +5600,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7479,10 +5615,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -7494,18 +5630,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s6, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7517,7 +5645,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7530,11 +5658,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7549,8 +5675,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7562,18 +5688,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7586,10 +5703,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -7601,18 +5718,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s5, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7624,7 +5733,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7637,11 +5746,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7654,10 +5761,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7669,25 +5776,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #8]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", + "ldr s5, [x6, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7699,7 +5792,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7712,11 +5805,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7728,11 +5819,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7747,15 +5838,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7768,10 +5850,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -7786,27 +5868,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "strb w20, [x28, #1017]", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7818,7 +5881,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7831,11 +5894,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7848,10 +5909,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7866,15 +5927,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7905,17 +5957,27 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", + "ldrb w20, [x28, #1019]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "add w22, w20, #0x4 (4)", + "and w22, w22, #0x7", + "ldrb w23, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w23, w20", + "strb w20, [x28, #1298]", + "ldrb w20, [x28, #1298]", + "lsl w22, w21, w22", + "bic w20, w20, w22", + "strb w20, [x28, #1298]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7951,7 +6013,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -7981,16 +6042,17 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x11]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "Block8": { - "ExpectedInstructionCount": 258, + "ExpectedInstructionCount": 255, "x86Insts": [ "fstp st0", "fstp st3", @@ -8020,89 +6082,82 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "mov w24, #0x1", - "lsl w22, w24, w22", - "orr w22, w23, w22", - "lsl w23, w24, w20", - "bic w22, w22, w23", + "mov w21, #0x1", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w23, w24, w23", - "orr w22, w22, w23", - "lsl w23, w24, w20", + "ldrb w23, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w24, w23", - "orr w22, w22, w23", - "lsl w23, w24, w20", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w23, w24, w23", - "orr w22, w22, w23", - "lsl w23, w24, w20", + "ldrb w23, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb w21, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "mov w22, #0x0", + "strb w22, [x28, #1017]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w21, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb w22, [x28, #1017]", + "add w23, w8, #0x38 (56)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8131,25 +6186,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w24, w20", - "bic w22, w22, w23", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", + "lsl w24, w21, w20", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w21, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb w22, [x28, #1017]", + "add w23, w8, #0x2c (44)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8178,25 +6234,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w24, w20", - "bic w22, w22, w23", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", + "lsl w24, w21, w20", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w21, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb w22, [x28, #1017]", + "add w22, w8, #0x28 (40)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8225,13 +6282,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w21, w24, w20", - "bic w21, w22, w21", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8261,26 +6319,27 @@ "ldp x17, x30, [sp], #16", "mov v2.8b, v0.8b", "str d2, [x8]", - "lsl w22, w24, w20", - "bic w21, w21, w22", + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "mov w20, #0x893", "movk w20, #0x1, lsl #16", - "mov w22, #0xd0b4", - "movk w22, #0x6, lsl #16", - "add w22, w20, w22", + "mov w21, #0xd0b4", + "movk w21, #0x6, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", "ldr x0, [x28, #2280]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block9": { - "ExpectedInstructionCount": 258, + "ExpectedInstructionCount": 255, "x86Insts": [ "fstp st0", "fstp st3", @@ -8310,89 +6369,82 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "mov w24, #0x1", - "lsl w22, w24, w22", - "orr w22, w23, w22", - "lsl w23, w24, w20", - "bic w22, w22, w23", + "mov w21, #0x1", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w23, w24, w23", - "orr w22, w22, w23", - "lsl w23, w24, w20", + "ldrb w23, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w24, w23", - "orr w22, w22, w23", - "lsl w23, w24, w20", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w23, w24, w23", - "orr w22, w22, w23", - "lsl w23, w24, w20", + "ldrb w23, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb w21, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "mov w22, #0x0", + "strb w22, [x28, #1017]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w21, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb w22, [x28, #1017]", + "add w23, w8, #0x38 (56)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8421,25 +6473,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w24, w20", - "bic w22, w22, w23", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", + "lsl w24, w21, w20", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w21, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb w22, [x28, #1017]", + "add w23, w8, #0x2c (44)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8468,25 +6521,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w24, w20", - "bic w22, w22, w23", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", + "lsl w24, w21, w20", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w21, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb w22, [x28, #1017]", + "add w22, w8, #0x28 (40)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8515,13 +6569,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w21, w24, w20", - "bic w21, w22, w21", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8551,20 +6606,21 @@ "ldp x17, x30, [sp], #16", "mov v2.8b, v0.8b", "str d2, [x8]", - "lsl w22, w24, w20", - "bic w21, w21, w22", + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "mov w20, #0x973", "movk w20, #0x1, lsl #16", - "mov w22, #0xd0b4", - "movk w22, #0x6, lsl #16", - "add w22, w20, w22", + "mov w21, #0xd0b4", + "movk w21, #0x6, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", "ldr x0, [x28, #2280]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] diff --git a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json index 6d463d0f92..adac49162e 100644 --- a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json +++ b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json @@ -13,7 +13,7 @@ }, "Instructions": { "Block1": { - "ExpectedInstructionCount": 34065, + "ExpectedInstructionCount": 25782, "x86Insts": [ "sub esp,0x118", "fld dword [ecx + 0x1084]", @@ -929,7 +929,6 @@ ], "ExpectedArm64ASM": [ "sub w8, w8, #0x118 (280)", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4228]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -958,17 +957,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4104]", + "ldr s3, [x5, #4104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -980,7 +969,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -993,11 +982,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1010,10 +997,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1028,11 +1015,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1060,12 +1042,6 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4224]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1094,15 +1070,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4108]", + "ldr s3, [x5, #4108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1114,7 +1082,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1127,11 +1095,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1144,10 +1110,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1162,11 +1128,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1193,13 +1155,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4220]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1228,15 +1184,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4112]", + "ldr s3, [x5, #4112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1248,7 +1196,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1261,11 +1209,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1278,10 +1224,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1296,11 +1242,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1327,13 +1269,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4216]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1362,15 +1298,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4116]", + "ldr s3, [x5, #4116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1382,7 +1310,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1395,11 +1323,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1412,10 +1338,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1430,11 +1356,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1461,13 +1383,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4212]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1496,15 +1412,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4120]", + "ldr s3, [x5, #4120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1516,7 +1424,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1529,11 +1437,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1546,10 +1452,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1564,11 +1470,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1595,13 +1497,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4208]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1630,15 +1526,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4124]", + "ldr s3, [x5, #4124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1650,7 +1538,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1663,11 +1551,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1680,10 +1566,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1698,11 +1584,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1729,13 +1611,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4204]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1764,15 +1640,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4128]", + "ldr s3, [x5, #4128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1784,7 +1652,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1797,11 +1665,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1814,10 +1680,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1832,11 +1698,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1863,13 +1725,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4200]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1898,15 +1754,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4132]", + "ldr s3, [x5, #4132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1918,7 +1766,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1931,11 +1779,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1948,10 +1794,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1966,11 +1812,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1997,13 +1839,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4196]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2032,15 +1868,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4136]", + "ldr s3, [x5, #4136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2052,7 +1880,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2065,11 +1893,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2082,10 +1908,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2100,11 +1926,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2131,13 +1953,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4192]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2166,15 +1982,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4140]", + "ldr s3, [x5, #4140]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2186,7 +1994,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2199,11 +2007,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2216,10 +2022,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2234,11 +2040,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2265,13 +2067,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4188]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2300,15 +2096,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4144]", + "ldr s3, [x5, #4144]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2320,7 +2108,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2333,11 +2121,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2350,10 +2136,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2368,11 +2154,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2399,13 +2181,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4184]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2434,15 +2210,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4148]", + "ldr s3, [x5, #4148]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2454,7 +2222,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2467,11 +2235,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2484,10 +2250,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2502,11 +2268,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2533,13 +2295,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4180]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2568,15 +2324,93 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4152]", + "ldr s3, [x5, #4152]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w20, w8, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x20]", + "ldr s2, [x5, #4176]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2604,8 +2438,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x5, #4156]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2617,11 +2450,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2636,11 +2496,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2667,14 +2523,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4176]", + "str s2, [x20]", + "ldr s2, [x5, #4172]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2702,15 +2552,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4156]", + "ldr s3, [x5, #4160]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2722,7 +2564,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2735,11 +2577,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2752,10 +2592,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2770,11 +2610,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2801,14 +2637,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4172]", + "str s2, [x20]", + "ldr s2, [x5, #4168]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2836,15 +2666,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4160]", + "ldr s3, [x5, #4164]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2856,7 +2678,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2869,11 +2691,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2886,10 +2706,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2904,11 +2724,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2935,14 +2751,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4168]", + "str s2, [x20]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2970,15 +2780,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4164]", + "ldr s3, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2990,7 +2792,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3003,11 +2805,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3020,10 +2820,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3035,14 +2835,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mov w20, #0x0", + "strb w20, [x28, #1017]", + "add w21, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3055,8 +2853,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3068,15 +2866,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3088,7 +2880,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3101,31 +2893,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x0", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3137,7 +2908,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3150,35 +2921,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3191,10 +2936,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3206,31 +2951,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3243,8 +2968,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3256,15 +2981,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3276,7 +2995,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3289,30 +3008,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3324,7 +3023,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3337,35 +3036,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3378,10 +3051,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3393,31 +3066,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3430,8 +3083,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3443,15 +3096,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3463,7 +3110,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3476,30 +3123,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3511,7 +3138,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3524,35 +3151,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3565,10 +3166,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3580,31 +3181,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3617,8 +3197,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3630,15 +3210,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3650,7 +3224,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3663,18 +3237,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3686,7 +3252,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3699,11 +3265,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3716,10 +3280,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3731,14 +3295,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3751,8 +3311,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3764,15 +3324,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3784,7 +3338,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3797,18 +3351,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3820,7 +3366,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3833,11 +3379,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3850,10 +3394,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3865,14 +3409,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3885,8 +3425,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3898,15 +3438,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3918,7 +3452,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3931,18 +3465,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3954,7 +3480,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3967,11 +3493,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3984,10 +3508,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3999,14 +3523,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4019,8 +3539,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -4032,15 +3552,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4052,7 +3566,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4065,18 +3579,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4088,7 +3594,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4101,11 +3607,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4118,10 +3622,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -4133,14 +3637,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4153,8 +3653,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -4166,15 +3666,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "fmov s8, s0", + "str s8, [x21]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4186,10 +3680,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -4202,15 +3699,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "mov w21, #0xc1d0", + "movk w21, #0xb3, lsl #16", + "ldr s3, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4222,7 +3713,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4235,11 +3726,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4252,11 +3741,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -4270,11 +3759,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w22, w8, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4301,31 +3787,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4338,10 +3800,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -4356,17 +3818,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0xc1d0", - "movk w24, #0xb3, lsl #16", - "ldr s2, [x24]", + "mov w22, #0xc1d4", + "movk w22, #0xb3, lsl #16", + "ldr s3, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4378,7 +3832,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4391,23 +3845,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x5 (5)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4420,10 +3860,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4438,28 +3878,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w23, w8, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4486,19 +3905,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4511,10 +3918,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -4529,17 +3936,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w25, #0xc1d4", - "movk w25, #0xb3, lsl #16", - "ldr s2, [x25]", + "mov w23, #0xc1d8", + "movk w23, #0xb3, lsl #16", + "ldr s3, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4551,7 +3950,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4564,11 +3963,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4581,10 +3978,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4599,11 +3996,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w24, w8, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4630,19 +4023,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x24]", + "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4654,13 +4036,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -4673,17 +4052,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0xc1d8", - "movk w12, #0xb3, lsl #16", - "ldr s2, [x12]", + "ldr s3, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4695,7 +4064,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4708,11 +4077,42 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov w24, #0xc1dc", + "movk w24, #0xb3, lsl #16", + "ldr s3, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4724,11 +4124,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4743,11 +4170,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w25, w8, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4774,14 +4197,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "str s2, [x25]", + "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4809,15 +4226,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "ldr s3, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4829,7 +4238,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4842,11 +4251,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4859,10 +4266,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -4877,12 +4284,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w13, #0xc1dc", - "movk w13, #0xb3, lsl #16", - "ldr s2, [x13]", + "mov w25, #0xc1e0", + "movk w25, #0xb3, lsl #16", + "ldr s3, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4894,7 +4298,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4907,11 +4311,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4924,10 +4326,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4942,11 +4344,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w12, w8, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4973,14 +4371,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "str s2, [x12]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5008,15 +4400,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "ldr s3, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5028,7 +4412,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5041,11 +4425,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5058,10 +4440,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5076,12 +4458,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w14, #0xc1e0", - "movk w14, #0xb3, lsl #16", - "ldr s2, [x14]", + "mov w12, #0xc1e4", + "movk w12, #0xb3, lsl #16", + "ldr s3, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5093,7 +4472,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5106,11 +4485,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5123,10 +4500,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5141,11 +4518,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w13, w8, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5172,14 +4545,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "str s2, [x13]", + "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5207,15 +4574,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "ldr s3, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5227,7 +4586,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5240,11 +4599,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5257,10 +4614,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5275,12 +4632,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w15, #0xc1e4", - "movk w15, #0xb3, lsl #16", - "ldr s2, [x15]", + "mov w13, #0xc1e8", + "movk w13, #0xb3, lsl #16", + "ldr s3, [x13]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5292,7 +4646,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5305,11 +4659,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5322,10 +4674,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5340,11 +4692,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w14, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5371,14 +4719,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "str s2, [x14]", + "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5406,15 +4748,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "ldr s3, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5426,7 +4760,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5439,11 +4773,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5456,10 +4788,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5474,12 +4806,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w16, #0xc1e8", - "movk w16, #0xb3, lsl #16", - "ldr s2, [x16]", + "mov w14, #0xc1ec", + "movk w14, #0xb3, lsl #16", + "ldr s3, [x14]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5491,7 +4820,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5504,11 +4833,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5521,10 +4848,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5539,11 +4866,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w15, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5570,14 +4893,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "str s2, [x15]", + "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5605,15 +4922,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "ldr s3, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5625,7 +4934,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5638,11 +4947,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5655,11 +4962,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -5670,15 +4977,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w17, #0xc1ec", - "movk w17, #0xb3, lsl #16", - "ldr s2, [x17]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5690,7 +4992,35 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x8]", + "ldr s4, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5703,11 +5033,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5719,12 +5048,39 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -5735,14 +5091,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb w20, [x28, #1017]", + "add w15, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5755,8 +5108,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -5768,15 +5121,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "fmov s6, s0", + "str s6, [x15]", + "ldr s6, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5788,7 +5135,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5801,30 +5148,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5836,7 +5163,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5849,35 +5176,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5890,10 +5191,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5905,31 +5206,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "strb w20, [x28, #1017]", + "add w15, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5942,8 +5223,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -5955,15 +5236,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "fmov s8, s0", + "str s8, [x15]", + "ldr s8, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5975,7 +5250,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5988,30 +5263,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6023,7 +5278,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6036,35 +5291,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6077,10 +5306,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -6092,31 +5321,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w15, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6129,8 +5337,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -6142,15 +5350,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "fmov s8, s0", + "str s8, [x15]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6162,10 +5364,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -6178,27 +5383,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "mov w15, #0xc1f0", + "movk w15, #0xb3, lsl #16", + "ldr s3, [x15]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6210,7 +5397,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6223,35 +5410,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6264,11 +5425,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -6282,28 +5443,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w15, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6330,14 +5471,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "str s2, [x15]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6349,10 +5484,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -6365,15 +5503,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "mov w15, #0xc1f4", + "movk w15, #0xb3, lsl #16", + "ldr s4, [x15]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6385,7 +5517,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6398,11 +5530,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6415,11 +5545,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -6433,11 +5563,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w15, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6464,31 +5591,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x4 (4)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x5 (5)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x15]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6501,10 +5604,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -6519,17 +5622,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w29, #0xc1f0", - "movk w29, #0xb3, lsl #16", - "ldr s2, [x29]", + "mov w15, #0xc1f8", + "movk w15, #0xb3, lsl #16", + "ldr s5, [x15]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6541,7 +5636,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6554,35 +5649,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x6 (6)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6595,10 +5664,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6613,28 +5682,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x5 (5)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w15, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6661,31 +5710,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x15]", + "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6697,13 +5723,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -6716,17 +5739,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w29, #0xc1f4", - "movk w29, #0xb3, lsl #16", - "ldr s2, [x29]", + "ldr s6, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6738,7 +5751,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6751,35 +5764,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x3 (3)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6792,11 +5779,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -6810,28 +5797,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov w15, #0xc1fc", + "movk w15, #0xb3, lsl #16", + "ldr s6, [x15]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6843,11 +5811,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -6857,20 +5824,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6885,9 +5841,9 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -6901,17 +5857,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w29, #0xc1f8", - "movk w29, #0xb3, lsl #16", - "ldr s2, [x29]", + "strb w20, [x28, #1017]", + "add w16, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6923,10 +5870,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -6936,35 +5884,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x3 (3)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x16]", + "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6976,13 +5898,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -6995,28 +5914,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s7, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7028,11 +5926,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -7042,15 +5939,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7062,10 +5953,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -7075,18 +5969,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "strb w20, [x28, #1017]", + "add w16, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7098,10 +5985,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -7111,11 +5999,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7127,13 +6013,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -7143,15 +6026,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w29, #0xc1fc", - "movk w29, #0xb3, lsl #16", - "ldr s2, [x29]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7163,7 +6041,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7176,35 +6054,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7217,11 +6069,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -7232,31 +6084,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7269,8 +6100,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -7282,15 +6113,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7302,7 +6127,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7315,30 +6140,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7350,7 +6155,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7363,35 +6168,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7404,10 +6183,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -7419,31 +6198,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7456,8 +6214,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -7469,15 +6227,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7489,7 +6241,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7502,18 +6254,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7525,7 +6269,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7538,11 +6282,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7555,10 +6297,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -7570,14 +6312,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7590,8 +6328,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -7603,15 +6341,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "fmov s8, s0", + "str s8, [x16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7623,10 +6354,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -7639,15 +6373,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7659,10 +6384,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -7675,8 +6403,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w16, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7689,12 +6416,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -7704,14 +6429,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s2, s0", + "str s2, [x16]", + "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7723,11 +6443,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -7737,15 +6456,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s7, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7757,7 +6471,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7770,18 +6484,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7793,10 +6498,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -7809,8 +6517,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7823,11 +6529,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -7841,11 +6547,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7872,19 +6574,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x16]", + "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7896,11 +6587,66 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s7, [x8, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -7915,20 +6661,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x4 (4)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7941,10 +6673,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7959,11 +6691,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7990,14 +6718,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "str s2, [x16]", + "ldr s2, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8025,15 +6747,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "ldr s7, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8045,7 +6759,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8058,11 +6772,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8075,10 +6787,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -8093,15 +6805,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8114,8 +6817,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -8132,11 +6835,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8163,14 +6862,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "str s2, [x16]", + "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8198,15 +6891,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8218,7 +6903,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8231,11 +6916,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8248,11 +6931,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -8263,18 +6946,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x3 (3)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "strb w20, [x28, #1017]", + "add w16, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8287,12 +6963,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8302,14 +6976,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s7, s0", + "str s7, [x16]", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8321,11 +6990,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8335,15 +7003,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8355,7 +7018,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8368,18 +7031,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8391,10 +7045,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8404,11 +7061,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8421,8 +7077,36 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x16]", + "strb w20, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", @@ -8439,15 +7123,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov w16, #0xc200", + "movk w16, #0xb3, lsl #16", + "ldr s6, [x16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8459,11 +7137,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -8478,16 +7183,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w16, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8514,14 +7211,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "str s2, [x16]", + "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8549,27 +7240,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8581,10 +7251,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8597,32 +7270,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov w16, #0xc204", + "movk w16, #0xb3, lsl #16", + "ldr s7, [x16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8634,13 +7284,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8650,31 +7297,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8689,8 +7314,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8700,15 +7327,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "add w16, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8720,10 +7343,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8733,30 +7357,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s2, s0", + "str s2, [x16]", + "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8784,8 +7387,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8797,13 +7399,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8813,14 +7412,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8835,8 +7429,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8846,32 +7442,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8884,12 +7458,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8899,20 +7471,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w30, #0xc200", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8924,7 +7485,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8937,35 +7498,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x3 (3)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8977,13 +7513,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8993,31 +7526,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9030,10 +7541,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9043,15 +7556,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9063,10 +7571,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9076,11 +7585,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9092,13 +7599,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9108,15 +7612,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w30, #0xc204", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9128,10 +7626,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9144,32 +7645,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9182,10 +7657,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9200,28 +7675,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9248,14 +7702,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "str s2, [x16]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9283,27 +7731,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "ldr s8, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9315,7 +7743,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9328,11 +7756,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9345,11 +7771,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -9363,11 +7789,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9382,8 +7803,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9393,15 +7816,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w16, w8, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9413,10 +7831,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9426,18 +7845,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s2, s0", + "str s2, [x16]", + "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9465,8 +7875,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s8, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9478,13 +7887,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9494,14 +7900,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9516,8 +7917,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9527,15 +7930,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9547,10 +7945,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9560,11 +7959,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9576,13 +7973,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9592,18 +7986,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9615,13 +8001,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9631,14 +8014,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9651,10 +8029,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9664,15 +8044,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9684,10 +8059,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9697,18 +8073,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9720,7 +8087,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9733,11 +8100,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9750,8 +8115,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", @@ -9768,15 +8133,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9789,10 +8145,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9807,11 +8163,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9838,14 +8190,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "str s2, [x16]", + "ldr s2, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9873,27 +8219,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "ldr s8, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9905,7 +8231,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9918,11 +8244,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9935,12 +8259,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9953,11 +8277,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9972,8 +8291,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9983,15 +8304,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w16, w8, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10003,10 +8319,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -10016,18 +8333,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "fmov s2, s0", + "str s2, [x16]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10055,8 +8363,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s8, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10068,13 +8375,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -10084,14 +8388,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10106,8 +8405,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -10117,15 +8418,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10137,10 +8433,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -10150,11 +8447,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10166,13 +8461,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -10182,18 +8474,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10205,13 +8489,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -10221,14 +8502,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10241,10 +8517,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -10254,15 +8532,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10274,10 +8547,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -10287,18 +8561,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10310,7 +8575,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10323,11 +8588,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10340,8 +8603,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", @@ -10358,15 +8621,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10379,10 +8633,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -10397,11 +8651,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10428,14 +8678,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "str s2, [x16]", + "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10463,27 +8707,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "ldr s8, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10495,7 +8719,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10508,11 +8732,39 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10525,11 +8777,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -10543,11 +8795,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10574,14 +8822,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "str s2, [x16]", + "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10609,15 +8851,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "ldr s8, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10629,7 +8863,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10642,11 +8876,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10659,10 +8891,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -10674,14 +8906,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10694,8 +8921,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -10707,15 +8934,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10727,7 +8948,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10740,11 +8961,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10757,10 +8976,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10775,15 +8994,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov w16, #0xc208", + "movk w16, #0xb3, lsl #16", + "ldr s8, [x16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10795,11 +9008,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -10814,11 +9054,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w16, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10845,14 +9082,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "str s2, [x16]", + "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10880,15 +9111,93 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "ldr s9, [x8, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w16, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x16]", + "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10916,8 +9225,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10929,11 +9237,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10948,15 +9283,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10969,10 +9295,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -10987,11 +9313,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11018,14 +9340,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "str s2, [x16]", + "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11053,27 +9369,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "ldr s9, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11085,7 +9381,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11098,11 +9394,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11115,10 +9409,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -11133,11 +9427,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11164,14 +9454,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "str s2, [x16]", + "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11199,8 +9483,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11212,13 +9495,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -11228,15 +9508,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w30, #0xc208", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11248,10 +9522,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -11264,32 +9541,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11302,10 +9553,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11320,28 +9571,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11368,14 +9598,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "str s2, [x16]", + "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11403,15 +9627,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "ldr s9, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11423,7 +9639,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11436,11 +9652,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11453,10 +9667,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -11471,11 +9685,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11502,14 +9712,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "str s2, [x16]", + "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11537,15 +9741,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "ldr s9, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11557,7 +9753,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11570,11 +9766,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11587,10 +9781,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -11605,15 +9799,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11626,10 +9811,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11644,11 +9829,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11675,14 +9856,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "str s2, [x16]", + "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11710,15 +9885,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "ldr s9, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11730,7 +9897,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11743,11 +9910,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11760,10 +9925,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -11778,11 +9943,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11809,14 +9970,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "str s2, [x16]", + "ldr s2, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11844,15 +9999,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "ldr s9, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11864,7 +10011,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11877,11 +10024,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11894,10 +10039,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -11912,15 +10057,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11933,10 +10069,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11951,11 +10087,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11982,14 +10114,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "str s2, [x16]", + "ldr s2, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12017,15 +10143,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "ldr s9, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12037,7 +10155,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12050,11 +10168,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12067,10 +10183,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -12085,11 +10201,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12116,14 +10228,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "str s2, [x16]", + "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12151,15 +10257,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "ldr s9, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12171,7 +10269,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12184,11 +10282,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12201,10 +10297,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -12219,15 +10315,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12240,10 +10327,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -12258,11 +10345,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12289,14 +10372,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "str s2, [x16]", + "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12324,15 +10401,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "ldr s9, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12344,7 +10413,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12357,11 +10426,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12374,10 +10441,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -12392,11 +10459,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12423,14 +10486,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "str s2, [x16]", + "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12458,15 +10515,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "ldr s9, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12478,7 +10527,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12491,11 +10540,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12508,10 +10555,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -12526,15 +10573,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12547,10 +10585,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -12565,11 +10603,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12596,14 +10630,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "str s2, [x16]", + "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12631,15 +10659,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "ldr s9, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12651,7 +10671,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12664,11 +10684,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12681,10 +10699,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -12699,11 +10717,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12730,14 +10744,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "str s2, [x16]", + "ldr s2, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12765,15 +10773,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "ldr s9, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12785,7 +10785,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12798,11 +10798,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12815,10 +10813,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -12833,15 +10831,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12854,10 +10843,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -12872,11 +10861,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12903,14 +10888,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "str s2, [x16]", + "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12935,18 +10914,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w16, w8, #0xc0 (192)", + "str s2, [x16]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12974,8 +10947,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12988,8 +10959,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -13006,11 +10977,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0xa0 (160)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13037,14 +11004,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "str s2, [x16]", + "ldr s2, [x8, #160]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13072,15 +11033,39 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "mov w16, #0x8000", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v2.16b, v2.16b, v9.16b", + "add w17, w8, #0x8c (140)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13108,8 +11093,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13121,13 +11105,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13137,18 +11118,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13161,11 +11133,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -13179,11 +11151,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0xdc (220)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13210,14 +11178,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "str s2, [x17]", + "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13245,15 +11207,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v2.16b, v2.16b, v9.16b", + "ldr s9, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13265,7 +11222,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13278,11 +11235,40 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13294,12 +11280,39 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -13313,11 +11326,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0xfc (252)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13344,14 +11353,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "str s2, [x17]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13376,18 +11379,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w17, w8, #0xc8 (200)", + "str s2, [x17]", + "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13415,8 +11412,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13429,11 +11424,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -13447,15 +11442,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w17, w8, #0xb8 (184)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13468,12 +11455,37 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8, #184]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13486,11 +11498,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13502,11 +11510,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13516,15 +11523,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13536,10 +11537,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13552,16 +11556,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0xa8 (168)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13588,9 +11583,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #192]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "str s2, [x17]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13618,8 +11612,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13631,11 +11624,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -13650,11 +11670,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13666,11 +11682,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13680,15 +11695,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #160]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #160]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13700,10 +11709,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13716,25 +11728,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mov w30, #0x8000", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x98 (152)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13761,14 +11755,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #140]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", + "str s2, [x17]", + "ldr s2, [x8, #152]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13796,15 +11784,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v2.16b, v2.16b, v9.16b", + "add w17, w8, #0x84 (132)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13816,10 +11799,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13829,11 +11813,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13845,13 +11827,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13864,11 +11843,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13880,11 +11855,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13894,15 +11868,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #220]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13914,10 +11882,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13930,23 +11901,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "add w17, w8, #0xd4 (212)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13958,10 +11913,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13971,11 +11927,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13987,13 +11941,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -14006,10 +11957,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v2.16b, v2.16b, v9.16b", + "ldr s9, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14021,7 +11972,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14034,11 +11985,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14051,10 +12000,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -14069,11 +12018,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x110 (272)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14088,7 +12033,7 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", + "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -14099,15 +12044,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #252]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "mov v9.8b, v0.8b", + "str d9, [x17]", + "ldr s9, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14119,7 +12058,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14132,19 +12071,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14159,8 +12088,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -14170,10 +12101,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #200]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s9, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14185,7 +12116,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14198,11 +12129,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14215,11 +12144,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -14233,11 +12162,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14264,14 +12189,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #184]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #184]", + "str s2, [x17]", + "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14299,15 +12218,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "ldr s9, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14319,7 +12230,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14332,11 +12243,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14349,11 +12258,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -14367,11 +12276,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0xe4 (228)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14398,14 +12303,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #168]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "str s2, [x17]", + "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14433,15 +12332,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "ldr d9, [x8, #272]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14453,9 +12344,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -14466,11 +12357,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14483,11 +12372,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -14501,10 +12390,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "ldr s9, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14516,7 +12402,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14529,11 +12415,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14546,11 +12430,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -14564,11 +12448,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x104 (260)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14595,14 +12475,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #152]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #152]", + "str s2, [x17]", + "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14630,24 +12504,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14659,11 +12516,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -14673,15 +12529,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14693,10 +12543,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -14709,15 +12562,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "add w17, w8, #0xf4 (244)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14729,10 +12574,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -14742,11 +12588,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14758,13 +12602,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -14777,11 +12618,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v2.16b, v2.16b, v9.16b", + "add w17, w8, #0x10c (268)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14808,14 +12648,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #212]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "str s2, [x17]", + "ldr s2, [x8, #4]", + "add w17, w8, #0x90 (144)", + "str s2, [x17]", + "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14840,26 +12677,15 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w17, w8, #0xb0 (176)", + "str s2, [x17]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v9.16b, v2.16b", + "ldr s9, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14871,7 +12697,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14884,11 +12710,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14901,10 +12725,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -14919,11 +12743,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0xec (236)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14938,7 +12758,7 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", + "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -14949,10 +12769,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #272]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x5, #4104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14980,8 +12799,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x5, #4228]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14993,11 +12811,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15012,10 +12857,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "mov w17, #0xc190", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15027,7 +12871,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15040,11 +12884,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15057,11 +12899,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -15075,11 +12917,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15106,14 +12943,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "str s2, [x8]", + "ldr s2, [x5, #4108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15141,15 +12972,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "ldr s9, [x5, #4224]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15161,7 +12984,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15174,11 +12997,42 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov w17, #0xc194", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15190,12 +13044,39 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -15209,11 +13090,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15240,14 +13117,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #228]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "str s2, [x17]", + "ldr s2, [x5, #4112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15275,15 +13146,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #272]", + "ldr s9, [x5, #4220]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15295,9 +13158,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -15308,11 +13171,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15327,8 +13188,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15343,10 +13204,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "mov w17, #0xc198", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15358,7 +13218,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15371,11 +13231,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15388,11 +13246,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -15406,11 +13264,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15437,14 +13291,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #260]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "str s2, [x17]", + "ldr s2, [x5, #4116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15472,15 +13320,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "ldr s9, [x5, #4216]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15492,7 +13332,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15505,11 +13345,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15522,10 +13360,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15540,11 +13378,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov w17, #0xc19c", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15556,11 +13392,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -15570,15 +13405,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #244]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15590,10 +13419,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -15606,24 +13438,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15650,14 +13465,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #268]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "str s2, [x17]", + "ldr s2, [x5, #4120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15685,16 +13494,34 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x5, #4212]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15709,8 +13536,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -15720,15 +13549,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #144]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w17, #0xc1a0", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15740,7 +13566,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15753,19 +13579,40 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15792,17 +13639,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #176]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "str s2, [x17]", + "ldr s2, [x5, #4124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15830,8 +13668,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x5, #4208]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15843,11 +13680,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15862,11 +13726,67 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov w17, #0xc1a4", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w17, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15893,14 +13813,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #236]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4104]", + "str s2, [x17]", + "ldr s2, [x5, #4128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15928,15 +13842,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4228]", + "ldr s9, [x5, #4204]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15948,7 +13854,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15961,11 +13867,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15978,10 +13882,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15996,12 +13900,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc190", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1a8", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16013,7 +13914,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16026,11 +13927,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16043,10 +13942,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -16061,11 +13960,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16092,14 +13987,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4108]", + "str s2, [x17]", + "ldr s2, [x5, #4132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16127,15 +14016,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4224]", + "ldr s9, [x5, #4200]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16147,7 +14028,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16160,11 +14041,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16177,10 +14056,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16195,12 +14074,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc194", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1ac", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16212,7 +14088,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16225,11 +14101,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16242,10 +14116,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -16260,11 +14134,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16291,14 +14161,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4112]", + "str s2, [x17]", + "ldr s2, [x5, #4136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16326,15 +14190,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4220]", + "ldr s9, [x5, #4196]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16346,7 +14202,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16359,11 +14215,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16376,10 +14230,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16394,12 +14248,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc198", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1b0", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16411,7 +14262,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16424,11 +14275,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16441,10 +14290,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -16459,11 +14308,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16490,14 +14335,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4116]", + "str s2, [x17]", + "ldr s2, [x5, #4140]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16525,15 +14364,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4216]", + "ldr s9, [x5, #4192]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16545,7 +14376,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16558,11 +14389,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16575,10 +14404,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16593,12 +14422,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc19c", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1b4", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16610,7 +14436,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16623,11 +14449,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16640,10 +14464,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -16658,11 +14482,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16689,14 +14509,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4120]", + "str s2, [x17]", + "ldr s2, [x5, #4144]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16724,15 +14538,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4212]", + "ldr s9, [x5, #4188]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16744,7 +14550,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16757,11 +14563,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16774,10 +14578,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16792,12 +14596,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1a0", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1b8", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16809,7 +14610,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16822,11 +14623,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16839,10 +14638,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -16857,11 +14656,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16888,14 +14683,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4124]", + "str s2, [x17]", + "ldr s2, [x5, #4148]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16923,15 +14712,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4208]", + "ldr s9, [x5, #4184]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16943,7 +14724,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16956,11 +14737,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16973,10 +14752,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16991,12 +14770,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1a4", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1bc", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17008,7 +14784,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17021,11 +14797,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17038,10 +14812,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -17056,11 +14830,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17087,14 +14857,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4128]", + "str s2, [x17]", + "ldr s2, [x5, #4152]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17122,15 +14886,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4204]", + "ldr s9, [x5, #4180]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17142,7 +14898,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17155,11 +14911,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17172,10 +14926,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17190,12 +14944,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1a8", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1c0", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17207,7 +14958,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17220,11 +14971,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17237,10 +14986,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -17255,11 +15004,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17286,14 +15031,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4132]", + "str s2, [x17]", + "ldr s2, [x5, #4156]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17321,15 +15060,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4200]", + "ldr s9, [x5, #4176]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17341,7 +15072,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17354,11 +15085,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17371,10 +15100,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17389,12 +15118,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1ac", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1c4", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17406,7 +15132,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17419,11 +15145,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17436,10 +15160,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -17454,11 +15178,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17485,14 +15205,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4136]", + "str s2, [x17]", + "ldr s2, [x5, #4160]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17520,15 +15234,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4196]", + "ldr s9, [x5, #4172]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17540,7 +15246,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17553,11 +15259,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17570,10 +15274,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17588,12 +15292,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1b0", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1c8", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17605,7 +15306,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17618,11 +15319,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17635,10 +15334,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -17653,11 +15352,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17684,14 +15379,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4140]", + "str s2, [x17]", + "ldr s2, [x5, #4164]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17719,15 +15408,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4192]", + "ldr s9, [x5, #4168]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17739,7 +15420,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17752,11 +15433,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17769,10 +15448,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17787,12 +15466,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1b4", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1cc", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17804,7 +15480,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17817,11 +15493,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17834,10 +15508,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -17852,11 +15526,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17883,14 +15553,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4144]", + "str s2, [x17]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17918,15 +15582,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4188]", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17938,7 +15594,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17951,11 +15607,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17968,11 +15622,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -17986,12 +15640,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1b8", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "add w17, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18003,10 +15652,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18016,11 +15666,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18032,13 +15680,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18051,11 +15696,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18067,11 +15708,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18081,15 +15721,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4148]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18101,10 +15735,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18117,15 +15754,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4184]", + "add w17, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18137,10 +15766,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18150,11 +15780,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18166,13 +15794,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18185,12 +15810,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1bc", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "ldr s9, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18202,7 +15822,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18215,11 +15835,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18232,11 +15850,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -18250,11 +15868,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18281,14 +15895,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4152]", + "str s2, [x17]", + "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18316,15 +15924,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4180]", + "ldr s9, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18336,7 +15936,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18349,11 +15949,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18366,11 +15964,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -18384,12 +15982,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1c0", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "add w17, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18401,10 +15994,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18414,11 +16008,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18430,13 +16022,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18449,11 +16038,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18465,11 +16050,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18479,15 +16063,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4156]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18499,10 +16077,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18515,15 +16096,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4176]", + "add w17, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18535,10 +16108,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18548,11 +16122,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18564,13 +16136,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18583,12 +16152,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1c4", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "ldr s9, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18600,7 +16164,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18613,11 +16177,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18630,11 +16192,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -18648,11 +16210,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18679,14 +16237,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4160]", + "str s2, [x17]", + "ldr s2, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18714,15 +16266,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4172]", + "ldr s9, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18734,7 +16278,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18747,11 +16291,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18764,11 +16306,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -18782,12 +16324,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1c8", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "add w17, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18799,10 +16336,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18812,11 +16350,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18828,13 +16364,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18847,11 +16380,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18863,11 +16392,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18877,15 +16405,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4164]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18897,10 +16419,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18913,15 +16438,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4168]", + "add w17, w8, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18933,10 +16450,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18946,11 +16464,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18962,13 +16478,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18981,12 +16494,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1cc", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "ldr s9, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18998,7 +16506,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19011,11 +16519,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19028,11 +16534,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -19046,11 +16552,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19062,11 +16564,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19076,15 +16577,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19096,10 +16591,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19112,15 +16610,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "add w21, w8, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19132,10 +16622,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19145,11 +16636,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19161,13 +16650,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19180,11 +16666,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19196,11 +16678,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19210,15 +16691,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19230,10 +16705,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19246,15 +16724,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "ldr s9, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19266,7 +16736,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19279,11 +16749,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19296,11 +16764,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -19314,11 +16782,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19345,49 +16809,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -19416,8 +16838,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19429,13 +16850,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19445,14 +16863,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19467,8 +16880,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19478,15 +16893,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s9, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19498,7 +16908,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19511,18 +16921,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19534,10 +16935,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19550,8 +16954,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w21, w8, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19564,12 +16967,37 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19582,11 +17010,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19598,11 +17022,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19612,15 +17035,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19632,10 +17049,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19648,15 +17068,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "ldr s9, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19668,7 +17080,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19681,11 +17093,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19698,11 +17108,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -19716,11 +17126,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19747,14 +17153,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "str s2, [x21]", + "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19782,15 +17182,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "ldr s9, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19802,7 +17194,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19815,11 +17207,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19832,11 +17222,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -19850,11 +17240,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19866,11 +17252,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19880,15 +17265,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19900,10 +17279,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19916,15 +17298,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "add w21, w8, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19936,10 +17310,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19949,11 +17324,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19965,13 +17338,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19984,11 +17354,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20000,11 +17366,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -20014,15 +17379,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20034,10 +17393,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -20050,15 +17412,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "ldr s9, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20070,7 +17424,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20083,11 +17437,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20100,11 +17452,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -20118,11 +17470,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20149,14 +17497,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "str s2, [x21]", + "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20184,15 +17526,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "ldr s9, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20204,7 +17538,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20217,11 +17551,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20234,10 +17566,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -20252,10 +17584,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x24]", + "ldr s9, [x13]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20267,7 +17596,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20280,11 +17609,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20297,10 +17624,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -20315,11 +17642,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20346,14 +17669,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "str s2, [x21]", + "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20381,15 +17698,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "ldr s9, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20401,7 +17710,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20414,11 +17723,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20431,10 +17738,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -20449,10 +17756,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x25]", + "ldr s9, [x14]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20464,7 +17768,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20477,11 +17781,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20494,10 +17796,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -20512,11 +17814,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20543,14 +17841,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "str s2, [x21]", + "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20578,15 +17870,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "ldr s9, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20598,7 +17882,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20611,11 +17895,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20628,11 +17910,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -20646,10 +17928,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20661,10 +17939,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -20674,11 +17953,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x8]", + "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20690,13 +17967,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -20709,11 +17983,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20725,11 +17995,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -20739,15 +18008,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20759,10 +18022,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -20775,15 +18041,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20795,10 +18053,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -20808,11 +18067,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20824,13 +18081,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -20843,10 +18097,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "ldr s9, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20858,7 +18109,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20871,11 +18122,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20888,11 +18137,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -20906,11 +18155,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20937,14 +18182,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "str s2, [x21]", + "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20972,15 +18211,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "ldr s9, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20992,7 +18223,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21005,11 +18236,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21022,11 +18251,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -21040,10 +18269,35 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x14]", + "add w21, w8, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21071,8 +18325,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21084,13 +18337,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -21100,14 +18350,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21122,8 +18367,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -21133,15 +18380,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21153,10 +18394,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -21169,15 +18413,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21189,10 +18425,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -21202,11 +18439,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21218,13 +18453,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -21237,10 +18469,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x15]", + "ldr s9, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21252,7 +18481,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21265,11 +18494,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21282,11 +18509,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -21300,11 +18527,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21319,8 +18541,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -21330,15 +18554,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21350,10 +18569,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -21363,18 +18583,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21402,8 +18613,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21415,13 +18625,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -21431,13 +18638,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x16]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21449,10 +18652,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -21465,8 +18671,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21479,10 +18683,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -21497,11 +18701,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21528,14 +18728,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "str s2, [x21]", + "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21563,15 +18757,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "ldr s9, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21583,7 +18769,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21596,11 +18782,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21613,10 +18797,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -21631,10 +18815,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x17]", + "ldr s9, [x15]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21646,7 +18827,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21659,11 +18840,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21676,10 +18855,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -21694,11 +18873,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21725,14 +18900,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "str s2, [x21]", + "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21760,15 +18929,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "ldr s9, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21780,7 +18941,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21793,11 +18954,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21810,10 +18969,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -21828,11 +18987,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21859,14 +19014,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "str s2, [x21]", + "ldr s2, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21894,15 +19043,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "ldr s9, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21914,7 +19055,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21927,11 +19068,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21944,10 +19083,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -21962,11 +19101,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21993,14 +19128,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "str s2, [x21]", + "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22028,15 +19157,93 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "ldr s9, [x8, #108]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22064,8 +19271,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22077,11 +19283,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -22096,11 +19329,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22127,14 +19356,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "str s2, [x21]", + "ldr s2, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22162,15 +19385,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "ldr s9, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22182,7 +19397,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22195,11 +19410,39 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22216,7 +19459,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -22230,11 +19473,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22261,14 +19501,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "str s2, [x21]", + "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22296,15 +19530,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "ldr s3, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22316,7 +19542,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22329,11 +19555,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22346,10 +19570,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22364,15 +19588,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22385,8 +19600,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -22403,11 +19618,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22434,14 +19646,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "str s2, [x21]", + "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22469,15 +19675,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "ldr s3, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22489,7 +19687,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22502,11 +19700,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22519,10 +19715,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22537,15 +19733,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22558,8 +19745,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -22576,11 +19763,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22607,14 +19791,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "str s2, [x21]", + "ldr s2, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22642,15 +19820,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "ldr s3, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22662,7 +19832,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22675,11 +19845,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22692,10 +19860,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22710,15 +19878,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x15]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22730,11 +19890,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -22749,11 +19936,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22780,14 +19963,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "str s2, [x21]", + "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22815,15 +19992,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "ldr s3, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22835,7 +20004,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22848,11 +20017,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22865,11 +20032,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -22880,13 +20047,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x29]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22898,10 +20063,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -22911,11 +20077,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22927,13 +20091,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -22943,14 +20104,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22962,11 +20119,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -22976,15 +20132,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22996,10 +20146,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23009,18 +20162,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23032,10 +20177,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23045,11 +20191,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x21]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23066,7 +20210,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -23080,11 +20224,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23099,8 +20238,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23110,15 +20251,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23130,10 +20267,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23143,18 +20281,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23182,8 +20311,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23196,11 +20323,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -23214,11 +20341,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23233,8 +20355,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23244,15 +20368,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23264,10 +20383,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23277,18 +20397,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23316,8 +20427,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23329,13 +20439,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23345,14 +20452,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23367,8 +20469,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23378,15 +20482,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23398,10 +20498,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23411,18 +20512,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23434,7 +20526,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23447,46 +20539,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23498,11 +20554,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23512,15 +20567,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23532,10 +20581,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23545,18 +20597,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23568,10 +20612,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23581,11 +20626,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x21]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23616,15 +20659,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23637,10 +20671,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -23655,28 +20689,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23703,50 +20717,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "str s2, [x21]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23774,8 +20746,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23788,10 +20758,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -23806,15 +20776,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23827,10 +20788,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -23845,28 +20806,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23893,14 +20833,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "str s2, [x21]", + "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23928,15 +20862,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "ldr s3, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23948,7 +20874,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23961,11 +20887,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23978,11 +20902,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -23993,18 +20917,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24017,12 +20934,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24032,31 +20947,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24068,11 +20961,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24082,15 +20974,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24102,7 +20989,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24115,18 +21002,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24138,10 +21016,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24151,11 +21032,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24168,12 +21048,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24183,13 +21061,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x29]", + "fmov s5, s0", + "str s5, [x21]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24201,10 +21075,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24217,8 +21094,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24231,10 +21106,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -24249,11 +21124,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24280,14 +21152,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "str s2, [x21]", + "ldr s2, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24315,27 +21181,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24347,10 +21192,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24363,32 +21211,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24401,11 +21223,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -24419,28 +21241,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24467,14 +21268,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "str s2, [x21]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24502,27 +21297,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "ldr s3, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24534,7 +21309,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24547,11 +21322,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24564,10 +21337,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -24579,14 +21352,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24599,8 +21369,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -24612,32 +21382,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24649,13 +21396,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24665,35 +21409,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24705,13 +21424,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24721,31 +21437,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24758,10 +21452,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24771,15 +21467,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24791,10 +21482,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24804,11 +21496,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x21]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24821,10 +21511,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -24839,15 +21529,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24860,8 +21542,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -24878,11 +21560,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24909,14 +21588,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "str s2, [x21]", + "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24944,27 +21617,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24976,10 +21628,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24992,32 +21647,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25030,11 +21659,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -25048,28 +21677,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25096,14 +21704,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "str s2, [x21]", + "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25131,27 +21733,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "ldr s3, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25163,7 +21745,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -25176,11 +21758,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25193,10 +21773,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -25208,14 +21788,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25228,8 +21804,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -25241,32 +21817,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25297,32 +21849,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25335,10 +21861,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25353,28 +21879,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25401,14 +21906,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "str s2, [x21]", + "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25436,8 +21935,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25449,13 +21947,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -25465,18 +21960,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25489,11 +21975,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -25504,14 +21990,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25524,8 +22007,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -25537,63 +22020,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25605,10 +22033,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -25621,32 +22052,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25659,11 +22064,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -25677,28 +22082,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25725,14 +22109,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "str s2, [x21]", + "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25760,27 +22138,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "ldr s3, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25792,7 +22150,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -25805,11 +22163,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25822,10 +22178,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -25837,14 +22193,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25857,8 +22210,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -25870,32 +22223,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25926,32 +22255,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25964,10 +22267,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25982,28 +22285,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26030,14 +22312,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "str s2, [x21]", + "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26065,8 +22341,34 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26083,7 +22385,7 @@ "umov w2, v2.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -26094,18 +22396,38 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26122,7 +22444,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -26136,11 +22458,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26155,8 +22472,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26166,15 +22485,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26186,10 +22500,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26199,30 +22514,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26250,32 +22544,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26287,13 +22556,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26303,31 +22569,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26342,8 +22586,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26353,15 +22599,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26373,10 +22615,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26386,30 +22629,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26421,10 +22642,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26437,8 +22661,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26451,11 +22673,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -26469,11 +22691,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26500,31 +22718,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x21]", + "ldr s2, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26536,13 +22731,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26555,32 +22747,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26592,13 +22759,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26608,31 +22772,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26647,8 +22789,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26658,15 +22802,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26678,10 +22818,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26691,23 +22832,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26738,20 +22864,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26764,10 +22876,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -26782,16 +22894,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26818,14 +22921,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "str s2, [x21]", + "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26853,27 +22950,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "ldr s3, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26885,7 +22962,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26898,35 +22975,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26939,10 +22990,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -26954,31 +23005,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26991,8 +23022,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27004,20 +23035,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27048,20 +23067,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27074,10 +23079,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -27092,11 +23097,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27123,14 +23124,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "str s2, [x21]", + "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27158,27 +23153,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "ldr s3, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27190,7 +23165,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27203,35 +23178,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27244,10 +23193,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -27259,31 +23208,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27296,8 +23225,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27309,20 +23238,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27353,20 +23270,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27379,8 +23282,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -27397,11 +23300,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27428,14 +23327,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "str s2, [x21]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27463,27 +23356,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "ldr s3, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27495,7 +23368,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27508,35 +23381,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27549,10 +23396,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -27564,31 +23411,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0xc4 (196)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27601,8 +23428,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27614,20 +23441,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #196]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27639,13 +23455,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -27655,23 +23468,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27683,13 +23483,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -27699,14 +23496,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27719,10 +23511,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -27732,15 +23526,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0xbc (188)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27752,10 +23542,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -27765,30 +23556,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #188]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27800,7 +23570,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27813,35 +23583,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27853,13 +23598,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -27869,31 +23611,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27906,10 +23626,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -27919,20 +23641,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27944,13 +23656,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -27960,23 +23669,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27989,11 +23684,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -28004,14 +23699,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0xa4 (164)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28024,8 +23716,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28037,15 +23729,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "fmov s6, s0", + "str s6, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28057,10 +23742,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28070,30 +23758,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28105,7 +23773,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28118,35 +23786,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28159,10 +23801,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -28174,31 +23816,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0xb4 (180)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28211,8 +23832,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28224,20 +23845,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #180]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28249,13 +23859,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28265,23 +23872,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28294,11 +23887,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -28309,14 +23902,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0xac (172)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28329,8 +23918,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28342,15 +23931,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "fmov s6, s0", + "str s6, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28362,10 +23944,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28375,30 +23960,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28410,7 +23975,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28423,35 +23988,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28464,10 +24003,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -28479,31 +24018,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28516,8 +24034,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28529,20 +24047,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28554,13 +24061,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28570,23 +24074,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28598,13 +24089,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28614,14 +24102,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28634,10 +24117,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28647,15 +24132,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x94 (148)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28667,10 +24147,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28680,30 +24161,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #148]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28715,7 +24175,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28728,35 +24188,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "fmov d8, x20", + "mov v8.d[1], x16", + "eor v6.16b, v6.16b, v8.16b", + "add w21, w8, #0x110 (272)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28769,12 +24207,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28784,31 +24220,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #272]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28820,11 +24234,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28834,20 +24247,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28859,13 +24262,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28875,23 +24275,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28904,11 +24290,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -28919,14 +24305,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0xd0 (208)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28939,8 +24322,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28952,15 +24335,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28972,7 +24349,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28985,30 +24362,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s9, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29020,7 +24377,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29033,35 +24390,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29074,10 +24405,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -29089,31 +24420,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29126,10 +24435,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -29139,20 +24450,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x9c (156)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29165,12 +24466,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -29180,23 +24479,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #156]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29208,13 +24493,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -29224,19 +24506,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v6.16b, v6.16b, v9.16b", + "add w21, w8, #0x88 (136)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29249,8 +24525,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29262,15 +24538,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29282,7 +24552,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29295,30 +24565,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s9, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29330,7 +24580,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29343,35 +24593,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29384,11 +24608,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -29399,31 +24623,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29436,10 +24638,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -29449,15 +24653,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #196]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #196]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0xd8 (216)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29469,10 +24668,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -29482,30 +24682,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29517,7 +24696,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29530,35 +24709,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v6.16b, v6.16b, v9.16b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29571,11 +24727,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -29586,31 +24742,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29623,10 +24757,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -29636,15 +24772,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #188]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #188]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29656,10 +24786,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -29669,18 +24802,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29692,7 +24818,35 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29705,11 +24859,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29722,11 +24874,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -29737,13 +24889,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29755,7 +24904,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29768,35 +24917,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29809,11 +24932,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -29824,31 +24947,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s9, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29860,11 +24962,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -29874,32 +24975,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #164]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29912,11 +24990,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -29927,13 +25005,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0xe8 (232)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29945,10 +25020,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -29958,11 +25034,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29974,13 +25048,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -29990,14 +25061,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30010,10 +25076,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30023,15 +25091,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #180]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #180]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30043,7 +25106,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30056,23 +25119,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30085,11 +25134,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -30100,14 +25149,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30120,10 +25164,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30133,32 +25179,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #172]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0xe0 (224)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30171,12 +25196,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30186,13 +25209,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30204,7 +25223,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30217,11 +25236,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30234,11 +25251,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -30249,14 +25266,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30268,11 +25281,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30282,15 +25294,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30302,10 +25308,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30315,18 +25324,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s9, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30338,7 +25339,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30351,11 +25352,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30368,11 +25367,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -30383,14 +25382,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0xf0 (240)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30403,8 +25398,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -30416,15 +25411,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #148]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #148]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30436,7 +25425,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30449,27 +25438,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s9, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30481,11 +25453,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30495,15 +25466,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #272]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #272]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30515,10 +25480,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30528,18 +25496,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30551,10 +25510,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30564,35 +25526,14 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x5, #4100]", + "ldr w6, [x5, #4096]", + "strb w20, [x28, #1017]", + "add w4, w6, w4, lsl #2", + "add w21, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30605,12 +25546,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30620,31 +25559,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30656,11 +25573,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30670,15 +25586,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #208]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30690,10 +25600,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30703,18 +25616,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0xf8 (248)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30726,10 +25632,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30739,11 +25646,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30755,13 +25660,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30771,18 +25673,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "fmov d7, x20", + "mov v7.d[1], x16", + "eor v5.16b, v5.16b, v7.16b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30795,11 +25691,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -30810,14 +25706,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30830,10 +25722,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30843,15 +25737,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #156]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #156]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30863,10 +25751,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30876,27 +25767,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30909,8 +25783,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -30922,15 +25796,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #136]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #136]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30942,7 +25810,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30955,18 +25823,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30978,7 +25838,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30991,11 +25851,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31008,10 +25866,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -31023,18 +25881,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x108 (264)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31047,10 +25897,37 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -31062,14 +25939,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x100 (256)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31082,8 +25956,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31095,15 +25969,23 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #216]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #144]", + "str s3, [x4]", + "ldr s3, [x8, #148]", + "add w21, w4, #0x40 (64)", + "str s3, [x21]", + "ldr s3, [x8, #152]", + "add w21, w4, #0x80 (128)", + "str s3, [x21]", + "ldr s3, [x8, #156]", + "add w21, w4, #0xc0 (192)", + "str s3, [x21]", + "ldr s3, [x8, #160]", + "add w21, w4, #0x100 (256)", + "str s3, [x21]", + "ldr s3, [x8, #164]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31115,7 +25997,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31128,31 +26010,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w4, #0x140 (320)", + "str s3, [x21]", + "ldr s3, [x8, #168]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31164,13 +26027,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31180,35 +26040,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w4, #0x180 (384)", + "str s3, [x21]", + "ldr s3, [x8, #172]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31220,13 +26057,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31236,35 +26070,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w4, #0x1c0 (448)", + "str s3, [x21]", + "ldr s3, [x8, #176]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31276,13 +26087,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31292,31 +26100,15 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w4, #0x200 (512)", + "str s3, [x21]", + "ldr s3, [x8, #180]", + "add w21, w4, #0x240 (576)", + "str s3, [x21]", + "ldr s3, [x8, #184]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31328,11 +26120,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31342,15 +26133,19 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w4, #0x280 (640)", + "str s3, [x21]", + "ldr s3, [x8, #188]", + "add w21, w4, #0x2c0 (704)", + "str s3, [x21]", + "ldr s3, [x8, #192]", + "add w21, w4, #0x300 (768)", + "str s3, [x21]", + "strb w20, [x28, #1017]", + "add w21, w4, #0x340 (832)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31362,10 +26157,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31375,35 +26171,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #200]", + "add w21, w4, #0x380 (896)", + "str s3, [x21]", + "strb w20, [x28, #1017]", + "add w21, w4, #0x3c0 (960)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31416,12 +26190,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31431,18 +26203,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s3, s0", + "str s3, [x21]", + "movi v3.2d, #0x0", + "add w21, w4, #0x400 (1024)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31454,10 +26218,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31467,23 +26232,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s3, s0", + "str s3, [x21]", + "fmov d3, x20", + "mov v3.d[1], x16", + "eor v2.16b, v2.16b, v3.16b", + "add w21, w4, #0x440 (1088)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31498,10 +26252,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31511,13 +26263,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #200]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31545,8 +26293,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov d3, x20", + "mov v3.d[1], x16", + "eor v2.16b, v2.16b, v3.16b", + "add w21, w4, #0x480 (1152)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31559,12 +26309,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31574,14 +26322,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s2, s0", + "str s2, [x21]", + "strb w20, [x28, #1017]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v4.16b, v2.16b", + "add w21, w4, #0x4c0 (1216)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31608,14 +26355,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #232]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "str s2, [x21]", + "ldr s2, [x8, #192]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31643,20 +26384,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov d3, x20", + "mov v3.d[1], x16", + "eor v2.16b, v2.16b, v3.16b", + "add w21, w4, #0x500 (1280)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31671,10 +26402,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31684,18 +26413,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #188]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31723,20 +26443,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov d3, x20", + "mov v3.d[1], x16", + "eor v2.16b, v2.16b, v3.16b", + "add w21, w4, #0x540 (1344)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31751,10 +26461,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31764,87 +26472,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s2, s0", + "str s2, [x21]", + "strb w20, [x28, #1017]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v9.16b, v2.16b", + "add w21, w4, #0x580 (1408)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31871,106 +26505,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #224]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "str s2, [x21]", + "ldr s2, [x8, #180]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31998,20 +26534,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov d3, x20", + "mov v3.d[1], x16", + "eor v2.16b, v2.16b, v3.16b", + "add w21, w4, #0x5c0 (1472)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32026,73 +26552,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -32102,14 +26563,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s2, s0", + "str s2, [x21]", + "strb w20, [x28, #1017]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v8.16b, v2.16b", + "add w21, w4, #0x600 (1536)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32136,173 +26596,12 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #240]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x5, #4100]", - "ldr w6, [x5, #4096]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "add w4, w6, w4, lsl #2", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x21]", + "strb w20, [x28, #1017]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v7.16b, v2.16b", + "add w21, w4, #0x640 (1600)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32329,67 +26628,12 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x21]", + "strb w20, [x28, #1017]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v6.16b, v2.16b", + "add w21, w4, #0x680 (1664)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32404,10 +26648,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -32417,31 +26659,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s2, s0", + "str s2, [x21]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v5.16b, v2.16b", + "add w21, w4, #0x6c0 (1728)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32468,48913 +26691,27680 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #248]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #264]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #256]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #144]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #148]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #152]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #128]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #156]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #192]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #160]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #256]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #164]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #320]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #168]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #384]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #172]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #448]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #176]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #512]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #180]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #576]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #184]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #640]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #188]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #704]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #192]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #768]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #832]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #200]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #896]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #960]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1024]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1088]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #200]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1152]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1216]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #192]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1280]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #188]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1344]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1408]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #180]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1472]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1536]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1600]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1664]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1728]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1792]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1856]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1920]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #272]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1984]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w20, [x5, #4096]", - "eor w27, w20, w5", - "subs w26, w20, w5", - "cfinv", - "add w4, w5, #0x800 (2048)", - "strb w21, [x28, #1298]" - ] - }, - "Block2": { - "ExpectedInstructionCount": 22089, - "x86Insts": [ - "mov eax,dword [ebp + 0x8]", - "fld dword [eax + 0x40]", - "fld dword [eax + 0x44]", - "fadd st0,st1", - "fstp dword [eax + 0x44]", - "fld dword [eax + 0x3c]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x40]", - "fld dword [eax + 0x38]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x3c]", - "fld dword [eax + 0x34]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x38]", - "fld dword [eax + 0x30]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x34]", - "fld dword [eax + 0x2c]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x30]", - "fld dword [eax + 0x28]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x2c]", - "fld dword [eax + 0x24]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x28]", - "fld dword [eax + 0x20]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x24]", - "fld dword [eax + 0x1c]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x20]", - "fld dword [eax + 0x18]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x1c]", - "fld dword [eax + 0x14]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x18]", - "fld dword [eax + 0x10]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x14]", - "fld dword [eax + 0xc]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x10]", - "fld dword [eax + 0x8]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0xc]", - "fld dword [eax + 0x4]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x8]", - "fld dword [eax]", - "fst qword [esp + 0x20]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x8]", - "fst dword [eax + 0x4]", - "fld dword [eax + 0x3c]", - "fld dword [eax + 0x44]", - "fadd st0,st1", - "fstp dword [eax + 0x44]", - "fld dword [eax + 0x34]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x3c]", - "fld dword [eax + 0x2c]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x34]", - "fld dword [eax + 0x24]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x2c]", - "fld dword [eax + 0x1c]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x24]", - "fld dword [eax + 0x14]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x1c]", - "fld dword [eax + 0xc]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x14]", - "faddp", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x4]", - "fstp dword [eax + 0xc]", - "fadd st0,st0", - "fstp dword [esp + 0x14]", - "fld dword [eax + 0x30]", - "fst qword [esp + 0x18]", - "fld dword [esp + 0x14]", - "fst qword [esp + 0x28]", - "faddp", - "fstp dword [esp + 0x14]", - "fld dword [eax + 0x10]", - "fld dword [esp + 0x14]", - "fst qword [esp + 0x80]", - "fld dword [eax + 0x20]", - "fld dword [eax + 0x40]", - "fld st3", - "fld qword [0x00a77b70]", - "fmul st1", - "fxch", - "faddp st4,st0", - "fld st2", - "fld qword [0x00a77b68]", - "fmul st1", - "fxch st5", - "faddp", - "fld st2", - "fld qword [0x00a77b60]", - "fmul st1", - "fxch st2", - "faddp", - "fstp dword [esp + 0xc0]", - "fld qword [esp + 0x28]", - "fadd st0,st6", - "fsub st0,st4", - "fld qword [esp + 0x18]", - "fsub st1,st0", - "fsubp", - "fsub st0,st3", - "fstp dword [esp + 0xd0]", - "fld st5", - "fmul st1", - "fsubr qword [esp + 0x80]", - "fld st4", - "fmul st3", - "fsubp", - "fld st3", - "fmul st6", - "faddp", - "fstp dword [esp + 0xb8]", - "fld st5", - "fmul st5", - "fsubr qword [esp + 0x80]", - "fld st4", - "fmul st2", - "faddp", - "fld st3", - "fmul st3", - "fsubp", - "fstp dword [esp + 0xc8]", - "fld qword [esp + 0x20]", - "fsubrp st6,st0", - "fxch st5", - "faddp st3,st0", - "fxch st2", - "fsub qword [esp + 0x18]", - "faddp", - "fstp dword [esp + 0x80]", - "fld dword [eax + 0x18]", - "fmul qword [0x00a77b58]", - "fstp dword [esp + 0x14]", - "fld dword [eax + 0x8]", - "fst qword [esp + 0x18]", - "fld dword [esp + 0x14]", - "fst qword [esp + 0x20]", - "fld dword [eax + 0x28]", - "fst qword [esp + 0x90]", - "fld dword [eax + 0x38]", - "fst qword [esp + 0x28]", - "fld qword [0x00a77b50]", - "fmul st4", - "fxch st4", - "faddp st3,st0", - "fld qword [0x00a77b48]", - "fmul st2", - "fxch st3", - "faddp st2,st0", - "fld qword [0x00a77b40]", - "fmul st1", - "fxch st2", - "faddp", - "fstp dword [esp + 0xb4]", - "fld qword [esp + 0x18]", - "fld qword [esp + 0x90]", - "fsub st1,st0", - "fxch", - "fsub qword [esp + 0x28]", - "fmul qword [0x00a77b58]", - "fstp dword [esp + 0xc4]", - "fld qword [esp + 0x18]", - "fmul st3", - "fsub qword [esp + 0x20]", - "fxch", - "fmul st2", - "fsubp", - "fld qword [esp + 0x28]", - "fmul st4", - "faddp", - "fstp dword [esp + 0xa8]", - "fld qword [esp + 0x18]", - "fmul st1", - "fsub qword [esp + 0x20]", - "fld qword [esp + 0x90]", - "fmul st4", - "faddp", - "fld qword [esp + 0x28]", - "fmul st3", - "fsubp", - "fstp dword [esp + 0x90]", - "fld dword [esp + 0x8]", - "fst qword [esp + 0x8]", - "fadd st0,st0", - "fstp dword [esp + 0x14]", - "fld dword [eax + 0x34]", - "fst qword [esp + 0x98]", - "fld dword [esp + 0x14]", - "fst qword [esp + 0xa0]", - "faddp", - "fstp dword [esp + 0x14]", - "fld dword [eax + 0x14]", - "fst qword [esp + 0x20]", - "fld dword [esp + 0x14]", - "fstp qword [esp + 0x88]", - "fld dword [eax + 0x24]", - "fstp qword [esp + 0x18]", - "fld dword [eax + 0x44]", - "fstp qword [esp + 0x28]", - "fmul st4", - "fadd qword [esp + 0x88]", - "fld qword [esp + 0x18]", - "fmul st6", - "faddp", - "fld qword [esp + 0x28]", - "fmul st7", - "faddp", - "fstp dword [esp + 0xb0]", - "fld qword [esp + 0xa0]", - "fadd qword [esp + 0x20]", - "fsub qword [esp + 0x18]", - "fld qword [esp + 0x98]", - "fsub st1,st0", - "fsubp", - "fsub qword [esp + 0x28]", - "fstp dword [esp + 0x30]", - "fld qword [esp + 0x20]", - "fmul st6", - "fsubr qword [esp + 0x88]", - "fld qword [esp + 0x18]", - "fmul st5", - "fsubp", - "fld qword [esp + 0x28]", - "fmul st6", - "faddp", - "fstp dword [esp + 0xa0]", - "fld qword [esp + 0x20]", - "fld st0", - "fmulp st6", - "fld qword [esp + 0x88]", - "fsubrp st6,st0", - "fld qword [esp + 0x18]", - "fmulp st7", - "fxch st5", - "faddp st6,st0", - "fld qword [esp + 0x28]", - "fld st0", - "fmulp st5", - "fxch st6", - "fsubrp st4,st0", - "fxch st3", - "fstp dword [esp + 0x28]", - "fld qword [esp + 0x8]", - "fsubrp st4,st0", - "fxch st3", - "fadd qword [esp + 0x18]", - "fsub qword [esp + 0x98]", - "faddp st4,st0", - "fxch st3", - "fmul qword [0x00a77bd8]", - "fstp dword [esp + 0x18]", - "fld dword [eax + 0x1c]", - "fmul qword [0x00a77b58]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x14]", - "fld dword [eax + 0x2c]", - "fld dword [eax + 0x3c]", - "fld dword [esp + 0x4]", - "fmul st6", - "fadd st0,st3", - "fld st2", - "fmul st6", - "faddp", - "fld st1", - "fmul st5", - "faddp", - "fstp dword [esp + 0x14]", - "fld dword [eax + 0xc]", - "fst qword [esp + 0x20]", - "fsub st0,st2", - "fsub st0,st1", - "fmul qword [0x00a77b58]", - "fstp dword [esp + 0x98]", - "fld qword [esp + 0x20]", - "fmul st5", - "fsub st0,st3", - "fld st2", - "fmul st5", - "fsubp", - "fld st1", - "fmul st7", - "faddp", - "fstp dword [esp + 0x88]", - "fld qword [esp + 0x20]", - "fmulp st4", - "fxch st3", - "fsubrp st2,st0", - "fmulp st4", - "faddp st3,st0", - "fmulp", - "fsubp", - "fstp dword [esp + 0x20]", - "fld dword [esp + 0xb4]", - "fld dword [esp + 0xc0]", - "fld st0", - "fadd st0,st2", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x14]", - "fld dword [esp + 0xb0]", - "fld st0", - "fadd st0,st2", - "fmul qword [0x00a77b38]", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x4]", - "fld dword [esp + 0x8]", - "fld st0", - "fadd st0,st2", - "fstp dword [esp + 0x38]", - "fsubrp", - "fstp dword [esp + 0x7c]", - "fld dword [esp + 0xc4]", - "fld dword [esp + 0xd0]", - "fld st0", - "fadd st0,st2", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x98]", - "fst qword [esp + 0xd0]", - "fld dword [esp + 0x30]", - "fst qword [esp + 0x98]", - "faddp", - "fmul qword [0x00a77bd0]", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x4]", - "fld dword [esp + 0x8]", - "fst qword [esp + 0x30]", - "fadd st0,st1", - "fstp dword [esp + 0x3c]", - "fsubr qword [esp + 0x30]", - "fstp dword [esp + 0x78]", - "fld dword [esp + 0xa8]", - "fst qword [esp + 0xa8]", - "fld dword [esp + 0xb8]", - "fst qword [esp + 0xb8]", - "faddp", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x88]", - "fst qword [esp + 0x88]", - "fld dword [esp + 0xa0]", - "fst qword [esp + 0xa0]", - "faddp", - "fmul qword [0x00a77b30]", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x4]", - "fld dword [esp + 0x8]", - "fst qword [esp + 0x30]", - "fadd st0,st1", - "fstp dword [esp + 0x40]", - "fsubr qword [esp + 0x30]", - "fstp dword [esp + 0x74]", - "fld dword [esp + 0x90]", - "fst qword [esp + 0x90]", - "fld dword [esp + 0xc8]", - "fst qword [esp + 0xc8]", - "faddp", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x20]", - "fst qword [esp + 0x20]", - "fld dword [esp + 0x28]", - "fst qword [esp + 0x28]", - "faddp", - "fmul qword [0x00a77b28]", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x4]", - "fld dword [esp + 0x8]", - "fst qword [esp + 0x30]", - "fadd st0,st1", - "fstp dword [esp + 0x44]", - "fsubr qword [esp + 0x30]", - "fstp dword [esp + 0x70]", - "fld dword [esp + 0x18]", - "fld dword [esp + 0x80]", - "fst qword [esp + 0x80]", - "fadd st0,st1", - "fstp dword [esp + 0x48]", - "fsubr qword [esp + 0x80]", - "fstp dword [esp + 0x6c]", - "fld qword [esp + 0xc8]", - "fsub qword [esp + 0x90]", - "fstp dword [esp + 0x8]", - "fld qword [esp + 0x28]", - "fsub qword [esp + 0x20]", - "fmul qword [0x00a77b20]", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x4]", - "fld dword [esp + 0x8]", - "fst qword [esp + 0x30]", - "fadd st0,st1", - "fstp dword [esp + 0x4c]", - "fsubr qword [esp + 0x30]", - "fstp dword [esp + 0x68]", - "fld qword [esp + 0xb8]", - "fsub qword [esp + 0xa8]", - "fstp dword [esp + 0x8]", - "fld qword [esp + 0xa0]", - "fsub qword [esp + 0x88]", - "fmul qword [0x00a77b18]", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x4]", - "fld dword [esp + 0x8]", - "fst qword [esp + 0x30]", - "fadd st0,st1", - "fstp dword [esp + 0x50]", - "fsubr qword [esp + 0x30]", - "fstp dword [esp + 0x64]", - "fsubrp", - "fstp dword [esp + 0x8]", - "fld qword [esp + 0x98]", - "fsub qword [esp + 0xd0]", - "fmul qword [0x00a77be0]", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x4]", - "fld dword [esp + 0x8]", - "fld st0", - "fadd st0,st2", - "fstp dword [esp + 0x54]", - "fsubrp", - "fstp dword [esp + 0x60]", - "fxch st2", - "fsubrp st3,st0", - "fxch st2", - "fstp dword [esp + 0x8]", - "fsubrp", - "fmul qword [0x00a77b10]", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x4]", - "fld dword [esp + 0x8]", - "lea eax,[ecx + ecx*0x8]", - "fld st0", - "mov ecx,dword [ebp + 0xc]", - "fadd st0,st2", - "shl eax,0x4", - "add eax,0xb183d0", - "fstp dword [esp + 0x58]", - "fsubrp", - "fstp dword [esp + 0x5c]", - "fld dword [esp + 0x5c]", - "fld st0", - "fchs", - "fmul dword [eax]", - "fstp dword [ecx]", - "fld dword [eax + 0x4]", - "fld dword [esp + 0x60]", - "fld st0", - "fchs", - "fmulp st2", - "fxch", - "fstp dword [ecx + 0x4]", - "fld dword [eax + 0x8]", - "fld dword [esp + 0x64]", - "fld st0", - "fchs", - "fmulp st2", - "fxch", - "fstp dword [ecx + 0x8]", - "fld dword [eax + 0xc]", - "fld dword [esp + 0x68]", - "fld st0", - "fchs", - "fmulp st2", - "fxch", - "fstp dword [ecx + 0xc]", - "fld dword [eax + 0x10]", - "fld dword [esp + 0x6c]", - "fld st0", - "fchs", - "fmulp st2", - "fxch", - "fstp dword [ecx + 0x10]", - "fld dword [eax + 0x14]", - "fld dword [esp + 0x70]", - "fld st0", - "fchs", - "fmulp st2", - "fxch", - "fstp dword [ecx + 0x14]", - "fld dword [eax + 0x18]", - "fld dword [esp + 0x74]", - "fchs", - "fmulp", - "fstp dword [ecx + 0x18]", - "fld dword [eax + 0x1c]", - "fld dword [esp + 0x78]", - "fchs", - "fmulp", - "fstp dword [ecx + 0x1c]", - "fld dword [eax + 0x20]", - "fld dword [esp + 0x7c]", - "fchs", - "fmulp", - "fstp dword [ecx + 0x20]", - "fld dword [eax + 0x24]", - "fmul dword [esp + 0x7c]", - "fstp dword [ecx + 0x24]", - "fld dword [eax + 0x28]", - "fmul dword [esp + 0x78]", - "fstp dword [ecx + 0x28]", - "fld dword [eax + 0x2c]", - "fmul dword [esp + 0x74]", - "fstp dword [ecx + 0x2c]", - "fmul dword [eax + 0x30]", - "fstp dword [ecx + 0x30]", - "fmul dword [eax + 0x34]", - "fstp dword [ecx + 0x34]", - "fmul dword [eax + 0x38]", - "fstp dword [ecx + 0x38]", - "fmul dword [eax + 0x3c]", - "fstp dword [ecx + 0x3c]", - "fmul dword [eax + 0x40]", - "fstp dword [ecx + 0x40]", - "fmul dword [eax + 0x44]", - "fstp dword [ecx + 0x44]", - "fld dword [esp + 0x58]", - "fld dword [eax + 0x48]", - "fmul st1", - "fstp dword [ecx + 0x48]", - "fld dword [esp + 0x54]", - "fld dword [eax + 0x4c]", - "fmul st1", - "fstp dword [ecx + 0x4c]", - "fld dword [esp + 0x50]", - "fld dword [eax + 0x50]", - "fmul st1", - "fstp dword [ecx + 0x50]", - "fld dword [esp + 0x4c]", - "fld dword [eax + 0x54]", - "fmul st1", - "fstp dword [ecx + 0x54]", - "fld dword [esp + 0x48]", - "fld dword [eax + 0x58]", - "fmul st1", - "fstp dword [ecx + 0x58]", - "fld dword [esp + 0x44]", - "fld dword [eax + 0x5c]", - "fmul st1", - "fstp dword [ecx + 0x5c]", - "fld dword [esp + 0x40]", - "fst qword [esp + 0x18]", - "fmul dword [eax + 0x60]", - "fstp dword [ecx + 0x60]", - "fld dword [esp + 0x3c]", - "fst qword [esp + 0x80]", - "fmul dword [eax + 0x64]", - "fstp dword [ecx + 0x64]", - "fld dword [esp + 0x38]", - "fld dword [eax + 0x68]", - "fmul st1", - "fstp dword [ecx + 0x68]", - "fmul dword [eax + 0x6c]", - "fstp dword [ecx + 0x6c]", - "fld dword [eax + 0x70]", - "fmul qword [esp + 0x80]", - "fstp dword [ecx + 0x70]", - "fld dword [eax + 0x74]", - "fmul qword [esp + 0x18]", - "fstp dword [ecx + 0x74]", - "fmul dword [eax + 0x78]", - "fstp dword [ecx + 0x78]", - "fmul dword [eax + 0x7c]", - "fstp dword [ecx + 0x7c]", - "fmul dword [eax + 0x80]", - "fstp dword [ecx + 0x80]", - "fmul dword [eax + 0x84]", - "fstp dword [ecx + 0x84]", - "fmul dword [eax + 0x88]", - "fstp dword [ecx + 0x88]", - "fmul dword [eax + 0x8c]", - "fstp dword [ecx + 0x8c]", - "mov esp,ebp", - "pop ebp" - ], - "ExpectedArm64ASM": [ - "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x0", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #60]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #56]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #52]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #48]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #44]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #40]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #36]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #32]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #28]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #24]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #16]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #32]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #4]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #68]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #60]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #52]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #44]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #36]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #28]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #24]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #40]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #128]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b70", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b68", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b60", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #192]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #208]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #184]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #200]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b58", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #24]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #32]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #144]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #40]", - "ldrb w20, [x28, #1019]", - "mov w25, #0x7b50", - "movk w25, #0xa7, lsl #16", - "ldr d2, [x25]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w25, #0x7b48", - "movk w25, #0xa7, lsl #16", - "ldr d2, [x25]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w25, #0x7b40", - "movk w25, #0xa7, lsl #16", - "ldr d2, [x25]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #180]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #144]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #196]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #168]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #144]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #144]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #8]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #152]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #160]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #32]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #136]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #24]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #40]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x7 (7)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #176]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #160]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #152]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x5 (5)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #160]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x7 (7)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x5 (5)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x5 (5)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #152]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w25, #0x7bd8", - "movk w25, #0xa7, lsl #16", - "ldr d2, [x25]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x5 (5)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #32]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #152]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x7 (7)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #136]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #180]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #192]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #176]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b38", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #196]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #208]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #152]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #208]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #152]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7bd0", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #48]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #168]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #168]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #184]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #184]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #136]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #160]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #160]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b30", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #48]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #144]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #144]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #200]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #200]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #32]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #40]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b28", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #48]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #128]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #200]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #144]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b20", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #48]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #184]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #168]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #160]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b18", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #48]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #152]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #208]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7be0", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b10", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "add w4, w5, w5, lsl #3", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w5, [x9, #12]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "lsl w4, w4, #4", - "mov w20, #0x83d0", - "movk w20, #0xb1, lsl #16", - "mvn w27, w4", - "adds w26, w4, w20", - "mov x4, x26", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mov w24, #0x8000", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #4]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #8]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #12]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #16]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #20]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #24]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #28]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #24]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #128]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #104]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #108]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #108]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #128]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #136]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #140]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "mov x8, x9", - "ldr w9, [x8]", - "add x8, x8, #0x4 (4)", - "strb w21, [x28, #1298]" - ] - }, - "Block3": { - "ExpectedInstructionCount": 20918, - "x86Insts": [ - "fld dword [esi + 0x64]", - "mov eax,dword [esi + 0x88]", - "fstp dword [esp + 0x5c]", - "mov ecx,dword [esi + 0x8c]", - "fld dword [esi + 0x70]", - "mov edx,dword [esi + 0x90]", - "fstp dword [esp + 0x60]", - "mov dword [esp + 0x2e4],0x3f", - "fld dword [esi + 0x7c]", - "mov dword [esp + 0x94],eax", - "fstp dword [esp + 0x64]", - "mov dword [esp + 0x98],ecx", - "fld dword [esi + 0x68]", - "mov dword [esp + 0x9c],edx", - "fstp dword [esp + 0x14]", - "mov dword [esp + 0xe8],eax", - "fld dword [esi + 0x74]", - "mov dword [esp + 0xec],ecx", - "fstp dword [esp + 0x18]", - "mov dword [esp + 0xf0],edx", - "fld dword [esi + 0x80]", - "fstp dword [esp + 0x1c]", - "fld dword [esi + 0xf4]", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x28]", - "fld dword [esp + 0x14]", - "fmul st1", - "fstp dword [esp + 0x8c]", - "fld dword [esp + 0x18]", - "fmul st1", - "fstp dword [esp + 0x7c]", - "fmul dword [esp + 0x1c]", - "fstp dword [esp + 0x84]", - "fld dword [esi + 0x6c]", - "fstp dword [esp + 0x14]", - "fld dword [esi + 0x78]", - "fstp dword [esp + 0x18]", - "fld dword [esi + 0x84]", - "fstp dword [esp + 0x1c]", - "fld dword [esi + 0xf0]", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x28]", - "fld dword [esp + 0x14]", - "fmul st1", - "fstp dword [esp + 0x54]", - "fld dword [esp + 0x18]", - "fmul st1", - "fstp dword [esp + 0x50]", - "fmul dword [esp + 0x1c]", - "fstp dword [esp + 0x58]", - "fld dword [esi + 0x100]", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x28]", - "fld dword [esp + 0x54]", - "fmul st1", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x28]", - "fst dword [esp + 0x10]", - "fld dword [esp + 0x50]", - "fmul st2", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x28]", - "fst dword [esp + 0x2c]", - "fld dword [esp + 0x58]", - "fmul st3", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x28]", - "fst dword [esp + 0x14]", - "fld dword [esp + 0x8c]", - "fmul st4", - "fstp dword [esp + 0x4c]", - "fld dword [esp + 0x4c]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x7c]", - "fmul st4", - "fstp dword [esp + 0x8c]", - "fld dword [esp + 0x8c]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x84]", - "fmul st4", - "fstp dword [esp + 0x58]", - "fld dword [esp + 0x58]", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x5c]", - "fmul st4", - "fstp dword [esp + 0x50]", - "fld dword [esp + 0x50]", - "fstp dword [esp + 0x84]", - "fld dword [esp + 0x60]", - "fmul st4", - "fstp dword [esp + 0x54]", - "fld dword [esp + 0x54]", - "fstp dword [esp + 0x7c]", - "fld dword [esp + 0x64]", - "fmulp st4", - "fxch st3", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x28]", - "fstp dword [esp + 0x5c]", - "fld dword [esp + 0x94]", - "fld dword [esp + 0x84]", - "fadd st0,st1", - "fstp dword [esp + 0x84]", - "fld dword [esp + 0x98]", - "fld dword [esp + 0x7c]", - "fadd st0,st1", - "fstp dword [esp + 0x7c]", - "fld dword [esp + 0x9c]", - "fld dword [esp + 0x5c]", - "fadd st0,st1", - "fstp dword [esp + 0x5c]", - "fld dword [esp + 0x84]", - "fadd dword [esp + 0x44]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x7c]", - "fadd dword [esp + 0x48]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x5c]", - "fadd dword [esp + 0x40]", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x44]", - "fadd dword [esp + 0x10]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x48]", - "fadd dword [esp + 0x2c]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x40]", - "fadd dword [esp + 0x14]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x10]", - "fstp dword [esp + 0x5c]", - "mov eax,dword [esp + 0x5c]", - "fld dword [esp + 0x2c]", - "mov dword [esp + 0xf4],eax", - "fstp dword [esp + 0x60]", - "mov ecx,dword [esp + 0x60]", - "fld dword [esp + 0x14]", - "mov dword [esp + 0xf8],ecx", - "fstp dword [esp + 0x64]", - "mov edx,dword [esp + 0x64]", - "fxch st4", - "mov dword [esp + 0xfc],edx", - "fst dword [esp + 0x5c]", - "fxch st3", - "fst dword [esp + 0x84]", - "fxch st5", - "fst dword [esp + 0x7c]", - "fld dword [esp + 0x4c]", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x8c]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x58]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x50]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x54]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x28]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd st0,st3", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd st0,st2", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd st0,st5", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd dword [esp + 0x40]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd dword [esp + 0x48]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd dword [esp + 0x44]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fsub dword [esp + 0x5c]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fsub dword [esp + 0x84]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fsub dword [esp + 0x7c]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fstp dword [esp + 0x14]", - "mov eax,dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "mov dword [esp + 0x100],eax", - "fstp dword [esp + 0x18]", - "mov ecx,dword [esp + 0x18]", - "fld dword [esp + 0x10]", - "mov dword [esp + 0x104],ecx", - "fstp dword [esp + 0x1c]", - "mov edx,dword [esp + 0x1c]", - "fxch st3", - "mov dword [esp + 0x108],edx", - "fst dword [esp + 0x5c]", - "fxch st5", - "fst dword [esp + 0x84]", - "fxch st3", - "fst dword [esp + 0x7c]", - "fld dword [esp + 0x4c]", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x8c]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x58]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x50]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x54]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x28]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd st0,st3", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd st0,st2", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd st0,st5", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fsub dword [esp + 0x40]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fsub dword [esp + 0x48]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fsub dword [esp + 0x44]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd dword [esp + 0x5c]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd dword [esp + 0x84]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd dword [esp + 0x7c]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fstp dword [esp + 0x14]", - "mov eax,dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "mov dword [esp + 0x10c],eax", - "fstp dword [esp + 0x18]", - "mov ecx,dword [esp + 0x18]", - "fld dword [esp + 0x10]", - "mov dword [esp + 0x110],ecx", - "fstp dword [esp + 0x1c]", - "mov edx,dword [esp + 0x1c]", - "fxch st5", - "mov dword [esp + 0x114],edx", - "fstp dword [esp + 0x5c]", - "fxch st2", - "fstp dword [esp + 0x84]", - "fxch st3", - "fstp dword [esp + 0x7c]", - "fld dword [esp + 0x4c]", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x8c]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x58]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x50]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x54]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x28]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "faddp st3,st0", - "fxch st2", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "faddp st2,st0", - "fxch", - "fstp dword [esp + 0x2c]", - "fadd dword [esp + 0x10]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fsub dword [esp + 0x40]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fsub dword [esp + 0x48]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fsub dword [esp + 0x44]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fsub dword [esp + 0x5c]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fsub dword [esp + 0x84]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fsub dword [esp + 0x7c]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fstp dword [esp + 0x14]", - "mov eax,dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "mov dword [esp + 0x118],eax", - "mov eax,dword [ebx + 0x88]", - "fstp dword [esp + 0x18]", - "fld dword [esp + 0x10]", - "mov ecx,dword [esp + 0x18]", - "fstp dword [esp + 0x1c]", - "mov edx,dword [esp + 0x1c]", - "fld dword [ebx + 0x64]", - "mov dword [esp + 0x11c],ecx", - "mov ecx,dword [ebx + 0x8c]", - "fstp dword [esp + 0x70]", - "fld dword [ebx + 0x70]", - "mov dword [esp + 0x120],edx", - "mov edx,dword [ebx + 0x90]", - "fstp dword [esp + 0x74]", - "fld dword [ebx + 0x7c]", - "mov dword [esp + 0x94],eax", - "mov dword [esp + 0x98],ecx", - "mov dword [esp + 0x9c],edx", - "fstp dword [esp + 0x78]", - "mov dword [esp + 0xac],eax", - "fld dword [ebx + 0x68]", - "mov dword [esp + 0xb0],ecx", - "fstp dword [esp + 0x2c]", - "mov dword [esp + 0xb4],edx", - "fld dword [ebx + 0x74]", - "fstp dword [esp + 0x30]", - "fld dword [ebx + 0x80]", - "fstp dword [esp + 0x34]", - "fld dword [ebx + 0xf4]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fmul st1", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x30]", - "fmul st1", - "fstp dword [esp + 0x48]", - "fmul dword [esp + 0x34]", - "fstp dword [esp + 0x44]", - "fld dword [ebx + 0x6c]", - "fstp dword [esp + 0x5c]", - "fld dword [ebx + 0x78]", - "fstp dword [esp + 0x60]", - "fld dword [ebx + 0x84]", - "fstp dword [esp + 0x64]", - "fld dword [ebx + 0xf0]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x14]", - "fld dword [esp + 0x5c]", - "fmul st1", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x60]", - "fmul st1", - "fstp dword [esp + 0x2c]", - "fmul dword [esp + 0x64]", - "fstp dword [esp + 0x10]", - "fld dword [ebx + 0x100]", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x28]", - "fld dword [esp + 0x14]", - "fmul st1", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x14]", - "fst dword [esp + 0x5c]", - "fld dword [esp + 0x2c]", - "fmul st2", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x14]", - "fst dword [esp + 0x84]", - "fld dword [esp + 0x10]", - "fmul st3", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x14]", - "fst dword [esp + 0x7c]", - "fld dword [esp + 0x40]", - "fmul st4", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x28]", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x48]", - "fmul st4", - "fstp dword [esp + 0x54]", - "fld dword [esp + 0x54]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x44]", - "fmul st4", - "fstp dword [esp + 0x50]", - "fld dword [esp + 0x50]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x70]", - "fmul st4", - "fstp dword [esp + 0x58]", - "fld dword [esp + 0x58]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x74]", - "fmul st4", - "fstp dword [esp + 0x8c]", - "fld dword [esp + 0x8c]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x78]", - "fmulp st4", - "fxch st3", - "fstp dword [esp + 0x4c]", - "fld dword [esp + 0x4c]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x94]", - "fld dword [esp + 0x14]", - "fadd st0,st1", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x98]", - "fld dword [esp + 0x2c]", - "fadd st0,st1", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x9c]", - "fld dword [esp + 0x10]", - "fadd st0,st1", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd dword [esp + 0x40]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd dword [esp + 0x48]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd dword [esp + 0x44]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd dword [esp + 0x5c]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd dword [esp + 0x84]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd dword [esp + 0x7c]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fstp dword [esp + 0x70]", - "mov eax,dword [esp + 0x70]", - "fld dword [esp + 0x2c]", - "mov dword [esp + 0xb8],eax", - "fstp dword [esp + 0x74]", - "mov ecx,dword [esp + 0x74]", - "fld dword [esp + 0x10]", - "mov dword [esp + 0xbc],ecx", - "fstp dword [esp + 0x78]", - "mov edx,dword [esp + 0x78]", - "fxch st4", - "mov dword [esp + 0xc0],edx", - "fst dword [esp + 0x5c]", - "fxch st3", - "fst dword [esp + 0x84]", - "fxch st5", - "fst dword [esp + 0x7c]", - "fld dword [esp + 0x28]", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x54]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x50]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x58]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x8c]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x4c]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd st0,st3", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd st0,st2", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd st0,st5", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd dword [esp + 0x40]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd dword [esp + 0x48]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd dword [esp + 0x44]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fsub dword [esp + 0x5c]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fsub dword [esp + 0x84]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fsub dword [esp + 0x7c]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fstp dword [esp + 0x70]", - "mov eax,dword [esp + 0x70]", - "fld dword [esp + 0x2c]", - "mov dword [esp + 0xc4],eax", - "fstp dword [esp + 0x74]", - "mov ecx,dword [esp + 0x74]", - "fld dword [esp + 0x10]", - "mov dword [esp + 0xc8],ecx", - "fstp dword [esp + 0x78]", - "mov edx,dword [esp + 0x78]", - "fxch st3", - "mov dword [esp + 0xcc],edx", - "fst dword [esp + 0x5c]", - "fxch st5", - "fst dword [esp + 0x84]", - "fxch st3", - "fst dword [esp + 0x7c]", - "fld dword [esp + 0x28]", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x54]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x50]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x58]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x8c]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x4c]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd st0,st3", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd st0,st2", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd st0,st5", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fsub dword [esp + 0x40]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fsub dword [esp + 0x48]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fsub dword [esp + 0x44]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd dword [esp + 0x5c]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd dword [esp + 0x84]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd dword [esp + 0x7c]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fstp dword [esp + 0x70]", - "mov eax,dword [esp + 0x70]", - "fld dword [esp + 0x2c]", - "mov dword [esp + 0xd0],eax", - "fstp dword [esp + 0x74]", - "mov ecx,dword [esp + 0x74]", - "fld dword [esp + 0x10]", - "mov dword [esp + 0xd4],ecx", - "fstp dword [esp + 0x78]", - "mov edx,dword [esp + 0x78]", - "mov dword [esp + 0xd8],edx", - "fxch st5", - "push 0x0", - "fstp dword [esp + 0x60]", - "fxch st2", - "fstp dword [esp + 0x88]", - "fxch st3", - "fstp dword [esp + 0x80]", - "fld dword [esp + 0x2c]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x58]", - "fstp dword [esp + 0x4c]", - "fld dword [esp + 0x54]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x5c]", - "fstp dword [esp + 0x18]", - "fld dword [esp + 0x90]", - "fstp dword [esp + 0x30]", - "fld dword [esp + 0x50]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x18]", - "faddp st3,st0", - "fxch st2", - "fstp dword [esp + 0x18]", - "fld dword [esp + 0x30]", - "faddp st2,st0", - "fxch", - "fstp dword [esp + 0x30]", - "fadd dword [esp + 0x14]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x18]", - "fsub dword [esp + 0x44]", - "fstp dword [esp + 0x18]", - "fld dword [esp + 0x30]", - "fsub dword [esp + 0x4c]", - "fstp dword [esp + 0x30]", - "fld dword [esp + 0x14]", - "fsub dword [esp + 0x48]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x18]", - "fsub dword [esp + 0x60]", - "fstp dword [esp + 0x18]", - "fld dword [esp + 0x30]", - "fsub dword [esp + 0x88]", - "fstp dword [esp + 0x30]", - "fld dword [esp + 0x14]", - "fsub dword [esp + 0x80]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x18]", - "fstp dword [esp + 0x74]", - "mov eax,dword [esp + 0x74]", - "fld dword [esp + 0x30]", - "mov dword [esp + 0xe0],eax", - "fstp dword [esp + 0x78]", - "mov ecx,dword [esp + 0x78]", - "fld dword [esp + 0x14]", - "mov dword [esp + 0xe4],ecx", - "fstp dword [esp + 0x7c]", - "mov edx,dword [esp + 0x7c]", - "lea ecx,[esp + 0x190]", - "mov dword [esp + 0xe8],edx", - "call 0x0070df30", - "mov dword [esp + 0x198],esi", - "add esi,0xec", - "push esi", - "lea ecx,[esp + 0x190]", - "mov dword [esp + 0x314],0x0", - "call 0x0070e040", - "mov ecx,0x19", - "lea esi,[esp + 0x1b8]", - "lea edi,[esp + 0x21c]", - "rep movsd", - "mov dword [esp + 0x198],ebx", - "add ebx,0xec", - "push ebx", - "lea ecx,[esp + 0x190]", - "call 0x0070e040", - "mov ecx,0x19", - "lea esi,[esp + 0x1b8]", - "lea edi,[esp + 0x284]", - "rep movsd", - "lea esi,[esp + 0x124]", - "mov edi,0x5" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x10, #136]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x10, #140]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w6, [x10, #144]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "mov w20, #0x3f", - "str w20, [x8, #740]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #148]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "str w5, [x8, #152]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w6, [x8, #156]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "str w4, [x8, #232]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #236]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "str w6, [x8, #240]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #244]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #140]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #108]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #240]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #256]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #140]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "mov w24, #0x0", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #148]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #152]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #156]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #92]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #244]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x8, #96]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #248]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x8, #100]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "str w6, [x8, #252]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #20]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #256]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x8, #24]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #260]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x8, #28]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "str w6, [x8, #264]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #20]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #268]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x8, #24]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #272]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x8, #28]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "str w6, [x8, #276]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #20]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #280]", - "ldr w4, [x7, #136]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w5, [x8, #24]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x8, #28]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #284]", - "ldr w5, [x7, #140]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w6, [x8, #288]", - "ldr w6, [x7, #144]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #148]", - "str w5, [x8, #152]", - "str w6, [x8, #156]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "str w4, [x8, #172]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #176]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "str w6, [x8, #180]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #244]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #108]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #240]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #256]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #140]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #148]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #152]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #156]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #112]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #184]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x8, #116]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #188]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x8, #120]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "str w6, [x8, #192]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #112]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #196]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x8, #116]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #200]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x8, #120]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "str w6, [x8, #204]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #112]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #208]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x8, #116]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #212]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x8, #120]", - "str w6, [x8, #216]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "str w24, [x8, #-4]!", - "strb w22, [x28, #1298]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #136]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #144]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #116]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #224]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x8, #120]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #228]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x8, #124]", - "add w5, w8, #0x190 (400)", - "str w6, [x8, #232]", - "mov w20, #0x2296", - "movk w20, #0x1, lsl #16", - "mov w22, #0xd4f1", - "movk w22, #0x70, lsl #16", - "add w22, w20, w22", - "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", - "ldr x0, [x28, #2280]", - "and x3, x22, #0xfffff", - "add x0, x0, x3, lsl #4", - "ldp x1, x0, [x0]" - ] - }, - "Block4": { - "ExpectedInstructionCount": 76, - "x86Insts": [ - "fldz", - "push 0x0", - "push -0x1", - "push 0x1000172", - "push 0x37", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa33c14", - "push 0x52424157", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1000172", - "push 0x38", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa33c04", - "push 0x41574157", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x2b", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa33bfc", - "push 0x444c4853", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x3d", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa33bf0", - "push 0x48534946", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x44", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa33bdc", - "push 0x4853494c", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x3e", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa33bcc", - "push 0x48535246", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x52485446", - "push 0x4c505344", - "push 0x2", - "push 0x40", - "push 0x1000073", - "push 0xb", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa33bc4", - "push 0x4e445242", - "call 0x00417220", - "fldz", - "add esp,0x28", - "push 0x4c505344", - "push 0x1", - "push 0x40", - "push 0x1000076", - "push 0xb", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa33bbc", - "push 0x52485446", - "call 0x00417220", - "fldz", - "add esp,0x24", - "push 0x0", - "push -0x1", - "push 0xe0", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa32700", - "push 0x4b434f4c", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0xc0", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa33bb4", - "push 0x4e45504f", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x48534946", - "push 0x49465352", - "push 0x4c505344", - "push 0x3", - "push 0x3d", - "push 0x21000475", - "push 0x8", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33ba8", - "push 0x47444946", - "call 0x00417220", - "fldz", - "add esp,0x2c", - "push 0x4853494c", - "push 0x48535352", - "push 0x4c505344", - "push 0x3", - "push 0x44", - "push 0x21000075", - "push 0x8", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b98", - "push 0x47444853", - "call 0x00417220", - "fldz", - "add esp,0x2c", - "push 0x48535246", - "push 0x52465352", - "push 0x4c505344", - "push 0x3", - "push 0x3e", - "push 0x1000075", - "push 0x8", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b88", - "push 0x47445246", - "call 0x00417220", - "fldz", - "add esp,0x2c", - "push 0x54414241", - "push 0x54414f46", - "push 0x54414552", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x100075", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b74", - "push 0x54414744", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x45484241", - "push 0x45484f46", - "push 0x45484552", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x21000075", - "push 0x8", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b64", - "push 0x45484744", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x50534241", - "push 0x50534f46", - "push 0x50534552", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x1000075", - "push 0x9", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b50", - "push 0x50534744", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x41464241", - "push 0x41464f46", - "push 0x41464552", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x1000075", - "push 0xa", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b40", - "push 0x41464744", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x54414241", - "push 0x54414f46", - "push 0x54414552", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x100077", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b30", - "push 0x54415244", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x4b534241", - "push 0x4b534f46", - "push 0x4c505344", - "push 0x3", - "push 0x40", - "push 0x80077", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b24", - "push 0x4b535244", - "call 0x00417220", - "fldz", - "add esp,0x2c", - "push 0x45484241", - "push 0x45484f46", - "push 0x45484552", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x1000077", - "push 0x8", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b14", - "push 0x45485244", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x50534241", - "push 0x50534f46", - "push 0x50534552", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x1000077", - "push 0x9", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b00", - "push 0x50535244", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x41464241", - "push 0x41464f46", - "push 0x41464552", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x1000077", - "push 0xa", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33af0", - "push 0x41465244", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x4c505344", - "push 0x49465352", - "push 0x48534946", - "push 0x3", - "push 0x40", - "push 0x100007f", - "push 0x3d", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33adc", - "push 0x49464b57", - "call 0x00417220", - "fldz", - "add esp,0x2c", - "push 0x4c505344", - "push 0x52465352", - "push 0x48535246", - "push 0x3", - "push 0x40", - "push 0x100007f", - "push 0x3e", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33ac8", - "push 0x52464b57", - "call 0x00417220", - "fldz", - "add esp,0x2c", - "push 0x4c505344", - "push 0x48535352", - "push 0x4853494c", - "push 0x3", - "push 0x40", - "push 0x100007f", - "push 0x44", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33ab4", - "push 0x48534b57", - "call 0x00417220", - "fldz", - "add esp,0x2c", - "push 0x4c505344", - "push 0x414d5352", - "push 0x2", - "push 0x40", - "push 0x100007f", - "push 0x40", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33aa0", - "push 0x414d4b57", - "call 0x00417220", - "fldz", - "add esp,0x28", - "push 0x4c505344", - "push 0x49445352", - "push 0x2", - "push 0x40", - "push 0x100007f", - "push 0x3f", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33a8c", - "push 0x49444b57", - "call 0x00417220", - "fldz", - "add esp,0x28", - "push 0x4c505344", - "push 0x4f505352", - "push 0x2", - "push 0x40", - "push 0x100007f", - "push 0x43", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33a78", - "push 0x4f504b57", - "call 0x00417220", - "add esp,0x28", - "push 0x4c505344", - "push 0x574e5352", - "push 0x2", - "push 0x40", - "push 0x100007f", - "push 0x41", - "push ecx", - "fldz", - "fstp dword [esp]", - "push 0x2", - "push 0xa33a5c", - "push 0x574e4b57", - "call 0x00417220", - "fldz", - "add esp,0x28", - "push 0x48535246", - "push 0x4853494c", - "push 0x48534946", - "push 0x444c4853", - "push 0x4c505344", - "push 0x5", - "push 0x40", - "push 0x75", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33a48", - "push 0x52414944", - "call 0x00417220", - "fldz", - "add esp,0x34", - "push 0x48535246", - "push 0x4853494c", - "push 0x48534946", - "push 0x444c4853", - "push 0x4c505344", - "push 0x5", - "push 0x40", - "push 0x75", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33a30", - "push 0x45574944", - "call 0x00417220", - "fldz", - "add esp,0x34", - "push 0x0", - "push 0x3f", - "push 0x10000092", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33a24", - "push 0x504d4156", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x14", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33a18", - "push 0x47445553", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1000112", - "push 0x39", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33a08", - "push 0x414d5453", - "call 0x00417220", - "add esp,0x20", - "push 0x4f505543", - "push 0x1", - "push 0x43", - "push 0x800000", - "fldz", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa339fc", - "push 0x4e534f50", - "call 0x00417220", - "fldz", - "add esp,0x24", - "push 0x49445543", - "push 0x1", - "push 0x3f", - "push 0x800000", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa339ec", - "push 0x45534944", - "call 0x00417220", - "fldz", - "add esp,0x24", - "push 0x45484241", - "push 0x45484f46", - "push 0x45484552", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x21000075", - "push 0x8", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa339cc", - "push 0x594d5544", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x0", - "push -0x1", - "push 0x1000172", - "push 0x2f", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa339bc", - "push 0x49564e49", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x2e", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa339b0", - "push 0x4c4d4843", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x4c505344", - "push 0x41505543", - "push 0x2", - "push 0x42", - "push 0x1000173", - "push 0x30", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa339a4", - "push 0x41524150", - "call 0x00417220", - "add esp,0x28", - "push 0x4c505344", - "push 0x1", - "push 0x40", - "push 0x1000173", - "push 0x31", - "fldz", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa3399c", - "push 0x434e4c53", - "call 0x00417220", - "fldz", - "add esp,0x24", - "push 0x4c505344", - "push 0x1", - "push 0x40", - "push 0x1000062", - "push 0x6", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa33994", - "push 0x4d524843", - "call 0x00417220", - "fldz", - "add esp,0x24", - "push 0x594c4152", - "push 0x4c505344", - "push 0x2", - "push 0x40", - "push 0x41000066", - "push 0x22", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa33988", - "push 0x4f4d4544", - "call 0x00417220", - "fldz", - "add esp,0x28", - "push 0x4f4d4544", - "push 0x4c505344", - "push 0x2", - "push 0x40", - "push 0x1000062", - "push 0x22", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa33980", - "push 0x594c4152", - "call 0x00417220", - "fldz", - "add esp,0x28", - "push 0x4d4c4143", - "push 0x4c505344", - "push 0x2", - "push 0x40", - "push 0x41000062", - "push 0x21", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa33978", - "push 0x5a4e5246", - "call 0x00417220", - "fldz", - "add esp,0x28", - "push 0x5a4e5246", - "push 0x4c505344", - "push 0x2", - "push 0x40", - "push 0x41000066", - "push 0x21", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa33970", - "push 0x4d4c4143", - "call 0x00417220", - "add esp,0x28", - "push 0x0", - "push -0x1", - "push 0x1000112", - "push 0x29", - "fldz", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa33964", - "push 0x4559454e", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x80000072", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa3395c", - "push 0x5448474c", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x81000072", - "push 0x46", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa33950", - "push 0x4b524144", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push 0x40", - "push 0xf0", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x4", - "push 0xa33948", - "push 0x4c505344", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x4c505344", - "push 0x1", - "push 0x40", - "push 0x163", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x4", - "push 0xa3393c", - "push 0x50525453", - "call 0x00417220", - "fldz", - "add esp,0x24", - "push 0x0", - "push -0x1", - "push 0x81000242", - "push 0x3c", - "push ecx", - "fstp dword [esp]", - "push 0x4", - "push 0xa33930", - "push 0x454c4554", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x81000012", - "push 0x3a", - "push ecx", - "fstp dword [esp]", - "push 0x4", - "push 0xa33924", - "push 0x54435444", - "call 0x00417220", - "add esp,0x20", - "fldz", - "push 0x0", - "push 0x40", - "push 0x1000072", - "push 0x34", - "push ecx", - "fstp dword [esp]", - "push 0x4", - "push 0xa33910", - "push 0x53424153", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x35", - "push ecx", - "fstp dword [esp]", - "push 0x4", - "push 0xa33908", - "push 0x434c4652", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100001a", - "push 0x3b", - "push ecx", - "fstp dword [esp]", - "push 0x4", - "push 0xa338f8", - "push 0x47444552", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100070", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa338e4", - "push 0x54414552", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1000070", - "push 0x8", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa338d4", - "push 0x45484552", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1000070", - "push 0x9", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa338bc", - "push 0x50534552", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1000070", - "push 0xa", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa338ac", - "push 0x41464552", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100072", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33898", - "push 0x54414f46", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x80072", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33888", - "push 0x4b534f46", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1000072", - "push 0x8", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33878", - "push 0x45484f46", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1000072", - "push 0x9", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33860", - "push 0x50534f46", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1000072", - "push 0xa", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33850", - "push 0x41464f46", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x4b535244", - "push 0x4b534241", - "push 0x4c505344", - "push 0x3", - "push 0x40", - "push 0x80027", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33840", - "push 0x4b534241", - "call 0x00417220", - "add esp,0x2c", - "push 0x54414744", - "push 0x54415244", - "push 0x54414241", - "fldz", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x100027", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa3382c", - "push 0x54414241", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x594d5544", - "push 0x45484744", - "push 0x45485244", - "push 0x45484241", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x1000025", - "push 0x8", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa3381c", - "push 0x45484241", - "call 0x00417220", - "fldz", - "add esp,0x34", - "push 0x41464744", - "push 0x41465244", - "push 0x41464241", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x1000025", - "push 0xa", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa3380c", - "push 0x41464241", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x50534744", - "push 0x50535244", - "push 0x50534241", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x1000025", - "push 0x9", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa337f8", - "push 0x50534241", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x3d", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa337ec", - "push 0x49465352", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x3e", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa337dc", - "push 0x52465352", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x44", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa337cc", - "push 0x48535352", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x40", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa337bc", - "push 0x414d5352", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x3f", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa337ac", - "push 0x49445352", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x43", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa3379c", - "push 0x4f505352", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x42", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33788", - "push 0x41505352", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x41", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33770", - "push 0x574e5352", - "call 0x00417220", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100017a", - "push 0x47", - "fldz", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa3375c", - "push 0x44575352", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1f0", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa3374c", - "push 0x49445543", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1f0", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33740", - "push 0x4f505543", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1f0", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33730", - "push 0x41505543", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1000012", - "push 0x28", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33714", - "push 0x4d4d4f46", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33704", - "push 0x4f48475a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa336f8", - "push 0x43494c5a", - "call 0x00417220", - "add esp,0x20", - "push 0x0", - "fldz", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa336e8", - "push 0x454b535a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa336d0", - "push 0x414b535a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa336b4", - "push 0x434b535a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa3369c", - "push 0x484b535a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa3368c", - "push 0x4152575a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33678", - "push 0x4c52575a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33668", - "push 0x4d4f5a5a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33650", - "push 0x5a44485a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33638", - "push 0x4149465a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33620", - "push 0x4152465a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33608", - "push 0x4154535a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa335f8", - "push 0x4541445a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa335e8", - "push 0x4552445a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa335d4", - "push 0x4c52445a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa335c4", - "push 0x4143535a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa335b0", - "push 0x414c435a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33598", - "push 0x4450535a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33588", - "push 0x5649585a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33578", - "push 0x3130305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33568", - "push 0x3230305a", - "call 0x00417220", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "fldz", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33558", - "push 0x3330305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33548", - "push 0x3430305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33538", - "push 0x3530305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33528", - "push 0x3630305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33518", - "push 0x3730305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33508", - "push 0x3830305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa334f8", - "push 0x3930305a", - "call 0x00417220", - "add esp,0x20", - "push 0x0", - "fldz", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa334e8", - "push 0x3031305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa334d8", - "push 0x3131305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa334c8", - "push 0x3231305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa334b8", - "push 0x3331305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa334a8", - "push 0x3431305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33498", - "push 0x3531305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33488", - "push 0x3631305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33478", - "push 0x3731305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33468", - "push 0x3831305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33458", - "push 0x3931305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33448", - "push 0x3032305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x4c505344", - "push 0x1", - "push -0x1", - "push 0x40000062", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa33434", - "push 0x55484f43", - "call 0x00417220", - "fldz", - "add esp,0x24", - "push 0x4c505344", - "push 0x1", - "push -0x1", - "push 0x40000062", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa33420", - "push 0x52434f43", - "call 0x00417220", - "add esp,0x24", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fldz", - "fstp dword [esp]", - "push 0x1", - "push 0xa33414", - "push 0x58415742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33408", - "push 0x4f425742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa333f8", - "push 0x41445742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa333ec", - "push 0x414d5742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa333e0", - "push 0x57535742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa333d4", - "push 0x4f424142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa333c4", - "push 0x55434142", - "call 0x00417220", - "add esp,0x20", - "push 0x0", - "push -0x1", - "fldz", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa333b4", - "push 0x41474142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa333a4", - "push 0x52474142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33394", - "push 0x45484142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33384", - "push 0x48534142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa3336c", - "push 0x31304142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33354", - "push 0x32304142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa3333c", - "push 0x33304142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33324", - "push 0x34304142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa3330c", - "push 0x35304142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa332f4", - "push 0x36304142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa332dc", - "push 0x37304142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa332c4", - "push 0x38304142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa332ac", - "push 0x39304142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33294", - "push 0x30314142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa3327c", - "push 0x31305742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33264", - "push 0x32305742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa3324c", - "push 0x33305742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33234", - "push 0x34305742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa3321c", - "push 0x35305742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33204", - "push 0x36305742", - "call 0x00417220", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fldz", - "fstp dword [esp]", - "push 0x1", - "push 0xa331ec", - "push 0x37305742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa331d4", - "push 0x38305742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa331bc", - "push 0x39305742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa331a4", - "push 0x30315742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x594c4152", - "push 0x4c505344", - "push 0x2", - "push 0x40", - "push 0x40000063", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33198", - "push 0x4e525554", - "call 0x00417220", - "fldz", - "add esp,0x28", - "push 0x4c505344", - "push 0x1", - "push -0x1", - "push 0x170", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x6", - "push 0xa33188", - "push 0x46464553", - "call 0x00417220", - "fldz", - "add esp,0x24", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa3316c", - "push 0x4854594d", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33154", - "push 0x4c48594d", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10000360", + "str s2, [x21]", + "ldr s2, [x8, #140]", + "add w21, w4, #0x700 (1792)", + "str s2, [x21]", + "ldr s2, [x8, #136]", + "add w21, w4, #0x740 (1856)", + "str s2, [x21]", + "ldr s2, [x8, #132]", + "add w21, w4, #0x780 (1920)", + "str s2, [x21]", + "ldr s2, [x8, #272]", + "add w21, w4, #0x7c0 (1984)", + "str s2, [x21]", + "ldr w21, [x5, #4096]", + "eor w27, w21, w5", + "subs w26, w21, w5", + "cfinv", + "add w4, w5, #0x800 (2048)", + "strb w20, [x28, #1298]" + ] + }, + "Block2": { + "ExpectedInstructionCount": 16635, + "x86Insts": [ + "mov eax,dword [ebp + 0x8]", + "fld dword [eax + 0x40]", + "fld dword [eax + 0x44]", + "fadd st0,st1", + "fstp dword [eax + 0x44]", + "fld dword [eax + 0x3c]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x40]", + "fld dword [eax + 0x38]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x3c]", + "fld dword [eax + 0x34]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x38]", + "fld dword [eax + 0x30]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x34]", + "fld dword [eax + 0x2c]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x30]", + "fld dword [eax + 0x28]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x2c]", + "fld dword [eax + 0x24]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x28]", + "fld dword [eax + 0x20]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x24]", + "fld dword [eax + 0x1c]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x20]", + "fld dword [eax + 0x18]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x1c]", + "fld dword [eax + 0x14]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x18]", + "fld dword [eax + 0x10]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x14]", + "fld dword [eax + 0xc]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x10]", + "fld dword [eax + 0x8]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0xc]", + "fld dword [eax + 0x4]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x8]", + "fld dword [eax]", + "fst qword [esp + 0x20]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x8]", + "fst dword [eax + 0x4]", + "fld dword [eax + 0x3c]", + "fld dword [eax + 0x44]", + "fadd st0,st1", + "fstp dword [eax + 0x44]", + "fld dword [eax + 0x34]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x3c]", + "fld dword [eax + 0x2c]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x34]", + "fld dword [eax + 0x24]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x2c]", + "fld dword [eax + 0x1c]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x24]", + "fld dword [eax + 0x14]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x1c]", + "fld dword [eax + 0xc]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x14]", + "faddp", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x4]", + "fstp dword [eax + 0xc]", + "fadd st0,st0", + "fstp dword [esp + 0x14]", + "fld dword [eax + 0x30]", + "fst qword [esp + 0x18]", + "fld dword [esp + 0x14]", + "fst qword [esp + 0x28]", + "faddp", + "fstp dword [esp + 0x14]", + "fld dword [eax + 0x10]", + "fld dword [esp + 0x14]", + "fst qword [esp + 0x80]", + "fld dword [eax + 0x20]", + "fld dword [eax + 0x40]", + "fld st3", + "fld qword [0x00a77b70]", + "fmul st1", + "fxch", + "faddp st4,st0", + "fld st2", + "fld qword [0x00a77b68]", + "fmul st1", + "fxch st5", + "faddp", + "fld st2", + "fld qword [0x00a77b60]", + "fmul st1", + "fxch st2", + "faddp", + "fstp dword [esp + 0xc0]", + "fld qword [esp + 0x28]", + "fadd st0,st6", + "fsub st0,st4", + "fld qword [esp + 0x18]", + "fsub st1,st0", + "fsubp", + "fsub st0,st3", + "fstp dword [esp + 0xd0]", + "fld st5", + "fmul st1", + "fsubr qword [esp + 0x80]", + "fld st4", + "fmul st3", + "fsubp", + "fld st3", + "fmul st6", + "faddp", + "fstp dword [esp + 0xb8]", + "fld st5", + "fmul st5", + "fsubr qword [esp + 0x80]", + "fld st4", + "fmul st2", + "faddp", + "fld st3", + "fmul st3", + "fsubp", + "fstp dword [esp + 0xc8]", + "fld qword [esp + 0x20]", + "fsubrp st6,st0", + "fxch st5", + "faddp st3,st0", + "fxch st2", + "fsub qword [esp + 0x18]", + "faddp", + "fstp dword [esp + 0x80]", + "fld dword [eax + 0x18]", + "fmul qword [0x00a77b58]", + "fstp dword [esp + 0x14]", + "fld dword [eax + 0x8]", + "fst qword [esp + 0x18]", + "fld dword [esp + 0x14]", + "fst qword [esp + 0x20]", + "fld dword [eax + 0x28]", + "fst qword [esp + 0x90]", + "fld dword [eax + 0x38]", + "fst qword [esp + 0x28]", + "fld qword [0x00a77b50]", + "fmul st4", + "fxch st4", + "faddp st3,st0", + "fld qword [0x00a77b48]", + "fmul st2", + "fxch st3", + "faddp st2,st0", + "fld qword [0x00a77b40]", + "fmul st1", + "fxch st2", + "faddp", + "fstp dword [esp + 0xb4]", + "fld qword [esp + 0x18]", + "fld qword [esp + 0x90]", + "fsub st1,st0", + "fxch", + "fsub qword [esp + 0x28]", + "fmul qword [0x00a77b58]", + "fstp dword [esp + 0xc4]", + "fld qword [esp + 0x18]", + "fmul st3", + "fsub qword [esp + 0x20]", + "fxch", + "fmul st2", + "fsubp", + "fld qword [esp + 0x28]", + "fmul st4", + "faddp", + "fstp dword [esp + 0xa8]", + "fld qword [esp + 0x18]", + "fmul st1", + "fsub qword [esp + 0x20]", + "fld qword [esp + 0x90]", + "fmul st4", + "faddp", + "fld qword [esp + 0x28]", + "fmul st3", + "fsubp", + "fstp dword [esp + 0x90]", + "fld dword [esp + 0x8]", + "fst qword [esp + 0x8]", + "fadd st0,st0", + "fstp dword [esp + 0x14]", + "fld dword [eax + 0x34]", + "fst qword [esp + 0x98]", + "fld dword [esp + 0x14]", + "fst qword [esp + 0xa0]", + "faddp", + "fstp dword [esp + 0x14]", + "fld dword [eax + 0x14]", + "fst qword [esp + 0x20]", + "fld dword [esp + 0x14]", + "fstp qword [esp + 0x88]", + "fld dword [eax + 0x24]", + "fstp qword [esp + 0x18]", + "fld dword [eax + 0x44]", + "fstp qword [esp + 0x28]", + "fmul st4", + "fadd qword [esp + 0x88]", + "fld qword [esp + 0x18]", + "fmul st6", + "faddp", + "fld qword [esp + 0x28]", + "fmul st7", + "faddp", + "fstp dword [esp + 0xb0]", + "fld qword [esp + 0xa0]", + "fadd qword [esp + 0x20]", + "fsub qword [esp + 0x18]", + "fld qword [esp + 0x98]", + "fsub st1,st0", + "fsubp", + "fsub qword [esp + 0x28]", + "fstp dword [esp + 0x30]", + "fld qword [esp + 0x20]", + "fmul st6", + "fsubr qword [esp + 0x88]", + "fld qword [esp + 0x18]", + "fmul st5", + "fsubp", + "fld qword [esp + 0x28]", + "fmul st6", + "faddp", + "fstp dword [esp + 0xa0]", + "fld qword [esp + 0x20]", + "fld st0", + "fmulp st6", + "fld qword [esp + 0x88]", + "fsubrp st6,st0", + "fld qword [esp + 0x18]", + "fmulp st7", + "fxch st5", + "faddp st6,st0", + "fld qword [esp + 0x28]", + "fld st0", + "fmulp st5", + "fxch st6", + "fsubrp st4,st0", + "fxch st3", + "fstp dword [esp + 0x28]", + "fld qword [esp + 0x8]", + "fsubrp st4,st0", + "fxch st3", + "fadd qword [esp + 0x18]", + "fsub qword [esp + 0x98]", + "faddp st4,st0", + "fxch st3", + "fmul qword [0x00a77bd8]", + "fstp dword [esp + 0x18]", + "fld dword [eax + 0x1c]", + "fmul qword [0x00a77b58]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x14]", + "fld dword [eax + 0x2c]", + "fld dword [eax + 0x3c]", + "fld dword [esp + 0x4]", + "fmul st6", + "fadd st0,st3", + "fld st2", + "fmul st6", + "faddp", + "fld st1", + "fmul st5", + "faddp", + "fstp dword [esp + 0x14]", + "fld dword [eax + 0xc]", + "fst qword [esp + 0x20]", + "fsub st0,st2", + "fsub st0,st1", + "fmul qword [0x00a77b58]", + "fstp dword [esp + 0x98]", + "fld qword [esp + 0x20]", + "fmul st5", + "fsub st0,st3", + "fld st2", + "fmul st5", + "fsubp", + "fld st1", + "fmul st7", + "faddp", + "fstp dword [esp + 0x88]", + "fld qword [esp + 0x20]", + "fmulp st4", + "fxch st3", + "fsubrp st2,st0", + "fmulp st4", + "faddp st3,st0", + "fmulp", + "fsubp", + "fstp dword [esp + 0x20]", + "fld dword [esp + 0xb4]", + "fld dword [esp + 0xc0]", + "fld st0", + "fadd st0,st2", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x14]", + "fld dword [esp + 0xb0]", + "fld st0", + "fadd st0,st2", + "fmul qword [0x00a77b38]", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x4]", + "fld dword [esp + 0x8]", + "fld st0", + "fadd st0,st2", + "fstp dword [esp + 0x38]", + "fsubrp", + "fstp dword [esp + 0x7c]", + "fld dword [esp + 0xc4]", + "fld dword [esp + 0xd0]", + "fld st0", + "fadd st0,st2", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x98]", + "fst qword [esp + 0xd0]", + "fld dword [esp + 0x30]", + "fst qword [esp + 0x98]", + "faddp", + "fmul qword [0x00a77bd0]", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x4]", + "fld dword [esp + 0x8]", + "fst qword [esp + 0x30]", + "fadd st0,st1", + "fstp dword [esp + 0x3c]", + "fsubr qword [esp + 0x30]", + "fstp dword [esp + 0x78]", + "fld dword [esp + 0xa8]", + "fst qword [esp + 0xa8]", + "fld dword [esp + 0xb8]", + "fst qword [esp + 0xb8]", + "faddp", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x88]", + "fst qword [esp + 0x88]", + "fld dword [esp + 0xa0]", + "fst qword [esp + 0xa0]", + "faddp", + "fmul qword [0x00a77b30]", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x4]", + "fld dword [esp + 0x8]", + "fst qword [esp + 0x30]", + "fadd st0,st1", + "fstp dword [esp + 0x40]", + "fsubr qword [esp + 0x30]", + "fstp dword [esp + 0x74]", + "fld dword [esp + 0x90]", + "fst qword [esp + 0x90]", + "fld dword [esp + 0xc8]", + "fst qword [esp + 0xc8]", + "faddp", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x20]", + "fst qword [esp + 0x20]", + "fld dword [esp + 0x28]", + "fst qword [esp + 0x28]", + "faddp", + "fmul qword [0x00a77b28]", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x4]", + "fld dword [esp + 0x8]", + "fst qword [esp + 0x30]", + "fadd st0,st1", + "fstp dword [esp + 0x44]", + "fsubr qword [esp + 0x30]", + "fstp dword [esp + 0x70]", + "fld dword [esp + 0x18]", + "fld dword [esp + 0x80]", + "fst qword [esp + 0x80]", + "fadd st0,st1", + "fstp dword [esp + 0x48]", + "fsubr qword [esp + 0x80]", + "fstp dword [esp + 0x6c]", + "fld qword [esp + 0xc8]", + "fsub qword [esp + 0x90]", + "fstp dword [esp + 0x8]", + "fld qword [esp + 0x28]", + "fsub qword [esp + 0x20]", + "fmul qword [0x00a77b20]", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x4]", + "fld dword [esp + 0x8]", + "fst qword [esp + 0x30]", + "fadd st0,st1", + "fstp dword [esp + 0x4c]", + "fsubr qword [esp + 0x30]", + "fstp dword [esp + 0x68]", + "fld qword [esp + 0xb8]", + "fsub qword [esp + 0xa8]", + "fstp dword [esp + 0x8]", + "fld qword [esp + 0xa0]", + "fsub qword [esp + 0x88]", + "fmul qword [0x00a77b18]", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x4]", + "fld dword [esp + 0x8]", + "fst qword [esp + 0x30]", + "fadd st0,st1", + "fstp dword [esp + 0x50]", + "fsubr qword [esp + 0x30]", + "fstp dword [esp + 0x64]", + "fsubrp", + "fstp dword [esp + 0x8]", + "fld qword [esp + 0x98]", + "fsub qword [esp + 0xd0]", + "fmul qword [0x00a77be0]", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x4]", + "fld dword [esp + 0x8]", + "fld st0", + "fadd st0,st2", + "fstp dword [esp + 0x54]", + "fsubrp", + "fstp dword [esp + 0x60]", + "fxch st2", + "fsubrp st3,st0", + "fxch st2", + "fstp dword [esp + 0x8]", + "fsubrp", + "fmul qword [0x00a77b10]", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x4]", + "fld dword [esp + 0x8]", + "lea eax,[ecx + ecx*0x8]", + "fld st0", + "mov ecx,dword [ebp + 0xc]", + "fadd st0,st2", + "shl eax,0x4", + "add eax,0xb183d0", + "fstp dword [esp + 0x58]", + "fsubrp", + "fstp dword [esp + 0x5c]", + "fld dword [esp + 0x5c]", + "fld st0", + "fchs", + "fmul dword [eax]", + "fstp dword [ecx]", + "fld dword [eax + 0x4]", + "fld dword [esp + 0x60]", + "fld st0", + "fchs", + "fmulp st2", + "fxch", + "fstp dword [ecx + 0x4]", + "fld dword [eax + 0x8]", + "fld dword [esp + 0x64]", + "fld st0", + "fchs", + "fmulp st2", + "fxch", + "fstp dword [ecx + 0x8]", + "fld dword [eax + 0xc]", + "fld dword [esp + 0x68]", + "fld st0", + "fchs", + "fmulp st2", + "fxch", + "fstp dword [ecx + 0xc]", + "fld dword [eax + 0x10]", + "fld dword [esp + 0x6c]", + "fld st0", + "fchs", + "fmulp st2", + "fxch", + "fstp dword [ecx + 0x10]", + "fld dword [eax + 0x14]", + "fld dword [esp + 0x70]", + "fld st0", + "fchs", + "fmulp st2", + "fxch", + "fstp dword [ecx + 0x14]", + "fld dword [eax + 0x18]", + "fld dword [esp + 0x74]", + "fchs", + "fmulp", + "fstp dword [ecx + 0x18]", + "fld dword [eax + 0x1c]", + "fld dword [esp + 0x78]", + "fchs", + "fmulp", + "fstp dword [ecx + 0x1c]", + "fld dword [eax + 0x20]", + "fld dword [esp + 0x7c]", + "fchs", + "fmulp", + "fstp dword [ecx + 0x20]", + "fld dword [eax + 0x24]", + "fmul dword [esp + 0x7c]", + "fstp dword [ecx + 0x24]", + "fld dword [eax + 0x28]", + "fmul dword [esp + 0x78]", + "fstp dword [ecx + 0x28]", + "fld dword [eax + 0x2c]", + "fmul dword [esp + 0x74]", + "fstp dword [ecx + 0x2c]", + "fmul dword [eax + 0x30]", + "fstp dword [ecx + 0x30]", + "fmul dword [eax + 0x34]", + "fstp dword [ecx + 0x34]", + "fmul dword [eax + 0x38]", + "fstp dword [ecx + 0x38]", + "fmul dword [eax + 0x3c]", + "fstp dword [ecx + 0x3c]", + "fmul dword [eax + 0x40]", + "fstp dword [ecx + 0x40]", + "fmul dword [eax + 0x44]", + "fstp dword [ecx + 0x44]", + "fld dword [esp + 0x58]", + "fld dword [eax + 0x48]", + "fmul st1", + "fstp dword [ecx + 0x48]", + "fld dword [esp + 0x54]", + "fld dword [eax + 0x4c]", + "fmul st1", + "fstp dword [ecx + 0x4c]", + "fld dword [esp + 0x50]", + "fld dword [eax + 0x50]", + "fmul st1", + "fstp dword [ecx + 0x50]", + "fld dword [esp + 0x4c]", + "fld dword [eax + 0x54]", + "fmul st1", + "fstp dword [ecx + 0x54]", + "fld dword [esp + 0x48]", + "fld dword [eax + 0x58]", + "fmul st1", + "fstp dword [ecx + 0x58]", + "fld dword [esp + 0x44]", + "fld dword [eax + 0x5c]", + "fmul st1", + "fstp dword [ecx + 0x5c]", + "fld dword [esp + 0x40]", + "fst qword [esp + 0x18]", + "fmul dword [eax + 0x60]", + "fstp dword [ecx + 0x60]", + "fld dword [esp + 0x3c]", + "fst qword [esp + 0x80]", + "fmul dword [eax + 0x64]", + "fstp dword [ecx + 0x64]", + "fld dword [esp + 0x38]", + "fld dword [eax + 0x68]", + "fmul st1", + "fstp dword [ecx + 0x68]", + "fmul dword [eax + 0x6c]", + "fstp dword [ecx + 0x6c]", + "fld dword [eax + 0x70]", + "fmul qword [esp + 0x80]", + "fstp dword [ecx + 0x70]", + "fld dword [eax + 0x74]", + "fmul qword [esp + 0x18]", + "fstp dword [ecx + 0x74]", + "fmul dword [eax + 0x78]", + "fstp dword [ecx + 0x78]", + "fmul dword [eax + 0x7c]", + "fstp dword [ecx + 0x7c]", + "fmul dword [eax + 0x80]", + "fstp dword [ecx + 0x80]", + "fmul dword [eax + 0x84]", + "fstp dword [ecx + 0x84]", + "fmul dword [eax + 0x88]", + "fstp dword [ecx + 0x88]", + "fmul dword [eax + 0x8c]", + "fstp dword [ecx + 0x8c]", + "mov esp,ebp", + "pop ebp" + ], + "ExpectedArm64ASM": [ + "ldr w4, [x9, #8]", + "ldr s2, [x4, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x4, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w20, #0x0", + "strb w20, [x28, #1017]", + "add w21, w4, #0x40 (64)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0x3c (60)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0x38 (56)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0x34 (52)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0x24 (36)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0x1c (28)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v4.8b, v0.8b", + "str d4, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0x4 (4)", + "str s3, [x21]", + "ldr s3, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s5, [x4, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w4, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0x3c (60)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0x34 (52)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0x24 (36)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0x1c (28)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w4, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #4]", + "add w21, w4, #0xc (12)", + "str s3, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v3.8b, v0.8b", + "str d3, [x21]", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v4.8b, v0.8b", + "str d4, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x80 (128)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v4.8b, v0.8b", + "str d4, [x21]", + "ldr s4, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x4, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mov w21, #0x7b70", + "movk w21, #0xa7, lsl #16", + "ldr d6, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v6.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb w20, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov w21, #0x7b68", + "movk w21, #0xa7, lsl #16", + "ldr d7, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "strb w20, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov w21, #0x7b60", + "movk w21, #0xa7, lsl #16", + "ldr d8, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v8.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "strb w20, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0xc0 (192)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr d3, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v3.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr d9, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0xd0 (208)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr d9, [x8, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0xb8 (184)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr d9, [x8, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0xc8 (200)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr d3, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v3.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "ldr d3, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v3.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x80 (128)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w21, #0x7b58", + "movk w21, #0xa7, lsl #16", + "ldr d3, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v3.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr s2, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v3.8b, v0.8b", + "str d3, [x22]", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w22, w8, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v4.8b, v0.8b", + "str d4, [x22]", + "ldr s4, [x4, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w22, w8, #0x90 (144)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v5.8b, v0.8b", + "str d5, [x22]", + "ldr s5, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w22, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v9.8b, v0.8b", + "str d9, [x22]", + "mov w22, #0x7b50", + "movk w22, #0xa7, lsl #16", + "ldr d9, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "strb w20, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w22, #0x7b48", + "movk w22, #0xa7, lsl #16", + "ldr d3, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v3.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w22, #0x7b40", + "movk w22, #0xa7, lsl #16", + "ldr d4, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v4.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0xb4 (180)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr d2, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #144]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "ldr d10, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v10.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v10.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0xc4 (196)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr d2, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d10, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v10.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0xa8 (168)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr d2, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #144]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x90 (144)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr s2, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v5.8b, v0.8b", + "str d5, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr s2, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x98 (152)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v5.8b, v0.8b", + "str d5, [x22]", + "ldr s5, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w22, w8, #0xa0 (160)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr s2, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v5.8b, v0.8b", + "str d5, [x22]", + "ldr s5, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w22, w8, #0x88 (136)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v5.8b, v0.8b", + "str d5, [x22]", + "ldr s5, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w22, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v5.8b, v0.8b", + "str d5, [x22]", + "ldr s5, [x4, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w22, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v5.8b, v0.8b", + "str d5, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #136]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0xb0 (176)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr d2, [x8, #160]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #152]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr d2, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #136]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0xa0 (160)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr d2, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr d7, [x8, #136]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr d7, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "strb w20, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr d7, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb w20, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb w20, [x28, #1017]", + "add w22, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x22]", + "ldr d5, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "ldr d5, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #152]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "mov w22, #0x7bd8", + "movk w22, #0xa7, lsl #16", + "ldr d5, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr s2, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr s2, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s5, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w22, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x22]", + "ldr s7, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w22, w8, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v8.8b, v0.8b", + "str d8, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr d8, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v8.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x98 (152)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x21]", + "ldr d7, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x88 (136)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x21]", + "ldr d7, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #180]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #192]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #176]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mov w21, #0x7b38", + "movk w21, #0xa7, lsl #16", + "ldr d7, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x38 (56)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #196]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #208]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #152]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0xd0 (208)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v9.8b, v0.8b", + "str d9, [x21]", + "ldr s9, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x98 (152)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mov w21, #0x7bd0", + "movk w21, #0xa7, lsl #16", + "ldr d9, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x3c (60)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x21]", + "ldr d9, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x78 (120)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #168]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0xa8 (168)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v9.8b, v0.8b", + "str d9, [x21]", + "ldr s9, [x8, #184]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0xb8 (184)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #136]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x88 (136)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v9.8b, v0.8b", + "str d9, [x21]", + "ldr s9, [x8, #160]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0xa0 (160)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mov w21, #0x7b30", + "movk w21, #0xa7, lsl #16", + "ldr d9, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x40 (64)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x21]", + "ldr d9, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x74 (116)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #144]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x90 (144)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v9.8b, v0.8b", + "str d9, [x21]", + "ldr s9, [x8, #200]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0xc8 (200)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v9.8b, v0.8b", + "str d9, [x21]", + "ldr s9, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mov w21, #0x7b28", + "movk w21, #0xa7, lsl #16", + "ldr d9, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x21]", + "ldr d9, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x70 (112)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x80 (128)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x48 (72)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x21]", + "ldr d9, [x8, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x6c (108)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr d8, [x8, #200]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v8.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr d9, [x8, #144]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr d8, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v8.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr d9, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mov w21, #0x7b20", + "movk w21, #0xa7, lsl #16", + "ldr d9, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x4c (76)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x21]", + "ldr d9, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x68 (104)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr d8, [x8, #184]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v8.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr d9, [x8, #168]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr d8, [x8, #160]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v8.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr d9, [x8, #136]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mov w21, #0x7b18", + "movk w21, #0xa7, lsl #16", + "ldr d9, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x50 (80)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x21]", + "ldr d9, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x64 (100)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x21]", + "ldr d6, [x8, #152]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v6.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr d7, [x8, #208]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mov w21, #0x7be0", + "movk w21, #0xa7, lsl #16", + "ldr d7, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x54 (84)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x60 (96)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x21]", + "strb w20, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w21, #0x7b10", + "movk w21, #0xa7, lsl #16", + "ldr d3, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v3.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w4, w5, w5, lsl #3", + "ldr w5, [x9, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "lsl w4, w4, #4", + "mov w21, #0x83d0", + "movk w21, #0xb1, lsl #16", + "mvn w27, w4", + "adds w26, w4, w21", + "mov x4, x26", + "add w21, w8, #0x58 (88)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w21, #0x8000", + "fmov d3, x20", + "mov v3.d[1], x21", + "eor v3.16b, v2.16b, v3.16b", + "ldr s4, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x5]", + "ldr s3, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #96]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "fmov d5, x20", + "mov v5.d[1], x21", + "eor v5.16b, v4.16b, v5.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "add w22, w5, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s5, [x8, #100]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "fmov d6, x20", + "mov v6.d[1], x21", + "eor v6.16b, v5.16b, v6.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "add w22, w5, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s6, [x8, #104]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "fmov d7, x20", + "mov v7.d[1], x21", + "eor v7.16b, v6.16b, v7.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "add w22, w5, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s7, [x8, #108]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "fmov d8, x20", + "mov v8.d[1], x21", + "eor v8.16b, v7.16b, v8.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "add w22, w5, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s8, [x8, #112]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "fmov d9, x20", + "mov v9.d[1], x21", + "eor v9.16b, v8.16b, v9.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "add w22, w5, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s9, [x8, #116]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "fmov d10, x20", + "mov v10.d[1], x21", + "eor v9.16b, v9.16b, v10.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w22, w5, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s9, [x8, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "fmov d10, x20", + "mov v10.d[1], x21", + "eor v9.16b, v9.16b, v10.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w22, w5, #0x1c (28)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s9, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "fmov d10, x20", + "mov v10.d[1], x21", + "eor v9.16b, v9.16b, v10.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w5, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s9, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w5, #0x24 (36)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s9, [x8, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w5, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s9, [x8, #116]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w5, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w5, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w5, #0x34 (52)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w5, #0x38 (56)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w5, #0x3c (60)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w5, #0x40 (64)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w5, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #88]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x4, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w5, #0x48 (72)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #84]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x4, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w5, #0x4c (76)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #80]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x4, #80]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w5, #0x50 (80)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #84]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w5, #0x54 (84)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #88]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w5, #0x58 (88)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w5, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v9.8b, v0.8b", + "str d9, [x21]", + "ldr s9, [x4, #96]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w5, #0x60 (96)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x80 (128)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v9.8b, v0.8b", + "str d9, [x21]", + "ldr s9, [x4, #100]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w5, #0x64 (100)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #104]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w5, #0x68 (104)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x21]", + "ldr s9, [x4, #108]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w5, #0x6c (108)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x4, #112]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr d9, [x8, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w5, #0x70 (112)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x4, #116]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr d9, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w5, #0x74 (116)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x4, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w5, #0x78 (120)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x4, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w5, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x4, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w5, #0x80 (128)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x4, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w5, #0x84 (132)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x4, #136]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w5, #0x88 (136)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #140]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w5, #0x8c (140)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "mov x8, x9", + "ldr w9, [x8]", + "add x8, x8, #0x4 (4)", + "strb w20, [x28, #1298]" + ] + }, + "Block3": { + "ExpectedInstructionCount": 11537, + "x86Insts": [ + "fld dword [esi + 0x64]", + "mov eax,dword [esi + 0x88]", + "fstp dword [esp + 0x5c]", + "mov ecx,dword [esi + 0x8c]", + "fld dword [esi + 0x70]", + "mov edx,dword [esi + 0x90]", + "fstp dword [esp + 0x60]", + "mov dword [esp + 0x2e4],0x3f", + "fld dword [esi + 0x7c]", + "mov dword [esp + 0x94],eax", + "fstp dword [esp + 0x64]", + "mov dword [esp + 0x98],ecx", + "fld dword [esi + 0x68]", + "mov dword [esp + 0x9c],edx", + "fstp dword [esp + 0x14]", + "mov dword [esp + 0xe8],eax", + "fld dword [esi + 0x74]", + "mov dword [esp + 0xec],ecx", + "fstp dword [esp + 0x18]", + "mov dword [esp + 0xf0],edx", + "fld dword [esi + 0x80]", + "fstp dword [esp + 0x1c]", + "fld dword [esi + 0xf4]", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x28]", + "fld dword [esp + 0x14]", + "fmul st1", + "fstp dword [esp + 0x8c]", + "fld dword [esp + 0x18]", + "fmul st1", + "fstp dword [esp + 0x7c]", + "fmul dword [esp + 0x1c]", + "fstp dword [esp + 0x84]", + "fld dword [esi + 0x6c]", + "fstp dword [esp + 0x14]", + "fld dword [esi + 0x78]", + "fstp dword [esp + 0x18]", + "fld dword [esi + 0x84]", + "fstp dword [esp + 0x1c]", + "fld dword [esi + 0xf0]", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x28]", + "fld dword [esp + 0x14]", + "fmul st1", + "fstp dword [esp + 0x54]", + "fld dword [esp + 0x18]", + "fmul st1", + "fstp dword [esp + 0x50]", + "fmul dword [esp + 0x1c]", + "fstp dword [esp + 0x58]", + "fld dword [esi + 0x100]", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x28]", + "fld dword [esp + 0x54]", + "fmul st1", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x28]", + "fst dword [esp + 0x10]", + "fld dword [esp + 0x50]", + "fmul st2", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x28]", + "fst dword [esp + 0x2c]", + "fld dword [esp + 0x58]", + "fmul st3", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x28]", + "fst dword [esp + 0x14]", + "fld dword [esp + 0x8c]", + "fmul st4", + "fstp dword [esp + 0x4c]", + "fld dword [esp + 0x4c]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x7c]", + "fmul st4", + "fstp dword [esp + 0x8c]", + "fld dword [esp + 0x8c]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x84]", + "fmul st4", + "fstp dword [esp + 0x58]", + "fld dword [esp + 0x58]", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x5c]", + "fmul st4", + "fstp dword [esp + 0x50]", + "fld dword [esp + 0x50]", + "fstp dword [esp + 0x84]", + "fld dword [esp + 0x60]", + "fmul st4", + "fstp dword [esp + 0x54]", + "fld dword [esp + 0x54]", + "fstp dword [esp + 0x7c]", + "fld dword [esp + 0x64]", + "fmulp st4", + "fxch st3", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x28]", + "fstp dword [esp + 0x5c]", + "fld dword [esp + 0x94]", + "fld dword [esp + 0x84]", + "fadd st0,st1", + "fstp dword [esp + 0x84]", + "fld dword [esp + 0x98]", + "fld dword [esp + 0x7c]", + "fadd st0,st1", + "fstp dword [esp + 0x7c]", + "fld dword [esp + 0x9c]", + "fld dword [esp + 0x5c]", + "fadd st0,st1", + "fstp dword [esp + 0x5c]", + "fld dword [esp + 0x84]", + "fadd dword [esp + 0x44]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x7c]", + "fadd dword [esp + 0x48]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x5c]", + "fadd dword [esp + 0x40]", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x44]", + "fadd dword [esp + 0x10]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x48]", + "fadd dword [esp + 0x2c]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x40]", + "fadd dword [esp + 0x14]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x10]", + "fstp dword [esp + 0x5c]", + "mov eax,dword [esp + 0x5c]", + "fld dword [esp + 0x2c]", + "mov dword [esp + 0xf4],eax", + "fstp dword [esp + 0x60]", + "mov ecx,dword [esp + 0x60]", + "fld dword [esp + 0x14]", + "mov dword [esp + 0xf8],ecx", + "fstp dword [esp + 0x64]", + "mov edx,dword [esp + 0x64]", + "fxch st4", + "mov dword [esp + 0xfc],edx", + "fst dword [esp + 0x5c]", + "fxch st3", + "fst dword [esp + 0x84]", + "fxch st5", + "fst dword [esp + 0x7c]", + "fld dword [esp + 0x4c]", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x8c]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x58]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x50]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x54]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x28]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd st0,st3", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd st0,st2", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd st0,st5", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd dword [esp + 0x40]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd dword [esp + 0x48]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd dword [esp + 0x44]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fsub dword [esp + 0x5c]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fsub dword [esp + 0x84]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fsub dword [esp + 0x7c]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fstp dword [esp + 0x14]", + "mov eax,dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "mov dword [esp + 0x100],eax", + "fstp dword [esp + 0x18]", + "mov ecx,dword [esp + 0x18]", + "fld dword [esp + 0x10]", + "mov dword [esp + 0x104],ecx", + "fstp dword [esp + 0x1c]", + "mov edx,dword [esp + 0x1c]", + "fxch st3", + "mov dword [esp + 0x108],edx", + "fst dword [esp + 0x5c]", + "fxch st5", + "fst dword [esp + 0x84]", + "fxch st3", + "fst dword [esp + 0x7c]", + "fld dword [esp + 0x4c]", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x8c]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x58]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x50]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x54]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x28]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd st0,st3", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd st0,st2", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd st0,st5", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fsub dword [esp + 0x40]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fsub dword [esp + 0x48]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fsub dword [esp + 0x44]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd dword [esp + 0x5c]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd dword [esp + 0x84]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd dword [esp + 0x7c]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fstp dword [esp + 0x14]", + "mov eax,dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "mov dword [esp + 0x10c],eax", + "fstp dword [esp + 0x18]", + "mov ecx,dword [esp + 0x18]", + "fld dword [esp + 0x10]", + "mov dword [esp + 0x110],ecx", + "fstp dword [esp + 0x1c]", + "mov edx,dword [esp + 0x1c]", + "fxch st5", + "mov dword [esp + 0x114],edx", + "fstp dword [esp + 0x5c]", + "fxch st2", + "fstp dword [esp + 0x84]", + "fxch st3", + "fstp dword [esp + 0x7c]", + "fld dword [esp + 0x4c]", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x8c]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x58]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x50]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x54]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x28]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "faddp st3,st0", + "fxch st2", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "faddp st2,st0", + "fxch", + "fstp dword [esp + 0x2c]", + "fadd dword [esp + 0x10]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fsub dword [esp + 0x40]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fsub dword [esp + 0x48]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fsub dword [esp + 0x44]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fsub dword [esp + 0x5c]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fsub dword [esp + 0x84]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fsub dword [esp + 0x7c]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fstp dword [esp + 0x14]", + "mov eax,dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "mov dword [esp + 0x118],eax", + "mov eax,dword [ebx + 0x88]", + "fstp dword [esp + 0x18]", + "fld dword [esp + 0x10]", + "mov ecx,dword [esp + 0x18]", + "fstp dword [esp + 0x1c]", + "mov edx,dword [esp + 0x1c]", + "fld dword [ebx + 0x64]", + "mov dword [esp + 0x11c],ecx", + "mov ecx,dword [ebx + 0x8c]", + "fstp dword [esp + 0x70]", + "fld dword [ebx + 0x70]", + "mov dword [esp + 0x120],edx", + "mov edx,dword [ebx + 0x90]", + "fstp dword [esp + 0x74]", + "fld dword [ebx + 0x7c]", + "mov dword [esp + 0x94],eax", + "mov dword [esp + 0x98],ecx", + "mov dword [esp + 0x9c],edx", + "fstp dword [esp + 0x78]", + "mov dword [esp + 0xac],eax", + "fld dword [ebx + 0x68]", + "mov dword [esp + 0xb0],ecx", + "fstp dword [esp + 0x2c]", + "mov dword [esp + 0xb4],edx", + "fld dword [ebx + 0x74]", + "fstp dword [esp + 0x30]", + "fld dword [ebx + 0x80]", + "fstp dword [esp + 0x34]", + "fld dword [ebx + 0xf4]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fmul st1", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x30]", + "fmul st1", + "fstp dword [esp + 0x48]", + "fmul dword [esp + 0x34]", + "fstp dword [esp + 0x44]", + "fld dword [ebx + 0x6c]", + "fstp dword [esp + 0x5c]", + "fld dword [ebx + 0x78]", + "fstp dword [esp + 0x60]", + "fld dword [ebx + 0x84]", + "fstp dword [esp + 0x64]", + "fld dword [ebx + 0xf0]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x14]", + "fld dword [esp + 0x5c]", + "fmul st1", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x60]", + "fmul st1", + "fstp dword [esp + 0x2c]", + "fmul dword [esp + 0x64]", + "fstp dword [esp + 0x10]", + "fld dword [ebx + 0x100]", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x28]", + "fld dword [esp + 0x14]", + "fmul st1", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x14]", + "fst dword [esp + 0x5c]", + "fld dword [esp + 0x2c]", + "fmul st2", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x14]", + "fst dword [esp + 0x84]", + "fld dword [esp + 0x10]", + "fmul st3", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x14]", + "fst dword [esp + 0x7c]", + "fld dword [esp + 0x40]", + "fmul st4", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x28]", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x48]", + "fmul st4", + "fstp dword [esp + 0x54]", + "fld dword [esp + 0x54]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x44]", + "fmul st4", + "fstp dword [esp + 0x50]", + "fld dword [esp + 0x50]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x70]", + "fmul st4", + "fstp dword [esp + 0x58]", + "fld dword [esp + 0x58]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x74]", + "fmul st4", + "fstp dword [esp + 0x8c]", + "fld dword [esp + 0x8c]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x78]", + "fmulp st4", + "fxch st3", + "fstp dword [esp + 0x4c]", + "fld dword [esp + 0x4c]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x94]", + "fld dword [esp + 0x14]", + "fadd st0,st1", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x98]", + "fld dword [esp + 0x2c]", + "fadd st0,st1", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x9c]", + "fld dword [esp + 0x10]", + "fadd st0,st1", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd dword [esp + 0x40]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd dword [esp + 0x48]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd dword [esp + 0x44]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd dword [esp + 0x5c]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd dword [esp + 0x84]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd dword [esp + 0x7c]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fstp dword [esp + 0x70]", + "mov eax,dword [esp + 0x70]", + "fld dword [esp + 0x2c]", + "mov dword [esp + 0xb8],eax", + "fstp dword [esp + 0x74]", + "mov ecx,dword [esp + 0x74]", + "fld dword [esp + 0x10]", + "mov dword [esp + 0xbc],ecx", + "fstp dword [esp + 0x78]", + "mov edx,dword [esp + 0x78]", + "fxch st4", + "mov dword [esp + 0xc0],edx", + "fst dword [esp + 0x5c]", + "fxch st3", + "fst dword [esp + 0x84]", + "fxch st5", + "fst dword [esp + 0x7c]", + "fld dword [esp + 0x28]", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x54]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x50]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x58]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x8c]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x4c]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd st0,st3", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd st0,st2", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd st0,st5", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd dword [esp + 0x40]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd dword [esp + 0x48]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd dword [esp + 0x44]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fsub dword [esp + 0x5c]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fsub dword [esp + 0x84]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fsub dword [esp + 0x7c]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fstp dword [esp + 0x70]", + "mov eax,dword [esp + 0x70]", + "fld dword [esp + 0x2c]", + "mov dword [esp + 0xc4],eax", + "fstp dword [esp + 0x74]", + "mov ecx,dword [esp + 0x74]", + "fld dword [esp + 0x10]", + "mov dword [esp + 0xc8],ecx", + "fstp dword [esp + 0x78]", + "mov edx,dword [esp + 0x78]", + "fxch st3", + "mov dword [esp + 0xcc],edx", + "fst dword [esp + 0x5c]", + "fxch st5", + "fst dword [esp + 0x84]", + "fxch st3", + "fst dword [esp + 0x7c]", + "fld dword [esp + 0x28]", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x54]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x50]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x58]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x8c]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x4c]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd st0,st3", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd st0,st2", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd st0,st5", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fsub dword [esp + 0x40]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fsub dword [esp + 0x48]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fsub dword [esp + 0x44]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd dword [esp + 0x5c]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd dword [esp + 0x84]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd dword [esp + 0x7c]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fstp dword [esp + 0x70]", + "mov eax,dword [esp + 0x70]", + "fld dword [esp + 0x2c]", + "mov dword [esp + 0xd0],eax", + "fstp dword [esp + 0x74]", + "mov ecx,dword [esp + 0x74]", + "fld dword [esp + 0x10]", + "mov dword [esp + 0xd4],ecx", + "fstp dword [esp + 0x78]", + "mov edx,dword [esp + 0x78]", + "mov dword [esp + 0xd8],edx", + "fxch st5", "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33148", - "push 0x4e414552", - "call 0x00417220", - "add esp,0x20" + "fstp dword [esp + 0x60]", + "fxch st2", + "fstp dword [esp + 0x88]", + "fxch st3", + "fstp dword [esp + 0x80]", + "fld dword [esp + 0x2c]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x58]", + "fstp dword [esp + 0x4c]", + "fld dword [esp + 0x54]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x5c]", + "fstp dword [esp + 0x18]", + "fld dword [esp + 0x90]", + "fstp dword [esp + 0x30]", + "fld dword [esp + 0x50]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x18]", + "faddp st3,st0", + "fxch st2", + "fstp dword [esp + 0x18]", + "fld dword [esp + 0x30]", + "faddp st2,st0", + "fxch", + "fstp dword [esp + 0x30]", + "fadd dword [esp + 0x14]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x18]", + "fsub dword [esp + 0x44]", + "fstp dword [esp + 0x18]", + "fld dword [esp + 0x30]", + "fsub dword [esp + 0x4c]", + "fstp dword [esp + 0x30]", + "fld dword [esp + 0x14]", + "fsub dword [esp + 0x48]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x18]", + "fsub dword [esp + 0x60]", + "fstp dword [esp + 0x18]", + "fld dword [esp + 0x30]", + "fsub dword [esp + 0x88]", + "fstp dword [esp + 0x30]", + "fld dword [esp + 0x14]", + "fsub dword [esp + 0x80]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x18]", + "fstp dword [esp + 0x74]", + "mov eax,dword [esp + 0x74]", + "fld dword [esp + 0x30]", + "mov dword [esp + 0xe0],eax", + "fstp dword [esp + 0x78]", + "mov ecx,dword [esp + 0x78]", + "fld dword [esp + 0x14]", + "mov dword [esp + 0xe4],ecx", + "fstp dword [esp + 0x7c]", + "mov edx,dword [esp + 0x7c]", + "lea ecx,[esp + 0x190]", + "mov dword [esp + 0xe8],edx", + "call 0x0070df30", + "mov dword [esp + 0x198],esi", + "add esi,0xec", + "push esi", + "lea ecx,[esp + 0x190]", + "mov dword [esp + 0x314],0x0", + "call 0x0070e040", + "mov ecx,0x19", + "lea esi,[esp + 0x1b8]", + "lea edi,[esp + 0x21c]", + "rep movsd", + "mov dword [esp + 0x198],ebx", + "add ebx,0xec", + "push ebx", + "lea ecx,[esp + 0x190]", + "call 0x0070e040", + "mov ecx,0x19", + "lea esi,[esp + 0x1b8]", + "lea edi,[esp + 0x284]", + "rep movsd", + "lea esi,[esp + 0x124]", + "mov edi,0x5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr s2, [x10, #100]", + "ldr w4, [x10, #136]", + "add w20, w8, #0x5c (92)", + "str s2, [x20]", + "ldr w5, [x10, #140]", + "ldr s2, [x10, #112]", + "ldr w6, [x10, #144]", + "add w20, w8, #0x60 (96)", + "str s2, [x20]", + "mov w20, #0x3f", + "str w20, [x8, #740]", + "ldr s2, [x10, #124]", + "str w4, [x8, #148]", + "add w20, w8, #0x64 (100)", + "str s2, [x20]", + "str w5, [x8, #152]", + "ldr s2, [x10, #104]", + "str w6, [x8, #156]", + "add w20, w8, #0x14 (20)", + "str s2, [x20]", + "str w4, [x8, #232]", + "ldr s2, [x10, #116]", + "str w5, [x8, #236]", + "add w20, w8, #0x18 (24)", + "str s2, [x20]", + "str w6, [x8, #240]", + "ldr s2, [x10, #128]", + "add w20, w8, #0x1c (28)", + "str s2, [x20]", + "ldr s2, [x10, #244]", + "add w20, w8, #0x28 (40)", + "str s2, [x20]", + "ldr s2, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x8c (140)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w20, w8, #0x84 (132)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x20]", + "ldr s2, [x10, #108]", + "add w20, w8, #0x14 (20)", + "str s2, [x20]", + "ldr s2, [x10, #120]", + "add w20, w8, #0x18 (24)", + "str s2, [x20]", + "ldr s2, [x10, #132]", + "add w20, w8, #0x1c (28)", + "str s2, [x20]", + "ldr s2, [x10, #240]", + "add w20, w8, #0x28 (40)", + "str s2, [x20]", + "ldr s2, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x54 (84)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x50 (80)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w20, w8, #0x58 (88)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x20]", + "ldr s2, [x10, #256]", + "add w20, w8, #0x28 (40)", + "str s2, [x20]", + "ldr s2, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #84]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w8, #0x10 (16)", + "str s3, [x20]", + "ldr s3, [x8, #80]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x2c (44)", + "str s3, [x20]", + "ldr s3, [x8, #88]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0x14 (20)", + "str s3, [x20]", + "ldr s3, [x8, #140]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x4c (76)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #76]", + "add w20, w8, #0x44 (68)", + "str s3, [x20]", + "ldr s3, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x8c (140)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #140]", + "add w20, w8, #0x48 (72)", + "str s3, [x20]", + "ldr s3, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x58 (88)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #88]", + "add w20, w8, #0x40 (64)", + "str s3, [x20]", + "ldr s3, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x50 (80)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #80]", + "add w20, w8, #0x84 (132)", + "str s3, [x20]", + "ldr s3, [x8, #96]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x54 (84)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #84]", + "add w20, w8, #0x7c (124)", + "str s3, [x20]", + "ldr s3, [x8, #100]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", "mov w20, #0x0", - "str w20, [x8, #-4]!", - "strb w22, [x28, #1298]", - "mov w22, #0xffffffff", - "str w22, [x8, #-4]!", - "mov w22, #0x172", - "movk w22, #0x100, lsl #16", - "str w22, [x8, #-4]!", - "mov w22, #0x37", - "str w22, [x8, #-4]!", - "str w5, [x8, #-4]!", - "ldrb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #40]", + "add w21, w8, #0x5c (92)", + "str s2, [x21]", + "ldr s2, [x8, #148]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x84 (132)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #152]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s7, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #156]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x48 (72)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x40 (64)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "add w21, w8, #0x5c (92)", + "str s8, [x21]", + "ldr w4, [x8, #92]", + "ldr s8, [x8, #44]", + "str w4, [x8, #244]", + "add w21, w8, #0x60 (96)", + "str s8, [x21]", + "ldr w5, [x8, #96]", + "ldr s8, [x8, #20]", + "str w5, [x8, #248]", + "add w21, w8, #0x64 (100)", + "str s8, [x21]", + "ldr w6, [x8, #100]", + "strb w20, [x28, #1017]", + "str w6, [x8, #252]", + "add w21, w8, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x84 (132)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #76]", + "add w21, w8, #0x40 (64)", + "str s8, [x21]", + "ldr s8, [x8, #140]", + "add w21, w8, #0x48 (72)", + "str s8, [x21]", + "ldr s8, [x8, #88]", + "add w21, w8, #0x44 (68)", + "str s8, [x21]", + "ldr s8, [x8, #80]", + "add w21, w8, #0x14 (20)", + "str s8, [x21]", + "ldr s8, [x8, #84]", + "add w21, w8, #0x2c (44)", + "str s8, [x21]", + "ldr s8, [x8, #40]", + "add w21, w8, #0x10 (16)", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "add w21, w8, #0x14 (20)", + "str s8, [x21]", + "ldr w4, [x8, #20]", + "ldr s8, [x8, #44]", + "str w4, [x8, #256]", + "add w21, w8, #0x18 (24)", + "str s8, [x21]", + "ldr w5, [x8, #24]", + "ldr s8, [x8, #16]", + "str w5, [x8, #260]", + "add w21, w8, #0x1c (28)", + "str s8, [x21]", + "ldr w6, [x8, #28]", + "strb w20, [x28, #1017]", + "str w6, [x8, #264]", + "add w21, w8, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x84 (132)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #76]", + "add w21, w8, #0x40 (64)", + "str s8, [x21]", + "ldr s8, [x8, #140]", + "add w21, w8, #0x48 (72)", + "str s8, [x21]", + "ldr s8, [x8, #88]", + "add w21, w8, #0x44 (68)", + "str s8, [x21]", + "ldr s8, [x8, #80]", + "add w21, w8, #0x14 (20)", + "str s8, [x21]", + "ldr s8, [x8, #84]", + "add w21, w8, #0x2c (44)", + "str s8, [x21]", + "ldr s8, [x8, #40]", + "add w21, w8, #0x10 (16)", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "add w21, w8, #0x14 (20)", + "str s8, [x21]", + "ldr w4, [x8, #20]", + "ldr s8, [x8, #44]", + "str w4, [x8, #268]", + "add w21, w8, #0x18 (24)", + "str s8, [x21]", + "ldr w5, [x8, #24]", + "ldr s8, [x8, #16]", + "str w5, [x8, #272]", + "add w21, w8, #0x1c (28)", + "str s8, [x21]", + "ldr w6, [x8, #28]", + "strb w20, [x28, #1017]", + "str w6, [x8, #276]", + "add w21, w8, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x84 (132)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #76]", + "add w21, w8, #0x40 (64)", + "str s4, [x21]", + "ldr s4, [x8, #140]", + "add w21, w8, #0x48 (72)", + "str s4, [x21]", + "ldr s4, [x8, #88]", + "add w21, w8, #0x44 (68)", + "str s4, [x21]", + "ldr s4, [x8, #80]", + "add w21, w8, #0x14 (20)", + "str s4, [x21]", + "ldr s4, [x8, #84]", + "add w21, w8, #0x2c (44)", + "str s4, [x21]", + "ldr s4, [x8, #40]", + "add w21, w8, #0x10 (16)", + "str s4, [x21]", + "ldr s4, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #20]", + "add w21, w8, #0x14 (20)", + "str s2, [x21]", + "ldr w4, [x8, #20]", + "ldr s2, [x8, #44]", + "str w4, [x8, #280]", + "ldr w4, [x7, #136]", + "add w21, w8, #0x18 (24)", + "str s2, [x21]", + "ldr s2, [x8, #16]", + "ldr w5, [x8, #24]", + "add w21, w8, #0x1c (28)", + "str s2, [x21]", + "ldr w6, [x8, #28]", + "ldr s2, [x7, #100]", + "str w5, [x8, #284]", + "ldr w5, [x7, #140]", + "add w21, w8, #0x70 (112)", + "str s2, [x21]", + "ldr s2, [x7, #112]", + "str w6, [x8, #288]", + "ldr w6, [x7, #144]", + "add w21, w8, #0x74 (116)", + "str s2, [x21]", + "ldr s2, [x7, #124]", + "str w4, [x8, #148]", + "str w5, [x8, #152]", + "str w6, [x8, #156]", + "add w21, w8, #0x78 (120)", + "str s2, [x21]", + "str w4, [x8, #172]", + "ldr s2, [x7, #104]", + "str w5, [x8, #176]", + "add w21, w8, #0x2c (44)", + "str s2, [x21]", + "str w6, [x8, #180]", + "ldr s2, [x7, #116]", + "add w21, w8, #0x30 (48)", + "str s2, [x21]", + "ldr s2, [x7, #128]", + "add w21, w8, #0x34 (52)", + "str s2, [x21]", + "ldr s2, [x7, #244]", + "add w21, w8, #0x14 (20)", + "str s2, [x21]", + "ldr s2, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x40 (64)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x48 (72)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x7, #108]", + "add w21, w8, #0x5c (92)", + "str s2, [x21]", + "ldr s2, [x7, #120]", + "add w21, w8, #0x60 (96)", + "str s2, [x21]", + "ldr s2, [x7, #132]", + "add w21, w8, #0x64 (100)", + "str s2, [x21]", + "ldr s2, [x7, #240]", + "add w21, w8, #0x14 (20)", + "str s2, [x21]", + "ldr s2, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #96]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #100]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x7, #256]", + "add w21, w8, #0x28 (40)", + "str s2, [x21]", + "ldr s2, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w8, #0x5c (92)", + "str s3, [x21]", + "ldr s3, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x84 (132)", + "str s3, [x21]", + "ldr s3, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x7c (124)", + "str s3, [x21]", + "ldr s3, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #40]", + "add w21, w8, #0x40 (64)", + "str s3, [x21]", + "ldr s3, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x54 (84)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #84]", + "add w21, w8, #0x48 (72)", + "str s3, [x21]", + "ldr s3, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x50 (80)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #80]", + "add w21, w8, #0x44 (68)", + "str s3, [x21]", + "ldr s3, [x8, #112]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x58 (88)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #88]", + "add w21, w8, #0x14 (20)", + "str s3, [x21]", + "ldr s3, [x8, #116]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x8c (140)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #140]", + "add w21, w8, #0x2c (44)", + "str s3, [x21]", + "ldr s3, [x8, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x4c (76)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #76]", + "add w21, w8, #0x10 (16)", + "str s2, [x21]", + "ldr s2, [x8, #148]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #152]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s7, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #156]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "add w21, w8, #0x70 (112)", + "str s8, [x21]", + "ldr w4, [x8, #112]", + "ldr s8, [x8, #44]", + "str w4, [x8, #184]", + "add w21, w8, #0x74 (116)", + "str s8, [x21]", + "ldr w5, [x8, #116]", + "ldr s8, [x8, #16]", + "str w5, [x8, #188]", + "add w21, w8, #0x78 (120)", + "str s8, [x21]", + "ldr w6, [x8, #120]", + "strb w20, [x28, #1017]", + "str w6, [x8, #192]", + "add w21, w8, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x84 (132)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #40]", + "add w21, w8, #0x40 (64)", + "str s8, [x21]", + "ldr s8, [x8, #84]", + "add w21, w8, #0x48 (72)", + "str s8, [x21]", + "ldr s8, [x8, #80]", + "add w21, w8, #0x44 (68)", + "str s8, [x21]", + "ldr s8, [x8, #88]", + "add w21, w8, #0x14 (20)", + "str s8, [x21]", + "ldr s8, [x8, #140]", + "add w21, w8, #0x2c (44)", + "str s8, [x21]", + "ldr s8, [x8, #76]", + "add w21, w8, #0x10 (16)", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "add w21, w8, #0x70 (112)", + "str s8, [x21]", + "ldr w4, [x8, #112]", + "ldr s8, [x8, #44]", + "str w4, [x8, #196]", + "add w21, w8, #0x74 (116)", + "str s8, [x21]", + "ldr w5, [x8, #116]", + "ldr s8, [x8, #16]", + "str w5, [x8, #200]", + "add w21, w8, #0x78 (120)", + "str s8, [x21]", + "ldr w6, [x8, #120]", + "strb w20, [x28, #1017]", + "str w6, [x8, #204]", + "add w21, w8, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x84 (132)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #40]", + "add w21, w8, #0x40 (64)", + "str s8, [x21]", + "ldr s8, [x8, #84]", + "add w21, w8, #0x48 (72)", + "str s8, [x21]", + "ldr s8, [x8, #80]", + "add w21, w8, #0x44 (68)", + "str s8, [x21]", + "ldr s8, [x8, #88]", + "add w21, w8, #0x14 (20)", + "str s8, [x21]", + "ldr s8, [x8, #140]", + "add w21, w8, #0x2c (44)", + "str s8, [x21]", + "ldr s8, [x8, #76]", + "add w21, w8, #0x10 (16)", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81387,8 +54377,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -81400,410 +54390,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "bic w21, w23, w21", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", - "mov w20, #0x3c14", - "movk w20, #0xa3, lsl #16", - "str w20, [x8, #-4]!", - "mov w20, #0x4157", - "movk w20, #0x5242, lsl #16", - "str w20, [x8, #-4]!", - "mov w20, #0x23c9", - "movk w20, #0x1, lsl #16", - "mov w21, #0x71fe", - "movk w21, #0x41, lsl #16", - "add w21, w20, w21", - "str w20, [x8, #-4]!", - "ldr x0, [x28, #2280]", - "and x3, x21, #0xfffff", - "add x0, x0, x3, lsl #4", - "ldp x1, x0, [x0]" - ] - }, - "Block5": { - "ExpectedInstructionCount": 586, - "x86Insts": [ - "mov ebx,dword [eax + 0x68]", - "fld dword [esi + 0x2c]", - "mov eax,dword [ebp + 0x68]", - "sub esp,0x14", - "fstp dword [esp + 0x10]", - "movzx ecx,al", - "fld1", - "mov dword [esp + 0x38],ecx", - "fstp dword [esp + 0xc]", - "movzx edx,bl", - "fldz", - "fstp dword [esp + 0x8]", - "fild dword [esp + 0x38]", - "mov dword [esp + 0x40],eax", - "fld qword [0x00a3ddd8]", - "fdiv st1,st0", - "fxch", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp + 0x4]", - "mov dword [esp + 0x38],edx", - "fild dword [esp + 0x38]", - "fdivrp", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [esp + 0x24]", - "fld dword [esi + 0x2c]", - "movzx eax,byte [esp + 0x41]", - "fstp dword [esp + 0x10]", - "mov dword [esp + 0x38],eax", - "fld1", - "movzx ecx,bh", - "fstp dword [esp + 0xc]", - "fldz", - "fstp dword [esp + 0x8]", - "fild dword [esp + 0x38]", - "fld qword [0x00a3ddd8]", - "fdiv st1,st0", - "fxch", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp + 0x4]", - "mov dword [esp + 0x38],ecx", - "fild dword [esp + 0x38]", - "fdivrp", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [esp + 0x28]", - "mov eax,dword [esp + 0x40]", - "fld dword [esi + 0x2c]", - "fstp dword [esp + 0x10]", - "shr eax,0x10", - "fld1", - "movzx edx,al", - "fstp dword [esp + 0xc]", - "mov dword [esp + 0x40],edx", - "fldz", - "shr ebx,0x10", - "movzx eax,bl", - "fstp dword [esp + 0x8]", - "fild dword [esp + 0x40]", - "fld qword [0x00a3ddd8]", - "fdiv st1,st0", - "fxch", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x40]", - "fstp dword [esp + 0x4]", - "mov dword [esp + 0x40],eax", - "fild dword [esp + 0x40]", - "fdivrp", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x40]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [esp + 0x2c]", - "fld1", - "fst dword [esp + 0x30]", - "mov ecx,dword [esp + 0x24]", - "mov edx,dword [esp + 0x28]", - "mov eax,dword [esp + 0x2c]", - "mov dword [0x00b45e14],ecx", - "mov ecx,dword [esp + 0x30]", - "mov [0x00b45e1c],eax", - "mov dword [0x00b45e20],ecx", - "mov dword [0x00b45e18],edx", - "fld dword [esi + 0x2c]", - "mov eax,dword [ebp + 0x6c]", - "fstp dword [esp + 0x10]", - "mov dword [esp + 0x40],eax", - "fstp dword [esp + 0xc]", - "movzx eax,al", - "fldz", - "mov dword [esp + 0x38],eax", - "fstp dword [esp + 0x8]", - "mov edx,dword [esi + 0x20]", - "fild dword [esp + 0x38]", - "mov ebx,dword [edx + 0x6c]", - "fld qword [0x00a3ddd8]", - "movzx ecx,bl", - "fdiv st1,st0", - "fxch", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp + 0x4]", - "mov dword [esp + 0x38],ecx", - "fild dword [esp + 0x38]", - "fdivrp", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [esp + 0x24]", - "fld dword [esi + 0x2c]", - "movzx edx,byte [esp + 0x41]", - "fstp dword [esp + 0x10]", - "mov dword [esp + 0x38],edx", - "fld1", - "movzx eax,bh", - "fstp dword [esp + 0xc]", - "fldz", - "fstp dword [esp + 0x8]", - "fild dword [esp + 0x38]", - "fld qword [0x00a3ddd8]", - "fdiv st1,st0", - "fxch", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp + 0x4]", - "mov dword [esp + 0x38],eax", - "fild dword [esp + 0x38]", - "fdivrp", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [esp + 0x28]", - "mov eax,dword [esp + 0x40]", - "fld dword [esi + 0x2c]", - "fstp dword [esp + 0x10]", - "shr eax,0x10", - "fld1", - "movzx ecx,al", - "fstp dword [esp + 0xc]", - "mov dword [esp + 0x40],ecx", - "fldz", - "shr ebx,0x10", - "movzx edx,bl", - "fstp dword [esp + 0x8]", - "fild dword [esp + 0x40]", - "fld qword [0x00a3ddd8]", - "fdiv st1,st0", - "fxch", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x40]", - "fstp dword [esp + 0x4]", - "mov dword [esp + 0x40],edx", - "fild dword [esp + 0x40]", - "fdivrp", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x40]", - "fstp dword [esp]", - "call 0x00410eb0", - "mov eax,dword [esp + 0x24]", - "fstp dword [esp + 0x2c]", - "fld1", - "mov ecx,dword [esp + 0x28]", - "mov edx,dword [esp + 0x2c]", - "fst dword [esp + 0x30]", - "mov [0x00b45e24],eax", - "mov eax,dword [esp + 0x30]", - "mov dword [0x00b45e2c],edx", - "mov [0x00b45e30],eax", - "mov dword [0x00b45e28],ecx", - "fld dword [esi + 0x2c]", - "mov eax,dword [ebp + 0x70]", - "fstp dword [esp + 0x10]", - "movzx edx,al", - "fstp dword [esp + 0xc]", - "mov dword [esp + 0x38],edx", - "fldz", - "mov ecx,dword [esi + 0x20]", - "fstp dword [esp + 0x8]", - "mov ebx,dword [ecx + 0x70]", - "fild dword [esp + 0x38]", - "mov dword [esp + 0x40],eax", - "fld qword [0x00a3ddd8]", - "movzx eax,bl", - "fdiv st1,st0", - "fxch", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp + 0x4]", - "mov dword [esp + 0x38],eax", - "fild dword [esp + 0x38]", - "fdivrp", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [esp + 0x24]", - "fld dword [esi + 0x2c]", - "movzx ecx,byte [esp + 0x41]", - "fstp dword [esp + 0x10]", - "mov dword [esp + 0x38],ecx", - "fld1", - "movzx edx,bh", - "fstp dword [esp + 0xc]", - "fldz", - "fstp dword [esp + 0x8]", - "fild dword [esp + 0x38]", - "fld qword [0x00a3ddd8]", - "fdiv st1,st0", - "fxch", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp + 0x4]", - "mov dword [esp + 0x38],edx", - "fild dword [esp + 0x38]", - "fdivrp", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [esp + 0x28]", - "mov eax,dword [esp + 0x40]", - "fld dword [esi + 0x2c]", - "fstp dword [esp + 0x10]", - "shr eax,0x10", - "fld1", - "movzx eax,al", - "fstp dword [esp + 0xc]", - "mov dword [esp + 0x40],eax", - "fldz", - "fstp dword [esp + 0x8]", - "fild dword [esp + 0x40]", - "fld qword [0x00a3ddd8]", - "fdiv st1,st0", - "fxch", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x40]", - "shr ebx,0x10", - "movzx ecx,bl", - "fstp dword [esp + 0x4]", - "mov dword [esp + 0x40],ecx", - "fild dword [esp + 0x40]", - "fdivrp", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x40]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [esp + 0x2c]", - "fld1", - "mov edx,dword [esp + 0x24]", - "mov eax,dword [esp + 0x28]", - "fst dword [esp + 0x30]", - "mov ecx,dword [esp + 0x2c]", - "mov dword [0x00b45e34],edx", - "mov edx,dword [esp + 0x30]", - "mov [0x00b45e38],eax", - "mov dword [0x00b45e3c],ecx", - "mov dword [0x00b45e40],edx", - "fld dword [esi + 0x2c]", - "mov eax,dword [esi + 0x24]", - "fstp dword [esp + 0x10]", - "mov ecx,dword [esi + 0x20]", - "fstp dword [esp + 0xc]", - "fldz", - "fstp dword [esp + 0x8]", - "fld dword [eax + 0x4c]", - "fstp dword [esp + 0x4]", - "fld dword [ecx + 0x4c]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [0x00b45e44]", - "fld dword [esi + 0x2c]", - "mov edx,dword [esi + 0x24]", - "mov eax,dword [esi + 0x20]", - "fstp dword [esp + 0x10]", - "fld1", - "fstp dword [esp + 0xc]", - "fldz", - "fstp dword [esp + 0x8]", - "fld dword [edx + 0x50]", - "fstp dword [esp + 0x4]", - "fld dword [eax + 0x50]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [0x00b45e48]", - "fld dword [esi + 0x2c]", - "mov ecx,dword [esi + 0x24]", - "add esp,0x8", - "fstp dword [esp + 0x8]", - "fld1", - "fstp dword [esp + 0x4]", - "fldz", - "fstp dword [esp]", - "call 0x004ed660", - "push ecx", - "mov ecx,dword [esi + 0x20]", - "fstp dword [esp]", - "call 0x004ed660", - "push ecx", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [0x00b45e4c]", - "mov ecx,dword [esi + 0x24]", - "fld dword [esi + 0x2c]", - "add esp,0x8", - "fstp dword [esp + 0x8]", - "fld1", - "fstp dword [esp + 0x4]", - "fldz", - "fstp dword [esp]", - "call 0x004ed680", - "push ecx", - "mov ecx,dword [esi + 0x20]", - "fstp dword [esp]", - "call 0x004ed680", - "push ecx", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [0x00b45e50]", - "fld dword [esi + 0x2c]", - "mov ecx,dword [esi + 0x24]", - "mov edx,dword [esi + 0x20]", - "fstp dword [esp + 0x10]", - "fld1", - "fstp dword [esp + 0xc]", - "fldz", - "fstp dword [esp + 0x8]", - "fld dword [ecx + 0x58]", - "fstp dword [esp + 0x4]", - "fld dword [edx + 0x58]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [0x00b45e54]", - "fld dword [esi + 0x2c]", - "mov eax,dword [esi + 0x24]", - "mov ecx,dword [esi + 0x20]", - "fstp dword [esp + 0x10]", - "fld1", - "fstp dword [esp + 0xc]", - "fldz", - "fstp dword [esp + 0x8]", - "fld dword [eax + 0x5c]", - "fstp dword [esp + 0x4]", - "fld dword [ecx + 0x5c]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [0x00b45e58]", - "fld dword [esi + 0x2c]", - "mov edx,dword [esi + 0x24]", - "mov eax,dword [esi + 0x20]", - "fstp dword [esp + 0x10]", - "fld1", - "fstp dword [esp + 0xc]", - "fldz", - "fstp dword [esp + 0x8]", - "fld dword [edx + 0x54]", - "fstp dword [esp + 0x4]", - "fld dword [eax + 0x54]", - "fstp dword [esp]", - "call 0x00410eb0", - "add esp,0x14" - ], - "ExpectedArm64ASM": [ - "ldr w7, [x4, #104]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #44]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81815,7 +54404,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81828,26 +54417,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #104]", - "mvn w27, w8", - "subs w26, w8, #0x14 (20)", - "cfinv", - "mov x8, x26", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81859,11 +54432,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -81873,27 +54445,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "uxtb w5, w4", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "ldr q2, [x28, #2624]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #56]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81906,10 +54460,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -81919,26 +54475,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "uxtb w6, w7", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81951,8 +54491,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -81964,49 +54504,37 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "ldr w23, [x8, #56]", - "mov w24, #0x0", - "sxtw x23, w23", - "mrs x25, nzcv", - "cmp x23, #0x0 (0)", - "mov w12, #0x8000", - "csel x13, x12, xzr, lt", - "cneg x23, x23, mi", - "mov w14, #0x3f", - "mov x0, #0x3f", - "clz x15, x23", - "sub x15, x0, x15", - "sub x15, x14, x15", - "lsl x16, x23, x15", - "mov w17, #0x403e", - "sub x15, x17, x15", - "cmp x23, #0x0 (0)", - "csel x23, x24, x15, eq", - "orr x23, x13, x23", - "fmov d2, x16", - "fmov d3, x23", - "mov v2.d[1], v3.d[0]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "msr nzcv, x25", - "str w4, [x8, #64]", - "ldrb w20, [x28, #1019]", - "mov w23, #0xddd8", - "movk w23, #0xa3, lsl #16", - "ldr d2, [x23]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82018,9 +54546,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -82031,23 +54559,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82060,11 +54574,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1632]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -82075,26 +54589,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82107,8 +54605,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -82120,15 +54618,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82140,7 +54632,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82153,19 +54645,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82177,11 +54660,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -82191,48 +54673,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "str w6, [x8, #56]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "ldr w23, [x8, #56]", - "sxtw x23, w23", - "mrs x25, nzcv", - "cmp x23, #0x0 (0)", - "csel x12, x12, xzr, lt", - "cneg x23, x23, mi", - "mov x0, #0x3f", - "clz x13, x23", - "sub x13, x0, x13", - "sub x13, x14, x13", - "lsl x14, x23, x13", - "sub x13, x17, x13", - "cmp x23, #0x0 (0)", - "csel x23, x24, x13, eq", - "orr x23, x12, x23", - "fmov d2, x14", - "fmov d3, x23", - "mov v2.d[1], v3.d[0]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "msr nzcv, x25", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82245,11 +54688,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1632]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -82260,19 +54703,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82285,8 +54719,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -82298,15 +54732,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82318,7 +54746,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82331,19 +54759,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82355,387 +54774,22 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "mov w20, #0x3e2b", - "movk w20, #0x1, lsl #16", - "mov w22, #0xe52", - "movk w22, #0x41, lsl #16", - "add w22, w20, w22", - "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", - "ldr x0, [x28, #2280]", - "and x3, x22, #0xfffff", - "add x0, x0, x3, lsl #4", - "ldp x1, x0, [x0]" - ] - }, - "Block6": { - "ExpectedInstructionCount": 71, - "x86Insts": [ - "mov eax,dword [esp + 0x110]", - "fldz", - "mov ecx,dword [eax]", - "mov edx,dword [esp + 0x5c]", - "mov ebx,dword [edx + 0x18]", - "mov esi,dword [esp + 0x58]", - "mov dword [ebx + 0xc],ecx", - "mov edx,dword [eax + 0x4]", - "mov dword [ebx + 0x10],edx", - "mov eax,dword [eax + 0x8]", - "mov dword [ebx + 0x14],eax", - "mov ecx,dword [esi + 0x50]", - "push ecx", - "fstp dword [esp]", - "call 0x00784370", - "mov ecx,dword [esi + 0x50]", - "fstp dword [esp + 0x54]", - "fldz", - "push ecx", - "fstp dword [esp]", - "call 0x00784370", - "fstp dword [esp + 0x64]", - "mov eax,dword [esp + 0x11c]", - "lea ebp,[ebx + 0x1c]", - "mov esi,eax", - "mov ecx,0x9", - "mov edi,ebp", - "rep movsd", - "fld dword [eax + 0x4]", - "mov ecx,dword [esp + 0x120]", - "sub esp,0xc", - "fmul dword [ecx + 0x4]", - "fld dword [ecx]", - "fmul dword [eax]", - "faddp", - "fld dword [eax + 0x8]", - "fmul dword [ecx + 0x8]", - "faddp", - "fstp dword [esp + 0x28]", - "fld dword [eax + 0xc]", - "fmul dword [ecx]", - "fld dword [eax + 0x10]", - "fmul dword [ecx + 0x4]", - "faddp", - "fld dword [eax + 0x14]", - "fmul dword [ecx + 0x8]", - "faddp", - "fstp dword [esp + 0x44]", - "fld dword [eax + 0x18]", - "fmul dword [ecx]", - "fld dword [eax + 0x1c]", - "fmul dword [ecx + 0x4]", - "faddp", - "fld dword [eax + 0x20]", - "mov eax,esp", - "fmul dword [ecx + 0x8]", - "faddp", - "fstp dword [esp + 0x34]", - "fld dword [esp + 0x28]", - "fstp dword [esp + 0x48]", - "mov ecx,dword [esp + 0x48]", - "fld dword [esp + 0x44]", - "mov dword [eax],ecx", - "fstp dword [esp + 0x4c]", - "mov edx,dword [esp + 0x4c]", - "fld dword [esp + 0x34]", - "mov dword [eax + 0x4],edx", - "fstp dword [esp + 0x50]", - "mov ecx,dword [esp + 0x50]", - "fld dword [esp + 0x3c]", - "mov dword [eax + 0x8],ecx", - "push ecx", - "mov ecx,ebp", - "fstp dword [esp]", - "call 0x0078f050", - "fld dword [esp + 0x54]", - "sub esp,0x8", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x6c]", - "fadd dword [esp + 0x3c]", - "fstp dword [esp + 0x24]", - "fld dword [esp + 0x24]", - "mov ecx,ebp", - "fstp dword [esp]", - "call 0x0078ef60", - "fld dword [ebp + 0xc]", - "mov esi,dword [esp + 0x58]", - "fld dword [0x00b2b71c]", - "fld st0", - "fmulp st2", - "fld dword [ebp]", - "fld dword [0x00b2b718]", - "fld st0", - "fmulp st2", - "fxch st3", - "faddp", - "fld dword [ebp + 0x18]", - "fld dword [0x00b2b720]", - "fld st0", - "fmulp st2", - "fxch st2", - "faddp", - "fstp dword [esp + 0x1c]", - "fld dword [ebp + 0x10]", - "fmul st2", - "fld dword [ebp + 0x4]", - "fmul st4", - "faddp", - "fld dword [ebp + 0x1c]", - "fmul st2", - "faddp", - "fstp dword [esp + 0x38]", - "fld dword [ebp + 0x14]", - "fmulp st2", - "fld dword [ebp + 0x8]", - "fmulp st3", - "fxch", - "faddp st2,st0", - "fmul dword [ebp + 0x20]", - "faddp", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x1c]", - "fstp dword [esp + 0x3c]", - "mov edx,dword [esp + 0x3c]", - "fld dword [esp + 0x38]", - "mov dword [ebx],edx", - "fstp dword [esp + 0x40]", - "mov eax,dword [esp + 0x40]", - "fld dword [esp + 0x28]", - "mov dword [ebx + 0x4],eax", - "fstp dword [esp + 0x44]", - "mov ecx,dword [esp + 0x44]", - "fldz", - "mov dword [ebx + 0x8],ecx", - "mov ecx,dword [esi + 0x68]", - "push ecx", - "fstp dword [esp]", - "call 0x00784210", - "fmul dword [esp + 0x6c]", - "fstp dword [ebx + 0x18]", - "mov ecx,dword [esi + 0x5c]", - "fldz", - "push ecx", - "fstp dword [esp]", - "call 0x00784210", - "fmul dword [esp + 0x80]", - "push 0xb2b724", - "mov ecx,ebx", - "fstp dword [esp + 0x54]", - "call 0x0078fcc0", - "fmul qword [0x00a8ba48]", - "fstp dword [esp + 0x34]", - "fld dword [esp + 0x34]", - "fsubr qword [0x00a65a18]", - "fstp dword [esp + 0x1c]", - "fld dword [esp + 0x1c]", - "fabs", - "fstp dword [esp + 0x1c]", - "fld dword [esp + 0x1c]", - "fmul qword [0x00a8c698]", - "fld1", - "fsubrp", - "fstp dword [esp + 0x38]", - "fld dword [0x00b2b72c]", - "fld st0", - "fmul dword [ebx + 0x4]", - "fld dword [ebx + 0x8]", - "fld dword [0x00b2b728]", - "fld st0", - "fmulp st2", - "fxch st2", - "fsubrp", - "fstp dword [esp + 0x24]", - "fld dword [ebx + 0x8]", - "fld dword [0x00b2b724]", - "fld st0", - "fmulp st2", - "fld dword [ebx]", - "fmulp st4", - "fxch", - "fsubrp st3,st0", - "fxch st2", - "fstp dword [esp + 0x30]", - "fmul dword [ebx]", - "fld dword [ebx + 0x4]", - "fmulp st2", - "fsubrp", - "fstp dword [esp + 0x4c]", - "fld dword [esp + 0x30]", - "fld dword [esp + 0x24]", - "fld dword [esp + 0x4c]", - "fld st1", - "fmulp st2", - "fld st2", - "fmulp st3", - "fxch", - "faddp st2,st0", - "fmul st0", - "faddp", - "fstp dword [esp + 0x1c]", - "fld dword [esp + 0x1c]", - "call 0x00982c30", - "fstp dword [esp + 0x1c]", - "fld dword [esp + 0x1c]", - "mov ecx,dword [esi + 0x70]", - "fld1", - "push ecx", - "fdivrp", - "fstp dword [esp + 0x20]", - "fld dword [esp + 0x28]", - "fld dword [esp + 0x20]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x34]", - "fmul st1", - "fstp dword [esp + 0x44]", - "fmul dword [esp + 0x50]", - "fstp dword [esp + 0x48]", - "fldz", - "fstp dword [esp]", - "call 0x00784210", - "fsub qword [0x00a2faa0]", - "mov edx,dword [esp + 0x3c]", - "mov ecx,dword [esp + 0x40]", - "sub esp,0xc", - "fadd st0,st0", - "mov eax,esp", - "mov dword [eax],edx", - "fmul qword [0x00a3d360]", - "fstp dword [esp + 0x28]", - "fld1", - "fst dword [esp + 0xb8]", - "fldz", - "fst dword [esp + 0xbc]", - "fst dword [esp + 0xc0]", - "fst dword [esp + 0xc4]", - "fst dword [esp + 0xcc]", - "fst dword [esp + 0xd0]", - "fstp dword [esp + 0xd4]", - "fst dword [esp + 0xc8]", - "fstp dword [esp + 0xd8]", - "fld dword [esp + 0x28]", - "mov edx,dword [esp + 0x50]", - "fmul dword [esp + 0x90]", - "mov dword [eax + 0x4],ecx", - "push ecx", - "mov dword [eax + 0x8],edx", - "fmul dword [esp + 0x44]", - "lea ecx,[esp + 0xbc]", - "fmul dword [esp + 0x48]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x2c]", - "fstp dword [esp]", - "call 0x0078f160", - "lea eax,[esp + 0xac]", - "push eax", - "lea ecx,[esp + 0xd4]", - "push ecx", - "mov ecx,ebp", - "call 0x0078edd0", - "cmp dword [esp + 0x124],0x0", - "mov esi,eax", - "mov ecx,0x9", - "mov edi,ebp", - "rep movsd", - "fld dword [ebp + 0xc]", - "fld dword [0x00b2b71c]", - "fld st0", - "fmulp st2", - "fld dword [ebp]", - "fld dword [0x00b2b718]", - "fld st0", - "fmulp st2", - "fxch st3", - "faddp", - "fld dword [ebp + 0x18]", - "fld dword [0x00b2b720]", - "fld st0", - "fmulp st2", - "fxch st2", - "faddp", - "fstp dword [esp + 0x1c]", - "fld dword [ebp + 0x10]", - "fmul st2", - "fld dword [ebp + 0x4]", - "fmul st4", - "faddp", - "fld dword [ebp + 0x1c]", - "fmul st2", - "faddp", - "fstp dword [esp + 0x38]", - "fld dword [ebp + 0x14]", - "fmulp st2", - "fld dword [ebp + 0x8]", - "fmulp st3", - "fxch", - "faddp st2,st0", - "fmul dword [ebp + 0x20]", - "faddp", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x1c]", - "fstp dword [esp + 0x3c]", - "mov edx,dword [esp + 0x3c]", - "fld dword [esp + 0x38]", - "mov dword [ebx],edx", - "fstp dword [esp + 0x40]", - "mov eax,dword [esp + 0x40]", - "fld dword [esp + 0x28]", - "mov dword [ebx + 0x4],eax", - "mov eax,dword [esp + 0x10c]", - "fstp dword [esp + 0x44]", - "mov ecx,dword [esp + 0x44]", - "mov dword [ebx + 0x8],ecx" - ], - "ExpectedArm64ASM": [ - "ldr w4, [x8, #272]", - "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w5, [x4]", - "ldr w6, [x8, #92]", - "ldr w7, [x6, #24]", - "ldr w10, [x8, #88]", - "str w5, [x7, #12]", - "ldr w6, [x4, #4]", - "str w6, [x7, #16]", - "ldr w4, [x4, #8]", - "str w4, [x7, #20]", - "ldr w5, [x10, #80]", - "str w5, [x8, #-4]!", - "strb w22, [x28, #1298]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82748,8 +54802,39 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -82761,248 +54846,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "mov w20, #0x43c4", - "movk w20, #0x1, lsl #16", - "mov w22, #0x433f", - "movk w22, #0x78, lsl #16", - "add w22, w20, w22", - "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", - "ldr x0, [x28, #2280]", - "and x3, x22, #0xfffff", - "add x0, x0, x3, lsl #4", - "ldp x1, x0, [x0]" - ] - }, - "Block7": { - "ExpectedInstructionCount": 7653, - "x86Insts": [ - "fld dword [ecx + 0xc]", - "fld dword [ecx + 0x18]", - "fadd st0,st1", - "fstp dword [ecx + 0x18]", - "fld dword [ecx]", - "fadd st1,st0", - "fxch", - "fstp dword [ecx + 0xc]", - "fld dword [ecx + -0xc]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [ecx]", - "fld dword [ecx + -0x18]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [ecx + -0xc]", - "fld dword [ecx + -0x24]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x8]", - "fst dword [ecx + -0x18]", - "fld dword [ecx]", - "fld dword [ecx + 0x18]", - "fadd st0,st1", - "fstp dword [ecx + 0x18]", - "fadd st0,st1", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x8]", - "fst dword [ecx]", - "fld dword [ecx + -0xc]", - "fmul st6", - "fstp dword [esp + 0x4]", - "fld dword [ecx + 0xc]", - "fld st0", - "fmul st6", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x8]", - "fadd st0,st4", - "fstp dword [esp + 0x8]", - "fsubp st3,st0", - "fxch st2", - "fstp dword [esp + 0x3c]", - "fld dword [esp + 0x8]", - "fld dword [esp + 0x4]", - "fld st0", - "fadd st0,st2", - "fstp dword [esp + 0x38]", - "fsubp", - "fstp dword [esp + 0x40]", - "fxch", - "fmul st4", - "fstp dword [esp + 0x4]", - "fld dword [ecx + 0x18]", - "fld st0", - "fmul st4", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x8]", - "fadd st0,st2", - "fstp dword [esp + 0x8]", - "fsubp", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x8]", - "fld dword [esp + 0x4]", - "fld st0", - "fadd st0,st2", - "fstp dword [esp + 0x4c]", - "fsubp", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x8]", - "fmul qword [0x00a77be0]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x48]", - "fmul qword [0x00a77bd8]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x4c]", - "fmul qword [0x00a77bd0]", - "fstp dword [esp + 0x4c]", - "fld dword [esp + 0x38]", - "fst dword [esp + 0x8]", - "fld dword [esp + 0x4c]", - "fadd st1,st0", - "fxch", - "fstp dword [esp + 0x38]", - "fsubr dword [esp + 0x8]", - "fstp dword [esp + 0x4c]", - "fld dword [esp + 0x3c]", - "fst dword [esp + 0x8]", - "fld dword [esp + 0x48]", - "fadd st1,st0", - "fxch", - "fstp dword [esp + 0x3c]", - "fsubr dword [esp + 0x8]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x40]", - "fst dword [esp + 0x8]", - "fld dword [esp + 0x44]", - "fadd st1,st0", - "fxch", - "fstp dword [esp + 0x40]", - "fsubr dword [esp + 0x8]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x38]", - "fmul qword [0x00a77bc8]", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x3c]", - "fmul qword [0x00a77bc0]", - "fstp dword [esp + 0x3c]", - "fld dword [esp + 0x40]", - "fmul qword [0x00a77bb8]", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x44]", - "fmul qword [0x00a77bb0]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x48]", - "fmul qword [0x00a77ba8]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x4c]", - "fmul qword [0x00a77ba0]", - "fstp dword [esp + 0x4c]", - "fld dword [esp + 0x38]", - "fchs", - "fld st0", - "fmul st2", - "fstp dword [esp + 0x58]", - "fld qword [0x00a77b98]", - "fmul st1", - "fxch", - "fstp dword [esp + 0x5c]", - "fld dword [esp + 0x3c]", - "fchs", - "fld st0", - "fld qword [0x00a77b90]", - "fmul st1", - "fxch", - "fstp dword [esp + 0x54]", - "fxch", - "fmul qword [0x00a77b88]", - "fstp dword [esp + 0x60]", - "fld dword [esp + 0x40]", - "fchs", - "fld qword [0x00a77b80]", - "fmul st1", - "fstp dword [esp + 0x50]", - "fmul qword [0x00a77b78]", - "fstp dword [esp + 0x64]", - "fld dword [esp + 0x44]", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x48]", - "fld qword [0x00a77b88]", - "fmul st1", - "fstp dword [esp + 0x3c]", - "fld dword [esp + 0x4c]", - "fld st0", - "fmulp st4", - "fxch st3", - "fstp dword [esp + 0x40]", - "fxch st2", - "fchs", - "fmul st3", - "add eax,0x18", - "add ecx,0x4", - "sub edx,0x1", - "fstp dword [esp + 0x44]", - "fxch", - "fchs", - "fmulp", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x38]", - "fld st0", - "fchs", - "fmul qword [0x00a77b80]", - "fstp dword [esp + 0x4c]", - "fmul qword [0x00a77b78]", - "fstp dword [esp + 0x38]", - "fld dword [eax + -0x1c]", - "fadd dword [esp + 0x38]", - "fstp dword [eax + -0x1c]", - "fld dword [eax + -0x18]", - "fadd dword [esp + 0x3c]", - "fstp dword [eax + -0x18]", - "fld dword [esp + 0x40]", - "fadd dword [eax + -0x14]", - "fstp dword [eax + -0x14]", - "fld dword [eax + -0x10]", - "fadd dword [esp + 0x44]", - "fstp dword [eax + -0x10]", - "fld dword [eax + -0xc]", - "fadd dword [esp + 0x48]", - "fstp dword [eax + -0xc]", - "fld dword [eax + -0x8]", - "fadd dword [esp + 0x4c]", - "fstp dword [eax + -0x8]", - "fld dword [esp + 0x50]", - "fadd dword [eax + -0x4]", - "fstp dword [eax + -0x4]", - "fld dword [eax]", - "fadd dword [esp + 0x54]", - "fstp dword [eax]", - "fld dword [eax + 0x4]", - "fadd dword [esp + 0x58]", - "fstp dword [eax + 0x4]", - "fld dword [eax + 0x8]", - "fadd dword [esp + 0x5c]", - "fstp dword [eax + 0x8]", - "fld dword [esp + 0x60]", - "fadd dword [eax + 0xc]", - "fstp dword [eax + 0xc]", - "fld dword [eax + 0x10]", - "fadd dword [esp + 0x64]", - "fstp dword [eax + 0x10]" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #12]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83014,7 +54860,149 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83027,20 +55015,189 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #24]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "add w21, w8, #0x70 (112)", + "str s8, [x21]", + "ldr w4, [x8, #112]", + "ldr s8, [x8, #44]", + "str w4, [x8, #208]", + "add w21, w8, #0x74 (116)", + "str s8, [x21]", + "ldr w5, [x8, #116]", + "ldr s8, [x8, #16]", + "str w5, [x8, #212]", + "add w21, w8, #0x78 (120)", + "str s8, [x21]", + "ldr w6, [x8, #120]", + "str w6, [x8, #216]", + "strb w20, [x28, #1017]", + "str w20, [x8, #-4]!", + "add w21, w8, #0x60 (96)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x88 (136)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x80 (128)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #44]", + "add w21, w8, #0x44 (68)", + "str s4, [x21]", + "ldr s4, [x8, #88]", + "add w21, w8, #0x4c (76)", + "str s4, [x21]", + "ldr s4, [x8, #84]", + "add w21, w8, #0x48 (72)", + "str s4, [x21]", + "ldr s4, [x8, #92]", + "add w21, w8, #0x18 (24)", + "str s4, [x21]", + "ldr s4, [x8, #144]", + "add w21, w8, #0x30 (48)", + "str s4, [x21]", + "ldr s4, [x8, #80]", + "add w21, w8, #0x14 (20)", + "str s4, [x21]", + "ldr s4, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83052,7 +55209,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83065,23 +55222,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83094,10 +55237,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -83112,11 +55255,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83143,14 +55283,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5]", + "str s2, [x21]", + "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83178,20 +55312,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83222,24 +55342,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "mov w24, #0x0", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w20, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83266,15 +55370,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x23, #0xfffffffffffffff4", - "ldr s2, [x5, w23, sxtw]", + "str s2, [x20]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83302,32 +55399,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83340,8 +55411,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -83358,28 +55429,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83406,15 +55456,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x25, #0xffffffffffffffe8", - "ldr s2, [x5, w25, sxtw]", + "str s2, [x20]", + "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83442,32 +55485,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83479,13 +55497,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -83495,31 +55510,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83534,8 +55527,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -83545,16 +55540,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, w23, sxtw]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x12, #0xffffffffffffffdc", - "ldr s2, [x5, w12, sxtw]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w20, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83566,10 +55555,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -83579,35 +55569,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x20]", + "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83619,13 +55583,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -83638,28 +55599,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s3, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83671,11 +55611,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -83685,15 +55624,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83705,10 +55638,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -83721,16 +55657,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83757,9 +55684,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, w25, sxtw]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5]", + "str s2, [x20]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83787,15 +55713,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #24]", + "ldr s3, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83807,7 +55725,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83820,23 +55738,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83849,11 +55753,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -83867,11 +55771,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83898,19 +55798,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, #24]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x20]", + "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83922,13 +55811,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -83941,11 +55827,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s3, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83957,11 +55839,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -83971,15 +55852,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83991,10 +55866,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -84007,16 +55885,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84043,9 +55912,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w23, sxtw]", + "str s2, [x20]", + "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84073,20 +55941,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x6 (6)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84098,12 +55953,39 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -84117,11 +55999,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84148,14 +56026,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #12]", + "str s2, [x20]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84183,32 +56055,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x6 (6)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84220,12 +56067,39 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -84239,11 +56113,2136 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "add w20, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x20]", + "ldr s2, [x8, #24]", + "add w20, w8, #0x74 (116)", + "str s2, [x20]", + "ldr w4, [x8, #116]", + "ldr s2, [x8, #48]", + "str w4, [x8, #224]", + "add w20, w8, #0x78 (120)", + "str s2, [x20]", + "ldr w5, [x8, #120]", + "ldr s2, [x8, #20]", + "str w5, [x8, #228]", + "add w20, w8, #0x7c (124)", + "str s2, [x20]", + "ldr w6, [x8, #124]", + "add w5, w8, #0x190 (400)", + "str w6, [x8, #232]", + "mov w20, #0x2296", + "movk w20, #0x1, lsl #16", + "mov w21, #0xd4f1", + "movk w21, #0x70, lsl #16", + "add w21, w20, w21", + "str w20, [x8, #-4]!", "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov w22, #0x1", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "ldrb w23, [x28, #1298]", + "lsl w20, w22, w20", + "bic w20, w23, w20", + "strb w20, [x28, #1298]", + "ldr x0, [x28, #2280]", + "and x3, x21, #0xfffff", + "add x0, x0, x3, lsl #4", + "ldp x1, x0, [x0]" + ] + }, + "Block4": { + "ExpectedInstructionCount": 63, + "x86Insts": [ + "fldz", + "push 0x0", + "push -0x1", + "push 0x1000172", + "push 0x37", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa33c14", + "push 0x52424157", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1000172", + "push 0x38", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa33c04", + "push 0x41574157", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x2b", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa33bfc", + "push 0x444c4853", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x3d", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa33bf0", + "push 0x48534946", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x44", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa33bdc", + "push 0x4853494c", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x3e", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa33bcc", + "push 0x48535246", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x52485446", + "push 0x4c505344", + "push 0x2", + "push 0x40", + "push 0x1000073", + "push 0xb", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa33bc4", + "push 0x4e445242", + "call 0x00417220", + "fldz", + "add esp,0x28", + "push 0x4c505344", + "push 0x1", + "push 0x40", + "push 0x1000076", + "push 0xb", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa33bbc", + "push 0x52485446", + "call 0x00417220", + "fldz", + "add esp,0x24", + "push 0x0", + "push -0x1", + "push 0xe0", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa32700", + "push 0x4b434f4c", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0xc0", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa33bb4", + "push 0x4e45504f", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x48534946", + "push 0x49465352", + "push 0x4c505344", + "push 0x3", + "push 0x3d", + "push 0x21000475", + "push 0x8", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33ba8", + "push 0x47444946", + "call 0x00417220", + "fldz", + "add esp,0x2c", + "push 0x4853494c", + "push 0x48535352", + "push 0x4c505344", + "push 0x3", + "push 0x44", + "push 0x21000075", + "push 0x8", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b98", + "push 0x47444853", + "call 0x00417220", + "fldz", + "add esp,0x2c", + "push 0x48535246", + "push 0x52465352", + "push 0x4c505344", + "push 0x3", + "push 0x3e", + "push 0x1000075", + "push 0x8", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b88", + "push 0x47445246", + "call 0x00417220", + "fldz", + "add esp,0x2c", + "push 0x54414241", + "push 0x54414f46", + "push 0x54414552", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x100075", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b74", + "push 0x54414744", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x45484241", + "push 0x45484f46", + "push 0x45484552", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x21000075", + "push 0x8", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b64", + "push 0x45484744", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x50534241", + "push 0x50534f46", + "push 0x50534552", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x1000075", + "push 0x9", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b50", + "push 0x50534744", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x41464241", + "push 0x41464f46", + "push 0x41464552", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x1000075", + "push 0xa", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b40", + "push 0x41464744", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x54414241", + "push 0x54414f46", + "push 0x54414552", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x100077", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b30", + "push 0x54415244", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x4b534241", + "push 0x4b534f46", + "push 0x4c505344", + "push 0x3", + "push 0x40", + "push 0x80077", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b24", + "push 0x4b535244", + "call 0x00417220", + "fldz", + "add esp,0x2c", + "push 0x45484241", + "push 0x45484f46", + "push 0x45484552", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x1000077", + "push 0x8", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b14", + "push 0x45485244", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x50534241", + "push 0x50534f46", + "push 0x50534552", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x1000077", + "push 0x9", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b00", + "push 0x50535244", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x41464241", + "push 0x41464f46", + "push 0x41464552", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x1000077", + "push 0xa", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33af0", + "push 0x41465244", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x4c505344", + "push 0x49465352", + "push 0x48534946", + "push 0x3", + "push 0x40", + "push 0x100007f", + "push 0x3d", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33adc", + "push 0x49464b57", + "call 0x00417220", + "fldz", + "add esp,0x2c", + "push 0x4c505344", + "push 0x52465352", + "push 0x48535246", + "push 0x3", + "push 0x40", + "push 0x100007f", + "push 0x3e", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33ac8", + "push 0x52464b57", + "call 0x00417220", + "fldz", + "add esp,0x2c", + "push 0x4c505344", + "push 0x48535352", + "push 0x4853494c", + "push 0x3", + "push 0x40", + "push 0x100007f", + "push 0x44", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33ab4", + "push 0x48534b57", + "call 0x00417220", + "fldz", + "add esp,0x2c", + "push 0x4c505344", + "push 0x414d5352", + "push 0x2", + "push 0x40", + "push 0x100007f", + "push 0x40", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33aa0", + "push 0x414d4b57", + "call 0x00417220", + "fldz", + "add esp,0x28", + "push 0x4c505344", + "push 0x49445352", + "push 0x2", + "push 0x40", + "push 0x100007f", + "push 0x3f", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33a8c", + "push 0x49444b57", + "call 0x00417220", + "fldz", + "add esp,0x28", + "push 0x4c505344", + "push 0x4f505352", + "push 0x2", + "push 0x40", + "push 0x100007f", + "push 0x43", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33a78", + "push 0x4f504b57", + "call 0x00417220", + "add esp,0x28", + "push 0x4c505344", + "push 0x574e5352", + "push 0x2", + "push 0x40", + "push 0x100007f", + "push 0x41", + "push ecx", + "fldz", + "fstp dword [esp]", + "push 0x2", + "push 0xa33a5c", + "push 0x574e4b57", + "call 0x00417220", + "fldz", + "add esp,0x28", + "push 0x48535246", + "push 0x4853494c", + "push 0x48534946", + "push 0x444c4853", + "push 0x4c505344", + "push 0x5", + "push 0x40", + "push 0x75", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33a48", + "push 0x52414944", + "call 0x00417220", + "fldz", + "add esp,0x34", + "push 0x48535246", + "push 0x4853494c", + "push 0x48534946", + "push 0x444c4853", + "push 0x4c505344", + "push 0x5", + "push 0x40", + "push 0x75", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33a30", + "push 0x45574944", + "call 0x00417220", + "fldz", + "add esp,0x34", + "push 0x0", + "push 0x3f", + "push 0x10000092", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33a24", + "push 0x504d4156", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x14", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33a18", + "push 0x47445553", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1000112", + "push 0x39", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33a08", + "push 0x414d5453", + "call 0x00417220", + "add esp,0x20", + "push 0x4f505543", + "push 0x1", + "push 0x43", + "push 0x800000", + "fldz", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa339fc", + "push 0x4e534f50", + "call 0x00417220", + "fldz", + "add esp,0x24", + "push 0x49445543", + "push 0x1", + "push 0x3f", + "push 0x800000", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa339ec", + "push 0x45534944", + "call 0x00417220", + "fldz", + "add esp,0x24", + "push 0x45484241", + "push 0x45484f46", + "push 0x45484552", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x21000075", + "push 0x8", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa339cc", + "push 0x594d5544", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x0", + "push -0x1", + "push 0x1000172", + "push 0x2f", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa339bc", + "push 0x49564e49", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x2e", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa339b0", + "push 0x4c4d4843", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x4c505344", + "push 0x41505543", + "push 0x2", + "push 0x42", + "push 0x1000173", + "push 0x30", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa339a4", + "push 0x41524150", + "call 0x00417220", + "add esp,0x28", + "push 0x4c505344", + "push 0x1", + "push 0x40", + "push 0x1000173", + "push 0x31", + "fldz", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa3399c", + "push 0x434e4c53", + "call 0x00417220", + "fldz", + "add esp,0x24", + "push 0x4c505344", + "push 0x1", + "push 0x40", + "push 0x1000062", + "push 0x6", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa33994", + "push 0x4d524843", + "call 0x00417220", + "fldz", + "add esp,0x24", + "push 0x594c4152", + "push 0x4c505344", + "push 0x2", + "push 0x40", + "push 0x41000066", + "push 0x22", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa33988", + "push 0x4f4d4544", + "call 0x00417220", + "fldz", + "add esp,0x28", + "push 0x4f4d4544", + "push 0x4c505344", + "push 0x2", + "push 0x40", + "push 0x1000062", + "push 0x22", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa33980", + "push 0x594c4152", + "call 0x00417220", + "fldz", + "add esp,0x28", + "push 0x4d4c4143", + "push 0x4c505344", + "push 0x2", + "push 0x40", + "push 0x41000062", + "push 0x21", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa33978", + "push 0x5a4e5246", + "call 0x00417220", + "fldz", + "add esp,0x28", + "push 0x5a4e5246", + "push 0x4c505344", + "push 0x2", + "push 0x40", + "push 0x41000066", + "push 0x21", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa33970", + "push 0x4d4c4143", + "call 0x00417220", + "add esp,0x28", + "push 0x0", + "push -0x1", + "push 0x1000112", + "push 0x29", + "fldz", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa33964", + "push 0x4559454e", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x80000072", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa3395c", + "push 0x5448474c", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x81000072", + "push 0x46", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa33950", + "push 0x4b524144", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push 0x40", + "push 0xf0", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x4", + "push 0xa33948", + "push 0x4c505344", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x4c505344", + "push 0x1", + "push 0x40", + "push 0x163", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x4", + "push 0xa3393c", + "push 0x50525453", + "call 0x00417220", + "fldz", + "add esp,0x24", + "push 0x0", + "push -0x1", + "push 0x81000242", + "push 0x3c", + "push ecx", + "fstp dword [esp]", + "push 0x4", + "push 0xa33930", + "push 0x454c4554", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x81000012", + "push 0x3a", + "push ecx", + "fstp dword [esp]", + "push 0x4", + "push 0xa33924", + "push 0x54435444", + "call 0x00417220", + "add esp,0x20", + "fldz", + "push 0x0", + "push 0x40", + "push 0x1000072", + "push 0x34", + "push ecx", + "fstp dword [esp]", + "push 0x4", + "push 0xa33910", + "push 0x53424153", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x35", + "push ecx", + "fstp dword [esp]", + "push 0x4", + "push 0xa33908", + "push 0x434c4652", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100001a", + "push 0x3b", + "push ecx", + "fstp dword [esp]", + "push 0x4", + "push 0xa338f8", + "push 0x47444552", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100070", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa338e4", + "push 0x54414552", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1000070", + "push 0x8", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa338d4", + "push 0x45484552", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1000070", + "push 0x9", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa338bc", + "push 0x50534552", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1000070", + "push 0xa", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa338ac", + "push 0x41464552", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100072", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33898", + "push 0x54414f46", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x80072", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33888", + "push 0x4b534f46", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1000072", + "push 0x8", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33878", + "push 0x45484f46", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1000072", + "push 0x9", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33860", + "push 0x50534f46", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1000072", + "push 0xa", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33850", + "push 0x41464f46", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x4b535244", + "push 0x4b534241", + "push 0x4c505344", + "push 0x3", + "push 0x40", + "push 0x80027", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33840", + "push 0x4b534241", + "call 0x00417220", + "add esp,0x2c", + "push 0x54414744", + "push 0x54415244", + "push 0x54414241", + "fldz", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x100027", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa3382c", + "push 0x54414241", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x594d5544", + "push 0x45484744", + "push 0x45485244", + "push 0x45484241", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x1000025", + "push 0x8", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa3381c", + "push 0x45484241", + "call 0x00417220", + "fldz", + "add esp,0x34", + "push 0x41464744", + "push 0x41465244", + "push 0x41464241", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x1000025", + "push 0xa", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa3380c", + "push 0x41464241", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x50534744", + "push 0x50535244", + "push 0x50534241", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x1000025", + "push 0x9", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa337f8", + "push 0x50534241", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x3d", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa337ec", + "push 0x49465352", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x3e", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa337dc", + "push 0x52465352", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x44", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa337cc", + "push 0x48535352", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x40", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa337bc", + "push 0x414d5352", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x3f", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa337ac", + "push 0x49445352", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x43", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa3379c", + "push 0x4f505352", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x42", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33788", + "push 0x41505352", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x41", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33770", + "push 0x574e5352", + "call 0x00417220", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100017a", + "push 0x47", + "fldz", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa3375c", + "push 0x44575352", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1f0", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa3374c", + "push 0x49445543", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1f0", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33740", + "push 0x4f505543", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1f0", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33730", + "push 0x41505543", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1000012", + "push 0x28", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33714", + "push 0x4d4d4f46", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33704", + "push 0x4f48475a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa336f8", + "push 0x43494c5a", + "call 0x00417220", + "add esp,0x20", + "push 0x0", + "fldz", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa336e8", + "push 0x454b535a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa336d0", + "push 0x414b535a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa336b4", + "push 0x434b535a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa3369c", + "push 0x484b535a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa3368c", + "push 0x4152575a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33678", + "push 0x4c52575a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33668", + "push 0x4d4f5a5a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33650", + "push 0x5a44485a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33638", + "push 0x4149465a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33620", + "push 0x4152465a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33608", + "push 0x4154535a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa335f8", + "push 0x4541445a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa335e8", + "push 0x4552445a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa335d4", + "push 0x4c52445a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa335c4", + "push 0x4143535a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa335b0", + "push 0x414c435a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33598", + "push 0x4450535a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33588", + "push 0x5649585a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33578", + "push 0x3130305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33568", + "push 0x3230305a", + "call 0x00417220", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "fldz", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33558", + "push 0x3330305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33548", + "push 0x3430305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33538", + "push 0x3530305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33528", + "push 0x3630305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33518", + "push 0x3730305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33508", + "push 0x3830305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa334f8", + "push 0x3930305a", + "call 0x00417220", + "add esp,0x20", + "push 0x0", + "fldz", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa334e8", + "push 0x3031305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa334d8", + "push 0x3131305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa334c8", + "push 0x3231305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa334b8", + "push 0x3331305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa334a8", + "push 0x3431305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33498", + "push 0x3531305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33488", + "push 0x3631305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33478", + "push 0x3731305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33468", + "push 0x3831305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33458", + "push 0x3931305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33448", + "push 0x3032305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x4c505344", + "push 0x1", + "push -0x1", + "push 0x40000062", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa33434", + "push 0x55484f43", + "call 0x00417220", + "fldz", + "add esp,0x24", + "push 0x4c505344", + "push 0x1", + "push -0x1", + "push 0x40000062", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa33420", + "push 0x52434f43", + "call 0x00417220", + "add esp,0x24", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fldz", + "fstp dword [esp]", + "push 0x1", + "push 0xa33414", + "push 0x58415742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33408", + "push 0x4f425742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa333f8", + "push 0x41445742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa333ec", + "push 0x414d5742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa333e0", + "push 0x57535742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa333d4", + "push 0x4f424142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa333c4", + "push 0x55434142", + "call 0x00417220", + "add esp,0x20", + "push 0x0", + "push -0x1", + "fldz", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa333b4", + "push 0x41474142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa333a4", + "push 0x52474142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33394", + "push 0x45484142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33384", + "push 0x48534142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa3336c", + "push 0x31304142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33354", + "push 0x32304142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa3333c", + "push 0x33304142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33324", + "push 0x34304142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa3330c", + "push 0x35304142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa332f4", + "push 0x36304142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa332dc", + "push 0x37304142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa332c4", + "push 0x38304142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa332ac", + "push 0x39304142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33294", + "push 0x30314142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa3327c", + "push 0x31305742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33264", + "push 0x32305742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa3324c", + "push 0x33305742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33234", + "push 0x34305742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa3321c", + "push 0x35305742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33204", + "push 0x36305742", + "call 0x00417220", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fldz", + "fstp dword [esp]", + "push 0x1", + "push 0xa331ec", + "push 0x37305742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa331d4", + "push 0x38305742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa331bc", + "push 0x39305742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa331a4", + "push 0x30315742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x594c4152", + "push 0x4c505344", + "push 0x2", + "push 0x40", + "push 0x40000063", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33198", + "push 0x4e525554", + "call 0x00417220", + "fldz", + "add esp,0x28", + "push 0x4c505344", + "push 0x1", + "push -0x1", + "push 0x170", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x6", + "push 0xa33188", + "push 0x46464553", + "call 0x00417220", + "fldz", + "add esp,0x24", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa3316c", + "push 0x4854594d", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33154", + "push 0x4c48594d", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10000360", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33148", + "push 0x4e414552", + "call 0x00417220", + "add esp,0x20" + ], + "ExpectedArm64ASM": [ + "movi v2.2d, #0x0", + "mov w20, #0x0", + "str w20, [x8, #-4]!", + "mov w21, #0xffffffff", + "str w21, [x8, #-4]!", + "mov w21, #0x172", + "movk w21, #0x100, lsl #16", + "str w21, [x8, #-4]!", + "mov w21, #0x37", + "str w21, [x8, #-4]!", + "str w5, [x8, #-4]!", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84270,129 +58269,420 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x4 (4)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str s2, [x8]", + "str w20, [x8, #-4]!", + "mov w20, #0x3c14", + "movk w20, #0xa3, lsl #16", + "str w20, [x8, #-4]!", + "mov w20, #0x4157", + "movk w20, #0x5242, lsl #16", + "str w20, [x8, #-4]!", + "mov w20, #0x23c9", + "movk w20, #0x1, lsl #16", + "mov w21, #0x71fe", + "movk w21, #0x41, lsl #16", + "add w21, w20, w21", + "str w20, [x8, #-4]!", "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", + "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x3 (3)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "mov w23, #0x1", + "lsl w20, w23, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", + "ldr x0, [x28, #2280]", + "and x3, x21, #0xfffff", + "add x0, x0, x3, lsl #4", + "ldp x1, x0, [x0]" + ] + }, + "Block5": { + "ExpectedInstructionCount": 284, + "x86Insts": [ + "mov ebx,dword [eax + 0x68]", + "fld dword [esi + 0x2c]", + "mov eax,dword [ebp + 0x68]", + "sub esp,0x14", + "fstp dword [esp + 0x10]", + "movzx ecx,al", + "fld1", + "mov dword [esp + 0x38],ecx", + "fstp dword [esp + 0xc]", + "movzx edx,bl", + "fldz", + "fstp dword [esp + 0x8]", + "fild dword [esp + 0x38]", + "mov dword [esp + 0x40],eax", + "fld qword [0x00a3ddd8]", + "fdiv st1,st0", + "fxch", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp + 0x4]", + "mov dword [esp + 0x38],edx", + "fild dword [esp + 0x38]", + "fdivrp", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [esp + 0x24]", + "fld dword [esi + 0x2c]", + "movzx eax,byte [esp + 0x41]", + "fstp dword [esp + 0x10]", + "mov dword [esp + 0x38],eax", + "fld1", + "movzx ecx,bh", + "fstp dword [esp + 0xc]", + "fldz", + "fstp dword [esp + 0x8]", + "fild dword [esp + 0x38]", + "fld qword [0x00a3ddd8]", + "fdiv st1,st0", + "fxch", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp + 0x4]", + "mov dword [esp + 0x38],ecx", + "fild dword [esp + 0x38]", + "fdivrp", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [esp + 0x28]", + "mov eax,dword [esp + 0x40]", + "fld dword [esi + 0x2c]", + "fstp dword [esp + 0x10]", + "shr eax,0x10", + "fld1", + "movzx edx,al", + "fstp dword [esp + 0xc]", + "mov dword [esp + 0x40],edx", + "fldz", + "shr ebx,0x10", + "movzx eax,bl", + "fstp dword [esp + 0x8]", + "fild dword [esp + 0x40]", + "fld qword [0x00a3ddd8]", + "fdiv st1,st0", + "fxch", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x40]", + "fstp dword [esp + 0x4]", + "mov dword [esp + 0x40],eax", + "fild dword [esp + 0x40]", + "fdivrp", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x40]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [esp + 0x2c]", + "fld1", + "fst dword [esp + 0x30]", + "mov ecx,dword [esp + 0x24]", + "mov edx,dword [esp + 0x28]", + "mov eax,dword [esp + 0x2c]", + "mov dword [0x00b45e14],ecx", + "mov ecx,dword [esp + 0x30]", + "mov [0x00b45e1c],eax", + "mov dword [0x00b45e20],ecx", + "mov dword [0x00b45e18],edx", + "fld dword [esi + 0x2c]", + "mov eax,dword [ebp + 0x6c]", + "fstp dword [esp + 0x10]", + "mov dword [esp + 0x40],eax", + "fstp dword [esp + 0xc]", + "movzx eax,al", + "fldz", + "mov dword [esp + 0x38],eax", + "fstp dword [esp + 0x8]", + "mov edx,dword [esi + 0x20]", + "fild dword [esp + 0x38]", + "mov ebx,dword [edx + 0x6c]", + "fld qword [0x00a3ddd8]", + "movzx ecx,bl", + "fdiv st1,st0", + "fxch", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp + 0x4]", + "mov dword [esp + 0x38],ecx", + "fild dword [esp + 0x38]", + "fdivrp", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [esp + 0x24]", + "fld dword [esi + 0x2c]", + "movzx edx,byte [esp + 0x41]", + "fstp dword [esp + 0x10]", + "mov dword [esp + 0x38],edx", + "fld1", + "movzx eax,bh", + "fstp dword [esp + 0xc]", + "fldz", + "fstp dword [esp + 0x8]", + "fild dword [esp + 0x38]", + "fld qword [0x00a3ddd8]", + "fdiv st1,st0", + "fxch", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp + 0x4]", + "mov dword [esp + 0x38],eax", + "fild dword [esp + 0x38]", + "fdivrp", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [esp + 0x28]", + "mov eax,dword [esp + 0x40]", + "fld dword [esi + 0x2c]", + "fstp dword [esp + 0x10]", + "shr eax,0x10", + "fld1", + "movzx ecx,al", + "fstp dword [esp + 0xc]", + "mov dword [esp + 0x40],ecx", + "fldz", + "shr ebx,0x10", + "movzx edx,bl", + "fstp dword [esp + 0x8]", + "fild dword [esp + 0x40]", + "fld qword [0x00a3ddd8]", + "fdiv st1,st0", + "fxch", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x40]", + "fstp dword [esp + 0x4]", + "mov dword [esp + 0x40],edx", + "fild dword [esp + 0x40]", + "fdivrp", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x40]", + "fstp dword [esp]", + "call 0x00410eb0", + "mov eax,dword [esp + 0x24]", + "fstp dword [esp + 0x2c]", + "fld1", + "mov ecx,dword [esp + 0x28]", + "mov edx,dword [esp + 0x2c]", + "fst dword [esp + 0x30]", + "mov [0x00b45e24],eax", + "mov eax,dword [esp + 0x30]", + "mov dword [0x00b45e2c],edx", + "mov [0x00b45e30],eax", + "mov dword [0x00b45e28],ecx", + "fld dword [esi + 0x2c]", + "mov eax,dword [ebp + 0x70]", + "fstp dword [esp + 0x10]", + "movzx edx,al", + "fstp dword [esp + 0xc]", + "mov dword [esp + 0x38],edx", + "fldz", + "mov ecx,dword [esi + 0x20]", + "fstp dword [esp + 0x8]", + "mov ebx,dword [ecx + 0x70]", + "fild dword [esp + 0x38]", + "mov dword [esp + 0x40],eax", + "fld qword [0x00a3ddd8]", + "movzx eax,bl", + "fdiv st1,st0", + "fxch", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp + 0x4]", + "mov dword [esp + 0x38],eax", + "fild dword [esp + 0x38]", + "fdivrp", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [esp + 0x24]", + "fld dword [esi + 0x2c]", + "movzx ecx,byte [esp + 0x41]", + "fstp dword [esp + 0x10]", + "mov dword [esp + 0x38],ecx", + "fld1", + "movzx edx,bh", + "fstp dword [esp + 0xc]", + "fldz", + "fstp dword [esp + 0x8]", + "fild dword [esp + 0x38]", + "fld qword [0x00a3ddd8]", + "fdiv st1,st0", + "fxch", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp + 0x4]", + "mov dword [esp + 0x38],edx", + "fild dword [esp + 0x38]", + "fdivrp", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [esp + 0x28]", + "mov eax,dword [esp + 0x40]", + "fld dword [esi + 0x2c]", + "fstp dword [esp + 0x10]", + "shr eax,0x10", + "fld1", + "movzx eax,al", + "fstp dword [esp + 0xc]", + "mov dword [esp + 0x40],eax", + "fldz", + "fstp dword [esp + 0x8]", + "fild dword [esp + 0x40]", + "fld qword [0x00a3ddd8]", + "fdiv st1,st0", + "fxch", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x40]", + "shr ebx,0x10", + "movzx ecx,bl", + "fstp dword [esp + 0x4]", + "mov dword [esp + 0x40],ecx", + "fild dword [esp + 0x40]", + "fdivrp", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x40]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [esp + 0x2c]", + "fld1", + "mov edx,dword [esp + 0x24]", + "mov eax,dword [esp + 0x28]", + "fst dword [esp + 0x30]", + "mov ecx,dword [esp + 0x2c]", + "mov dword [0x00b45e34],edx", + "mov edx,dword [esp + 0x30]", + "mov [0x00b45e38],eax", + "mov dword [0x00b45e3c],ecx", + "mov dword [0x00b45e40],edx", + "fld dword [esi + 0x2c]", + "mov eax,dword [esi + 0x24]", + "fstp dword [esp + 0x10]", + "mov ecx,dword [esi + 0x20]", + "fstp dword [esp + 0xc]", + "fldz", + "fstp dword [esp + 0x8]", + "fld dword [eax + 0x4c]", + "fstp dword [esp + 0x4]", + "fld dword [ecx + 0x4c]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [0x00b45e44]", + "fld dword [esi + 0x2c]", + "mov edx,dword [esi + 0x24]", + "mov eax,dword [esi + 0x20]", + "fstp dword [esp + 0x10]", + "fld1", + "fstp dword [esp + 0xc]", + "fldz", + "fstp dword [esp + 0x8]", + "fld dword [edx + 0x50]", + "fstp dword [esp + 0x4]", + "fld dword [eax + 0x50]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [0x00b45e48]", + "fld dword [esi + 0x2c]", + "mov ecx,dword [esi + 0x24]", + "add esp,0x8", + "fstp dword [esp + 0x8]", + "fld1", + "fstp dword [esp + 0x4]", + "fldz", + "fstp dword [esp]", + "call 0x004ed660", + "push ecx", + "mov ecx,dword [esi + 0x20]", + "fstp dword [esp]", + "call 0x004ed660", + "push ecx", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [0x00b45e4c]", + "mov ecx,dword [esi + 0x24]", + "fld dword [esi + 0x2c]", + "add esp,0x8", + "fstp dword [esp + 0x8]", + "fld1", + "fstp dword [esp + 0x4]", + "fldz", + "fstp dword [esp]", + "call 0x004ed680", + "push ecx", + "mov ecx,dword [esi + 0x20]", + "fstp dword [esp]", + "call 0x004ed680", + "push ecx", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [0x00b45e50]", + "fld dword [esi + 0x2c]", + "mov ecx,dword [esi + 0x24]", + "mov edx,dword [esi + 0x20]", + "fstp dword [esp + 0x10]", + "fld1", + "fstp dword [esp + 0xc]", + "fldz", + "fstp dword [esp + 0x8]", + "fld dword [ecx + 0x58]", + "fstp dword [esp + 0x4]", + "fld dword [edx + 0x58]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [0x00b45e54]", + "fld dword [esi + 0x2c]", + "mov eax,dword [esi + 0x24]", + "mov ecx,dword [esi + 0x20]", + "fstp dword [esp + 0x10]", + "fld1", + "fstp dword [esp + 0xc]", + "fldz", + "fstp dword [esp + 0x8]", + "fld dword [eax + 0x5c]", + "fstp dword [esp + 0x4]", + "fld dword [ecx + 0x5c]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [0x00b45e58]", + "fld dword [esi + 0x2c]", + "mov edx,dword [esi + 0x24]", + "mov eax,dword [esi + 0x20]", + "fstp dword [esp + 0x10]", + "fld1", + "fstp dword [esp + 0xc]", + "fldz", + "fstp dword [esp + 0x8]", + "fld dword [edx + 0x54]", + "fstp dword [esp + 0x4]", + "fld dword [eax + 0x54]", + "fstp dword [esp]", + "call 0x00410eb0", + "add esp,0x14" + ], + "ExpectedArm64ASM": [ + "ldr w7, [x4, #104]", + "ldr s2, [x10, #44]", + "ldr w4, [x9, #104]", + "mvn w27, w8", + "subs w26, w8, #0x14 (20)", + "cfinv", + "mov x8, x26", + "add w20, w8, #0x10 (16)", + "str s2, [x20]", + "uxtb w5, w4", + "ldr q2, [x28, #2624]", + "str w5, [x8, #56]", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84407,10 +58697,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -84420,31 +58708,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s2, s0", + "str s2, [x20]", + "uxtb w6, w7", + "movi v2.2d, #0x0", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84471,50 +58739,34 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "str s2, [x20]", + "ldr w20, [x8, #56]", + "sxtw x20, w20", + "mrs x21, nzcv", + "mov w22, #0x0", + "cmp x20, #0x0 (0)", + "mov w23, #0x8000", + "csel x24, x23, xzr, lt", + "cneg x20, x20, mi", + "mov w25, #0x3f", + "mov x0, #0x3f", + "clz x12, x20", + "sub x12, x0, x12", + "sub x12, x25, x12", + "lsl x13, x20, x12", + "mov w14, #0x403e", + "sub x12, x14, x12", + "cmp x20, #0x0 (0)", + "csel x20, x22, x12, eq", + "orr x20, x24, x20", + "fmov d2, x13", + "fmov d3, x20", + "mov v2.d[1], v3.d[0]", + "msr nzcv, x21", + "str w4, [x8, #64]", + "mov w20, #0xddd8", + "movk w20, #0xa3, lsl #16", + "ldr d3, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84526,9 +58778,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v3.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -84539,35 +58791,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84580,11 +58806,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -84598,11 +58824,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb w22, [x28, #1017]", + "add w20, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84629,19 +58852,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x20]", + "ldr s2, [x8, #56]", + "add w20, w8, #0x4 (4)", + "str s2, [x20]", + "str w6, [x8, #56]", + "ldr w20, [x8, #56]", + "sxtw x20, w20", + "mrs x21, nzcv", + "cmp x20, #0x0 (0)", + "csel x23, x23, xzr, lt", + "cneg x20, x20, mi", + "mov x0, #0x3f", + "clz x24, x20", + "sub x24, x0, x24", + "sub x24, x25, x24", + "lsl x25, x20, x24", + "sub x24, x14, x24", + "cmp x20, #0x0 (0)", + "csel x20, x22, x24, eq", + "orr x20, x23, x20", + "fmov d2, x25", + "fmov d4, x20", + "mov v2.d[1], v4.d[0]", + "msr nzcv, x21", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84658,7 +58892,7 @@ "umov w2, v2.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -84672,16 +58906,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84708,66 +58933,362 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x4 (4)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str s2, [x20]", + "ldr s2, [x8, #56]", + "str s2, [x8]", + "mov w20, #0x3e2b", + "movk w20, #0x1, lsl #16", + "mov w21, #0xe52", + "movk w21, #0x41, lsl #16", + "add w21, w20, w21", + "str w20, [x8, #-4]!", "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "mov w23, #0x1", + "lsl w20, w23, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", + "ldr x0, [x28, #2280]", + "and x3, x21, #0xfffff", + "add x0, x0, x3, lsl #4", + "ldp x1, x0, [x0]" + ] + }, + "Block6": { + "ExpectedInstructionCount": 58, + "x86Insts": [ + "mov eax,dword [esp + 0x110]", + "fldz", + "mov ecx,dword [eax]", + "mov edx,dword [esp + 0x5c]", + "mov ebx,dword [edx + 0x18]", + "mov esi,dword [esp + 0x58]", + "mov dword [ebx + 0xc],ecx", + "mov edx,dword [eax + 0x4]", + "mov dword [ebx + 0x10],edx", + "mov eax,dword [eax + 0x8]", + "mov dword [ebx + 0x14],eax", + "mov ecx,dword [esi + 0x50]", + "push ecx", + "fstp dword [esp]", + "call 0x00784370", + "mov ecx,dword [esi + 0x50]", + "fstp dword [esp + 0x54]", + "fldz", + "push ecx", + "fstp dword [esp]", + "call 0x00784370", + "fstp dword [esp + 0x64]", + "mov eax,dword [esp + 0x11c]", + "lea ebp,[ebx + 0x1c]", + "mov esi,eax", + "mov ecx,0x9", + "mov edi,ebp", + "rep movsd", + "fld dword [eax + 0x4]", + "mov ecx,dword [esp + 0x120]", + "sub esp,0xc", + "fmul dword [ecx + 0x4]", + "fld dword [ecx]", + "fmul dword [eax]", + "faddp", + "fld dword [eax + 0x8]", + "fmul dword [ecx + 0x8]", + "faddp", + "fstp dword [esp + 0x28]", + "fld dword [eax + 0xc]", + "fmul dword [ecx]", + "fld dword [eax + 0x10]", + "fmul dword [ecx + 0x4]", + "faddp", + "fld dword [eax + 0x14]", + "fmul dword [ecx + 0x8]", + "faddp", + "fstp dword [esp + 0x44]", + "fld dword [eax + 0x18]", + "fmul dword [ecx]", + "fld dword [eax + 0x1c]", + "fmul dword [ecx + 0x4]", + "faddp", + "fld dword [eax + 0x20]", + "mov eax,esp", + "fmul dword [ecx + 0x8]", + "faddp", + "fstp dword [esp + 0x34]", + "fld dword [esp + 0x28]", + "fstp dword [esp + 0x48]", + "mov ecx,dword [esp + 0x48]", + "fld dword [esp + 0x44]", + "mov dword [eax],ecx", + "fstp dword [esp + 0x4c]", + "mov edx,dword [esp + 0x4c]", + "fld dword [esp + 0x34]", + "mov dword [eax + 0x4],edx", + "fstp dword [esp + 0x50]", + "mov ecx,dword [esp + 0x50]", + "fld dword [esp + 0x3c]", + "mov dword [eax + 0x8],ecx", + "push ecx", + "mov ecx,ebp", + "fstp dword [esp]", + "call 0x0078f050", + "fld dword [esp + 0x54]", + "sub esp,0x8", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x6c]", + "fadd dword [esp + 0x3c]", + "fstp dword [esp + 0x24]", + "fld dword [esp + 0x24]", + "mov ecx,ebp", + "fstp dword [esp]", + "call 0x0078ef60", + "fld dword [ebp + 0xc]", + "mov esi,dword [esp + 0x58]", + "fld dword [0x00b2b71c]", + "fld st0", + "fmulp st2", + "fld dword [ebp]", + "fld dword [0x00b2b718]", + "fld st0", + "fmulp st2", + "fxch st3", + "faddp", + "fld dword [ebp + 0x18]", + "fld dword [0x00b2b720]", + "fld st0", + "fmulp st2", + "fxch st2", + "faddp", + "fstp dword [esp + 0x1c]", + "fld dword [ebp + 0x10]", + "fmul st2", + "fld dword [ebp + 0x4]", + "fmul st4", + "faddp", + "fld dword [ebp + 0x1c]", + "fmul st2", + "faddp", + "fstp dword [esp + 0x38]", + "fld dword [ebp + 0x14]", + "fmulp st2", + "fld dword [ebp + 0x8]", + "fmulp st3", + "fxch", + "faddp st2,st0", + "fmul dword [ebp + 0x20]", + "faddp", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x1c]", + "fstp dword [esp + 0x3c]", + "mov edx,dword [esp + 0x3c]", + "fld dword [esp + 0x38]", + "mov dword [ebx],edx", + "fstp dword [esp + 0x40]", + "mov eax,dword [esp + 0x40]", + "fld dword [esp + 0x28]", + "mov dword [ebx + 0x4],eax", + "fstp dword [esp + 0x44]", + "mov ecx,dword [esp + 0x44]", + "fldz", + "mov dword [ebx + 0x8],ecx", + "mov ecx,dword [esi + 0x68]", + "push ecx", + "fstp dword [esp]", + "call 0x00784210", + "fmul dword [esp + 0x6c]", + "fstp dword [ebx + 0x18]", + "mov ecx,dword [esi + 0x5c]", + "fldz", + "push ecx", + "fstp dword [esp]", + "call 0x00784210", + "fmul dword [esp + 0x80]", + "push 0xb2b724", + "mov ecx,ebx", + "fstp dword [esp + 0x54]", + "call 0x0078fcc0", + "fmul qword [0x00a8ba48]", + "fstp dword [esp + 0x34]", + "fld dword [esp + 0x34]", + "fsubr qword [0x00a65a18]", + "fstp dword [esp + 0x1c]", + "fld dword [esp + 0x1c]", + "fabs", + "fstp dword [esp + 0x1c]", + "fld dword [esp + 0x1c]", + "fmul qword [0x00a8c698]", + "fld1", + "fsubrp", + "fstp dword [esp + 0x38]", + "fld dword [0x00b2b72c]", + "fld st0", + "fmul dword [ebx + 0x4]", + "fld dword [ebx + 0x8]", + "fld dword [0x00b2b728]", + "fld st0", + "fmulp st2", + "fxch st2", + "fsubrp", + "fstp dword [esp + 0x24]", + "fld dword [ebx + 0x8]", + "fld dword [0x00b2b724]", + "fld st0", + "fmulp st2", + "fld dword [ebx]", + "fmulp st4", + "fxch", + "fsubrp st3,st0", + "fxch st2", + "fstp dword [esp + 0x30]", + "fmul dword [ebx]", + "fld dword [ebx + 0x4]", + "fmulp st2", + "fsubrp", + "fstp dword [esp + 0x4c]", + "fld dword [esp + 0x30]", + "fld dword [esp + 0x24]", + "fld dword [esp + 0x4c]", + "fld st1", + "fmulp st2", + "fld st2", + "fmulp st3", + "fxch", + "faddp st2,st0", + "fmul st0", + "faddp", + "fstp dword [esp + 0x1c]", + "fld dword [esp + 0x1c]", + "call 0x00982c30", + "fstp dword [esp + 0x1c]", + "fld dword [esp + 0x1c]", + "mov ecx,dword [esi + 0x70]", + "fld1", + "push ecx", + "fdivrp", + "fstp dword [esp + 0x20]", + "fld dword [esp + 0x28]", + "fld dword [esp + 0x20]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x34]", + "fmul st1", + "fstp dword [esp + 0x44]", + "fmul dword [esp + 0x50]", + "fstp dword [esp + 0x48]", + "fldz", + "fstp dword [esp]", + "call 0x00784210", + "fsub qword [0x00a2faa0]", + "mov edx,dword [esp + 0x3c]", + "mov ecx,dword [esp + 0x40]", + "sub esp,0xc", + "fadd st0,st0", + "mov eax,esp", + "mov dword [eax],edx", + "fmul qword [0x00a3d360]", + "fstp dword [esp + 0x28]", + "fld1", + "fst dword [esp + 0xb8]", + "fldz", + "fst dword [esp + 0xbc]", + "fst dword [esp + 0xc0]", + "fst dword [esp + 0xc4]", + "fst dword [esp + 0xcc]", + "fst dword [esp + 0xd0]", + "fstp dword [esp + 0xd4]", + "fst dword [esp + 0xc8]", + "fstp dword [esp + 0xd8]", + "fld dword [esp + 0x28]", + "mov edx,dword [esp + 0x50]", + "fmul dword [esp + 0x90]", + "mov dword [eax + 0x4],ecx", + "push ecx", + "mov dword [eax + 0x8],edx", + "fmul dword [esp + 0x44]", + "lea ecx,[esp + 0xbc]", + "fmul dword [esp + 0x48]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x2c]", + "fstp dword [esp]", + "call 0x0078f160", + "lea eax,[esp + 0xac]", + "push eax", + "lea ecx,[esp + 0xd4]", + "push ecx", + "mov ecx,ebp", + "call 0x0078edd0", + "cmp dword [esp + 0x124],0x0", + "mov esi,eax", + "mov ecx,0x9", + "mov edi,ebp", + "rep movsd", + "fld dword [ebp + 0xc]", + "fld dword [0x00b2b71c]", + "fld st0", + "fmulp st2", + "fld dword [ebp]", + "fld dword [0x00b2b718]", + "fld st0", + "fmulp st2", + "fxch st3", + "faddp", + "fld dword [ebp + 0x18]", + "fld dword [0x00b2b720]", + "fld st0", + "fmulp st2", + "fxch st2", + "faddp", + "fstp dword [esp + 0x1c]", + "fld dword [ebp + 0x10]", + "fmul st2", + "fld dword [ebp + 0x4]", + "fmul st4", + "faddp", + "fld dword [ebp + 0x1c]", + "fmul st2", + "faddp", + "fstp dword [esp + 0x38]", + "fld dword [ebp + 0x14]", + "fmulp st2", + "fld dword [ebp + 0x8]", + "fmulp st3", + "fxch", + "faddp st2,st0", + "fmul dword [ebp + 0x20]", + "faddp", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x1c]", + "fstp dword [esp + 0x3c]", + "mov edx,dword [esp + 0x3c]", + "fld dword [esp + 0x38]", + "mov dword [ebx],edx", + "fstp dword [esp + 0x40]", + "mov eax,dword [esp + 0x40]", + "fld dword [esp + 0x28]", + "mov dword [ebx + 0x4],eax", + "mov eax,dword [esp + 0x10c]", + "fstp dword [esp + 0x44]", + "mov ecx,dword [esp + 0x44]", + "mov dword [ebx + 0x8],ecx" + ], + "ExpectedArm64ASM": [ + "ldr w4, [x8, #272]", + "movi v2.2d, #0x0", + "ldr w5, [x4]", + "ldr w6, [x8, #92]", + "ldr w7, [x6, #24]", + "ldr w10, [x8, #88]", + "str w5, [x7, #12]", + "ldr w6, [x4, #4]", + "str w6, [x7, #16]", + "ldr w4, [x4, #8]", + "str w4, [x7, #20]", + "ldr w5, [x10, #80]", + "str w5, [x8, #-4]!", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84794,14 +59315,247 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x8]", + "mov w20, #0x43c4", + "movk w20, #0x1, lsl #16", + "mov w21, #0x433f", + "movk w21, #0x78, lsl #16", + "add w21, w20, w21", + "str w20, [x8, #-4]!", "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #24]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "mov w23, #0x1", + "lsl w20, w23, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", + "ldr x0, [x28, #2280]", + "and x3, x21, #0xfffff", + "add x0, x0, x3, lsl #4", + "ldp x1, x0, [x0]" + ] + }, + "Block7": { + "ExpectedInstructionCount": 7397, + "x86Insts": [ + "fld dword [ecx + 0xc]", + "fld dword [ecx + 0x18]", + "fadd st0,st1", + "fstp dword [ecx + 0x18]", + "fld dword [ecx]", + "fadd st1,st0", + "fxch", + "fstp dword [ecx + 0xc]", + "fld dword [ecx + -0xc]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [ecx]", + "fld dword [ecx + -0x18]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [ecx + -0xc]", + "fld dword [ecx + -0x24]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x8]", + "fst dword [ecx + -0x18]", + "fld dword [ecx]", + "fld dword [ecx + 0x18]", + "fadd st0,st1", + "fstp dword [ecx + 0x18]", + "fadd st0,st1", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x8]", + "fst dword [ecx]", + "fld dword [ecx + -0xc]", + "fmul st6", + "fstp dword [esp + 0x4]", + "fld dword [ecx + 0xc]", + "fld st0", + "fmul st6", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x8]", + "fadd st0,st4", + "fstp dword [esp + 0x8]", + "fsubp st3,st0", + "fxch st2", + "fstp dword [esp + 0x3c]", + "fld dword [esp + 0x8]", + "fld dword [esp + 0x4]", + "fld st0", + "fadd st0,st2", + "fstp dword [esp + 0x38]", + "fsubp", + "fstp dword [esp + 0x40]", + "fxch", + "fmul st4", + "fstp dword [esp + 0x4]", + "fld dword [ecx + 0x18]", + "fld st0", + "fmul st4", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x8]", + "fadd st0,st2", + "fstp dword [esp + 0x8]", + "fsubp", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x8]", + "fld dword [esp + 0x4]", + "fld st0", + "fadd st0,st2", + "fstp dword [esp + 0x4c]", + "fsubp", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x8]", + "fmul qword [0x00a77be0]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x48]", + "fmul qword [0x00a77bd8]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x4c]", + "fmul qword [0x00a77bd0]", + "fstp dword [esp + 0x4c]", + "fld dword [esp + 0x38]", + "fst dword [esp + 0x8]", + "fld dword [esp + 0x4c]", + "fadd st1,st0", + "fxch", + "fstp dword [esp + 0x38]", + "fsubr dword [esp + 0x8]", + "fstp dword [esp + 0x4c]", + "fld dword [esp + 0x3c]", + "fst dword [esp + 0x8]", + "fld dword [esp + 0x48]", + "fadd st1,st0", + "fxch", + "fstp dword [esp + 0x3c]", + "fsubr dword [esp + 0x8]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x40]", + "fst dword [esp + 0x8]", + "fld dword [esp + 0x44]", + "fadd st1,st0", + "fxch", + "fstp dword [esp + 0x40]", + "fsubr dword [esp + 0x8]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x38]", + "fmul qword [0x00a77bc8]", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x3c]", + "fmul qword [0x00a77bc0]", + "fstp dword [esp + 0x3c]", + "fld dword [esp + 0x40]", + "fmul qword [0x00a77bb8]", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x44]", + "fmul qword [0x00a77bb0]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x48]", + "fmul qword [0x00a77ba8]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x4c]", + "fmul qword [0x00a77ba0]", + "fstp dword [esp + 0x4c]", + "fld dword [esp + 0x38]", + "fchs", + "fld st0", + "fmul st2", + "fstp dword [esp + 0x58]", + "fld qword [0x00a77b98]", + "fmul st1", + "fxch", + "fstp dword [esp + 0x5c]", + "fld dword [esp + 0x3c]", + "fchs", + "fld st0", + "fld qword [0x00a77b90]", + "fmul st1", + "fxch", + "fstp dword [esp + 0x54]", + "fxch", + "fmul qword [0x00a77b88]", + "fstp dword [esp + 0x60]", + "fld dword [esp + 0x40]", + "fchs", + "fld qword [0x00a77b80]", + "fmul st1", + "fstp dword [esp + 0x50]", + "fmul qword [0x00a77b78]", + "fstp dword [esp + 0x64]", + "fld dword [esp + 0x44]", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x48]", + "fld qword [0x00a77b88]", + "fmul st1", + "fstp dword [esp + 0x3c]", + "fld dword [esp + 0x4c]", + "fld st0", + "fmulp st4", + "fxch st3", + "fstp dword [esp + 0x40]", + "fxch st2", + "fchs", + "fmul st3", + "add eax,0x18", + "add ecx,0x4", + "sub edx,0x1", + "fstp dword [esp + 0x44]", + "fxch", + "fchs", + "fmulp", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x38]", + "fld st0", + "fchs", + "fmul qword [0x00a77b80]", + "fstp dword [esp + 0x4c]", + "fmul qword [0x00a77b78]", + "fstp dword [esp + 0x38]", + "fld dword [eax + -0x1c]", + "fadd dword [esp + 0x38]", + "fstp dword [eax + -0x1c]", + "fld dword [eax + -0x18]", + "fadd dword [esp + 0x3c]", + "fstp dword [eax + -0x18]", + "fld dword [esp + 0x40]", + "fadd dword [eax + -0x14]", + "fstp dword [eax + -0x14]", + "fld dword [eax + -0x10]", + "fadd dword [esp + 0x44]", + "fstp dword [eax + -0x10]", + "fld dword [eax + -0xc]", + "fadd dword [esp + 0x48]", + "fstp dword [eax + -0xc]", + "fld dword [eax + -0x8]", + "fadd dword [esp + 0x4c]", + "fstp dword [eax + -0x8]", + "fld dword [esp + 0x50]", + "fadd dword [eax + -0x4]", + "fstp dword [eax + -0x4]", + "fld dword [eax]", + "fadd dword [esp + 0x54]", + "fstp dword [eax]", + "fld dword [eax + 0x4]", + "fadd dword [esp + 0x58]", + "fstp dword [eax + 0x4]", + "fld dword [eax + 0x8]", + "fadd dword [esp + 0x5c]", + "fstp dword [eax + 0x8]", + "fld dword [esp + 0x60]", + "fadd dword [eax + 0xc]", + "fstp dword [eax + 0xc]", + "fld dword [eax + 0x10]", + "fadd dword [esp + 0x64]", + "fstp dword [eax + 0x10]" + ], + "ExpectedArm64ASM": [ + "ldr s2, [x5, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84829,67 +59583,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x4 (4)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s3, [x5, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84901,11 +59595,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -84915,15 +59608,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84935,10 +59622,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -84948,23 +59638,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84979,10 +59656,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -84992,14 +59667,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85011,11 +59681,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85025,20 +59694,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85055,7 +59713,7 @@ "umov w2, v2.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -85069,16 +59727,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]", + "add w21, w5, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85105,14 +59756,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "str s2, [x21]", + "mov x21, #0xfffffffffffffff4", + "ldr s2, [x5, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85140,15 +59786,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85160,10 +59797,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85173,35 +59813,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85216,10 +59831,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85229,14 +59842,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s3, s0", + "str s3, [x5]", + "mov x22, #0xffffffffffffffe8", + "ldr s3, [x5, w22, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85248,11 +59857,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85262,20 +59870,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85292,7 +59889,7 @@ "umov w2, v2.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -85306,16 +59903,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "sub w23, w5, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85342,14 +59931,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "str s2, [x23]", + "mov x23, #0xffffffffffffffdc", + "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85377,17 +59961,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7be0", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85399,10 +59972,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85412,11 +59988,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "mov w23, #0x8", + "add w24, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85431,10 +60008,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85444,14 +60019,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s3, s0", + "str s3, [x24]", + "ldr s3, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85463,11 +60033,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85477,15 +60046,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "sub w24, w5, #0x18 (24)", + "str s3, [x24]", + "ldr s3, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85497,7 +60063,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85510,20 +60076,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7bd8", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s5, [x5, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85535,9 +60091,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -85548,11 +60104,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85565,11 +60119,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -85580,14 +60134,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w24, w5, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85600,8 +60150,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -85613,15 +60163,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "fmov s5, s0", + "str s5, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85633,10 +60176,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85646,20 +60192,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7bd0", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w24, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85671,10 +60207,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85684,11 +60221,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s3, s0", + "str s3, [x24]", + "ldr s3, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85700,13 +60235,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85716,14 +60248,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "str s3, [x5]", + "ldr s3, [x5, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85735,11 +60264,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85749,15 +60277,41 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldrb w24, [x28, #1019]", + "sub w24, w24, #0x4 (4)", + "and w24, w24, #0x7", + "strb w24, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q3, [x0, #1040]", + "mov w25, #0x1", + "add w12, w24, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "str q5, [x0, #1040]", + "add w12, w24, #0x2 (2)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "str q4, [x0, #1040]", + "add w12, w24, #0x3 (3)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "sub w23, w23, w24", + "ldrb w24, [x28, #1298]", + "mov w12, #0xf0f", + "lsr w23, w12, w23", + "orr w23, w24, w23", + "strb w23, [x28, #1298]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x6 (6)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85769,10 +60323,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85785,15 +60342,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x4 (4)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85821,9 +60373,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x5, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85851,19 +60409,31 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w23, #0x6 (6)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85881,7 +60451,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -85895,22 +60465,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85938,13 +60496,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85973,7 +60532,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w23, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85987,11 +60559,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -86005,10 +60577,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86036,14 +60608,20 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w23, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86055,10 +60633,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86071,15 +60652,28 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w24, w8, #0x3c (60)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86107,9 +60701,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86137,20 +60737,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86162,13 +60758,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86181,23 +60774,32 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x12, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86210,10 +60812,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86223,15 +60827,14 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add w24, w8, #0x38 (56)", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86243,10 +60846,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86256,10 +60860,20 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "fmov s2, s0", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86273,10 +60887,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -86291,10 +60905,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add w24, w8, #0x40 (64)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86322,14 +60943,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w24, w23, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86341,10 +60979,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86357,15 +60998,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x4 (4)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86393,9 +61029,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x5, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86423,19 +61065,31 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w23, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86453,7 +61107,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -86467,22 +61121,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86510,13 +61152,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86545,7 +61188,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86559,11 +61215,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -86577,10 +61233,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86608,80 +61264,19 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7bc8", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86699,7 +61294,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -86713,10 +61308,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add w24, w8, #0x48 (72)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86744,14 +61346,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86779,17 +61382,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7bc0", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86801,9 +61403,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -86817,7 +61419,31 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86835,7 +61461,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -86849,10 +61475,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x4c (76)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86880,80 +61506,19 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7bb8", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86971,7 +61536,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -86985,10 +61550,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87016,14 +61588,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87051,17 +61624,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7bb0", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7be0", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87089,7 +61663,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87121,10 +61695,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x44 (68)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87152,13 +61726,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87187,17 +61762,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7ba8", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7bd8", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87225,7 +61801,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87257,10 +61833,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x48 (72)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87288,13 +61864,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87323,17 +61900,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7ba0", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7bd0", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87361,7 +61939,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87393,10 +61971,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x4c (76)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87424,13 +62002,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87459,40 +62038,87 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mov w12, #0x8000", - "fmov d3, x24", - "mov v3.d[1], x12", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x24]", + "ldr s2, [x8, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87510,7 +62136,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -87524,10 +62150,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w24, w8, #0x38 (56)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87555,16 +62190,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w13, #0x7b98", - "movk w13, #0xa7, lsl #16", - "ldr d2, [x13]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87576,9 +62210,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -87592,19 +62226,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87618,11 +62240,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -87636,22 +62258,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x4c (76)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87679,13 +62289,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87698,10 +62309,50 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87711,40 +62362,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x24", - "mov v3.d[1], x12", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w13, #0x7b90", - "movk w13, #0xa7, lsl #16", - "ldr d2, [x13]", + "fmov s2, s0", + "str s2, [x24]", + "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87756,9 +62376,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -87772,19 +62392,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87802,7 +62423,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -87816,22 +62437,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "strb w20, [x28, #1017]", + "add w24, w8, #0x3c (60)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87859,28 +62477,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w13, #0x7b88", - "movk w13, #0xa7, lsl #16", - "ldr d2, [x13]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87892,9 +62497,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -87908,7 +62513,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87922,11 +62527,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -87940,10 +62545,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x48 (72)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87971,13 +62576,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88006,25 +62612,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x24", - "mov v3.d[1], x12", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w14, #0x7b80", - "movk w14, #0xa7, lsl #16", - "ldr d2, [x14]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88036,9 +62635,37 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x24]", + "ldr s2, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -88052,19 +62679,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88082,7 +62710,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -88096,10 +62724,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w24, w8, #0x40 (64)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88127,16 +62764,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w15, #0x7b78", - "movk w15, #0xa7, lsl #16", - "ldr d2, [x15]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88148,9 +62784,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -88164,7 +62800,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88178,11 +62814,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -88196,10 +62832,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x44 (68)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88227,14 +62863,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88262,15 +62899,81 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7bc8", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add w24, w8, #0x38 (56)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88298,14 +63001,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88333,15 +63037,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x13]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7bc0", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88369,19 +63076,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88413,10 +63108,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x3c (60)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88444,14 +63139,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88479,31 +63175,46 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x4 (4)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7bb8", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88535,27 +63246,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x3 (3)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x40 (64)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88583,39 +63277,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x24", - "mov v3.d[1], x12", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x3 (3)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88627,13 +63297,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -88646,17 +63313,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "add w4, w4, #0x18 (24)", - "add w5, w5, #0x4 (4)", - "subs w26, w6, #0x1 (1)", - "cfinv", - "mov x27, x6", - "mov x6, x26", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7bb0", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88668,11 +63336,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1432]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -88682,39 +63349,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x24", - "mov v3.d[1], x12", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88746,15 +63384,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x44 (68)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88782,14 +63415,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88817,35 +63451,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x24", - "mov v3.d[1], x12", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x14]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7ba8", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88873,7 +63490,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88905,10 +63522,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x48 (72)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88936,14 +63553,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x15]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88955,9 +63573,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -88971,8 +63589,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7ba0", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88984,13 +63612,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1432]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -89003,11 +63628,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89020,10 +63642,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -89033,16 +63657,14 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xffffffffffffffe4", - "ldr s2, [x4, w24, sxtw]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add w24, w8, #0x4c (76)", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89054,10 +63676,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -89067,17 +63690,15 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "fmov s2, s0", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89106,7 +63727,39 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "mov w24, #0x8000", + "fmov d3, x20", + "mov v3.d[1], x24", + "eor v2.16b, v2.16b, v3.16b", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "add w12, w23, #0x2 (2)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89124,7 +63777,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89138,10 +63791,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w12, w8, #0x58 (88)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89169,14 +63822,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w24, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, w25, sxtw]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "mov w12, #0x7b98", + "movk w12, #0xa7, lsl #16", + "ldr d2, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89188,9 +63844,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89204,43 +63860,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "add w12, w23, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89258,7 +63891,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89272,10 +63905,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w12, w8, #0x5c (92)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89303,14 +63945,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w25, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89338,16 +63981,36 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xffffffffffffffec", - "ldr s2, [x4, w24, sxtw]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "fmov d3, x20", + "mov v3.d[1], x24", + "eor v2.16b, v2.16b, v3.16b", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "mov w12, #0x7b90", + "movk w12, #0xa7, lsl #16", + "ldr d2, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89359,9 +64022,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89375,7 +64038,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "add w12, w23, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89393,7 +64069,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89407,10 +64083,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w12, w8, #0x54 (84)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89438,51 +64123,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w24, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xfffffffffffffff0", - "ldr s2, [x4, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add w12, w23, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "strb w20, [x28, #1017]", + "mov w12, #0x7b88", + "movk w12, #0xa7, lsl #16", + "ldr d2, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89494,9 +64156,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89510,7 +64172,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89528,7 +64190,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89542,10 +64204,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w13, w8, #0x60 (96)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89573,14 +64235,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w24, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, w23, sxtw]", + "str s2, [x13]", + "ldrb w13, [x28, #1298]", + "lsl w14, w25, w23", + "bic w13, w13, w14", + "strb w13, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89608,15 +64271,25 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "ldrb w13, [x28, #1298]", + "lsl w14, w25, w23", + "orr w13, w13, w14", + "strb w13, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "fmov d3, x20", + "mov v3.d[1], x24", + "eor v2.16b, v2.16b, v3.16b", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "mov w13, #0x7b80", + "movk w13, #0xa7, lsl #16", + "ldr d2, [x13]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89628,9 +64301,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89644,7 +64317,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w14, [x28, #1298]", + "lsl w15, w25, w23", + "orr w14, w14, w15", + "strb w14, [x28, #1298]", + "add w14, w23, #0x1 (1)", + "and w14, w14, #0x7", + "add x0, x28, x14, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89662,7 +64348,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89676,10 +64362,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w14, w8, #0x50 (80)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89707,15 +64393,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w23, sxtw]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x23, #0xfffffffffffffff8", - "ldr s2, [x4, w23, sxtw]", + "str s2, [x14]", + "ldrb w14, [x28, #1298]", + "lsl w15, w25, w23", + "bic w14, w14, w15", + "strb w14, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "mov w14, #0x7b78", + "movk w14, #0xa7, lsl #16", + "ldr d2, [x14]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89727,9 +64415,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89743,15 +64431,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89763,10 +64444,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -89779,8 +64463,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add w15, w8, #0x64 (100)", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89793,12 +64480,44 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x15]", + "ldrb w15, [x28, #1298]", + "lsl w16, w25, w23", + "bic w15, w15, w16", + "strb w15, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -89811,10 +64530,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w15, [x28, #1298]", + "lsl w16, w25, w23", + "orr w15, w15, w16", + "strb w15, [x28, #1298]", + "add w15, w8, #0x38 (56)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89842,14 +64568,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w23, sxtw]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "str s2, [x15]", + "ldrb w15, [x28, #1298]", + "lsl w16, w25, w23", + "bic w15, w15, w16", + "strb w15, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89877,16 +64604,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov x23, #0xfffffffffffffffc", - "ldr s2, [x4, w23, sxtw]", + "ldrb w15, [x28, #1298]", + "lsl w16, w25, w23", + "orr w15, w15, w16", + "strb w15, [x28, #1298]", + "ldr d2, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89898,9 +64625,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89914,7 +64641,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "orr w12, w12, w15", + "strb w12, [x28, #1298]", + "add w12, w23, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89932,7 +64672,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89946,10 +64686,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w12, w8, #0x3c (60)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89977,14 +64717,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w23, sxtw]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "bic w12, w12, w15", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90012,43 +64753,31 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "orr w12, w12, w15", + "strb w12, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "orr w12, w12, w15", + "strb w12, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add w12, w23, #0x4 (4)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90066,7 +64795,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -90080,10 +64809,28 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "bic w12, w12, w15", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add w12, w23, #0x3 (3)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w12, w8, #0x40 (64)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90111,14 +64858,38 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "bic w12, w12, w15", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add w12, w23, #0x2 (2)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "fmov d3, x20", + "mov v3.d[1], x24", + "eor v2.16b, v2.16b, v3.16b", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add w12, w23, #0x3 (3)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90130,10 +64901,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -90146,15 +64920,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "add w4, w4, #0x18 (24)", + "add w5, w5, #0x4 (4)", + "subs w26, w6, #0x1 (1)", + "cfinv", + "mov x27, x6", + "mov x6, x26", + "add w12, w8, #0x44 (68)", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90166,10 +64942,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -90179,10 +64956,36 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "fmov s2, s0", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "bic w12, w12, w15", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add w12, w23, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "fmov d3, x20", + "mov v3.d[1], x24", + "eor v2.16b, v2.16b, v3.16b", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x12, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90200,7 +65003,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -90214,10 +65017,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "bic w12, w12, w15", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add w12, w8, #0x48 (72)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90245,14 +65055,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "bic w12, w12, w15", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90280,15 +65091,34 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "orr w12, w12, w15", + "strb w12, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "orr w12, w12, w15", + "strb w12, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "fmov d3, x20", + "mov v3.d[1], x24", + "eor v2.16b, v2.16b, v3.16b", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldr d2, [x13]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90300,9 +65130,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -90316,7 +65146,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90334,7 +65164,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -90348,10 +65178,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w20, w8, #0x4c (76)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90379,50 +65209,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", + "str s2, [x20]", + "ldrb w20, [x28, #1298]", + "lsl w24, w25, w23", + "bic w20, w20, w24", + "strb w20, [x28, #1298]", + "add w20, w23, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr d2, [x14]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90434,9 +65229,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -90468,7 +65263,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -90484,7 +65279,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x38 (56)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90513,14 +65308,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", + "lsl w24, w25, w20", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "mov x23, #0xffffffffffffffe4", + "ldr s2, [x4, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90550,13 +65347,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "ldrb w23, [x28, #1298]", + "lsl w24, w25, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", + "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90618,7 +65416,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w23, w4, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90647,255 +65445,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #16]", - "lsl w21, w21, w20", - "bic w21, w22, w21", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", + "lsl w24, w25, w20", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" - ] - }, - "Block8": { - "ExpectedInstructionCount": 8284, - "x86Insts": [ - "movzx eax,word [esi + edx*0x8]", - "fld dword [esi + edx*0x8 + 0x4]", - "fstp dword [esp + 0x24]", - "mov esi,dword [esp + 0x1c8]", - "fld dword [esp + 0x9c]", - "movzx eax,ax", - "mov ecx,eax", - "imul ecx,dword [esp + 0x1e4]", - "lea eax,[eax + eax*0x2]", - "add eax,eax", - "add eax,eax", - "lea edi,[eax + esi*0x1 + 0x8]", - "mov dword [esp + 0x10],edi", - "fmul dword [eax + esi*0x1 + 0x4]", - "fld dword [esp + 0x98]", - "fmul dword [eax + esi*0x1]", - "faddp", - "fld dword [esp + 0xa0]", - "fmul dword [edi]", - "faddp", - "fadd dword [esp + 0x88]", - "fstp dword [esp + 0xd0]", - "fld dword [esp + 0xa8]", - "fmul dword [eax + esi*0x1 + 0x4]", - "fld dword [esp + 0xa4]", - "fmul dword [eax + esi*0x1]", - "faddp", - "fld dword [esp + 0xac]", - "fmul dword [edi]", - "faddp", - "fadd dword [esp + 0x8c]", - "fstp dword [esp + 0xd4]", - "fld dword [esp + 0xb4]", - "fmul dword [eax + esi*0x1 + 0x4]", - "fld dword [esp + 0xb0]", - "fmul dword [eax + esi*0x1]", - "mov esi,edi", - "faddp", - "fld dword [esp + 0xb8]", - "fmul dword [esi]", - "mov esi,dword [esp + 0x38]", - "lea edi,[esi + eax*0x1 + 0x8]", - "mov dword [esp + 0x10],edi", - "faddp", - "fadd dword [esp + 0x90]", - "fstp dword [esp + 0xd8]", - "fld dword [esp + 0x64]", - "fld st0", - "fmul dword [eax + ebx*0x1]", - "fld dword [esp + 0x68]", - "fld st0", - "fmul dword [eax + ebx*0x1 + 0x4]", - "faddp st2,st0", - "fld dword [esp + 0x6c]", - "fld st0", - "fmul dword [eax + ebx*0x1 + 0x8]", - "faddp st3,st0", - "fxch st2", - "fstp dword [esp + 0xe8]", - "fld dword [esp + 0x70]", - "fld st0", - "fmul dword [eax + ebx*0x1]", - "fld dword [esp + 0x74]", - "fld st0", - "fmul dword [eax + ebx*0x1 + 0x4]", - "faddp st2,st0", - "fld dword [esp + 0x78]", - "fmul dword [eax + ebx*0x1 + 0x8]", - "faddp st2,st0", - "fxch", - "fstp dword [esp + 0xec]", - "fld dword [esp + 0x7c]", - "fmul dword [eax + ebx*0x1]", - "fld dword [esp + 0x80]", - "fmul dword [eax + ebx*0x1 + 0x4]", - "faddp", - "fld dword [esp + 0x84]", - "fmul dword [eax + ebx*0x1 + 0x8]", - "faddp", - "fstp dword [esp + 0xf0]", - "fld st2", - "fmul dword [esi + eax*0x1 + 0x4]", - "fld st5", - "fmul dword [esi + eax*0x1]", - "faddp", - "fld st4", - "fmul dword [edi]", - "faddp", - "fstp dword [esp + 0x58]", - "fld st0", - "fmul dword [esi + eax*0x1 + 0x4]", - "fld st2", - "fmul dword [esi + eax*0x1]", - "faddp", - "fld dword [esp + 0x78]", - "fmul dword [edi]", - "faddp", - "fstp dword [esp + 0x5c]", - "fld dword [esp + 0x80]", - "fmul dword [esi + eax*0x1 + 0x4]", - "fld dword [esp + 0x7c]", - "fmul dword [esi + eax*0x1]", - "mov esi,edi", - "faddp", - "fld dword [esp + 0x84]", - "fmul dword [esi]", - "mov esi,dword [esp + 0x20]", - "lea edi,[esi + eax*0x1 + 0x4]", - "mov dword [esp + 0x10],edi", - "faddp", - "lea edi,[esi + eax*0x1 + 0x8]", - "mov dword [esp + 0xbc],edi", - "mov edi,dword [esp + 0x10]", - "fstp dword [esp + 0x60]", - "fld dword [esi + eax*0x1]", - "fmulp st5", - "fld dword [edi]", - "mov edi,dword [esp + 0xbc]", - "fmulp st3", - "fxch st4", - "faddp st2,st0", - "fld dword [edi]", - "mov edi,dword [esp + 0x10]", - "fmulp st3", - "fxch", - "faddp st2,st0", - "fxch", - "fstp dword [esp + 0x4c]", - "fmul dword [esi + eax*0x1]", - "fld dword [edi]", - "mov edi,dword [esp + 0xbc]", - "fmulp st2", - "faddp", - "fld dword [esp + 0x78]", - "fmul dword [edi]", - "faddp", - "fstp dword [esp + 0x50]", - "fld dword [esp + 0x7c]", - "fmul dword [esi + eax*0x1]", - "mov eax,dword [esp + 0x10]", - "fld dword [esp + 0x80]", - "fmul dword [eax]", - "mov eax,dword [esp + 0x1d4]", - "faddp", - "fld dword [esp + 0x84]", - "fmul dword [edi]", - "faddp", - "fstp dword [esp + 0x54]", - "fld dword [esp + 0xd0]", - "fld dword [esp + 0x24]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0xc0]", - "fld dword [esp + 0xd4]", - "fmul st1", - "fstp dword [esp + 0xc4]", - "fld dword [esp + 0xd8]", - "fmul st1", - "fstp dword [esp + 0xc8]", - "fld dword [esp + 0xc0]", - "fadd dword [ecx + eax*0x1]", - "fstp dword [ecx + eax*0x1]", - "add edx,0x1", - "cmp edx,dword [esp + 0x1c]", - "fld dword [esp + 0xc4]", - "fadd dword [ecx + eax*0x1 + 0x4]", - "fstp dword [ecx + eax*0x1 + 0x4]", - "lea eax,[ecx + eax*0x1 + 0x8]", - "fld dword [eax]", - "fadd dword [esp + 0xc8]", - "fstp dword [eax]", - "mov eax,dword [esp + 0x1dc]", - "fld dword [esp + 0xe8]", - "fmul st1", - "fstp dword [esp + 0xdc]", - "fld dword [esp + 0xec]", - "fmul st1", - "fstp dword [esp + 0xe0]", - "fld dword [esp + 0xf0]", - "fmul st1", - "fstp dword [esp + 0xe4]", - "fld dword [esp + 0xdc]", - "fadd dword [ecx + ebp*0x1]", - "fstp dword [ecx + ebp*0x1]", - "fld dword [esp + 0xe0]", - "fadd dword [ecx + ebp*0x1 + 0x4]", - "fstp dword [ecx + ebp*0x1 + 0x4]", - "fld dword [esp + 0xe4]", - "fadd dword [ecx + ebp*0x1 + 0x8]", - "fstp dword [ecx + ebp*0x1 + 0x8]", - "fld dword [esp + 0x58]", - "fmul st1", - "fstp dword [esp + 0x3c]", - "fld dword [esp + 0x5c]", - "fmul st1", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x60]", - "fmul st1", - "fstp dword [esp + 0x44]", - "fld dword [ecx + eax*0x1]", - "fadd dword [esp + 0x3c]", - "fstp dword [ecx + eax*0x1]", - "fld dword [esp + 0x40]", - "fadd dword [ecx + eax*0x1 + 0x4]", - "fstp dword [ecx + eax*0x1 + 0x4]", - "lea eax,[ecx + eax*0x1 + 0x8]", - "fld dword [esp + 0x44]", - "fadd dword [eax]", - "fstp dword [eax]", - "mov eax,dword [esp + 0x1e0]", - "fld dword [esp + 0x4c]", - "fmul st1", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x50]", - "fmul st1", - "fstp dword [esp + 0x30]", - "fmul dword [esp + 0x54]", - "fstp dword [esp + 0x34]", - "fld dword [ecx + eax*0x1]", - "fadd dword [esp + 0x2c]", - "fstp dword [ecx + eax*0x1]", - "fld dword [esp + 0x30]", - "fadd dword [ecx + eax*0x1 + 0x4]", - "fstp dword [ecx + eax*0x1 + 0x4]", - "lea ecx,[ecx + eax*0x1 + 0x8]", - "fld dword [esp + 0x34]", - "fadd dword [ecx]", - "fstp dword [ecx]" - ], - "ExpectedArm64ASM": [ - "add w20, w10, w6, lsl #3", - "ldrh w4, [x20]", - "ldrb w20, [x28, #1019]", - "add w21, w10, #0x4 (4)", - "add w21, w21, w6, lsl #3", - "ldr s2, [x21]", + "ldr s2, [x4, w22, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90923,53 +65481,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w10, [x8, #456]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #156]", + "ldrb w22, [x28, #1298]", + "lsl w23, w25, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90997,28 +65518,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "uxth w4, w4", - "mov x5, x4", - "ldr w20, [x8, #484]", - "mul w5, w5, w20", - "mov w20, #0x0", - "add w4, w4, w4, lsl #1", - "add w4, w4, w4", - "add w4, w4, w4", - "add w23, w4, #0x8 (8)", - "add w11, w23, w10", - "str w11, [x8, #16]", - "ldrb w23, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w10", - "ldr s2, [x24]", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91030,10 +65531,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -91046,8 +65550,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "sub w22, w4, #0x18 (24)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91060,12 +65567,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -91075,13 +65580,16 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #152]", + "fmov s2, s0", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w25, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91109,16 +65617,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w4, w10", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w23, w25, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "mov x22, #0xffffffffffffffec", + "ldr s2, [x4, w22, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91146,7 +65655,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91164,7 +65673,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -91178,15 +65687,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "sub w22, w4, #0x14 (20)", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91199,12 +65704,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -91214,18 +65717,17 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #160]", + "fmov s2, s0", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w25, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "mov x22, #0xfffffffffffffff0", + "ldr s2, [x4, w22, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91253,15 +65755,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x11]", + "ldrb w22, [x28, #1298]", + "lsl w23, w25, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91289,7 +65792,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91307,7 +65810,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -91321,15 +65824,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "sub w22, w4, #0x10 (16)", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91342,12 +65841,44 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w25, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x4, w21, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -91360,15 +65891,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #136]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91396,7 +65928,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91428,10 +65960,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "sub w21, w4, #0xc (12)", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91459,14 +65991,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #208]", - "lsl w24, w21, w23", - "bic w22, w22, w24", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #168]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "mov x21, #0xfffffffffffffff8", + "ldr s2, [x4, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91494,17 +66028,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w10", - "ldr s2, [x24]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91532,7 +66065,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91550,7 +66083,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -91564,10 +66097,46 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #164]", + "sub w21, w4, #0x8 (8)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91594,17 +66163,18 @@ "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w4, w10", - "ldr s2, [x24]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", + "mov x21, #0xfffffffffffffffc", + "ldr s2, [x4, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91632,7 +66202,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91650,7 +66220,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -91664,15 +66234,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "sub w21, w4, #0x4 (4)", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91685,12 +66251,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -91700,18 +66264,16 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #172]", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91739,15 +66301,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x11]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91775,7 +66338,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91793,7 +66356,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -91807,15 +66370,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91828,12 +66386,44 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x4]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -91846,15 +66436,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #140]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91882,7 +66473,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91914,10 +66505,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add w21, w4, #0x4 (4)", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91945,14 +66536,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #212]", - "lsl w24, w21, w23", - "bic w22, w22, w24", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #180]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91980,17 +66572,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w10", - "ldr s2, [x24]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92018,7 +66609,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92036,7 +66627,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -92050,10 +66641,46 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #176]", + "add w21, w4, #0x8 (8)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92081,16 +66708,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w4, w10", - "ldr s2, [x24]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", + "ldr s2, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92118,7 +66745,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92136,7 +66763,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -92150,16 +66777,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "mov x10, x11", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w21, w4, #0xc (12)", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92172,12 +66794,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -92187,18 +66807,16 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #184]", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92226,15 +66844,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x10]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92262,7 +66881,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92280,7 +66899,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -92294,19 +66913,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldr w10, [x8, #56]", - "add w23, w10, #0x8 (8)", - "add w11, w23, w4", - "str w11, [x8, #16]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w21, w4, #0x10 (16)", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92319,12 +66930,288 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" + ] + }, + "Block8": { + "ExpectedInstructionCount": 6591, + "x86Insts": [ + "movzx eax,word [esi + edx*0x8]", + "fld dword [esi + edx*0x8 + 0x4]", + "fstp dword [esp + 0x24]", + "mov esi,dword [esp + 0x1c8]", + "fld dword [esp + 0x9c]", + "movzx eax,ax", + "mov ecx,eax", + "imul ecx,dword [esp + 0x1e4]", + "lea eax,[eax + eax*0x2]", + "add eax,eax", + "add eax,eax", + "lea edi,[eax + esi*0x1 + 0x8]", + "mov dword [esp + 0x10],edi", + "fmul dword [eax + esi*0x1 + 0x4]", + "fld dword [esp + 0x98]", + "fmul dword [eax + esi*0x1]", + "faddp", + "fld dword [esp + 0xa0]", + "fmul dword [edi]", + "faddp", + "fadd dword [esp + 0x88]", + "fstp dword [esp + 0xd0]", + "fld dword [esp + 0xa8]", + "fmul dword [eax + esi*0x1 + 0x4]", + "fld dword [esp + 0xa4]", + "fmul dword [eax + esi*0x1]", + "faddp", + "fld dword [esp + 0xac]", + "fmul dword [edi]", + "faddp", + "fadd dword [esp + 0x8c]", + "fstp dword [esp + 0xd4]", + "fld dword [esp + 0xb4]", + "fmul dword [eax + esi*0x1 + 0x4]", + "fld dword [esp + 0xb0]", + "fmul dword [eax + esi*0x1]", + "mov esi,edi", + "faddp", + "fld dword [esp + 0xb8]", + "fmul dword [esi]", + "mov esi,dword [esp + 0x38]", + "lea edi,[esi + eax*0x1 + 0x8]", + "mov dword [esp + 0x10],edi", + "faddp", + "fadd dword [esp + 0x90]", + "fstp dword [esp + 0xd8]", + "fld dword [esp + 0x64]", + "fld st0", + "fmul dword [eax + ebx*0x1]", + "fld dword [esp + 0x68]", + "fld st0", + "fmul dword [eax + ebx*0x1 + 0x4]", + "faddp st2,st0", + "fld dword [esp + 0x6c]", + "fld st0", + "fmul dword [eax + ebx*0x1 + 0x8]", + "faddp st3,st0", + "fxch st2", + "fstp dword [esp + 0xe8]", + "fld dword [esp + 0x70]", + "fld st0", + "fmul dword [eax + ebx*0x1]", + "fld dword [esp + 0x74]", + "fld st0", + "fmul dword [eax + ebx*0x1 + 0x4]", + "faddp st2,st0", + "fld dword [esp + 0x78]", + "fmul dword [eax + ebx*0x1 + 0x8]", + "faddp st2,st0", + "fxch", + "fstp dword [esp + 0xec]", + "fld dword [esp + 0x7c]", + "fmul dword [eax + ebx*0x1]", + "fld dword [esp + 0x80]", + "fmul dword [eax + ebx*0x1 + 0x4]", + "faddp", + "fld dword [esp + 0x84]", + "fmul dword [eax + ebx*0x1 + 0x8]", + "faddp", + "fstp dword [esp + 0xf0]", + "fld st2", + "fmul dword [esi + eax*0x1 + 0x4]", + "fld st5", + "fmul dword [esi + eax*0x1]", + "faddp", + "fld st4", + "fmul dword [edi]", + "faddp", + "fstp dword [esp + 0x58]", + "fld st0", + "fmul dword [esi + eax*0x1 + 0x4]", + "fld st2", + "fmul dword [esi + eax*0x1]", + "faddp", + "fld dword [esp + 0x78]", + "fmul dword [edi]", + "faddp", + "fstp dword [esp + 0x5c]", + "fld dword [esp + 0x80]", + "fmul dword [esi + eax*0x1 + 0x4]", + "fld dword [esp + 0x7c]", + "fmul dword [esi + eax*0x1]", + "mov esi,edi", + "faddp", + "fld dword [esp + 0x84]", + "fmul dword [esi]", + "mov esi,dword [esp + 0x20]", + "lea edi,[esi + eax*0x1 + 0x4]", + "mov dword [esp + 0x10],edi", + "faddp", + "lea edi,[esi + eax*0x1 + 0x8]", + "mov dword [esp + 0xbc],edi", + "mov edi,dword [esp + 0x10]", + "fstp dword [esp + 0x60]", + "fld dword [esi + eax*0x1]", + "fmulp st5", + "fld dword [edi]", + "mov edi,dword [esp + 0xbc]", + "fmulp st3", + "fxch st4", + "faddp st2,st0", + "fld dword [edi]", + "mov edi,dword [esp + 0x10]", + "fmulp st3", + "fxch", + "faddp st2,st0", + "fxch", + "fstp dword [esp + 0x4c]", + "fmul dword [esi + eax*0x1]", + "fld dword [edi]", + "mov edi,dword [esp + 0xbc]", + "fmulp st2", + "faddp", + "fld dword [esp + 0x78]", + "fmul dword [edi]", + "faddp", + "fstp dword [esp + 0x50]", + "fld dword [esp + 0x7c]", + "fmul dword [esi + eax*0x1]", + "mov eax,dword [esp + 0x10]", + "fld dword [esp + 0x80]", + "fmul dword [eax]", + "mov eax,dword [esp + 0x1d4]", + "faddp", + "fld dword [esp + 0x84]", + "fmul dword [edi]", + "faddp", + "fstp dword [esp + 0x54]", + "fld dword [esp + 0xd0]", + "fld dword [esp + 0x24]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0xc0]", + "fld dword [esp + 0xd4]", + "fmul st1", + "fstp dword [esp + 0xc4]", + "fld dword [esp + 0xd8]", + "fmul st1", + "fstp dword [esp + 0xc8]", + "fld dword [esp + 0xc0]", + "fadd dword [ecx + eax*0x1]", + "fstp dword [ecx + eax*0x1]", + "add edx,0x1", + "cmp edx,dword [esp + 0x1c]", + "fld dword [esp + 0xc4]", + "fadd dword [ecx + eax*0x1 + 0x4]", + "fstp dword [ecx + eax*0x1 + 0x4]", + "lea eax,[ecx + eax*0x1 + 0x8]", + "fld dword [eax]", + "fadd dword [esp + 0xc8]", + "fstp dword [eax]", + "mov eax,dword [esp + 0x1dc]", + "fld dword [esp + 0xe8]", + "fmul st1", + "fstp dword [esp + 0xdc]", + "fld dword [esp + 0xec]", + "fmul st1", + "fstp dword [esp + 0xe0]", + "fld dword [esp + 0xf0]", + "fmul st1", + "fstp dword [esp + 0xe4]", + "fld dword [esp + 0xdc]", + "fadd dword [ecx + ebp*0x1]", + "fstp dword [ecx + ebp*0x1]", + "fld dword [esp + 0xe0]", + "fadd dword [ecx + ebp*0x1 + 0x4]", + "fstp dword [ecx + ebp*0x1 + 0x4]", + "fld dword [esp + 0xe4]", + "fadd dword [ecx + ebp*0x1 + 0x8]", + "fstp dword [ecx + ebp*0x1 + 0x8]", + "fld dword [esp + 0x58]", + "fmul st1", + "fstp dword [esp + 0x3c]", + "fld dword [esp + 0x5c]", + "fmul st1", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x60]", + "fmul st1", + "fstp dword [esp + 0x44]", + "fld dword [ecx + eax*0x1]", + "fadd dword [esp + 0x3c]", + "fstp dword [ecx + eax*0x1]", + "fld dword [esp + 0x40]", + "fadd dword [ecx + eax*0x1 + 0x4]", + "fstp dword [ecx + eax*0x1 + 0x4]", + "lea eax,[ecx + eax*0x1 + 0x8]", + "fld dword [esp + 0x44]", + "fadd dword [eax]", + "fstp dword [eax]", + "mov eax,dword [esp + 0x1e0]", + "fld dword [esp + 0x4c]", + "fmul st1", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x50]", + "fmul st1", + "fstp dword [esp + 0x30]", + "fmul dword [esp + 0x54]", + "fstp dword [esp + 0x34]", + "fld dword [ecx + eax*0x1]", + "fadd dword [esp + 0x2c]", + "fstp dword [ecx + eax*0x1]", + "fld dword [esp + 0x30]", + "fadd dword [ecx + eax*0x1 + 0x4]", + "fstp dword [ecx + eax*0x1 + 0x4]", + "lea ecx,[ecx + eax*0x1 + 0x8]", + "fld dword [esp + 0x34]", + "fadd dword [ecx]", + "fstp dword [ecx]" + ], + "ExpectedArm64ASM": [ + "add w20, w10, w6, lsl #3", + "ldrh w4, [x20]", + "add w20, w10, #0x4 (4)", + "add w20, w20, w6, lsl #3", + "ldr s2, [x20]", + "add w20, w8, #0x24 (36)", + "str s2, [x20]", + "ldr w10, [x8, #456]", + "ldr s2, [x8, #156]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -92337,15 +67224,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #144]", + "uxth w4, w4", + "mov x5, x4", + "ldr w20, [x8, #484]", + "mul w5, w5, w20", + "mov w20, #0x0", + "add w4, w4, w4, lsl #1", + "add w4, w4, w4", + "add w4, w4, w4", + "add w21, w4, #0x8 (8)", + "add w11, w21, w10", + "str w11, [x8, #16]", + "add w21, w4, #0x4 (4)", + "add w21, w21, w10", + "ldr s3, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92357,7 +67249,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92370,11 +67262,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92387,11 +67277,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -92405,45 +67295,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #216]", - "lsl w24, w21, w23", - "bic w22, w22, w24", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #100]", + "ldr s3, [x8, #152]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92455,7 +67307,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92468,31 +67320,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w4, w7", - "ldr s2, [x24]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, w10", + "ldr s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92504,7 +67336,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92517,11 +67349,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92536,8 +67366,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -92549,13 +67379,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #104]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92567,10 +67393,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -92583,29 +67412,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w7", - "ldr s2, [x24]", + "ldr s3, [x8, #160]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92617,7 +67424,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92630,11 +67437,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92646,13 +67452,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -92662,18 +67465,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92688,9 +67482,9 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -92701,18 +67495,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #108]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92724,10 +67509,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -92740,29 +67528,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w4, #0x8 (8)", - "add w24, w24, w7", - "ldr s2, [x24]", + "ldr s3, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92774,7 +67540,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92787,50 +67553,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92843,10 +67568,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -92861,28 +67586,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w20, [x28, #1017]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xd0 (208)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92909,14 +67613,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #232]", - "lsl w24, w21, w23", - "bic w22, w22, w24", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #112]", + "str s2, [x21]", + "ldr s2, [x8, #168]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92944,28 +67642,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w4, w7", - "ldr s2, [x24]", + "add w21, w4, #0x4 (4)", + "add w21, w21, w10", + "ldr s3, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92977,7 +67656,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92990,11 +67669,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93007,10 +67684,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -93025,10 +67702,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #116]", + "ldr s3, [x8, #164]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93040,7 +67714,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93053,32 +67727,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w7", - "ldr s2, [x24]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, w10", + "ldr s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93090,7 +67743,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93103,11 +67756,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93122,8 +67773,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -93135,18 +67786,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93159,10 +67801,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -93177,15 +67819,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #120]", + "ldr s3, [x8, #172]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93197,7 +67831,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93210,20 +67844,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w4, #0x8 (8)", - "add w24, w24, w7", - "ldr s2, [x24]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93235,7 +67859,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93248,11 +67872,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93267,8 +67889,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -93280,70 +67902,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w20, [x28, #1017]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93358,41 +67919,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #236]", - "lsl w24, w21, w23", - "bic w22, w22, w24", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -93403,18 +67933,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w4, w7", - "ldr s2, [x24]", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93426,7 +67947,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93439,11 +67960,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93456,11 +67975,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -93474,10 +67993,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #128]", + "add w21, w8, #0xd4 (212)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93489,10 +68005,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -93502,20 +68019,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w7", - "ldr s2, [x24]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #180]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93543,8 +68049,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "add w21, w4, #0x4 (4)", + "add w21, w21, w10", + "ldr s3, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93556,13 +68063,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -93572,18 +68076,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93596,11 +68091,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -93614,15 +68109,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #132]", + "ldr s3, [x8, #176]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93634,7 +68121,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93647,20 +68134,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w4, #0x8 (8)", - "add w24, w24, w7", - "ldr s2, [x24]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, w10", + "ldr s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93672,7 +68150,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93685,11 +68163,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93704,8 +68180,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -93717,18 +68193,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov x10, x11", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93741,10 +68209,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -93759,16 +68227,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s3, [x8, #184]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93780,11 +68239,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -93794,29 +68252,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #240]", - "lsl w24, w21, w23", - "bic w22, w22, w24", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w10, #0x4 (4)", - "add w24, w24, w4", - "ldr s2, [x24]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93828,7 +68267,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93841,11 +68280,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93860,8 +68297,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -93873,26 +68310,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w10, w4", - "ldr s2, [x24]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w10, [x8, #56]", + "add w21, w10, #0x8 (8)", + "add w11, w21, w4", + "str w11, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93904,10 +68328,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -93920,8 +68347,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #144]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93933,13 +68359,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -93949,18 +68372,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93973,10 +68387,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -93991,27 +68405,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x11]", + "add w21, w8, #0xd8 (216)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94023,10 +68417,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94036,11 +68431,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94052,13 +68445,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94071,15 +68461,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "add w21, w4, w7", + "ldr s3, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94091,13 +68474,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94107,19 +68487,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94134,8 +68504,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94145,29 +68517,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w24, w21, w23", - "bic w22, w22, w24", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w10, #0x4 (4)", - "add w24, w24, w4", - "ldr s2, [x24]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94179,7 +68532,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -94192,58 +68545,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w10, w4", - "ldr s2, [x24]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0x4 (4)", + "add w21, w21, w7", + "ldr s5, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94255,7 +68562,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -94268,11 +68575,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94285,10 +68590,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -94300,18 +68605,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94326,8 +68622,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -94339,18 +68635,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #120]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s5, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94362,7 +68650,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -94375,18 +68663,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x11]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w4, #0x8 (8)", + "add w21, w21, w7", + "ldr s6, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94398,7 +68680,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -94411,11 +68693,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94428,10 +68708,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -94443,18 +68723,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94469,8 +68740,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -94482,19 +68753,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0xe8 (232)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94507,8 +68770,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -94520,15 +68783,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w24, w21, w23", - "bic w22, w22, w24", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #128]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94540,7 +68797,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -94553,20 +68810,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w10, #0x4 (4)", - "add w24, w24, w4", - "ldr s2, [x24]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, w7", + "ldr s6, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94578,7 +68826,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -94591,11 +68839,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94610,8 +68856,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -94623,13 +68869,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94641,7 +68884,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -94654,19 +68897,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w10, w4", - "ldr s2, [x24]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w4, #0x4 (4)", + "add w21, w21, w7", + "ldr s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94678,7 +68914,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -94691,11 +68927,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94708,10 +68942,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -94723,19 +68957,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "mov x10, x11", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94748,10 +68972,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -94762,19 +68986,11 @@ "ld1 {v2.2d, v3.2d}, [sp], #32", "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #132]", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94786,7 +69002,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -94799,18 +69015,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x10]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w4, #0x8 (8)", + "add w21, w21, w7", + "ldr s9, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94822,7 +69032,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -94835,11 +69045,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94852,10 +69060,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -94867,22 +69075,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldr w10, [x8, #32]", - "add w23, w10, #0x4 (4)", - "add w11, w23, w4", - "str w11, [x8, #16]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94895,10 +69090,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -94910,23 +69105,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "add w23, w10, #0x8 (8)", - "add w11, w23, w4", - "str w11, [x8, #188]", - "ldr w11, [x8, #16]", - "ldrb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0xec (236)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94939,8 +69122,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -94952,16 +69135,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w24, w21, w23", - "bic w22, w22, w24", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "ldrb w23, [x28, #1019]", - "add w24, w10, w4", - "ldr s2, [x24]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94973,7 +69149,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -94986,23 +69162,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w4, w7", + "ldr s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95014,13 +69178,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95030,18 +69191,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x11]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95053,10 +69205,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95066,24 +69221,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldr w11, [x8, #188]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95095,13 +69236,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95111,35 +69249,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w20, [x28, #1017]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w4, #0x4 (4)", + "add w21, w21, w7", + "ldr s9, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95151,13 +69266,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95167,18 +69279,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x11]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95190,10 +69293,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95203,24 +69309,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldr w11, [x8, #16]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95233,11 +69324,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -95248,35 +69339,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w20, [x28, #1017]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95288,13 +69354,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95304,31 +69367,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w20, [x28, #1017]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w4, #0x8 (8)", + "add w21, w21, w7", + "ldr s9, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95340,11 +69384,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95354,16 +69397,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w24, w21, w23", - "bic w22, w22, w24", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "ldrb w23, [x28, #1019]", - "add w24, w10, w4", - "ldr s2, [x24]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95375,10 +69411,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95388,11 +69427,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95405,11 +69442,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -95420,13 +69457,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x11]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0xf0 (240)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95438,10 +69472,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95451,24 +69486,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldr w11, [x8, #188]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x21]", + "add w21, w10, #0x4 (4)", + "add w21, w21, w4", + "ldr s6, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95480,13 +69502,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95496,23 +69515,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95525,11 +69530,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -95540,18 +69545,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #120]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w10, w4", + "ldr s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95563,7 +69561,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -95576,18 +69574,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x11]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95599,10 +69588,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95612,11 +69604,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95629,11 +69619,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -95644,18 +69634,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95667,13 +69649,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95683,19 +69662,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95708,10 +69677,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95721,15 +69692,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w24, w21, w23", - "bic w22, w22, w24", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95741,10 +69706,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95754,19 +69722,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w10, w4", - "ldr s2, [x24]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95778,10 +69737,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95791,11 +69751,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x21]", + "add w21, w10, #0x4 (4)", + "add w21, w21, w4", + "ldr s6, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95807,13 +69767,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95823,14 +69780,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x8, #16]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #128]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95842,10 +69794,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95855,18 +69810,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w10, w4", + "ldr s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95878,7 +69826,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -95891,11 +69839,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95910,8 +69856,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -95923,19 +69869,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x8, #468]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95948,10 +69884,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -95961,20 +69897,12 @@ "ldr x8, [x28, #312]", "ld1 {v2.2d, v3.2d}, [sp], #32", "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #132]", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95986,7 +69914,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -95999,18 +69927,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x11]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96022,7 +69942,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -96035,11 +69955,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96052,10 +69970,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -96067,18 +69985,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96091,10 +70000,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -96106,19 +70015,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96131,8 +70031,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -96144,15 +70044,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w24, w21, w23", - "bic w22, w22, w24", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #208]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96164,7 +70058,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -96177,18 +70071,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "ldr s2, [x8, #36]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w10, #0x4 (4)", + "add w21, w21, w4", + "ldr s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96200,7 +70088,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -96213,35 +70101,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "lsl w24, w21, w23", - "orr w22, w22, w24", - "strb w23, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96254,10 +70116,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -96269,31 +70131,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w23", - "bic w22, w22, w25", - "add w23, w23, #0x1 (1)", - "and w23, w23, #0x7", - "strb w23, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1019]", - "add w24, w23, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w20, [x28, #1017]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96305,11 +70146,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96319,15 +70159,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #192]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #212]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w10, w4", + "ldr s9, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96339,7 +70175,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -96352,23 +70188,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96381,10 +70203,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -96396,14 +70218,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mov x10, x11", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96416,10 +70234,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96429,15 +70249,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #196]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #216]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96449,7 +70264,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -96462,23 +70277,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96490,11 +70292,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -96506,14 +70335,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr w10, [x8, #32]", + "add w21, w10, #0x4 (4)", + "add w11, w21, w4", + "str w11, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96526,8 +70354,43 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w10, #0x8 (8)", + "add w11, w21, w4", + "str w11, [x8, #188]", + "ldr w11, [x8, #16]", + "add w21, w8, #0x60 (96)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -96539,15 +70402,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #200]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #192]", + "fmov s6, s0", + "str s6, [x21]", + "add w21, w10, w4", + "ldr s6, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96559,7 +70417,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -96572,19 +70430,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, w4", - "ldr s2, [x23]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96596,10 +70444,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96612,8 +70463,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s6, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96625,13 +70475,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96641,14 +70488,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w11, [x8, #188]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96661,10 +70504,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96674,21 +70519,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "add w23, w5, w4", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add w6, w6, #0x1 (1)", - "ldr w20, [x8, #28]", - "eor w27, w6, w20", - "subs w26, w6, w20", - "cfinv", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #196]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96700,10 +70534,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96716,17 +70553,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, #0x4 (4)", - "add w23, w23, w4", - "ldr s2, [x23]", + "ldr s4, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96738,7 +70565,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -96751,11 +70578,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w11, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96768,11 +70594,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -96783,14 +70609,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96803,10 +70625,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96816,19 +70640,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "add w23, w5, #0x4 (4)", - "add w23, w23, w4", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add w20, w5, #0x8 (8)", - "add w4, w20, w4", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb w20, [x28, #1017]", + "add w21, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96840,10 +70656,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96853,18 +70670,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #200]", + "fmov s2, s0", + "str s2, [x21]", + "add w21, w10, w4", + "ldr s2, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96892,8 +70701,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96910,7 +70717,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -96924,11 +70731,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s3, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96940,11 +70743,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96954,16 +70756,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #476]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #232]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w11, [x8, #188]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96975,10 +70771,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96988,23 +70787,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97021,7 +70806,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -97035,11 +70820,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s3, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97051,11 +70832,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -97065,15 +70845,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #220]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #236]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97085,7 +70860,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -97098,23 +70873,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97129,8 +70890,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -97142,14 +70903,40 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97176,14 +70963,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #224]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #240]", + "str s2, [x21]", + "ldr s2, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97211,20 +70992,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w21, w10, w4", + "ldr s3, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97236,13 +71005,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -97252,14 +71018,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97274,8 +71035,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -97285,15 +71048,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #228]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #220]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr w4, [x8, #16]", + "ldr s3, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97305,7 +71064,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -97318,19 +71077,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, w9", - "ldr s2, [x23]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97342,7 +71092,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -97355,11 +71105,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97374,9 +71122,9 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -97387,14 +71135,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x8, #468]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97409,8 +71153,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -97420,16 +71166,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "add w23, w5, w9", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #224]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97441,7 +71181,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -97454,20 +71194,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, #0x4 (4)", - "add w23, w23, w9", - "ldr s2, [x23]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97479,7 +71209,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -97492,11 +71222,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97511,8 +71239,38 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -97527,11 +71285,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97558,16 +71312,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, #0x4 (4)", - "add w23, w23, w9", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #228]", + "str s2, [x21]", + "ldr s2, [x8, #208]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97595,17 +71341,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, #0x8 (8)", - "add w23, w23, w9", - "ldr s2, [x23]", + "ldr s3, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97617,7 +71353,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -97630,11 +71366,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97647,11 +71381,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -97665,11 +71399,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb w20, [x28, #1017]", + "add w20, w8, #0xc0 (192)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97696,16 +71427,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, #0x8 (8)", - "add w23, w23, w9", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "str s2, [x20]", + "ldr s2, [x8, #212]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97733,20 +71456,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97759,10 +71468,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -97777,11 +71486,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xc4 (196)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97808,14 +71513,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "str s2, [x20]", + "ldr s2, [x8, #216]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97843,20 +71542,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97869,10 +71554,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -97887,11 +71572,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xc8 (200)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97918,14 +71599,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "str s2, [x20]", + "ldr s2, [x8, #192]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97953,20 +71628,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w20, w5, w4", + "ldr s4, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97978,12 +71641,39 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -97997,11 +71687,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w5, w4", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98028,15 +71714,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w5, w4", - "ldr s2, [x23]", + "str s2, [x20]", + "mov w20, #0x1", + "add w6, w6, #0x1 (1)", + "ldr w21, [x8, #28]", + "eor w27, w6, w21", + "subs w26, w6, w21", + "cfinv", + "ldr s2, [x8, #196]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98064,15 +71749,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "add w21, w5, #0x4 (4)", + "add w21, w21, w4", + "ldr s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98084,7 +71763,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -98097,11 +71776,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98114,10 +71791,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -98132,11 +71809,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w5, #0x4 (4)", + "add w21, w21, w4", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98163,15 +71837,10 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, w4", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "str s2, [x21]", + "add w21, w5, #0x8 (8)", + "add w4, w21, w4", + "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98199,17 +71868,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, #0x4 (4)", - "add w23, w23, w4", - "ldr s2, [x23]", + "ldr s4, [x8, #200]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98221,7 +71880,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -98234,11 +71893,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98251,10 +71908,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -98269,11 +71926,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98300,18 +71952,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, #0x4 (4)", - "add w23, w23, w4", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add w20, w5, #0x8 (8)", - "add w4, w20, w4", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "str s2, [x4]", + "ldr w4, [x8, #476]", + "ldr s2, [x8, #232]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98339,15 +71982,65 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0xdc (220)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #236]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98375,8 +72068,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98389,11 +72080,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -98407,11 +72098,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xe0 (224)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98438,15 +72125,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #480]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "str s2, [x21]", + "ldr s2, [x8, #240]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98474,20 +72154,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98500,10 +72166,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -98518,11 +72184,35 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xe4 (228)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #220]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98534,11 +72224,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -98548,15 +72237,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w5, w9", + "ldr s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98568,7 +72253,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -98581,23 +72266,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98610,11 +72281,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -98628,11 +72299,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w5, w9", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98659,14 +72326,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "str s2, [x21]", + "ldr s2, [x8, #224]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98694,8 +72355,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w21, w5, #0x4 (4)", + "add w21, w21, w9", + "ldr s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98707,13 +72369,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -98723,14 +72382,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98745,8 +72399,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -98756,16 +72412,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w5, w4", - "ldr s2, [x23]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w5, #0x4 (4)", + "add w21, w21, w9", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98777,10 +72428,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -98790,18 +72442,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #228]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98829,8 +72472,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w21, w5, #0x8 (8)", + "add w21, w21, w9", + "ldr s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98842,13 +72486,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -98858,14 +72499,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98880,8 +72516,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -98891,16 +72529,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "add w23, w5, w4", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w5, #0x8 (8)", + "add w21, w21, w9", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98912,10 +72545,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -98925,20 +72559,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, #0x4 (4)", - "add w23, w23, w4", - "ldr s2, [x23]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98966,8 +72589,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98980,11 +72601,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -98998,11 +72619,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99029,18 +72646,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, #0x4 (4)", - "add w23, w23, w4", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add w20, w5, #0x8 (8)", - "add w5, w20, w4", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "str s2, [x21]", + "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99068,15 +72675,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99088,10 +72686,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -99104,8 +72705,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w21, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99118,12 +72718,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -99133,14 +72731,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99152,11 +72745,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -99166,283 +72758,69 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" - ] - }, - "Block9": { - "ExpectedInstructionCount": 295, - "x86Insts": [ - "fld dword [edi]", - "fmul st0", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "fadd qword [0x00a2f928]", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "call 0x00982c30", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "lea ecx,[esp + 0x10]", - "fld1", - "push ecx", - "fdivrp", - "lea edx,[esp + 0x50]", - "push edx", - "lea ecx,[esp + 0x7c]", - "fstp dword [esp + 0x10]", - "fld dword [edi]", - "fchs", - "fld dword [esp + 0x10]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x3c]", - "fmul st1", - "fstp dword [esp + 0x6c]", - "fld dword [esp + 0x40]", - "fmul st1", - "fstp dword [esp + 0x70]", - "fmul dword [esp + 0x44]", - "fstp dword [esp + 0x74]", - "fld dword [esp + 0x30]", - "fld dword [esp + 0x10]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x60]", - "fld dword [esp + 0x34]", - "fmul st1", - "fstp dword [esp + 0x64]", - "fmul dword [esp + 0x38]", - "fstp dword [esp + 0x68]", - "fld dword [esp + 0x60]", - "fadd dword [esp + 0x6c]", - "fstp dword [esp + 0x54]", - "fld dword [esp + 0x64]", - "fadd dword [esp + 0x70]", - "fstp dword [esp + 0x58]", - "fld dword [esp + 0x68]", - "fadd dword [esp + 0x74]", - "fstp dword [esp + 0x5c]", - "call 0x00716e00", - "mov ecx,dword [eax]", - "mov dword [esi + 0x20],ecx", - "mov edx,dword [eax + 0x4]", - "mov dword [esi + 0x24],edx", - "mov ecx,dword [eax + 0x8]", - "mov dword [esi + 0x28],ecx", - "mov edx,dword [eax + 0xc]", - "mov dword [esi + 0x2c],edx", - "fld dword [edi + 0x4]", - "fmul st0", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "fadd qword [0x00a2f928]", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "call 0x00982c30", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "fld1", - "fdivrp", - "fstp dword [esp + 0x8]", - "fld dword [edi + 0x4]", - "fld dword [esp + 0x8]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x8]", - "fchs", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0x34]", - "fld dword [esp + 0xc]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x58]", - "fld dword [esp + 0x38]", - "fmul st1", - "fstp dword [esp + 0x5c]", - "fmul dword [esp + 0x3c]", - "fstp dword [esp + 0x60]", - "fld dword [esp + 0x28]", - "fld dword [esp + 0x8]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x64]", - "fld dword [esp + 0x2c]", - "fmul st1", - "fstp dword [esp + 0x68]", - "fmul dword [esp + 0x30]", - "fstp dword [esp + 0x6c]", - "fld dword [esp + 0x64]", - "fadd dword [esp + 0x58]", - "fstp dword [esp + 0x74]", - "mov eax,dword [esp + 0x74]", - "fld dword [esp + 0x68]", - "mov dword [esp + 0x4c],eax", - "fadd dword [esp + 0x5c]", - "lea eax,[esp + 0x10]", - "push eax", - "fstp dword [esp + 0x7c]", - "mov ecx,dword [esp + 0x7c]", - "fld dword [esp + 0x70]", - "mov dword [esp + 0x54],ecx", - "fadd dword [esp + 0x64]", - "lea ecx,[esp + 0x50]", - "push ecx", - "lea ecx,[esp + 0x7c]", - "fstp dword [esp + 0x84]", - "mov edx,dword [esp + 0x84]", - "mov dword [esp + 0x5c],edx", - "call 0x00716e00", - "mov edx,dword [eax]", - "mov dword [esi + 0x30],edx", - "mov ecx,dword [eax + 0x4]", - "mov dword [esi + 0x34],ecx", - "mov edx,dword [eax + 0x8]", - "mov dword [esi + 0x38],edx", - "mov eax,dword [eax + 0xc]", - "mov dword [esi + 0x3c],eax", - "fld dword [edi + 0x8]", - "fmul st0", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "fadd qword [0x00a2f928]", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "call 0x00982c30", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "fld1", - "fdivrp", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x8]", - "fld st0", - "fmul dword [edi + 0x8]", - "fstp dword [esp + 0x8]", - "fchs", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0x40]", - "fld dword [esp + 0xc]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x64]", - "fld dword [esp + 0x44]", - "fmul st1", - "fstp dword [esp + 0x68]", - "fmul dword [esp + 0x48]", - "fstp dword [esp + 0x6c]", - "fld dword [esp + 0x28]", - "fld dword [esp + 0x8]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x74]", - "fld dword [esp + 0x2c]", - "fmul st1", - "fstp dword [esp + 0x78]", - "fmul dword [esp + 0x30]", - "fstp dword [esp + 0x7c]", - "fld dword [esp + 0x74]", - "fadd dword [esp + 0x64]", - "fstp dword [esp + 0x58]", - "mov ecx,dword [esp + 0x58]", - "fld dword [esp + 0x78]", - "mov dword [esp + 0x4c],ecx", - "fadd dword [esp + 0x68]", - "lea ecx,[esp + 0x10]", - "push ecx", - "lea ecx,[esp + 0x78]", - "fstp dword [esp + 0x60]", - "mov edx,dword [esp + 0x60]", - "fld dword [esp + 0x80]", - "mov dword [esp + 0x54],edx", - "fadd dword [esp + 0x70]", - "lea edx,[esp + 0x50]", - "push edx", - "fstp dword [esp + 0x68]", - "mov eax,dword [esp + 0x68]", - "mov dword [esp + 0x5c],eax", - "call 0x00716e00", - "mov ecx,dword [eax]", - "mov dword [esi + 0x40],ecx", - "mov edx,dword [eax + 0x4]", - "mov dword [esi + 0x44],edx", - "mov ecx,dword [eax + 0x8]", - "mov dword [esi + 0x48],ecx", - "mov edx,dword [eax + 0xc]", - "mov dword [esi + 0x4c],edx", - "fld dword [edi + 0xc]", - "fmul st0", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "fadd qword [0x00a2f928]", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "call 0x00982c30", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "fld1", - "fdivrp", - "fstp dword [esp + 0x8]", - "fld dword [edi + 0xc]", - "fchs", - "fld dword [esp + 0x8]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x40]", - "fmul st1", - "fstp dword [esp + 0x64]", - "fld dword [esp + 0x44]", - "fmul st1", - "fstp dword [esp + 0x68]", - "fmul dword [esp + 0x48]", - "fstp dword [esp + 0x6c]", - "fld dword [esp + 0x28]", - "fld dword [esp + 0x8]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x74]", - "fld dword [esp + 0x2c]", - "fmul st1", - "fstp dword [esp + 0x78]", - "fmul dword [esp + 0x30]", - "fstp dword [esp + 0x7c]", - "fld dword [esp + 0x74]", - "fadd dword [esp + 0x64]", - "fstp dword [esp + 0x58]", - "mov eax,dword [esp + 0x58]", - "fld dword [esp + 0x78]", - "mov dword [esp + 0x4c],eax", - "fadd dword [esp + 0x68]", - "lea eax,[esp + 0x10]", - "fstp dword [esp + 0x5c]", - "mov ecx,dword [esp + 0x5c]", - "fld dword [esp + 0x7c]", - "mov dword [esp + 0x50],ecx", - "fadd dword [esp + 0x6c]", - "lea ecx,[esp + 0x4c]", - "fstp dword [esp + 0x60]", - "mov edx,dword [esp + 0x60]", - "mov dword [esp + 0x54],edx" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "add w21, w5, w4", + "ldr s2, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99470,22 +72848,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s4, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99497,12 +72860,39 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -99516,11 +72906,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w5, w4", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99547,14 +72933,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "str s2, [x21]", + "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99582,17 +72962,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w23, #0xf928", - "movk w23, #0xa2, lsl #16", - "ldr d2, [x23]", + "add w21, w5, #0x4 (4)", + "add w21, w21, w4", + "ldr s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99604,9 +72976,98 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w5, #0x4 (4)", + "add w21, w21, w4", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "add w21, w5, #0x8 (8)", + "add w4, w21, w4", + "ldr s2, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -99620,8 +73081,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99633,11 +73093,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -99652,11 +73139,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99683,14 +73165,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "str s2, [x4]", + "ldr w4, [x8, #480]", + "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99718,241 +73195,65 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w21, w21, w20", - "orr w21, w22, w21", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "mov w20, #0x4fe2", - "movk w20, #0x1, lsl #16", - "mov w22, #0x2c11", - "movk w22, #0x98, lsl #16", - "add w22, w20, w22", - "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", - "ldr x0, [x28, #2280]", - "and x3, x22, #0xfffff", - "add x0, x0, x3, lsl #4", - "ldp x1, x0, [x0]" - ] - }, - "Block10": { - "ExpectedInstructionCount": 1268, - "x86Insts": [ - "fld dword [0x00b42a74]", - "push ecx", - "fstp dword [0x00b42a20]", - "lea ecx,[esp + 0x48]", - "fld dword [0x00b42a78]", - "fstp dword [0x00b42a24]", - "fld dword [0x00b42a7c]", - "fstp dword [0x00b42a28]", - "fld dword [0x00b42a68]", - "fstp dword [0x00b42a2c]", - "fld dword [0x00b42a6c]", - "fstp dword [0x00b42a30]", - "fld dword [0x00b42a70]", - "fstp dword [0x00b42a34]", - "fld dword [0x00b42a5c]", - "fstp dword [0x00b42a38]", - "fld dword [0x00b42a60]", - "fstp dword [0x00b42a3c]", - "fld dword [0x00b42a64]", - "fstp dword [0x00b42a40]", - "fld dword [0x00b42a50]", - "fstp dword [0x00b42a44]", - "fld dword [0x00b42a54]", - "fstp dword [0x00b42a48]", - "fld dword [0x00b42a58]", - "fstp dword [0x00b42a4c]", - "fst dword [esp + 0x48]", - "fst dword [esp + 0x58]", - "fstp dword [esp + 0x68]", - "fst dword [esp + 0x4c]", - "fst dword [esp + 0x50]", - "fst dword [esp + 0x54]", - "fst dword [esp + 0x5c]", - "fst dword [esp + 0x60]", - "fstp dword [esp + 0x64]", - "fld dword [esp + 0x4]", - "fstp dword [esp]", - "call 0x00793aa0", - "fld dword [esp + 0x50]", - "fld dword [0x00b42a78]", - "fst qword [esp + 0x28]", - "fld dword [0x00b42a74]", - "fst qword [esp + 0x30]", - "fld dword [esp + 0x44]", - "fld dword [esp + 0x5c]", - "fld dword [0x00b42a7c]", - "fst qword [esp + 0x10]", - "fld st2", - "fmul st4", - "fld st6", - "fmul st6", - "faddp", - "fld st2", - "fmulp st2", - "faddp", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x54]", - "fld dword [esp + 0x48]", - "fld dword [esp + 0x60]", - "fstp qword [esp]", - "fld st0", - "fmulp st5", - "fld st1", - "fmulp st6", - "fxch st4", - "faddp st5,st0", - "fld qword [esp]", - "fmul qword [esp + 0x10]", - "faddp st5,st0", - "fxch st4", - "fstp dword [esp + 0x3c]", - "fld dword [esp + 0x58]", - "fst qword [esp + 0x20]", - "fld dword [esp + 0x4c]", - "fst qword [esp + 0x18]", - "fld dword [esp + 0x64]", - "fstp qword [esp + 0x8]", - "fmul qword [esp + 0x30]", - "fxch", - "fmul qword [esp + 0x28]", - "faddp", - "fld qword [esp + 0x8]", - "mov eax,dword [esp + 0x38]", - "fmul qword [esp + 0x10]", - "mov ecx,dword [esp + 0x3c]", - "mov [0x00b2ba7c],eax", - "mov dword [0x00b2ba80],ecx", - "faddp", - "fstp dword [esp + 0x40]", - "mov edx,dword [esp + 0x40]", - "fld dword [0x00b42a6c]", - "mov dword [0x00b2ba84],edx", - "fst qword [esp + 0x30]", - "fld dword [0x00b42a68]", - "fst qword [esp + 0x28]", - "fld dword [0x00b42a70]", - "fstp qword [esp + 0x10]", - "fmul st3", - "fld st6", - "fmulp st2", - "faddp", - "fld st1", - "fmul qword [esp + 0x10]", - "faddp", - "fstp dword [esp + 0x38]", - "mov eax,dword [esp + 0x38]", - "fld st2", - "mov [0x00b2ba88],eax", - "fmul qword [esp + 0x28]", - "fld st4", - "fmul qword [esp + 0x30]", - "faddp", - "fld qword [esp]", - "fmul qword [esp + 0x10]", - "faddp", - "fstp dword [esp + 0x3c]", - "mov ecx,dword [esp + 0x3c]", - "fld qword [esp + 0x18]", - "mov dword [0x00b2ba8c],ecx", - "fmul qword [esp + 0x28]", - "fld qword [esp + 0x20]", - "fmul qword [esp + 0x30]", - "faddp", - "fld qword [esp + 0x8]", - "fmul qword [esp + 0x10]", - "faddp", - "fstp dword [esp + 0x40]", - "mov edx,dword [esp + 0x40]", - "fld dword [0x00b42a60]", - "mov dword [0x00b2ba90],edx", - "fst qword [esp + 0x28]", - "fld dword [0x00b42a5c]", - "fst qword [esp + 0x30]", - "fld dword [0x00b42a64]", - "fstp qword [esp + 0x10]", - "fmul st3", - "fld st6", - "fmulp st2", - "faddp", - "fld st1", - "fmul qword [esp + 0x10]", - "faddp", - "fstp dword [esp + 0x38]", - "mov eax,dword [esp + 0x38]", - "fld st2", - "fmul qword [esp + 0x30]", - "fld st4", - "fmul qword [esp + 0x28]", - "faddp", - "fld qword [esp]", - "fmul qword [esp + 0x10]", - "faddp", - "fstp dword [esp + 0x3c]", - "fld qword [esp + 0x18]", - "fmul qword [esp + 0x30]", - "fld qword [esp + 0x20]", - "fmul qword [esp + 0x28]", - "faddp", - "fld qword [esp + 0x8]", - "fmul qword [esp + 0x10]", - "faddp", - "fstp dword [esp + 0x40]", - "fld dword [0x00b42a54]", - "mov ecx,dword [esp + 0x3c]", - "fld dword [0x00b42a50]", - "mov edx,dword [esp + 0x40]", - "fld dword [0x00b42a58]", - "mov [0x00b2ba94],eax", - "fxch st4", - "mov dword [0x00b2ba98],ecx", - "fmul st1", - "mov dword [0x00b2ba9c],edx", - "fxch st7", - "fmul st2", - "faddp st7,st0", - "fxch st2", - "fmul st3", - "faddp st6,st0", - "fxch st5", - "fstp dword [esp + 0x38]", - "mov eax,dword [esp + 0x38]", - "mov [0x00b2baa0],eax", - "fmul st2", - "fxch st3", - "fmul st4", - "faddp st2,st0", - "fld qword [esp]", - "fmul st1", - "faddp st2,st0", - "fxch", - "fstp dword [esp + 0x3c]", - "mov ecx,dword [esp + 0x3c]", - "fld qword [esp + 0x18]", - "mov dword [0x00b2baa4],ecx", - "fmulp st2", - "fld qword [esp + 0x20]", - "fmulp st3", - "fxch", - "faddp st2,st0", - "fmul qword [esp + 0x8]", - "faddp", - "fstp dword [esp + 0x40]", - "mov edx,dword [esp + 0x40]", - "mov dword [0x00b2baa8],edx", - "mov esp,ebp", - "pop ebp" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x2a74", - "movk w21, #0xb4, lsl #16", - "ldr s2, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99980,20 +73281,37 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #-4]!", - "strb w22, [x28, #1298]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100020,20 +73338,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w22, #0x2a20", - "movk w22, #0xb4, lsl #16", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add w5, w8, #0x48 (72)", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a78", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", + "str s2, [x21]", + "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100061,16 +73367,37 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100097,18 +73424,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w23, #0x2a24", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a7c", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", + "str s2, [x21]", + "add w21, w5, w4", + "ldr s2, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100136,16 +73454,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s3, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100157,11 +73466,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -100171,19 +73479,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a28", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a68", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100195,10 +73493,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -100211,16 +73512,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w5, w4", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100247,18 +73539,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w23, #0x2a2c", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a6c", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", + "str s2, [x21]", + "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100286,16 +73568,68 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w5, #0x4 (4)", + "add w21, w21, w4", + "ldr s3, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w5, #0x4 (4)", + "add w21, w21, w4", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100322,18 +73656,10 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w23, #0x2a30", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a70", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", + "str s2, [x21]", + "add w21, w5, #0x8 (8)", + "add w5, w21, w4", + "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100361,16 +73687,64 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s3, [x5]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100397,18 +73771,282 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w23, #0x2a34", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a5c", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", + "str s2, [x5]", + "ldrb w21, [x28, #1019]", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w20, w21", + "bic w20, w22, w20", + "strb w20, [x28, #1298]" + ] + }, + "Block9": { + "ExpectedInstructionCount": 251, + "x86Insts": [ + "fld dword [edi]", + "fmul st0", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "fadd qword [0x00a2f928]", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "call 0x00982c30", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "lea ecx,[esp + 0x10]", + "fld1", + "push ecx", + "fdivrp", + "lea edx,[esp + 0x50]", + "push edx", + "lea ecx,[esp + 0x7c]", + "fstp dword [esp + 0x10]", + "fld dword [edi]", + "fchs", + "fld dword [esp + 0x10]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x3c]", + "fmul st1", + "fstp dword [esp + 0x6c]", + "fld dword [esp + 0x40]", + "fmul st1", + "fstp dword [esp + 0x70]", + "fmul dword [esp + 0x44]", + "fstp dword [esp + 0x74]", + "fld dword [esp + 0x30]", + "fld dword [esp + 0x10]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x60]", + "fld dword [esp + 0x34]", + "fmul st1", + "fstp dword [esp + 0x64]", + "fmul dword [esp + 0x38]", + "fstp dword [esp + 0x68]", + "fld dword [esp + 0x60]", + "fadd dword [esp + 0x6c]", + "fstp dword [esp + 0x54]", + "fld dword [esp + 0x64]", + "fadd dword [esp + 0x70]", + "fstp dword [esp + 0x58]", + "fld dword [esp + 0x68]", + "fadd dword [esp + 0x74]", + "fstp dword [esp + 0x5c]", + "call 0x00716e00", + "mov ecx,dword [eax]", + "mov dword [esi + 0x20],ecx", + "mov edx,dword [eax + 0x4]", + "mov dword [esi + 0x24],edx", + "mov ecx,dword [eax + 0x8]", + "mov dword [esi + 0x28],ecx", + "mov edx,dword [eax + 0xc]", + "mov dword [esi + 0x2c],edx", + "fld dword [edi + 0x4]", + "fmul st0", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "fadd qword [0x00a2f928]", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "call 0x00982c30", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "fld1", + "fdivrp", + "fstp dword [esp + 0x8]", + "fld dword [edi + 0x4]", + "fld dword [esp + 0x8]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x8]", + "fchs", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0x34]", + "fld dword [esp + 0xc]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x58]", + "fld dword [esp + 0x38]", + "fmul st1", + "fstp dword [esp + 0x5c]", + "fmul dword [esp + 0x3c]", + "fstp dword [esp + 0x60]", + "fld dword [esp + 0x28]", + "fld dword [esp + 0x8]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x64]", + "fld dword [esp + 0x2c]", + "fmul st1", + "fstp dword [esp + 0x68]", + "fmul dword [esp + 0x30]", + "fstp dword [esp + 0x6c]", + "fld dword [esp + 0x64]", + "fadd dword [esp + 0x58]", + "fstp dword [esp + 0x74]", + "mov eax,dword [esp + 0x74]", + "fld dword [esp + 0x68]", + "mov dword [esp + 0x4c],eax", + "fadd dword [esp + 0x5c]", + "lea eax,[esp + 0x10]", + "push eax", + "fstp dword [esp + 0x7c]", + "mov ecx,dword [esp + 0x7c]", + "fld dword [esp + 0x70]", + "mov dword [esp + 0x54],ecx", + "fadd dword [esp + 0x64]", + "lea ecx,[esp + 0x50]", + "push ecx", + "lea ecx,[esp + 0x7c]", + "fstp dword [esp + 0x84]", + "mov edx,dword [esp + 0x84]", + "mov dword [esp + 0x5c],edx", + "call 0x00716e00", + "mov edx,dword [eax]", + "mov dword [esi + 0x30],edx", + "mov ecx,dword [eax + 0x4]", + "mov dword [esi + 0x34],ecx", + "mov edx,dword [eax + 0x8]", + "mov dword [esi + 0x38],edx", + "mov eax,dword [eax + 0xc]", + "mov dword [esi + 0x3c],eax", + "fld dword [edi + 0x8]", + "fmul st0", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "fadd qword [0x00a2f928]", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "call 0x00982c30", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "fld1", + "fdivrp", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x8]", + "fld st0", + "fmul dword [edi + 0x8]", + "fstp dword [esp + 0x8]", + "fchs", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0x40]", + "fld dword [esp + 0xc]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x64]", + "fld dword [esp + 0x44]", + "fmul st1", + "fstp dword [esp + 0x68]", + "fmul dword [esp + 0x48]", + "fstp dword [esp + 0x6c]", + "fld dword [esp + 0x28]", + "fld dword [esp + 0x8]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x74]", + "fld dword [esp + 0x2c]", + "fmul st1", + "fstp dword [esp + 0x78]", + "fmul dword [esp + 0x30]", + "fstp dword [esp + 0x7c]", + "fld dword [esp + 0x74]", + "fadd dword [esp + 0x64]", + "fstp dword [esp + 0x58]", + "mov ecx,dword [esp + 0x58]", + "fld dword [esp + 0x78]", + "mov dword [esp + 0x4c],ecx", + "fadd dword [esp + 0x68]", + "lea ecx,[esp + 0x10]", + "push ecx", + "lea ecx,[esp + 0x78]", + "fstp dword [esp + 0x60]", + "mov edx,dword [esp + 0x60]", + "fld dword [esp + 0x80]", + "mov dword [esp + 0x54],edx", + "fadd dword [esp + 0x70]", + "lea edx,[esp + 0x50]", + "push edx", + "fstp dword [esp + 0x68]", + "mov eax,dword [esp + 0x68]", + "mov dword [esp + 0x5c],eax", + "call 0x00716e00", + "mov ecx,dword [eax]", + "mov dword [esi + 0x40],ecx", + "mov edx,dword [eax + 0x4]", + "mov dword [esi + 0x44],edx", + "mov ecx,dword [eax + 0x8]", + "mov dword [esi + 0x48],ecx", + "mov edx,dword [eax + 0xc]", + "mov dword [esi + 0x4c],edx", + "fld dword [edi + 0xc]", + "fmul st0", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "fadd qword [0x00a2f928]", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "call 0x00982c30", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "fld1", + "fdivrp", + "fstp dword [esp + 0x8]", + "fld dword [edi + 0xc]", + "fchs", + "fld dword [esp + 0x8]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x40]", + "fmul st1", + "fstp dword [esp + 0x64]", + "fld dword [esp + 0x44]", + "fmul st1", + "fstp dword [esp + 0x68]", + "fmul dword [esp + 0x48]", + "fstp dword [esp + 0x6c]", + "fld dword [esp + 0x28]", + "fld dword [esp + 0x8]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x74]", + "fld dword [esp + 0x2c]", + "fmul st1", + "fstp dword [esp + 0x78]", + "fmul dword [esp + 0x30]", + "fstp dword [esp + 0x7c]", + "fld dword [esp + 0x74]", + "fadd dword [esp + 0x64]", + "fstp dword [esp + 0x58]", + "mov eax,dword [esp + 0x58]", + "fld dword [esp + 0x78]", + "mov dword [esp + 0x4c],eax", + "fadd dword [esp + 0x68]", + "lea eax,[esp + 0x10]", + "fstp dword [esp + 0x5c]", + "mov ecx,dword [esp + 0x5c]", + "fld dword [esp + 0x7c]", + "mov dword [esp + 0x50],ecx", + "fadd dword [esp + 0x6c]", + "lea ecx,[esp + 0x4c]", + "fstp dword [esp + 0x60]", + "mov edx,dword [esp + 0x60]", + "mov dword [esp + 0x54],edx" + ], + "ExpectedArm64ASM": [ + "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100436,16 +74074,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100460,45 +74088,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a38", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a60", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -100511,16 +74104,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100547,18 +74131,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w23, #0x2a3c", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a64", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", + "str s2, [x20]", + "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100586,54 +74160,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a40", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a50", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", + "mov w20, #0xf928", + "movk w20, #0xa2, lsl #16", + "ldr d3, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100645,9 +74174,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v3.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -100658,19 +74187,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100685,45 +74204,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a44", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a54", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -100736,16 +74220,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100772,18 +74247,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w23, #0x2a48", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a58", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", + "str s2, [x20]", + "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100811,52 +74276,325 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "mov w20, #0x4fe2", + "movk w20, #0x1, lsl #16", + "mov w21, #0x2c11", + "movk w21, #0x98, lsl #16", + "add w21, w20, w21", + "str w20, [x8, #-4]!", + "ldrb w20, [x28, #1019]", + "mov w22, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a4c", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w23, [x28, #1298]", + "lsl w20, w22, w20", + "orr w20, w23, w20", + "strb w20, [x28, #1298]", + "ldr x0, [x28, #2280]", + "and x3, x21, #0xfffff", + "add x0, x0, x3, lsl #4", + "ldp x1, x0, [x0]" + ] + }, + "Block10": { + "ExpectedInstructionCount": 450, + "x86Insts": [ + "fld dword [0x00b42a74]", + "push ecx", + "fstp dword [0x00b42a20]", + "lea ecx,[esp + 0x48]", + "fld dword [0x00b42a78]", + "fstp dword [0x00b42a24]", + "fld dword [0x00b42a7c]", + "fstp dword [0x00b42a28]", + "fld dword [0x00b42a68]", + "fstp dword [0x00b42a2c]", + "fld dword [0x00b42a6c]", + "fstp dword [0x00b42a30]", + "fld dword [0x00b42a70]", + "fstp dword [0x00b42a34]", + "fld dword [0x00b42a5c]", + "fstp dword [0x00b42a38]", + "fld dword [0x00b42a60]", + "fstp dword [0x00b42a3c]", + "fld dword [0x00b42a64]", + "fstp dword [0x00b42a40]", + "fld dword [0x00b42a50]", + "fstp dword [0x00b42a44]", + "fld dword [0x00b42a54]", + "fstp dword [0x00b42a48]", + "fld dword [0x00b42a58]", + "fstp dword [0x00b42a4c]", + "fst dword [esp + 0x48]", + "fst dword [esp + 0x58]", + "fstp dword [esp + 0x68]", + "fst dword [esp + 0x4c]", + "fst dword [esp + 0x50]", + "fst dword [esp + 0x54]", + "fst dword [esp + 0x5c]", + "fst dword [esp + 0x60]", + "fstp dword [esp + 0x64]", + "fld dword [esp + 0x4]", + "fstp dword [esp]", + "call 0x00793aa0", + "fld dword [esp + 0x50]", + "fld dword [0x00b42a78]", + "fst qword [esp + 0x28]", + "fld dword [0x00b42a74]", + "fst qword [esp + 0x30]", + "fld dword [esp + 0x44]", + "fld dword [esp + 0x5c]", + "fld dword [0x00b42a7c]", + "fst qword [esp + 0x10]", + "fld st2", + "fmul st4", + "fld st6", + "fmul st6", + "faddp", + "fld st2", + "fmulp st2", + "faddp", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x54]", + "fld dword [esp + 0x48]", + "fld dword [esp + 0x60]", + "fstp qword [esp]", + "fld st0", + "fmulp st5", + "fld st1", + "fmulp st6", + "fxch st4", + "faddp st5,st0", + "fld qword [esp]", + "fmul qword [esp + 0x10]", + "faddp st5,st0", + "fxch st4", + "fstp dword [esp + 0x3c]", + "fld dword [esp + 0x58]", + "fst qword [esp + 0x20]", + "fld dword [esp + 0x4c]", + "fst qword [esp + 0x18]", + "fld dword [esp + 0x64]", + "fstp qword [esp + 0x8]", + "fmul qword [esp + 0x30]", + "fxch", + "fmul qword [esp + 0x28]", + "faddp", + "fld qword [esp + 0x8]", + "mov eax,dword [esp + 0x38]", + "fmul qword [esp + 0x10]", + "mov ecx,dword [esp + 0x3c]", + "mov [0x00b2ba7c],eax", + "mov dword [0x00b2ba80],ecx", + "faddp", + "fstp dword [esp + 0x40]", + "mov edx,dword [esp + 0x40]", + "fld dword [0x00b42a6c]", + "mov dword [0x00b2ba84],edx", + "fst qword [esp + 0x30]", + "fld dword [0x00b42a68]", + "fst qword [esp + 0x28]", + "fld dword [0x00b42a70]", + "fstp qword [esp + 0x10]", + "fmul st3", + "fld st6", + "fmulp st2", + "faddp", + "fld st1", + "fmul qword [esp + 0x10]", + "faddp", + "fstp dword [esp + 0x38]", + "mov eax,dword [esp + 0x38]", + "fld st2", + "mov [0x00b2ba88],eax", + "fmul qword [esp + 0x28]", + "fld st4", + "fmul qword [esp + 0x30]", + "faddp", + "fld qword [esp]", + "fmul qword [esp + 0x10]", + "faddp", + "fstp dword [esp + 0x3c]", + "mov ecx,dword [esp + 0x3c]", + "fld qword [esp + 0x18]", + "mov dword [0x00b2ba8c],ecx", + "fmul qword [esp + 0x28]", + "fld qword [esp + 0x20]", + "fmul qword [esp + 0x30]", + "faddp", + "fld qword [esp + 0x8]", + "fmul qword [esp + 0x10]", + "faddp", + "fstp dword [esp + 0x40]", + "mov edx,dword [esp + 0x40]", + "fld dword [0x00b42a60]", + "mov dword [0x00b2ba90],edx", + "fst qword [esp + 0x28]", + "fld dword [0x00b42a5c]", + "fst qword [esp + 0x30]", + "fld dword [0x00b42a64]", + "fstp qword [esp + 0x10]", + "fmul st3", + "fld st6", + "fmulp st2", + "faddp", + "fld st1", + "fmul qword [esp + 0x10]", + "faddp", + "fstp dword [esp + 0x38]", + "mov eax,dword [esp + 0x38]", + "fld st2", + "fmul qword [esp + 0x30]", + "fld st4", + "fmul qword [esp + 0x28]", + "faddp", + "fld qword [esp]", + "fmul qword [esp + 0x10]", + "faddp", + "fstp dword [esp + 0x3c]", + "fld qword [esp + 0x18]", + "fmul qword [esp + 0x30]", + "fld qword [esp + 0x20]", + "fmul qword [esp + 0x28]", + "faddp", + "fld qword [esp + 0x8]", + "fmul qword [esp + 0x10]", + "faddp", + "fstp dword [esp + 0x40]", + "fld dword [0x00b42a54]", + "mov ecx,dword [esp + 0x3c]", + "fld dword [0x00b42a50]", + "mov edx,dword [esp + 0x40]", + "fld dword [0x00b42a58]", + "mov [0x00b2ba94],eax", + "fxch st4", + "mov dword [0x00b2ba98],ecx", + "fmul st1", + "mov dword [0x00b2ba9c],edx", + "fxch st7", + "fmul st2", + "faddp st7,st0", + "fxch st2", + "fmul st3", + "faddp st6,st0", + "fxch st5", + "fstp dword [esp + 0x38]", + "mov eax,dword [esp + 0x38]", + "mov [0x00b2baa0],eax", + "fmul st2", + "fxch st3", + "fmul st4", + "faddp st2,st0", + "fld qword [esp]", + "fmul st1", + "faddp st2,st0", + "fxch", + "fstp dword [esp + 0x3c]", + "mov ecx,dword [esp + 0x3c]", + "fld qword [esp + 0x18]", + "mov dword [0x00b2baa4],ecx", + "fmulp st2", + "fld qword [esp + 0x20]", + "fmulp st3", + "fxch", + "faddp st2,st0", + "fmul qword [esp + 0x8]", + "faddp", + "fstp dword [esp + 0x40]", + "mov edx,dword [esp + 0x40]", + "mov dword [0x00b2baa8],edx", + "mov esp,ebp", + "pop ebp" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x2a74", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "str w5, [x8, #-4]!", + "mov w20, #0x2a20", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "add w5, w8, #0x48 (72)", + "mov w20, #0x2a78", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a24", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a7c", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a28", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a68", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a2c", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a6c", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a30", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a70", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a34", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a5c", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a38", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a60", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a3c", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a64", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a40", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a50", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a44", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a54", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a48", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a58", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a4c", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "add w20, w8, #0x48 (72)", + "ldrb w21, [x28, #1019]", + "add w21, w21, #0x7 (7)", + "and w21, w21, #0x7", + "ldrb w22, [x28, #1298]", + "mov w23, #0x1", + "lsl w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100884,9 +74622,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "str s2, [x20]", + "add w20, w8, #0x58 (88)", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100914,9 +74652,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #88]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "str s2, [x20]", + "add w20, w8, #0x68 (104)", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100944,13 +74682,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", + "str s2, [x20]", + "ldrb w20, [x28, #1298]", + "lsl w22, w23, w21", + "bic w20, w20, w22", + "strb w20, [x28, #1298]", + "add w20, w21, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x4c (76)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -100979,8 +74719,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", + "add w21, w8, #0x50 (80)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101009,8 +74749,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", + "add w21, w8, #0x54 (84)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101039,8 +74779,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", + "add w21, w8, #0x5c (92)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101069,8 +74809,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", + "add w21, w8, #0x60 (96)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101099,8 +74839,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", + "add w21, w8, #0x64 (100)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101129,13 +74869,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w23, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101166,12 +74907,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w22, w23, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101201,20 +74943,21 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "lsl w21, w21, w20", - "bic w21, w22, w21", + "ldrb w21, [x28, #1298]", + "lsl w22, w23, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "mov w20, #0x54a9", "movk w20, #0x1, lsl #16", - "mov w22, #0x39db", - "movk w22, #0x79, lsl #16", - "add w22, w20, w22", + "mov w21, #0x39db", + "movk w21, #0x79, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", "ldr x0, [x28, #2280]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] diff --git a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json index 1a75160fdc..c89dc079b7 100644 --- a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json +++ b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json @@ -13,7 +13,7 @@ }, "Instructions": { "Block1": { - "ExpectedInstructionCount": 20546, + "ExpectedInstructionCount": 16358, "x86Insts": [ "sub esp,0x88", "fld dword [ecx + 0x4]", @@ -538,7 +538,6 @@ ], "ExpectedArm64ASM": [ "sub w8, w8, #0x88 (136)", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -567,18 +566,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x5, #24]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #16]", + "ldr s3, [x5, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -590,7 +579,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -603,19 +592,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "str w6, [x8, #20]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #20]", + "ldr s4, [x5, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -627,7 +608,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -640,19 +621,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w6, [x5, #28]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #32]", + "ldr s5, [x5, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -664,7 +637,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -677,19 +650,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "str w6, [x8, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #36]", + "ldr s6, [x5, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -701,7 +666,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -714,18 +679,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -737,7 +694,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -750,18 +707,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -773,7 +722,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -786,11 +735,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -803,10 +750,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -818,13 +765,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -836,7 +780,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -849,18 +793,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -872,7 +808,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -885,11 +821,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -902,10 +836,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -917,13 +851,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -935,7 +866,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -948,18 +879,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #100]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x4, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -971,7 +894,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -984,11 +907,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1001,10 +922,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -1016,14 +937,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1036,8 +953,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1049,15 +966,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "fmov s9, s0", + "str s9, [x20]", + "ldr s9, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1069,7 +980,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1082,18 +993,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #96]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x4, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1105,7 +1008,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1118,11 +1021,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1135,10 +1036,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1150,14 +1051,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1170,8 +1066,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1183,15 +1079,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s9, s0", + "str s9, [x8]", + "ldr s9, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1203,7 +1093,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1216,18 +1106,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1239,7 +1121,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1252,11 +1134,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1269,10 +1149,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -1284,18 +1164,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1308,8 +1179,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -1323,14 +1194,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1343,8 +1210,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1356,15 +1223,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s9, s0", + "str s9, [x20]", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1376,7 +1237,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1389,18 +1250,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1412,7 +1265,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1425,11 +1278,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1442,10 +1293,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1457,18 +1308,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1481,8 +1323,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -1496,14 +1338,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1516,8 +1353,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1529,15 +1366,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s9, s0", + "str s9, [x8]", + "ldr s9, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1549,7 +1380,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1562,23 +1393,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1591,10 +1408,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1606,14 +1423,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1626,8 +1439,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1639,15 +1452,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s9, s0", + "str s9, [x20]", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1659,7 +1466,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1672,23 +1479,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1701,10 +1494,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1716,14 +1509,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1736,8 +1525,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1749,28 +1538,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "mov w24, #0x0", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s9, s0", + "str s9, [x20]", + "mov w20, #0x0", + "strb w20, [x28, #1017]", + "ldr s9, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1782,7 +1554,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1795,11 +1567,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1812,10 +1582,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -1827,14 +1597,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1847,8 +1613,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1860,15 +1626,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1880,7 +1640,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1893,11 +1653,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1910,10 +1668,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -1925,14 +1683,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1945,8 +1699,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1958,15 +1712,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x4, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1978,7 +1726,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1991,18 +1739,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2014,7 +1754,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2027,11 +1767,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2044,10 +1782,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2059,13 +1797,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2077,7 +1812,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2090,18 +1825,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2113,7 +1840,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2126,11 +1853,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2143,10 +1868,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2158,13 +1883,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #100]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2176,7 +1898,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2189,18 +1911,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2212,7 +1926,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2225,11 +1939,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2242,10 +1954,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2257,14 +1969,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2277,8 +1985,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -2290,15 +1998,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "fmov s9, s0", + "str s9, [x21]", + "ldr s9, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2310,7 +2012,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2323,18 +2025,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #96]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x4, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2346,7 +2040,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2359,11 +2053,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2376,10 +2068,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2391,14 +2083,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2411,8 +2098,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -2424,15 +2111,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s9, s0", + "str s9, [x8]", + "ldr s9, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2444,7 +2125,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2457,18 +2138,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2480,7 +2153,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2493,11 +2166,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2510,10 +2181,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2525,18 +2196,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2549,8 +2211,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -2564,14 +2226,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2584,8 +2242,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -2597,15 +2255,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s9, s0", + "str s9, [x21]", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2617,7 +2269,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2630,18 +2282,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2653,7 +2297,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2666,11 +2310,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2683,10 +2325,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2698,18 +2340,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2722,8 +2355,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -2737,14 +2370,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2757,8 +2385,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -2770,27 +2398,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s9, s0", + "str s9, [x8]", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2802,7 +2412,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2815,11 +2425,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2832,10 +2440,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2847,14 +2455,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2867,8 +2471,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -2880,15 +2484,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s9, s0", + "str s9, [x21]", + "ldr s9, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2900,7 +2498,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2913,23 +2511,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2942,10 +2526,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2957,14 +2541,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2977,8 +2557,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -2990,15 +2570,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s9, s0", + "str s9, [x21]", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3010,7 +2584,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3023,23 +2597,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3052,10 +2612,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3067,14 +2627,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3087,8 +2643,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3100,15 +2656,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3120,7 +2670,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3133,11 +2683,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3150,10 +2698,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -3165,14 +2713,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3185,8 +2729,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3198,29 +2742,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3232,7 +2756,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3245,18 +2769,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #76]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3268,7 +2784,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3281,11 +2797,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3298,10 +2812,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -3313,13 +2827,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3331,7 +2842,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3344,18 +2855,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #72]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3367,7 +2870,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3380,11 +2883,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3397,10 +2898,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3412,14 +2913,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3432,8 +2928,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3445,32 +2941,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3483,10 +2955,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3498,13 +2970,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3516,7 +2985,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3529,23 +2998,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3558,10 +3013,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3573,18 +3028,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3597,10 +3043,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -3612,19 +3058,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3637,8 +3074,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3650,20 +3087,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3676,10 +3101,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3691,13 +3116,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3709,7 +3131,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3722,23 +3144,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3751,10 +3159,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3766,18 +3174,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3790,10 +3189,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3805,19 +3204,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3830,8 +3220,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3843,15 +3233,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3863,7 +3247,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3876,18 +3260,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #108]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3899,7 +3275,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3912,11 +3288,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3929,10 +3303,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -3944,13 +3318,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3962,7 +3333,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3975,18 +3346,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #104]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3998,7 +3361,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4011,11 +3374,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4028,10 +3389,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -4043,14 +3404,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4063,8 +3419,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -4076,15 +3432,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4096,7 +3446,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4109,23 +3459,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4138,10 +3474,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4153,13 +3489,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4171,7 +3504,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4184,18 +3517,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4207,7 +3532,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4220,11 +3545,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4237,10 +3560,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4252,18 +3575,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4276,10 +3590,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -4291,19 +3605,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4316,8 +3621,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -4329,15 +3634,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4349,7 +3648,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4362,18 +3661,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4385,7 +3676,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4398,11 +3689,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4415,10 +3704,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4430,25 +3719,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "strb w20, [x28, #1017]", + "ldr s9, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4460,7 +3735,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4473,11 +3748,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4490,10 +3763,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4505,18 +3778,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4529,10 +3793,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -4544,19 +3808,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4569,8 +3823,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -4582,15 +3836,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s7, s0", + "str s7, [x8]", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4602,7 +3850,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4615,18 +3863,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4638,7 +3878,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4651,11 +3891,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4668,10 +3906,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -4683,14 +3921,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4703,8 +3937,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -4716,15 +3950,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4736,7 +3964,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4749,18 +3977,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4772,7 +3992,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4785,11 +4005,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4802,10 +4020,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -4817,14 +4035,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4837,8 +4051,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -4850,15 +4064,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4870,7 +4078,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4883,18 +4091,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4906,7 +4106,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4919,11 +4119,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4936,10 +4134,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -4951,14 +4149,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4971,8 +4165,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -4984,15 +4178,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5004,7 +4192,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5017,18 +4205,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5040,7 +4220,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5053,11 +4233,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5070,10 +4248,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5085,14 +4263,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5105,8 +4279,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -5118,15 +4292,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #76]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x4, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5138,7 +4306,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5151,18 +4319,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5174,7 +4334,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5187,11 +4347,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5204,10 +4362,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5219,13 +4377,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5237,7 +4392,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5250,18 +4405,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #72]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5273,7 +4420,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5286,11 +4433,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5303,10 +4448,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5318,14 +4463,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5338,8 +4478,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -5351,15 +4491,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5371,7 +4505,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5384,23 +4518,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5413,10 +4533,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5428,13 +4548,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5446,7 +4563,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5459,18 +4576,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5482,7 +4591,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5495,11 +4604,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5512,10 +4619,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5527,18 +4634,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5551,10 +4649,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5566,19 +4664,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5591,8 +4680,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -5604,15 +4693,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5624,7 +4707,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5637,11 +4720,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5654,10 +4735,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5669,13 +4750,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5687,7 +4765,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5700,18 +4778,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5723,7 +4793,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5736,11 +4806,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5753,10 +4821,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5768,18 +4836,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5792,10 +4851,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5807,19 +4866,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5832,8 +4882,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -5845,15 +4895,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #108]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x4, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5865,7 +4909,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5878,18 +4922,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5901,7 +4937,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5914,11 +4950,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5931,10 +4965,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5946,13 +4980,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5964,7 +4995,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5977,18 +5008,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #104]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6000,7 +5023,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6013,11 +5036,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6030,10 +5051,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -6045,14 +5066,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6065,8 +5081,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -6078,15 +5094,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s9, s0", + "str s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6099,10 +5108,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6114,30 +5123,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6150,10 +5138,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6165,18 +5153,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6189,10 +5168,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -6204,19 +5183,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6229,8 +5199,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -6242,15 +5212,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6262,7 +5226,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6275,23 +5239,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6304,10 +5254,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6319,30 +5269,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6355,10 +5285,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6370,18 +5300,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6394,10 +5315,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -6409,19 +5330,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6434,8 +5345,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -6447,15 +5358,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s7, s0", + "str s7, [x8]", + "ldr s7, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6467,7 +5372,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6480,18 +5385,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6503,7 +5400,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6516,11 +5413,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6533,10 +5428,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -6548,14 +5443,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6568,8 +5459,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -6581,15 +5472,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6601,7 +5486,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6614,18 +5499,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6637,7 +5514,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6650,11 +5527,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6667,10 +5542,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -6682,14 +5557,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6702,8 +5573,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -6715,15 +5586,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6735,7 +5600,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6748,18 +5613,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6771,7 +5628,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6784,11 +5641,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6801,10 +5656,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -6816,14 +5671,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6836,8 +5687,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -6849,15 +5700,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6869,7 +5714,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6882,18 +5727,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6905,7 +5742,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6918,11 +5755,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6935,10 +5770,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -6950,14 +5785,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x84 (132)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6970,8 +5801,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -6983,15 +5814,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7003,7 +5828,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7016,18 +5841,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #84]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7039,7 +5856,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7052,11 +5869,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7069,10 +5884,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -7084,13 +5899,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7102,7 +5914,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7115,18 +5927,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #80]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7138,7 +5942,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7151,11 +5955,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7168,10 +5970,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -7183,14 +5985,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7203,8 +6000,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -7216,32 +6013,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7254,10 +6027,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7269,13 +6042,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7287,7 +6057,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7300,23 +6070,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7329,10 +6085,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7344,18 +6100,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7368,10 +6115,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -7383,19 +6130,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7408,8 +6146,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -7421,20 +6159,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7447,10 +6173,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7462,13 +6188,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7480,7 +6203,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7493,23 +6216,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7522,10 +6231,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7537,18 +6246,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7561,10 +6261,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -7576,19 +6276,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7601,8 +6292,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -7614,15 +6305,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7634,7 +6319,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7647,18 +6332,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #116]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7670,7 +6347,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7683,11 +6360,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7700,10 +6375,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -7715,13 +6390,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7733,7 +6405,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7746,18 +6418,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #112]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7769,7 +6433,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7782,11 +6446,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7799,10 +6461,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -7814,14 +6476,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7834,8 +6491,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -7847,32 +6504,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7885,10 +6518,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7900,13 +6533,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7918,7 +6548,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7931,23 +6561,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7960,10 +6576,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7975,18 +6591,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7999,10 +6606,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -8014,19 +6621,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8039,8 +6637,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -8052,15 +6650,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8072,7 +6664,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8085,23 +6677,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8114,10 +6692,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -8129,30 +6707,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8165,10 +6723,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -8180,18 +6738,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8204,10 +6753,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -8219,19 +6768,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8244,8 +6783,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -8257,15 +6796,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s7, s0", + "str s7, [x8]", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8277,7 +6810,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8290,18 +6823,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8313,7 +6838,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8326,11 +6851,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8343,10 +6866,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -8358,14 +6881,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8378,8 +6897,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -8391,15 +6910,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8411,7 +6924,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8424,18 +6937,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8447,7 +6952,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8460,11 +6965,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8477,10 +6980,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -8492,14 +6995,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8512,8 +7011,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -8525,15 +7024,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8545,7 +7038,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8558,18 +7051,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8581,7 +7066,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8594,11 +7079,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8611,10 +7094,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -8626,14 +7109,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8646,8 +7125,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -8659,15 +7138,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8679,7 +7152,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8692,18 +7165,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8715,7 +7180,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8728,11 +7193,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8745,10 +7208,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -8760,14 +7223,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8780,8 +7239,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -8793,15 +7252,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #84]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x4, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8813,7 +7266,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8826,18 +7279,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8849,7 +7294,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8862,11 +7307,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8879,10 +7322,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -8894,13 +7337,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8912,7 +7352,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8925,18 +7365,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #80]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8948,7 +7380,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8961,11 +7393,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8978,10 +7408,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -8993,14 +7423,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9013,8 +7438,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -9026,32 +7451,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9064,10 +7465,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9079,13 +7480,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9097,7 +7495,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9110,23 +7508,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9139,10 +7523,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9154,18 +7538,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9178,10 +7553,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -9193,19 +7568,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9218,8 +7584,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -9231,15 +7597,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9251,7 +7611,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9264,23 +7624,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9293,10 +7639,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9308,30 +7654,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9344,10 +7670,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9359,18 +7685,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9383,10 +7700,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -9398,19 +7715,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9423,8 +7731,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -9436,15 +7744,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #116]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x4, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9456,7 +7758,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9469,18 +7771,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9492,7 +7786,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9505,11 +7799,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9522,10 +7814,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -9537,13 +7829,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9555,7 +7844,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9568,18 +7857,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #112]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9591,7 +7872,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9604,11 +7885,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9621,10 +7900,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -9636,14 +7915,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9656,8 +7930,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -9669,32 +7943,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9707,10 +7957,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9722,13 +7972,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9740,7 +7987,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9753,23 +8000,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9782,10 +8015,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9797,18 +8030,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9821,10 +8045,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -9836,19 +8060,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9861,8 +8076,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -9874,20 +8089,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9900,10 +8103,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9915,13 +8118,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9933,7 +8133,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9946,23 +8146,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9975,10 +8161,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9990,18 +8176,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10014,10 +8191,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -10029,19 +8206,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10054,8 +8221,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -10067,43 +8234,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s5, s0", + "str s5, [x8]", + "ldr s5, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10115,7 +8248,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10128,18 +8261,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10151,7 +8276,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10164,11 +8289,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10181,10 +8304,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10196,14 +8319,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10216,8 +8335,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -10229,15 +8348,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10249,7 +8362,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10262,18 +8375,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10285,7 +8390,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10298,11 +8403,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10315,10 +8418,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10330,14 +8433,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10350,8 +8449,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -10363,15 +8462,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10383,7 +8476,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10396,18 +8489,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10419,7 +8504,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10432,11 +8517,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10449,10 +8532,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -10464,14 +8547,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10484,8 +8563,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -10497,15 +8576,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10517,7 +8590,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10530,18 +8603,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10553,7 +8618,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10566,11 +8631,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10583,10 +8646,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -10598,14 +8661,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10618,8 +8677,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -10631,15 +8690,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10651,7 +8704,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10664,18 +8717,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #92]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10687,7 +8732,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10700,11 +8745,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10717,10 +8760,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10732,13 +8775,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10750,7 +8790,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10763,18 +8803,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #88]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10786,7 +8818,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10799,11 +8831,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10816,10 +8846,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -10831,25 +8861,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10861,7 +8876,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10874,11 +8889,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10891,10 +8904,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -10906,25 +8919,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10936,7 +8934,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10949,11 +8947,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10966,10 +8962,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -10981,18 +8977,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11005,10 +8992,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -11020,19 +9007,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11045,8 +9023,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -11058,27 +9036,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s7, s0", + "str s7, [x21]", + "strb w20, [x28, #1017]", + "ldr s7, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11090,7 +9051,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11103,11 +9064,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11120,10 +9079,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11135,25 +9094,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb w20, [x28, #1017]", + "ldr s7, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11165,7 +9110,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11178,11 +9123,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11195,10 +9138,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11210,18 +9153,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11234,10 +9168,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -11249,18 +9183,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11272,7 +9198,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11285,18 +9211,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #124]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11308,7 +9226,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11321,11 +9239,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11338,10 +9254,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -11353,13 +9269,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #120]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11371,7 +9284,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11384,18 +9297,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11407,7 +9312,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11420,11 +9325,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11437,10 +9340,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -11452,30 +9355,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11488,10 +9370,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11503,30 +9385,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11539,10 +9400,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11554,18 +9415,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11578,10 +9430,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -11593,19 +9445,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11618,8 +9461,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -11631,20 +9474,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11657,10 +9488,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11672,30 +9503,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11708,10 +9519,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11723,18 +9534,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11747,10 +9549,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -11762,19 +9564,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11787,8 +9579,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -11800,15 +9592,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s6, s0", + "str s6, [x8]", + "ldr s6, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11820,7 +9606,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11833,18 +9619,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11856,7 +9634,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11869,11 +9647,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11886,10 +9662,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -11901,14 +9677,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11921,8 +9693,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -11934,15 +9706,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11954,7 +9720,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11967,23 +9733,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11996,10 +9748,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -12011,14 +9763,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12031,8 +9779,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -12044,15 +9792,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12064,7 +9806,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12077,18 +9819,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12100,7 +9834,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12113,11 +9847,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12130,10 +9862,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -12145,14 +9877,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12165,8 +9893,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -12178,15 +9906,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12198,7 +9920,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12211,11 +9933,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12228,10 +9948,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -12243,14 +9963,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12263,8 +9979,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -12276,15 +9992,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #92]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x4, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12296,7 +10006,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12309,18 +10019,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12332,7 +10034,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12345,11 +10047,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12362,10 +10062,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -12377,13 +10077,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12395,7 +10092,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12408,18 +10105,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #88]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12431,7 +10120,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12444,11 +10133,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12461,10 +10148,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -12476,30 +10163,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12512,10 +10178,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -12527,30 +10193,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12563,10 +10208,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -12578,18 +10223,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12602,10 +10238,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -12617,19 +10253,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12642,8 +10269,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -12655,20 +10282,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12681,10 +10296,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -12696,30 +10311,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12732,10 +10327,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -12747,18 +10342,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12771,8 +10357,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", @@ -12786,46 +10372,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #124]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x4, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12837,7 +10387,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12850,18 +10400,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12873,7 +10415,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12886,11 +10428,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12903,10 +10443,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -12918,13 +10458,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12936,7 +10473,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12949,18 +10486,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #120]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12972,7 +10501,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12985,11 +10514,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13002,10 +10529,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -13017,25 +10544,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13047,7 +10559,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13060,11 +10572,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13077,10 +10587,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -13092,25 +10602,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13122,7 +10617,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13135,11 +10630,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13152,10 +10645,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -13167,18 +10660,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13191,10 +10675,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -13206,19 +10690,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13231,8 +10706,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -13244,15 +10719,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13264,7 +10733,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13277,11 +10746,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13294,10 +10761,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -13309,25 +10776,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb w20, [x28, #1017]", + "ldr s6, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13339,7 +10792,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13352,11 +10805,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13369,10 +10820,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -13384,18 +10835,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13408,10 +10850,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -13423,18 +10865,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13446,7 +10880,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13459,18 +10893,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13482,7 +10908,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13495,11 +10921,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13512,10 +10936,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -13527,14 +10951,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13547,8 +10967,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -13560,32 +10980,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13598,10 +10994,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -13613,14 +11009,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13633,8 +11025,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -13646,15 +11038,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13666,7 +11052,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13679,18 +11065,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13702,7 +11080,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13715,11 +11093,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13732,10 +11108,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -13747,14 +11123,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13767,8 +11139,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -13780,20 +11152,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13806,10 +11166,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -13821,18 +11181,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13844,7 +11196,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13857,18 +11209,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13880,7 +11224,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13893,11 +11237,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13910,10 +11252,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -13925,13 +11267,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13943,7 +11282,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13956,18 +11295,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13979,7 +11310,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13992,11 +11323,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14009,10 +11338,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -14024,13 +11353,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14042,7 +11368,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14055,18 +11381,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14078,7 +11396,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14091,11 +11409,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14108,10 +11424,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -14123,13 +11439,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14141,7 +11454,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14154,18 +11467,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14177,7 +11482,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14190,11 +11495,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14207,10 +11510,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -14222,14 +11525,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14242,8 +11540,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -14255,32 +11553,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14293,10 +11567,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -14308,14 +11582,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14328,8 +11597,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -14341,15 +11610,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s7, s0", + "str s7, [x4]", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14361,7 +11624,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14374,23 +11637,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14403,10 +11652,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -14418,14 +11667,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w4, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14438,8 +11683,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -14451,32 +11696,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x21]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14489,10 +11711,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -14504,14 +11726,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14524,8 +11742,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -14537,29 +11755,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14571,7 +11769,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14584,11 +11782,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14601,10 +11797,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -14616,14 +11812,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14636,8 +11828,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -14649,15 +11841,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14669,7 +11855,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14682,18 +11868,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14705,7 +11883,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14718,11 +11896,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14735,10 +11911,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -14750,13 +11926,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14768,7 +11941,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14781,18 +11954,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14804,7 +11969,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14817,11 +11982,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14834,10 +11997,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -14849,13 +12012,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14867,7 +12027,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14880,18 +12040,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14903,7 +12055,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14916,11 +12068,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14933,10 +12083,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -14948,13 +12098,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14966,7 +12113,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14979,18 +12126,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15002,7 +12141,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15015,11 +12154,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15032,10 +12169,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15047,30 +12184,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15083,10 +12199,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15098,14 +12214,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w4, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15118,8 +12230,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -15131,32 +12243,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15169,10 +12257,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -15184,14 +12272,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w4, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15204,8 +12288,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -15217,20 +12301,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15243,10 +12315,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -15258,14 +12330,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15278,8 +12346,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -15291,32 +12359,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15329,10 +12374,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15344,14 +12389,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15364,8 +12405,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -15377,43 +12418,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15425,7 +12432,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15438,18 +12445,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15461,7 +12460,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15474,11 +12473,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15491,10 +12488,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15506,13 +12503,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15524,7 +12518,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15537,18 +12531,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15560,7 +12546,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15573,11 +12559,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15590,10 +12574,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -15605,13 +12589,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15623,7 +12604,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15636,18 +12617,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15659,7 +12632,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15672,11 +12645,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15689,10 +12660,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15704,13 +12675,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15722,7 +12690,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15735,18 +12703,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15758,7 +12718,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15771,11 +12731,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15788,10 +12746,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -15803,30 +12761,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15839,10 +12776,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15854,18 +12791,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15878,8 +12806,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -15893,14 +12821,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15913,8 +12837,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -15926,20 +12850,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15952,10 +12864,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -15967,23 +12879,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15996,8 +12894,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -16011,13 +12909,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16029,7 +12924,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16042,23 +12937,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16071,10 +12952,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -16086,14 +12967,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w4, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16106,8 +12983,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -16119,32 +12996,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16157,10 +13010,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -16172,14 +13025,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w4, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16192,8 +13041,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -16205,27 +13054,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s7, s0", + "str s7, [x21]", + "strb w20, [x28, #1017]", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16237,7 +13069,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16250,11 +13082,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16267,10 +13097,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16282,14 +13112,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16302,8 +13128,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -16315,20 +13141,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16341,10 +13155,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16356,14 +13170,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16376,8 +13186,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -16389,29 +13199,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16423,7 +13213,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16436,18 +13226,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16459,7 +13241,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16472,11 +13254,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16489,10 +13269,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -16504,13 +13284,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16522,7 +13299,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16535,18 +13312,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16558,7 +13327,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16571,11 +13340,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16588,10 +13355,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16603,13 +13370,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16621,7 +13385,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16634,18 +13398,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16657,7 +13413,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16670,11 +13426,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16687,10 +13441,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -16702,13 +13456,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16720,7 +13471,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16733,18 +13484,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16756,7 +13499,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16769,11 +13512,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16786,10 +13527,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16801,30 +13542,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16837,10 +13557,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16852,18 +13572,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16876,8 +13587,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -16891,14 +13602,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16911,8 +13618,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -16924,20 +13631,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16950,10 +13645,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -16965,23 +13660,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16994,8 +13675,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -17009,30 +13690,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17045,10 +13705,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17060,14 +13720,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w4, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17080,8 +13736,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -17093,15 +13749,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17113,7 +13763,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17126,23 +13776,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17155,10 +13791,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -17170,14 +13806,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w4, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17190,8 +13822,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -17203,20 +13835,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17229,10 +13849,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -17244,14 +13864,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17264,8 +13880,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -17277,15 +13893,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17297,7 +13907,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17310,11 +13920,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17327,10 +13935,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17342,14 +13950,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17362,8 +13966,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -17375,29 +13979,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17409,7 +13993,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17422,18 +14006,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17445,7 +14021,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17458,11 +14034,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17475,10 +14049,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -17490,13 +14064,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17508,7 +14079,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17521,18 +14092,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17544,7 +14107,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17557,11 +14120,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17574,10 +14135,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -17589,13 +14150,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17607,7 +14165,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17620,18 +14178,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17643,7 +14193,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17656,11 +14206,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17673,10 +14221,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17688,13 +14236,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17706,7 +14251,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17719,18 +14264,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17742,7 +14279,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17755,11 +14292,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17772,10 +14307,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17787,14 +14322,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17807,8 +14337,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -17820,32 +14350,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17858,10 +14364,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -17873,14 +14379,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w4, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17893,8 +14395,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -17906,15 +14408,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17926,7 +14422,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17939,23 +14435,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17968,10 +14450,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -17983,14 +14465,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w4, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18003,8 +14481,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -18016,32 +14494,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x21]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18054,10 +14509,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -18069,14 +14524,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18089,8 +14540,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -18102,29 +14553,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18136,7 +14567,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18149,11 +14580,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18166,10 +14595,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -18181,14 +14610,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18201,8 +14626,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -18214,15 +14639,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18234,7 +14653,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18247,18 +14666,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18270,7 +14681,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18283,11 +14694,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18300,10 +14709,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -18315,13 +14724,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18333,7 +14739,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18346,18 +14752,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18369,7 +14767,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18382,11 +14780,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18399,10 +14795,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -18414,13 +14810,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18432,7 +14825,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18445,18 +14838,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18468,7 +14853,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18481,11 +14866,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18498,10 +14881,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -18513,13 +14896,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18531,7 +14911,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18544,18 +14924,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18567,7 +14939,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18580,11 +14952,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18597,10 +14967,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -18612,30 +14982,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18648,10 +14997,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -18663,14 +15012,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w4, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18683,8 +15028,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -18696,32 +15041,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18734,10 +15055,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -18749,14 +15070,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w4, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18769,8 +15086,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -18782,20 +15099,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18808,10 +15113,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -18823,14 +15128,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18843,8 +15144,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -18856,32 +15157,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18894,10 +15172,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -18909,14 +15187,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18929,8 +15203,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -18942,43 +15216,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18990,7 +15230,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19003,18 +15243,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19026,7 +15258,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19039,11 +15271,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19056,10 +15286,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -19071,13 +15301,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19089,7 +15316,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19102,18 +15329,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19125,7 +15344,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19138,11 +15357,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19155,10 +15372,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -19170,25 +15387,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19200,7 +15402,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19213,11 +15415,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19232,8 +15432,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -19245,13 +15445,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19263,7 +15460,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19276,18 +15473,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19299,7 +15488,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19312,11 +15501,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19329,10 +15516,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -19344,30 +15531,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19380,10 +15546,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -19395,18 +15561,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19419,8 +15576,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -19434,14 +15591,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19454,8 +15607,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -19467,20 +15620,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19493,10 +15634,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -19508,23 +15649,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19537,8 +15664,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -19552,13 +15679,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19570,7 +15694,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19583,23 +15707,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19612,10 +15722,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -19627,14 +15737,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w4, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19647,8 +15753,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -19660,32 +15766,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19698,10 +15780,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -19713,14 +15795,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w4, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19733,8 +15811,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -19746,27 +15824,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s7, s0", + "str s7, [x21]", + "strb w20, [x28, #1017]", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19778,7 +15839,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19791,11 +15852,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19808,10 +15867,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -19823,14 +15882,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19843,8 +15898,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -19856,20 +15911,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #104]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19882,10 +15925,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -19897,14 +15940,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19917,8 +15956,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -19930,29 +15969,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #108]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19964,7 +15983,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19977,18 +15996,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20000,7 +16011,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20013,11 +16024,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20030,10 +16039,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -20045,14 +16054,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20065,8 +16070,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -20078,15 +16083,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20098,7 +16097,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20111,18 +16110,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20134,7 +16125,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20147,11 +16138,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20164,10 +16153,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -20179,14 +16168,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20199,8 +16184,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -20212,15 +16197,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20232,7 +16211,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20245,11 +16224,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20262,8 +16239,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", @@ -20277,13 +16254,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20295,7 +16269,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20308,18 +16282,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20331,7 +16297,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20344,11 +16310,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20361,10 +16325,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -20376,30 +16340,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20414,8 +16357,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -20427,18 +16370,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20451,8 +16385,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -20466,14 +16400,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20486,8 +16416,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -20499,20 +16429,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20525,10 +16443,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -20540,18 +16458,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20564,10 +16473,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -20582,29 +16491,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "ldr s3, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20616,7 +16503,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20629,23 +16516,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20673,14 +16546,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20693,8 +16562,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -20706,15 +16575,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20726,7 +16589,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20739,18 +16602,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20762,7 +16617,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20775,11 +16630,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20794,8 +16647,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -20807,14 +16660,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20827,8 +16676,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -20840,15 +16689,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20860,7 +16703,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20873,11 +16716,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20890,10 +16731,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -20908,11 +16749,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20939,13 +16776,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -20974,15 +16805,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "ldr s3, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20994,7 +16817,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21007,11 +16830,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21024,10 +16845,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -21042,11 +16863,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21073,20 +16890,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #124]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x21]", "adds w26, w8, #0x88 (136)", - "strb w21, [x28, #1298]", "mov x27, x8", - "mov x8, x26" + "mov x8, x26", + "strb w20, [x28, #1298]" ] }, "Block2": { - "ExpectedInstructionCount": 17382, + "ExpectedInstructionCount": 14022, "x86Insts": [ "sub esp,0x90", "fld dword [ecx + 0x4]", @@ -21525,7 +17337,6 @@ ], "ExpectedArm64ASM": [ "sub w8, w8, #0x90 (144)", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -21554,30 +17365,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x0", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #8]", + "ldr s3, [x5, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21589,7 +17377,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21602,11 +17390,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21619,10 +17405,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -21634,25 +17420,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x5, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21664,7 +17435,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21677,11 +17448,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21696,8 +17465,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -21709,13 +17478,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x4, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21727,7 +17493,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21740,18 +17506,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21763,7 +17521,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21776,11 +17534,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21793,10 +17549,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -21808,13 +17564,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21826,7 +17579,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21839,18 +17592,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21862,7 +17607,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21875,11 +17620,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21892,10 +17635,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -21907,13 +17650,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21925,7 +17665,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21938,18 +17678,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21961,7 +17693,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21974,11 +17706,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21991,10 +17721,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22006,14 +17736,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22026,8 +17752,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -22039,15 +17765,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22059,7 +17779,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22072,18 +17792,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22095,7 +17807,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22108,11 +17820,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22125,10 +17835,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22140,14 +17850,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22160,8 +17866,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -22173,15 +17879,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22193,7 +17893,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22206,18 +17906,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #96]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22229,7 +17921,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22242,11 +17934,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22259,10 +17949,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -22274,13 +17964,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #100]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22292,7 +17979,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22305,18 +17992,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22328,7 +18007,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22341,11 +18020,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22358,10 +18035,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -22373,14 +18050,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22393,8 +18066,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -22406,15 +18079,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22426,7 +18093,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22439,18 +18106,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #96]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22462,7 +18121,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22475,11 +18134,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22492,10 +18149,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22507,14 +18164,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22527,8 +18179,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -22540,15 +18192,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22560,7 +18206,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22573,18 +18219,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #100]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22596,7 +18234,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22609,11 +18247,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22626,10 +18262,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22641,14 +18277,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22661,8 +18293,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -22674,32 +18306,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22712,10 +18320,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -22727,14 +18335,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22747,8 +18351,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -22760,15 +18364,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22780,7 +18378,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22793,23 +18391,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22822,10 +18406,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -22837,14 +18421,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22857,8 +18437,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -22870,32 +18450,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", + "mov w20, #0x0", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22908,10 +18466,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22923,14 +18481,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22943,8 +18497,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -22956,29 +18510,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22990,7 +18524,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23003,11 +18537,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23020,10 +18552,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -23035,14 +18567,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23055,8 +18583,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -23068,15 +18596,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23088,7 +18610,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23101,18 +18623,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23124,7 +18638,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23137,11 +18651,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23154,10 +18666,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -23169,14 +18681,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23189,8 +18697,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -23202,15 +18710,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23222,7 +18724,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23235,18 +18737,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23258,7 +18752,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23271,11 +18765,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23288,10 +18780,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -23303,14 +18795,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23323,8 +18811,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -23336,15 +18824,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23356,7 +18838,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23369,18 +18851,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23392,7 +18866,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23405,11 +18879,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23422,10 +18894,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -23437,14 +18909,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23457,8 +18925,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -23470,15 +18938,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23490,7 +18952,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23503,18 +18965,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23526,7 +18980,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23539,11 +18993,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23556,10 +19008,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -23571,14 +19023,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23591,8 +19039,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -23604,15 +19052,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23624,7 +19066,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23637,18 +19079,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #72]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23660,7 +19094,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23673,11 +19107,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23690,10 +19122,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -23705,13 +19137,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #76]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23723,7 +19152,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23736,18 +19165,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23759,7 +19180,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23772,11 +19193,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23789,10 +19208,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -23804,13 +19223,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23822,7 +19238,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23835,18 +19251,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #72]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23858,7 +19266,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23871,11 +19279,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23888,10 +19294,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -23903,14 +19309,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23923,8 +19325,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -23936,15 +19338,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23956,7 +19352,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23969,18 +19365,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #76]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23992,7 +19380,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24005,11 +19393,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24022,10 +19408,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -24037,14 +19423,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24057,8 +19439,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -24070,15 +19452,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24090,7 +19466,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24103,18 +19479,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #104]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24126,7 +19494,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24139,11 +19507,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24156,10 +19522,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -24171,13 +19537,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #108]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24189,7 +19552,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24202,18 +19565,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24225,7 +19580,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24238,11 +19593,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24255,10 +19608,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -24270,14 +19623,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24290,8 +19639,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -24303,15 +19652,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24323,7 +19666,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24336,18 +19679,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #104]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24359,7 +19694,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24372,11 +19707,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24389,10 +19722,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -24404,14 +19737,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24424,8 +19752,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -24437,15 +19765,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24457,7 +19779,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24470,18 +19792,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #108]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24493,7 +19807,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24506,11 +19820,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24523,10 +19835,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -24538,14 +19850,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24558,8 +19866,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -24571,32 +19879,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24609,10 +19893,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -24624,14 +19908,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24644,8 +19924,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -24657,15 +19937,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24677,7 +19951,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24690,23 +19964,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24719,10 +19979,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -24734,14 +19994,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x84 (132)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24754,8 +20010,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -24767,32 +20023,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24805,10 +20038,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -24820,14 +20053,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24840,8 +20069,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -24853,29 +20082,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24887,7 +20096,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24900,11 +20109,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24917,10 +20124,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -24932,14 +20139,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24952,8 +20155,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -24965,15 +20168,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24985,7 +20182,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24998,18 +20195,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25021,7 +20210,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -25034,11 +20223,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25051,10 +20238,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -25066,13 +20253,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25084,7 +20268,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -25097,18 +20281,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25120,7 +20296,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -25133,11 +20309,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25150,10 +20324,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -25165,30 +20339,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25201,10 +20354,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25216,30 +20369,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25252,10 +20384,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25267,18 +20399,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25291,10 +20414,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -25306,19 +20429,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25331,8 +20445,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -25344,20 +20458,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25370,10 +20472,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25385,30 +20487,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25421,10 +20503,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25436,18 +20518,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25460,10 +20533,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -25475,19 +20548,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x88 (136)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25500,8 +20564,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -25513,15 +20577,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #136]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25533,7 +20591,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -25546,18 +20604,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25569,7 +20619,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -25582,11 +20632,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25599,10 +20647,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -25614,13 +20662,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25632,7 +20677,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -25645,18 +20690,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25668,7 +20705,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -25681,11 +20718,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25698,10 +20733,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -25713,30 +20748,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25749,10 +20763,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25764,30 +20778,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25800,10 +20793,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25815,18 +20808,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25839,10 +20823,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -25854,19 +20838,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25879,8 +20854,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -25892,32 +20867,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x21]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25930,10 +20882,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25945,30 +20897,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25981,10 +20913,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25996,18 +20928,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26020,10 +20943,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -26035,19 +20958,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26060,8 +20974,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -26073,15 +20987,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26093,7 +21001,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26106,18 +21014,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #80]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26129,7 +21029,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26142,11 +21042,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26159,10 +21057,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -26174,13 +21072,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #84]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26192,7 +21087,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26205,18 +21100,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26228,7 +21115,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26241,11 +21128,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26258,10 +21143,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -26273,13 +21158,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26291,7 +21173,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26304,18 +21186,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #80]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26327,7 +21201,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26340,11 +21214,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26357,10 +21229,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -26372,14 +21244,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26392,8 +21260,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -26405,15 +21273,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26425,7 +21287,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26438,18 +21300,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #84]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26461,7 +21315,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26474,11 +21328,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26491,10 +21343,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -26506,14 +21358,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26526,8 +21374,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -26539,15 +21387,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26559,7 +21401,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26572,18 +21414,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #112]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26595,7 +21429,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26608,11 +21442,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26625,10 +21457,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -26640,13 +21472,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #116]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26658,7 +21487,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26671,18 +21500,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26694,7 +21515,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26707,11 +21528,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26724,10 +21543,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -26739,14 +21558,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26759,8 +21574,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -26772,15 +21587,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26792,7 +21601,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26805,18 +21614,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #112]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26828,7 +21629,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26841,11 +21642,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26858,10 +21657,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -26873,14 +21672,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26893,8 +21687,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -26906,15 +21700,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26926,7 +21714,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26939,18 +21727,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #116]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26962,7 +21742,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26975,11 +21755,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26992,10 +21770,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -27007,14 +21785,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27027,8 +21801,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27040,32 +21814,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27078,10 +21828,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -27093,14 +21843,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27113,8 +21859,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27126,15 +21872,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27146,7 +21886,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27159,23 +21899,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27188,10 +21914,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -27203,14 +21929,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27223,8 +21945,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27236,32 +21958,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27274,10 +21973,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -27289,14 +21988,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27309,8 +22004,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27322,29 +22017,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27356,7 +22031,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27369,11 +22044,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27386,10 +22059,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -27401,14 +22074,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27421,8 +22090,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27434,15 +22103,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27454,7 +22117,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27467,18 +22130,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27490,7 +22145,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27503,11 +22158,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27520,10 +22173,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -27535,13 +22188,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27553,7 +22203,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27566,18 +22216,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27589,7 +22231,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27602,11 +22244,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27619,10 +22259,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -27634,30 +22274,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27670,10 +22289,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -27685,18 +22304,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27709,8 +22319,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -27724,14 +22334,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27744,8 +22350,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27757,20 +22363,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27783,10 +22377,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -27798,18 +22392,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27822,8 +22407,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -27837,14 +22422,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27857,8 +22438,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27870,29 +22451,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27904,7 +22465,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27917,18 +22478,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27940,7 +22493,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27953,11 +22506,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27970,10 +22521,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -27985,13 +22536,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28003,7 +22551,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28016,18 +22564,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28039,7 +22579,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28052,11 +22592,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28069,10 +22607,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -28084,30 +22622,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28120,10 +22637,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -28135,18 +22652,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28159,8 +22667,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -28174,14 +22682,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28194,8 +22698,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28207,20 +22711,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28233,10 +22725,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -28248,18 +22740,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28272,8 +22755,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -28287,14 +22770,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28307,8 +22786,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28320,29 +22799,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #88]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x4, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28354,7 +22813,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28367,18 +22826,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28390,7 +22841,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28403,11 +22854,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28420,10 +22869,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -28435,13 +22884,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28453,7 +22899,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28466,18 +22912,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #92]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28489,7 +22927,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28502,11 +22940,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28519,10 +22955,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -28534,13 +22970,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28552,7 +22985,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28565,18 +22998,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #88]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28588,7 +23013,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28601,11 +23026,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28618,10 +23041,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -28633,14 +23056,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28653,8 +23072,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28666,15 +23085,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28686,7 +23099,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28699,18 +23112,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #92]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28722,7 +23127,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28735,11 +23140,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28752,10 +23155,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -28767,14 +23170,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28787,8 +23186,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28800,15 +23199,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #120]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x4, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28820,7 +23213,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28833,18 +23226,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28856,7 +23241,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28869,11 +23254,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28886,10 +23269,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -28901,13 +23284,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28919,7 +23299,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28932,18 +23312,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #124]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28955,7 +23327,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28968,11 +23340,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28985,10 +23355,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -29000,14 +23370,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29020,8 +23386,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29033,15 +23399,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29053,7 +23413,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29066,18 +23426,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #120]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29089,7 +23441,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29102,11 +23454,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29119,10 +23469,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -29134,14 +23484,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29154,8 +23499,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29167,15 +23512,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29187,7 +23526,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29200,18 +23539,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #124]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29223,7 +23554,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29236,11 +23567,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29253,10 +23582,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -29268,14 +23597,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29288,8 +23613,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29301,32 +23626,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29339,10 +23640,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -29354,14 +23655,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29374,8 +23671,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29387,15 +23684,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29407,7 +23698,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29420,23 +23711,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29449,10 +23726,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -29464,14 +23741,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x8c (140)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29484,8 +23757,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29497,32 +23770,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #140]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x21]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29535,10 +23785,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -29550,14 +23800,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29570,8 +23816,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29583,29 +23829,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29617,7 +23843,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29630,11 +23856,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29647,10 +23871,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -29662,14 +23886,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29682,8 +23902,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29695,15 +23915,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29715,7 +23929,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29728,18 +23942,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29751,7 +23957,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29764,11 +23970,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29781,10 +23985,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -29796,13 +24000,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29814,7 +24015,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29827,18 +24028,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29850,7 +24043,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29863,11 +24056,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29880,10 +24071,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -29895,30 +24086,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29931,10 +24101,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -29946,30 +24116,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29982,10 +24131,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -29997,18 +24146,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30021,10 +24161,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -30036,19 +24176,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30061,8 +24192,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -30074,32 +24205,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x21]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30112,10 +24220,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -30127,30 +24235,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30163,10 +24251,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -30178,18 +24266,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30202,10 +24281,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -30217,19 +24296,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30242,8 +24312,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -30255,15 +24325,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30275,7 +24339,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30288,18 +24352,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30311,7 +24367,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30324,11 +24380,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30341,10 +24395,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -30356,13 +24410,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30374,7 +24425,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30387,18 +24438,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30410,7 +24453,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30423,11 +24466,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30440,10 +24481,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -30455,30 +24496,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30491,10 +24511,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -30506,30 +24526,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30542,10 +24541,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -30557,18 +24556,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30581,10 +24571,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -30596,19 +24586,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30621,8 +24601,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -30634,20 +24614,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30660,10 +24628,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -30675,30 +24643,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30711,10 +24659,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -30726,18 +24674,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30750,10 +24689,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -30765,46 +24704,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30816,7 +24719,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30829,18 +24732,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30852,7 +24747,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30865,11 +24760,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30882,10 +24775,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -30897,13 +24790,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30915,7 +24805,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30928,18 +24818,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30951,7 +24833,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30964,11 +24846,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30981,10 +24861,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -30996,14 +24876,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31016,8 +24892,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31029,15 +24905,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31049,7 +24919,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31062,18 +24932,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31085,7 +24947,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31098,11 +24960,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31115,10 +24975,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -31130,14 +24990,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31150,8 +25006,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31163,15 +25019,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31183,7 +25033,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31196,18 +25046,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31219,7 +25061,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31232,11 +25074,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31249,10 +25089,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -31264,14 +25104,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31284,8 +25120,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31297,15 +25133,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31317,7 +25147,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31330,18 +25160,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31353,7 +25175,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31366,11 +25188,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31383,10 +25203,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -31398,13 +25218,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31416,7 +25233,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31429,23 +25246,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31458,10 +25261,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -31473,14 +25276,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31493,8 +25292,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31506,15 +25305,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31526,7 +25319,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31539,18 +25332,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31562,7 +25347,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31575,11 +25360,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31592,10 +25375,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -31607,14 +25390,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31627,8 +25405,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31640,27 +25418,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "fmov s6, s0", + "str s6, [x8]", + "strb w20, [x28, #1017]", + "ldr s6, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31672,7 +25433,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31685,11 +25446,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31704,8 +25463,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -31717,14 +25476,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31737,8 +25492,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31750,44 +25505,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s3, s0", + "str s3, [x21]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31800,10 +25520,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -31815,14 +25535,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31835,8 +25551,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31848,15 +25564,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #96]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31868,7 +25578,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31881,18 +25591,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s6, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31904,7 +25606,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31917,11 +25619,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31936,8 +25636,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -31949,14 +25649,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31969,8 +25665,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31982,32 +25678,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #100]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s3, s0", + "str s3, [x21]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32020,10 +25693,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -32035,14 +25708,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32055,8 +25724,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -32068,29 +25737,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #104]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32102,7 +25751,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32115,18 +25764,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32138,7 +25779,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32151,11 +25792,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32170,8 +25809,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -32183,14 +25822,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32203,8 +25838,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -32216,15 +25851,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #108]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32236,7 +25865,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32249,18 +25878,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32272,7 +25893,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32285,11 +25906,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32304,8 +25923,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -32317,14 +25936,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32337,8 +25952,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -32350,15 +25965,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #112]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32370,7 +25979,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32383,18 +25992,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32406,7 +26007,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32419,11 +26020,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32438,8 +26037,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -32451,14 +26050,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32471,8 +26066,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -32484,15 +26079,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #116]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32504,7 +26093,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32517,18 +26106,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32540,7 +26121,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32553,11 +26134,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32572,8 +26151,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -32585,14 +26164,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32605,8 +26180,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -32618,15 +26193,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #120]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32638,7 +26207,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32651,18 +26220,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32674,7 +26235,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32687,11 +26248,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32706,8 +26265,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -32719,14 +26278,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32739,8 +26294,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -32752,15 +26307,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #124]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32772,7 +26321,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32785,18 +26334,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32808,7 +26349,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32821,11 +26362,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32840,8 +26379,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -32853,13 +26392,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32871,7 +26407,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32884,18 +26420,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32907,7 +26435,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32920,11 +26448,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32937,10 +26463,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -32952,13 +26478,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32970,7 +26493,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32983,18 +26506,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33006,7 +26521,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33019,11 +26534,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33036,10 +26549,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -33051,14 +26564,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33071,8 +26580,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -33084,15 +26593,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33104,7 +26607,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33117,18 +26620,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33140,7 +26635,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33153,11 +26648,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33170,10 +26663,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -33185,14 +26678,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33205,8 +26694,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -33218,15 +26707,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33238,7 +26721,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33251,18 +26734,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33274,7 +26749,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33287,11 +26762,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33304,10 +26777,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -33319,13 +26792,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33337,7 +26807,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33350,18 +26820,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #136]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33373,7 +26835,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33386,11 +26848,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33403,10 +26863,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -33418,14 +26878,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33438,8 +26894,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -33451,15 +26907,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33471,7 +26921,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33484,18 +26934,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33507,7 +26949,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33520,11 +26962,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33537,10 +26977,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -33552,14 +26992,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33572,8 +27007,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -33585,15 +27020,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #136]", + "fmov s6, s0", + "str s6, [x8]", + "ldr s6, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33605,7 +27034,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33618,18 +27047,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33641,7 +27062,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33654,11 +27075,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33671,10 +27090,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -33686,14 +27105,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33706,8 +27121,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -33719,32 +27134,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33757,10 +27148,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -33772,14 +27163,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w4, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33792,8 +27179,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -33805,15 +27192,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33825,7 +27206,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33838,23 +27219,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33867,10 +27234,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -33882,14 +27249,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w4, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33902,8 +27265,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -33915,32 +27278,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #68]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x21]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33955,8 +27295,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -33968,14 +27308,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33988,8 +27324,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -34001,29 +27337,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #72]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34035,7 +27351,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34048,11 +27364,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34065,10 +27379,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -34080,14 +27394,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34100,8 +27410,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -34113,15 +27423,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #76]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34133,7 +27437,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34146,18 +27450,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34169,7 +27465,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34182,11 +27478,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34201,8 +27495,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -34214,14 +27508,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34234,8 +27524,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -34247,15 +27537,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #80]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34267,7 +27551,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34280,18 +27564,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34303,7 +27579,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34316,11 +27592,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34335,8 +27609,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -34348,14 +27622,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34368,8 +27638,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -34381,15 +27651,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #84]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34401,7 +27665,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34414,18 +27678,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34437,7 +27693,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34450,11 +27706,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34469,8 +27723,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -34482,14 +27736,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34502,8 +27752,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -34515,15 +27765,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #88]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34535,7 +27779,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34548,18 +27792,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34571,7 +27807,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34584,11 +27820,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34603,8 +27837,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -34616,14 +27850,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w4, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34636,8 +27866,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -34649,15 +27879,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #92]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34669,7 +27893,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34682,18 +27906,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34705,7 +27921,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34718,11 +27934,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34737,8 +27951,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -34750,13 +27964,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34768,7 +27979,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34781,18 +27992,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34804,7 +28007,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34817,11 +28020,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34834,10 +28035,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -34849,30 +28050,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34887,8 +28067,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -34900,18 +28080,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34924,8 +28095,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -34939,14 +28110,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34959,8 +28126,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -34972,20 +28139,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35000,8 +28155,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -35013,23 +28168,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35057,13 +28198,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35075,7 +28213,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35088,18 +28226,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35111,7 +28241,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35124,11 +28254,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35141,10 +28269,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -35156,13 +28284,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35174,7 +28299,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35187,18 +28312,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35210,7 +28327,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35223,11 +28340,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35240,10 +28355,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -35255,30 +28370,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35291,10 +28385,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -35306,18 +28400,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35330,8 +28415,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -35345,14 +28430,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35365,8 +28445,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -35378,20 +28458,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35404,10 +28472,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -35419,18 +28487,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35443,8 +28502,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -35461,11 +28520,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35492,27 +28547,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -35541,15 +28576,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "ldr s4, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35561,7 +28588,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35574,11 +28601,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35591,10 +28616,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -35609,10 +28634,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "ldr s4, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35624,7 +28646,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35637,18 +28659,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35660,7 +28674,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35673,11 +28687,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35690,10 +28702,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -35705,14 +28717,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35725,8 +28733,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -35738,15 +28746,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35758,7 +28760,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35771,18 +28773,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35794,7 +28788,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35807,11 +28801,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35824,10 +28816,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -35839,14 +28831,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35859,8 +28847,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -35872,15 +28860,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35892,7 +28874,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35905,18 +28887,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35928,7 +28902,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35941,11 +28915,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35958,10 +28930,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -35973,14 +28945,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35993,8 +28961,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -36006,15 +28974,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36026,7 +28988,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36039,23 +29001,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36068,8 +29016,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -36083,14 +29031,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36103,8 +29047,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -36116,27 +29060,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #32]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36148,7 +29074,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36161,11 +29087,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36180,8 +29104,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -36193,14 +29117,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36213,8 +29133,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -36226,15 +29146,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #36]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36246,7 +29160,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36259,11 +29173,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36276,10 +29188,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -36294,11 +29206,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36325,13 +29233,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #40]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36360,20 +29262,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36386,10 +29274,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -36404,11 +29292,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36435,41 +29319,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #44]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36498,15 +29348,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "ldr s3, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36518,7 +29360,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36531,11 +29373,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36548,10 +29388,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -36566,11 +29406,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36597,13 +29433,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #48]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36632,15 +29462,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "ldr s3, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36652,7 +29474,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36665,11 +29487,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36682,10 +29502,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -36700,11 +29520,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36731,13 +29547,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #52]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36766,15 +29576,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "ldr s3, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36786,7 +29588,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36799,11 +29601,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36816,10 +29616,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -36834,11 +29634,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36865,13 +29661,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #56]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36900,15 +29690,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "ldr s3, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36920,7 +29702,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36933,11 +29715,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36950,10 +29730,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -36968,11 +29748,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36999,13 +29775,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #60]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37034,15 +29804,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "ldr s3, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37054,7 +29816,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37067,11 +29829,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37084,10 +29844,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -37102,10 +29862,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "ldr s3, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37117,7 +29874,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37130,18 +29887,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37153,7 +29902,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37166,11 +29915,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37185,8 +29932,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -37198,13 +29945,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37216,7 +29960,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37229,18 +29973,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37252,7 +29988,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37265,11 +30001,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37282,10 +30016,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -37297,14 +30031,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37317,8 +30047,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -37330,15 +30060,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37350,7 +30074,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37363,18 +30087,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37386,7 +30102,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37399,11 +30115,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37416,10 +30130,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -37431,14 +30145,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37451,8 +30161,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -37464,15 +30174,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37484,7 +30188,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37497,18 +30201,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37520,7 +30216,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37533,11 +30229,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37550,10 +30244,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -37565,13 +30259,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37583,7 +30274,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37596,18 +30287,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37619,7 +30302,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37632,11 +30315,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37649,10 +30330,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -37664,14 +30345,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37684,8 +30361,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -37697,15 +30374,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37717,7 +30388,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37730,18 +30401,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37753,7 +30416,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37766,11 +30429,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37783,10 +30444,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -37798,14 +30459,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37818,8 +30474,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -37831,15 +30487,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "fmov s5, s0", + "str s5, [x8]", + "ldr s5, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37851,7 +30501,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37864,18 +30514,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37887,7 +30529,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37900,11 +30542,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37917,10 +30557,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -37932,14 +30572,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37952,8 +30588,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -37965,32 +30601,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38003,8 +30615,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -38018,14 +30630,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38038,8 +30645,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -38051,15 +30658,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s5, s0", + "str s5, [x4]", + "ldr s5, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38071,7 +30672,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -38084,23 +30685,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38113,10 +30700,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -38128,14 +30715,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w4, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38148,8 +30731,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -38161,32 +30744,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x21]", + "strb w20, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38199,10 +30759,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -38217,11 +30777,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38248,27 +30804,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38297,8 +30833,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38329,11 +30863,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38360,13 +30890,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38395,15 +30919,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "ldr s3, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38415,7 +30931,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -38428,11 +30944,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38445,10 +30959,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -38463,11 +30977,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38494,13 +31004,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38529,15 +31033,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "ldr s3, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38549,7 +31045,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -38562,11 +31058,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38579,10 +31073,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -38597,11 +31091,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38628,13 +31118,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38663,15 +31147,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "ldr s3, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38683,7 +31159,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -38696,11 +31172,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38713,10 +31187,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -38731,11 +31205,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38762,13 +31232,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38797,15 +31261,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "ldr s3, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38817,7 +31273,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -38830,11 +31286,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38847,10 +31301,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -38865,11 +31319,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38896,16 +31346,18 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #28]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x20]", "mvn w27, w8", "adds w26, w8, #0x90 (144)", - "strb w21, [x28, #1298]", - "mov x8, x26" + "mov x8, x26", + "ldrb w20, [x28, #1019]", + "mov w21, #0x1", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "Block3": { @@ -39736,7 +32188,7 @@ ] }, "Block4": { - "ExpectedInstructionCount": 12319, + "ExpectedInstructionCount": 12313, "x86Insts": [ "mov ebp,dword [esp + 0x64]", "fadd dword [ebp + 0x8]", @@ -40092,7 +32544,6 @@ ], "ExpectedArm64ASM": [ "ldr w9, [x8, #100]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40121,6 +32572,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -40157,7 +32609,6 @@ "str q2, [x0, #1040]", "add w9, w9, #0x10 (16)", "str w9, [x8, #100]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40220,7 +32671,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x6c (108)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -40249,15 +32700,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #108]", + "str s2, [x21]", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40288,14 +32739,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov x23, #0xfffffffffffffffc", - "ldr s2, [x9, w23, sxtw]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "mov x21, #0xfffffffffffffffc", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -40357,7 +32809,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40420,7 +32871,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x68 (104)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -40449,13 +32900,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #104]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w21, w21, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40486,12 +32938,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w23, [x28, #1298]", + "lsl w24, w22, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40554,7 +33007,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40617,7 +33069,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x2c (44)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -40646,13 +33098,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w21, w21, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40683,12 +33136,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w23, [x28, #1298]", + "lsl w24, w22, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40751,7 +33205,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40814,7 +33267,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x28 (40)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -40843,15 +33296,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w21, w21, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xfffffffffffffff8", - "ldr s2, [x9, w24, sxtw]", + "mov x23, #0xfffffffffffffff8", + "ldr s2, [x9, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -40881,18 +33335,19 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldr w9, [x9, w23, sxtw]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "ldr w9, [x9, w21, sxtw]", "str w9, [x8, #52]", "ldr w9, [x8, #100]", "ldr w9, [x9]", "str w9, [x8, #56]", "ldr w9, [x8, #100]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40923,22 +33378,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "mov w25, #0x0", - "mov w12, #0x8000", - "fmov d3, x25", - "mov v3.d[1], x12", + "mov w24, #0x0", + "mov w25, #0x8000", + "fmov d3, x24", + "mov v3.d[1], x25", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x3c (60)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -40967,14 +33423,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w24, sxtw]", + "ldr s2, [x11, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41004,13 +33461,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w24, sxtw]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "ldr s2, [x6, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41072,8 +33530,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w23, sxtw]", + "ldr s2, [x11, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41103,21 +33560,21 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x25", - "mov v3.d[1], x12", + "fmov d3, x24", + "mov v3.d[1], x25", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w23, sxtw]", + "ldr s2, [x6, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41179,8 +33636,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w24, sxtw]", + "ldr s2, [x11, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41210,13 +33666,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w24, sxtw]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "ldr s2, [x6, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41278,7 +33735,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -41307,14 +33764,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w23, sxtw]", + "ldr s2, [x6, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41344,13 +33802,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w23, sxtw]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "ldr s2, [x11, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41412,7 +33871,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -41441,13 +33900,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41478,12 +33938,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41546,7 +34007,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x44 (68)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -41575,13 +34036,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41612,20 +34074,20 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x25", - "mov v3.d[1], x12", + "fmov d3, x24", + "mov v3.d[1], x25", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41688,7 +34150,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x50 (80)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -41717,13 +34179,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41754,12 +34217,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41822,7 +34286,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x54 (84)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -41851,13 +34315,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41888,12 +34353,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", "ldr s2, [x11, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41956,7 +34422,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x5c (92)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -41985,14 +34451,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w24, sxtw]", + "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42022,13 +34489,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w24, sxtw]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "ldr s2, [x10, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42090,8 +34558,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w23, sxtw]", + "ldr s2, [x5, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42121,13 +34588,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w23, sxtw]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "ldr s2, [x10, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42189,7 +34657,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -42218,14 +34686,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w24, sxtw]", + "ldr s2, [x10, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42255,13 +34724,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w24, sxtw]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42323,7 +34793,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -42352,14 +34822,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", + "lsl w12, w22, w20", + "bic w23, w23, w12", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w23, sxtw]", + "ldr s2, [x10, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42389,13 +34860,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w23, sxtw]", + "ldrb w23, [x28, #1298]", + "lsl w12, w22, w20", + "orr w23, w23, w12", + "strb w23, [x28, #1298]", + "ldr s2, [x5, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42457,7 +34929,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -42486,13 +34958,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42523,12 +34996,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42591,7 +35065,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x48 (72)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -42620,13 +35094,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42657,12 +35132,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x10, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42725,7 +35201,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x4c (76)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -42754,13 +35230,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42791,12 +35268,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42859,7 +35337,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x60 (96)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -42888,13 +35366,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42925,12 +35404,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42993,7 +35473,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x58 (88)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43022,28 +35502,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x3 (3)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43079,7 +35559,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w11, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43108,25 +35588,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, w24, sxtw]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43189,7 +35671,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w11, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43218,13 +35700,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, w23, sxtw]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43255,12 +35738,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43323,7 +35807,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43353,12 +35836,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x11]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43389,12 +35873,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43457,7 +35942,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w11, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43486,28 +35971,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, #4]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb w25, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "strb w24, [x28, #1017]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43543,7 +36026,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w10, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43572,27 +36055,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, w24, sxtw]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "lsl w13, w22, w13", - "orr w21, w21, w13", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w23, [x28, #1298]", + "lsl w21, w22, w21", + "orr w21, w23, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43623,15 +36110,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43667,7 +36155,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w10, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43696,27 +36184,21 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, w23, sxtw]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "lsl w13, w22, w13", - "orr w21, w21, w13", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43747,12 +36229,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43815,7 +36298,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43845,12 +36327,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x10]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43881,12 +36364,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43949,7 +36433,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w10, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43978,13 +36462,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, #4]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44015,12 +36500,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44083,7 +36569,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44114,12 +36599,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44182,7 +36668,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44213,15 +36698,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44257,7 +36743,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44288,15 +36773,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44332,12 +36818,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44351,10 +36836,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -44369,14 +36854,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w22, w20", - "bic w21, w21, w14", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w6, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -44405,13 +36892,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, w24, sxtw]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44442,15 +36930,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44486,7 +36975,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44517,15 +37005,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x3 (3)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44561,12 +37050,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44598,14 +37086,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w22, w20", - "bic w21, w21, w14", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w6, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -44634,41 +37124,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, w23, sxtw]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "lsl w13, w22, w13", - "orr w21, w21, w13", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "lsl w13, w22, w13", - "orr w21, w21, w13", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44699,12 +37176,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44767,7 +37245,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44798,12 +37275,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44866,22 +37344,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44917,7 +37395,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44948,15 +37425,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44992,12 +37470,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45011,10 +37488,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -45029,14 +37506,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w22, w20", - "bic w21, w21, w14", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -45066,27 +37544,29 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45122,7 +37602,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45153,15 +37632,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x3 (3)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45197,12 +37677,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45234,14 +37713,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w22, w20", - "bic w21, w21, w14", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w6, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -45270,41 +37751,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, #4]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "lsl w13, w22, w13", - "orr w21, w21, w13", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "lsl w13, w22, w13", - "orr w21, w21, w13", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45335,12 +37803,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45403,7 +37872,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45434,12 +37902,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45502,7 +37971,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45533,15 +38001,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45578,7 +38047,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45609,15 +38077,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x3 (3)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45653,12 +38122,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45690,14 +38158,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w22, w20", - "bic w21, w21, w14", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w5, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -45726,13 +38196,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, w24, sxtw]", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45763,15 +38234,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45807,7 +38279,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45838,15 +38309,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45882,12 +38354,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45901,10 +38372,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -45919,14 +38390,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w5, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -45955,41 +38428,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, w23, sxtw]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46020,12 +38480,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46088,7 +38549,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46119,12 +38579,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46187,7 +38648,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46218,15 +38678,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46262,7 +38723,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46293,15 +38753,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46337,12 +38798,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46374,14 +38834,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -46411,12 +38872,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46447,15 +38909,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46491,7 +38954,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46522,15 +38984,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46566,12 +39029,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46585,10 +39047,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -46603,14 +39065,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w5, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -46639,41 +39103,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, #4]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46704,13 +39155,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46774,7 +39226,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46805,21 +39256,21 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x25", - "mov v3.d[1], x12", + "fmov d3, x24", + "mov v3.d[1], x25", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46883,7 +39334,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46914,13 +39364,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46983,7 +39434,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47012,13 +39463,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47049,13 +39501,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47119,7 +39572,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47148,13 +39601,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47185,13 +39639,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47254,7 +39709,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x44 (68)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47283,13 +39738,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47320,21 +39776,21 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x25", - "mov v3.d[1], x12", + "fmov d3, x24", + "mov v3.d[1], x25", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47398,7 +39854,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x50 (80)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47427,13 +39883,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47464,13 +39921,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47533,7 +39991,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x54 (84)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47562,13 +40020,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47599,13 +40058,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47669,7 +40129,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #112]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x5c (92)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47698,13 +40158,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47735,12 +40196,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47803,7 +40265,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47834,12 +40295,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47902,7 +40364,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47931,13 +40393,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47968,12 +40431,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48036,7 +40500,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48065,13 +40529,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48102,12 +40567,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48170,7 +40636,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48199,13 +40665,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48236,12 +40703,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48304,7 +40772,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x48 (72)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48333,13 +40801,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48370,12 +40839,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48438,7 +40908,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x4c (76)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48467,13 +40937,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48504,12 +40975,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48572,7 +41044,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x60 (96)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48601,13 +41073,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48638,13 +41111,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48707,7 +41181,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x58 (88)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48736,28 +41210,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #88]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -48793,7 +41267,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48822,160 +41296,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #8]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x9, #12]", - "lsl w23, w22, w20", - "bic w21, w21, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49021,7 +41363,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -49037,7 +41379,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0xc (12)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -49066,14 +41408,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49103,13 +41446,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49155,7 +41499,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -49171,7 +41515,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -49200,32 +41543,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #4]", + "str s2, [x9]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr w9, [x8, #112]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w25, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49237,13 +41563,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -49256,59 +41579,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x9, #8]", - "lsl w23, w22, w20", - "bic w21, w21, w23", - "add w20, w20, #0x1 (1)", + "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", - "bic w21, w21, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49336,18 +41616,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -49366,7 +41634,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -49382,7 +41650,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -49411,91 +41679,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #12]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", + "ldr w9, [x8, #112]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", - "lsl w23, w22, w20", - "bic w21, w21, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", - "strb w20, [x28, #1019]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", "add x0, x28, x20, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", + "strb w24, [x28, #1017]", + "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -49530,7 +41735,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -49559,14 +41764,32 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1298]", + "lsl w21, w22, w21", + "orr w21, w23, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49596,40 +41819,17 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -49664,7 +41864,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0xc (12)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -49693,15 +41893,22 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #4]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49731,13 +41938,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49783,7 +41991,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -49799,8 +42007,43 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x9]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49830,13 +42073,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49898,8 +42142,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "add w21, w9, #0x4 (4)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49911,10 +42156,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -49924,23 +42170,17 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", - "orr w21, w21, w23", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr w9, [x8, #48]", + "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49952,13 +42192,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -49971,10 +42208,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50002,18 +42245,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -50032,7 +42263,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -50048,13 +42279,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50066,13 +42291,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -50085,16 +42307,45 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", + "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50107,10 +42358,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -50120,14 +42373,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x9, #8]", - "lsl w23, w22, w20", - "bic w21, w21, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50158,15 +42408,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50202,7 +42453,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50233,15 +42483,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50277,12 +42528,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50300,7 +42550,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -50314,14 +42564,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -50350,42 +42602,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #12]", - "lsl w23, w22, w20", - "bic w21, w21, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", - "lsl w23, w22, w20", - "bic w21, w21, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50415,13 +42640,52 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50449,6 +42713,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -50467,7 +42744,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -50483,8 +42760,12 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50496,10 +42777,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -50512,15 +42796,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", - "orr w21, w21, w23", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "add w21, w9, #0xc (12)", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50532,10 +42819,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -50545,11 +42833,30 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50561,13 +42868,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -50580,10 +42884,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50611,18 +42921,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -50641,7 +42939,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -50657,25 +42955,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50687,13 +42967,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -50706,15 +42983,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50726,13 +43004,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -50745,16 +43020,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50767,10 +43034,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -50780,15 +43049,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x9]", - "lsl w23, w22, w20", - "bic w21, w21, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "sub w9, w9, #0x10 (16)", - "ldrb w20, [x28, #1019]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50819,16 +43084,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "str w9, [x8, #48]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50864,24 +43129,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "add w5, w5, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "add w6, w6, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50917,14 +43180,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "add w10, w10, #0x10 (16)", - "add w11, w11, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50942,7 +43202,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -50956,15 +43216,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "sub w7, w7, #0x10 (16)", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -50993,45 +43253,247 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #20]", + "str s2, [x9]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr w9, [x8, #112]", "sub w9, w9, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", + "ldr s2, [x8, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "str w9, [x8, #48]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add w5, w5, #0x10 (16)", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "lsl w23, w22, w23", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w6, w6, #0x10 (16)", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add w10, w10, #0x10 (16)", + "add w11, w11, #0x10 (16)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "str w9, [x8, #112]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", + "sub w7, w7, #0x10 (16)", + "add w21, w9, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr w9, [x8, #112]", + "sub w9, w9, #0x10 (16)", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "str w9, [x8, #112]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51062,14 +43524,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "subs w9, w9, #0x10 (16)", "cfinv", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51133,7 +43596,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "str w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51164,13 +43626,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #124]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51233,12 +43696,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "cset w20, hs", + "cset w21, hs", "subs w26, w9, #0x1 (1)", - "rmif x20, #63, #nzCv", + "rmif x21, #63, #nzCv", "mov x27, x9", "mov x9, x26", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51269,16 +43731,17 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "str w9, [x8, #124]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51314,7 +43777,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51345,15 +43807,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51389,12 +43852,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51426,14 +43888,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -51462,13 +43926,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #24]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51499,15 +43964,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51543,7 +44009,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51574,15 +44039,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51618,12 +44084,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51637,10 +44102,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -51655,14 +44120,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -51691,41 +44158,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #28]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51756,12 +44210,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51824,7 +44279,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51855,12 +44309,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51923,7 +44378,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51954,15 +44408,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51998,7 +44453,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52029,15 +44483,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -52073,12 +44528,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52110,14 +44564,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -52146,13 +44602,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #16]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52183,15 +44640,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -52227,7 +44685,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52258,15 +44715,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -52302,12 +44760,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52321,10 +44778,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -52339,14 +44796,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -52375,45 +44834,32 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #20]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "Block5": { - "ExpectedInstructionCount": 12238, + "ExpectedInstructionCount": 12248, "x86Insts": [ "mov ebp,dword [esp + 0x64]", "fadd dword [ebp + 0x8]", @@ -52764,7 +45210,6 @@ ], "ExpectedArm64ASM": [ "ldr w9, [x8, #100]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52793,6 +45238,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -52829,7 +45275,6 @@ "str q2, [x0, #1040]", "add w9, w9, #0x10 (16)", "str w9, [x8, #100]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52892,7 +45337,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x6c (108)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -52921,15 +45366,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #108]", + "str s2, [x21]", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52960,14 +45405,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov x23, #0xfffffffffffffffc", - "ldr s2, [x9, w23, sxtw]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "mov x21, #0xfffffffffffffffc", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53029,7 +45475,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53092,7 +45537,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x68 (104)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -53121,13 +45566,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #104]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w21, w21, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53158,12 +45604,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w23, [x28, #1298]", + "lsl w24, w22, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53226,7 +45673,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53289,7 +45735,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x30 (48)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -53318,13 +45764,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w21, w21, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53355,12 +45802,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w23, [x28, #1298]", + "lsl w24, w22, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53423,7 +45871,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53486,7 +45933,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x2c (44)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -53515,15 +45962,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w21, w21, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xfffffffffffffff8", - "ldr s2, [x9, w24, sxtw]", + "mov x23, #0xfffffffffffffff8", + "ldr s2, [x9, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53553,18 +46001,19 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldr w9, [x9, w23, sxtw]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "ldr w9, [x9, w21, sxtw]", "str w9, [x8, #52]", "ldr w9, [x8, #100]", "ldr w9, [x9]", "str w9, [x8, #56]", "ldr w9, [x8, #100]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53595,22 +46044,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "mov w25, #0x0", - "mov w12, #0x8000", - "fmov d3, x25", - "mov v3.d[1], x12", + "mov w24, #0x0", + "mov w25, #0x8000", + "fmov d3, x24", + "mov v3.d[1], x25", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w25, w8, #0x3c (60)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -53639,14 +46089,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", + "str s2, [x25]", + "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w21, w21, w12", + "bic w25, w25, w12", + "strb w25, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w24, sxtw]", + "ldr s2, [x6, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53676,13 +46127,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w24, sxtw]", + "ldrb w25, [x28, #1298]", + "lsl w12, w22, w20", + "orr w25, w25, w12", + "strb w25, [x28, #1298]", + "ldr s2, [x11, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53744,8 +46196,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w23, sxtw]", + "ldr s2, [x11, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53775,13 +46226,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w23, sxtw]", + "ldrb w25, [x28, #1298]", + "lsl w12, w22, w20", + "orr w25, w25, w12", + "strb w25, [x28, #1298]", + "ldr s2, [x6, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53843,8 +46295,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w24, sxtw]", + "ldr s2, [x11, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53874,13 +46325,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w24, sxtw]", + "ldrb w25, [x28, #1298]", + "lsl w12, w22, w20", + "orr w25, w25, w12", + "strb w25, [x28, #1298]", + "ldr s2, [x6, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53942,7 +46394,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w25, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -53971,14 +46423,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x25]", + "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w21, w21, w12", + "bic w25, w25, w12", + "strb w25, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w23, sxtw]", + "ldr s2, [x11, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54008,13 +46461,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w23, sxtw]", + "ldrb w25, [x28, #1298]", + "lsl w12, w22, w20", + "orr w25, w25, w12", + "strb w25, [x28, #1298]", + "ldr s2, [x6, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54076,7 +46530,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w25, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -54105,13 +46559,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x25]", + "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w21, w21, w12", + "bic w25, w25, w12", + "strb w25, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54142,12 +46597,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w25, [x28, #1298]", + "lsl w12, w22, w20", + "orr w25, w25, w12", + "strb w25, [x28, #1298]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54210,7 +46666,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w25, w8, #0x44 (68)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -54239,13 +46695,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", + "str s2, [x25]", + "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w21, w21, w12", + "bic w25, w25, w12", + "strb w25, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54276,12 +46733,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w25, [x28, #1298]", + "lsl w12, w22, w20", + "orr w25, w25, w12", + "strb w25, [x28, #1298]", "ldr s2, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54344,7 +46802,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w25, w8, #0x4c (76)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -54373,13 +46831,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", + "str s2, [x25]", + "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w21, w21, w12", + "bic w25, w25, w12", + "strb w25, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54410,12 +46869,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w25, [x28, #1298]", + "lsl w12, w22, w20", + "orr w25, w25, w12", + "strb w25, [x28, #1298]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54478,7 +46938,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w25, w8, #0x58 (88)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -54507,13 +46967,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #88]", + "str s2, [x25]", + "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w21, w21, w12", + "bic w25, w25, w12", + "strb w25, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54544,12 +47005,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w25, [x28, #1298]", + "lsl w12, w22, w20", + "orr w25, w25, w12", + "strb w25, [x28, #1298]", "ldr s2, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54612,7 +47074,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w25, w8, #0x5c (92)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -54641,14 +47103,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", + "str s2, [x25]", + "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w21, w21, w12", + "bic w25, w25, w12", + "strb w25, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w24, sxtw]", + "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54678,13 +47141,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w24, sxtw]", + "ldrb w25, [x28, #1298]", + "lsl w12, w22, w20", + "orr w25, w25, w12", + "strb w25, [x28, #1298]", + "ldr s2, [x10, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54746,8 +47210,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w23, sxtw]", + "ldr s2, [x5, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54777,13 +47240,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w23, sxtw]", + "ldrb w25, [x28, #1298]", + "lsl w12, w22, w20", + "orr w25, w25, w12", + "strb w25, [x28, #1298]", + "ldr s2, [x10, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54845,7 +47309,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w25, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -54874,14 +47338,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x25]", + "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w21, w21, w12", + "bic w25, w25, w12", + "strb w25, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w24, sxtw]", + "ldr s2, [x10, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54911,13 +47376,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w24, sxtw]", + "ldrb w25, [x28, #1298]", + "lsl w12, w22, w20", + "orr w25, w25, w12", + "strb w25, [x28, #1298]", + "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54979,7 +47445,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55008,14 +47474,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", + "lsl w25, w22, w20", + "bic w23, w23, w25", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w23, sxtw]", + "ldr s2, [x10, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55045,13 +47512,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w23, sxtw]", + "ldrb w23, [x28, #1298]", + "lsl w25, w22, w20", + "orr w23, w23, w25", + "strb w23, [x28, #1298]", + "ldr s2, [x5, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55113,7 +47581,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55142,13 +47610,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55179,12 +47648,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55247,7 +47717,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x48 (72)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55276,13 +47746,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55313,12 +47784,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x10, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55381,7 +47853,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x50 (80)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55410,13 +47882,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55447,12 +47920,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55515,7 +47989,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x60 (96)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55544,13 +48018,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55581,12 +48056,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55649,7 +48125,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x54 (84)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55678,28 +48154,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x3 (3)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -55735,7 +48211,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w11, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55764,13 +48240,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, w24, sxtw]", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55801,15 +48278,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -55845,7 +48323,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w11, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55874,13 +48352,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, w23, sxtw]", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55911,12 +48390,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55979,7 +48459,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -56009,12 +48488,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x11]", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56045,12 +48525,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56113,7 +48594,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w11, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -56142,28 +48623,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, #4]", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb w25, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "strb w24, [x28, #1017]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -56199,7 +48678,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w10, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -56228,27 +48707,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, w24, sxtw]", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "lsl w12, w22, w12", - "orr w21, w21, w12", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "ldrb w23, [x28, #1298]", + "lsl w21, w22, w21", + "orr w21, w23, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56311,7 +48794,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w10, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -56340,13 +48823,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, w23, sxtw]", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56377,12 +48861,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56445,7 +48930,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -56475,12 +48959,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x10]", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56511,12 +48996,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56579,7 +49065,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w10, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -56608,13 +49094,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, #4]", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56645,12 +49132,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56713,7 +49201,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56744,12 +49231,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56812,7 +49300,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56843,15 +49330,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -56887,7 +49375,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56918,15 +49405,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -56962,12 +49450,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56981,10 +49468,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -56999,14 +49486,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w6, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -57035,13 +49524,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, w24, sxtw]", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57072,15 +49562,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57116,7 +49607,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57147,15 +49637,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x3 (3)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57191,12 +49682,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57228,14 +49718,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w6, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -57264,41 +49756,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, w23, sxtw]", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "lsl w12, w22, w12", - "orr w21, w21, w12", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "lsl w12, w22, w12", - "orr w21, w21, w12", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57329,12 +49808,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57397,7 +49877,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57428,12 +49907,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57496,22 +49976,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57547,7 +50027,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57578,15 +50057,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57622,12 +50102,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57641,10 +50120,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -57659,14 +50138,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -57696,27 +50176,29 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6]", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57752,7 +50234,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57783,15 +50264,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x3 (3)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57827,12 +50309,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57864,14 +50345,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w6, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -57900,41 +50383,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, #4]", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "lsl w12, w22, w12", - "orr w21, w21, w12", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "lsl w12, w22, w12", - "orr w21, w21, w12", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57965,12 +50435,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58033,7 +50504,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58064,12 +50534,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58132,7 +50603,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58163,15 +50633,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58207,7 +50678,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58238,15 +50708,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x3 (3)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58282,12 +50753,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58319,15 +50789,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "sub w21, w5, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -58356,13 +50828,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, w24, sxtw]", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58393,15 +50866,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58437,7 +50911,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58468,15 +50941,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58512,12 +50986,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58531,10 +51004,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -58549,14 +51022,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w5, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -58585,41 +51060,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, w23, sxtw]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58650,12 +51112,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58718,7 +51181,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58749,12 +51211,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58817,7 +51280,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58848,15 +51310,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58892,7 +51355,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58923,15 +51385,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58967,12 +51430,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59004,14 +51466,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -59041,12 +51504,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59077,15 +51541,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -59121,7 +51586,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59152,15 +51616,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -59196,12 +51661,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59215,10 +51679,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -59233,14 +51697,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w5, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -59269,41 +51735,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, #4]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59334,13 +51787,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59404,7 +51858,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59435,13 +51888,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59505,7 +51959,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59536,13 +51989,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59606,7 +52060,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -59635,13 +52089,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59672,13 +52127,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59742,7 +52198,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -59771,13 +52227,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59808,13 +52265,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59878,7 +52336,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x44 (68)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -59907,13 +52365,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59944,13 +52403,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60014,7 +52474,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x4c (76)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60043,13 +52503,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60080,13 +52541,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60150,7 +52612,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x58 (88)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60179,13 +52641,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #88]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60216,13 +52679,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60286,7 +52750,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #112]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x5c (92)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60315,13 +52779,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60352,12 +52817,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60420,7 +52886,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60451,12 +52916,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60519,7 +52985,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60548,13 +53014,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60585,12 +53052,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60653,7 +53121,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60682,13 +53150,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60719,12 +53188,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60787,7 +53257,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60816,13 +53286,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60853,12 +53324,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60921,7 +53393,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x48 (72)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60950,13 +53422,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60987,12 +53460,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61055,7 +53529,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x50 (80)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61084,13 +53558,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61121,12 +53596,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61189,7 +53665,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x60 (96)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61218,13 +53694,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61255,13 +53732,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61324,7 +53802,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x54 (84)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61353,28 +53831,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -61410,7 +53888,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61439,13 +53917,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #8]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61476,15 +53955,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -61520,7 +54000,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0xc (12)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61549,13 +54029,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #12]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61586,12 +54067,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61654,7 +54136,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61684,12 +54165,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61720,12 +54202,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61788,7 +54271,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61817,29 +54300,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #4]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #112]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb w25, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "strb w24, [x28, #1017]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -61875,7 +54356,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61904,27 +54385,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #8]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w23, [x28, #1298]", + "lsl w21, w22, w21", + "orr w21, w23, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61987,7 +54472,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0xc (12)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -62016,13 +54501,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #12]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62053,12 +54539,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62121,7 +54608,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -62151,12 +54637,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62187,12 +54674,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62255,7 +54743,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -62284,14 +54772,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #4]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62322,12 +54811,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62390,7 +54880,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62421,12 +54910,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62489,7 +54979,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62520,15 +55009,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62564,7 +55054,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62595,15 +55084,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62639,12 +55129,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62658,10 +55147,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -62676,14 +55165,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -62712,13 +55203,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #8]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62749,15 +55241,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62793,7 +55286,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62824,15 +55316,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62868,12 +55361,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62905,14 +55397,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0xc (12)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -62941,41 +55435,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #12]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63006,12 +55487,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63074,7 +55556,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63105,12 +55586,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63173,7 +55655,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63204,15 +55685,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63248,22 +55730,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63299,12 +55781,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63318,10 +55799,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -63336,14 +55817,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -63373,12 +55855,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63409,15 +55892,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63453,22 +55937,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63507,12 +55991,11 @@ "sub w9, w9, #0x10 (16)", "str w9, [x8, #40]", "add w5, w5, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63544,16 +56027,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "add w6, w6, #0x10 (16)", "add w10, w10, #0x10 (16)", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -63582,45 +56067,32 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #20]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #112]", "sub w9, w9, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "str w9, [x8, #112]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63651,13 +56123,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "sub w9, w9, #0x10 (16)", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63721,7 +56194,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "str w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63752,13 +56224,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #124]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63822,7 +56295,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "add w11, w11, #0x10 (16)", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63853,22 +56325,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "subs w7, w7, #0x10 (16)", "cfinv", - "cset w20, hs", + "cset w21, hs", "subs w26, w9, #0x1 (1)", - "rmif x20, #63, #nzCv", + "rmif x21, #63, #nzCv", "mov x27, x9", "mov x9, x26", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63905,7 +56378,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "str w9, [x8, #124]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63936,15 +56408,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63980,12 +56453,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64017,14 +56489,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -64053,13 +56527,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #24]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64090,15 +56565,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64134,7 +56610,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64165,15 +56640,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64209,12 +56685,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64228,10 +56703,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -64246,14 +56721,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -64282,41 +56759,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #28]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64347,12 +56811,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64415,7 +56880,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64446,12 +56910,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64514,7 +56979,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64545,15 +57009,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64589,7 +57054,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64620,15 +57084,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64664,12 +57129,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64701,14 +57165,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -64737,13 +57203,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #16]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64774,15 +57241,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64818,7 +57286,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64849,15 +57316,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64893,12 +57361,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64912,10 +57379,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -64930,14 +57397,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -64966,45 +57435,32 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #20]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "Block6": { - "ExpectedInstructionCount": 10995, + "ExpectedInstructionCount": 7576, "x86Insts": [ "mov eax,dword [ebp + 0x10]", "fld dword [eax + 0x30]", @@ -65418,7 +57874,6 @@ ], "ExpectedArm64ASM": [ "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -65447,18 +57902,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s3, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65470,7 +57915,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65483,23 +57928,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65512,10 +57943,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -65530,16 +57961,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65551,7 +57974,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65564,19 +57987,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65588,7 +58003,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65601,23 +58016,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65632,8 +58033,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -65645,23 +58046,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65674,10 +58061,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -65692,16 +58079,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65713,7 +58092,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65726,19 +58105,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s4, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65750,7 +58121,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65763,23 +58134,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65794,8 +58151,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -65807,23 +58164,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65836,10 +58179,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -65854,16 +58197,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65875,7 +58210,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65888,19 +58223,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s4, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65912,7 +58239,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65925,23 +58252,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65956,8 +58269,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -65969,23 +58282,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65998,10 +58297,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -66016,16 +58315,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x20, #0xffffffffffffffd0", + "sub w21, w9, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66052,15 +58343,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x23, #0xffffffffffffffd0", - "str s2, [x9, w23, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x21]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -66089,16 +58373,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s3, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66110,7 +58386,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66123,23 +58399,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66152,10 +58414,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -66170,16 +58432,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66191,7 +58445,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66204,19 +58458,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66228,7 +58474,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66241,23 +58487,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66272,8 +58504,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -66285,23 +58517,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66314,10 +58532,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -66332,16 +58550,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66353,7 +58563,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66366,19 +58576,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s4, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66390,7 +58592,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66403,23 +58605,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66434,8 +58622,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -66447,23 +58635,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66476,10 +58650,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -66494,16 +58668,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66515,7 +58681,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66528,19 +58694,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s4, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66552,7 +58710,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66565,23 +58723,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66596,8 +58740,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -66609,23 +58753,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66638,10 +58768,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -66656,16 +58786,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x21, #0xffffffffffffffd4", + "sub w22, w9, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66692,15 +58814,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x24, #0xffffffffffffffd4", - "str s2, [x9, w24, sxtw]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x22]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -66729,16 +58844,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66750,7 +58857,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66763,23 +58870,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66792,10 +58885,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -66810,16 +58903,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66831,7 +58916,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66844,19 +58929,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66868,7 +58945,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66881,23 +58958,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66912,8 +58975,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -66925,23 +58988,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66954,10 +59003,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -66972,16 +59021,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66993,7 +59034,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67006,19 +59047,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s4, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67030,7 +59063,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67043,23 +59076,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67074,8 +59093,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -67087,23 +59106,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67116,10 +59121,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -67134,16 +59139,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67155,7 +59152,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67168,19 +59165,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s4, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67192,7 +59181,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67205,23 +59194,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67236,8 +59211,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -67249,23 +59224,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67278,10 +59239,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -67296,16 +59257,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x22, #0xffffffffffffffd8", + "sub w23, w9, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67332,15 +59285,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x25, #0xffffffffffffffd8", - "str s2, [x9, w25, sxtw]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x23]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -67369,16 +59315,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67390,7 +59328,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67403,23 +59341,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67432,10 +59356,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -67450,16 +59374,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67471,7 +59387,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67484,19 +59400,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s4, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67508,7 +59416,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67521,23 +59429,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67552,8 +59446,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -67565,23 +59459,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67594,10 +59474,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -67612,16 +59492,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67633,7 +59505,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67646,19 +59518,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s4, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67670,7 +59534,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67683,23 +59547,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67714,8 +59564,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -67727,23 +59577,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67756,10 +59592,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -67774,16 +59610,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67795,7 +59623,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67808,19 +59636,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s4, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67832,7 +59652,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67845,23 +59665,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67876,8 +59682,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -67889,23 +59695,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67918,10 +59710,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -67936,16 +59728,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x23, #0xffffffffffffffdc", + "sub w24, w9, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67972,15 +59756,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x12, #0xffffffffffffffdc", - "str s2, [x9, w12, sxtw]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x24]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68009,16 +59786,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s3, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68030,7 +59799,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68043,23 +59812,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68072,10 +59827,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -68090,16 +59845,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68111,7 +59858,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68124,19 +59871,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68148,7 +59887,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68161,23 +59900,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68192,8 +59917,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -68205,23 +59930,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68234,10 +59945,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -68252,16 +59963,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68273,7 +59976,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68286,19 +59989,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s4, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68310,7 +60005,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68323,23 +60018,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68354,8 +60035,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -68367,23 +60048,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68396,10 +60063,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -68414,16 +60081,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68435,7 +60094,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68448,19 +60107,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s4, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68472,7 +60123,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68485,23 +60136,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68516,8 +60153,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -68529,23 +60166,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68558,10 +60181,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -68576,16 +60199,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x24, #0xffffffffffffffe0", + "sub w25, w9, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68612,15 +60227,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x13, #0xffffffffffffffe0", - "str s2, [x9, w13, sxtw]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x25]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68649,16 +60257,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s3, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68670,7 +60270,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68683,23 +60283,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68712,10 +60298,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -68730,16 +60316,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68751,7 +60329,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68764,19 +60342,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68788,7 +60358,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68801,23 +60371,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68832,8 +60388,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -68845,23 +60401,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68874,10 +60416,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -68892,16 +60434,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68913,7 +60447,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68926,19 +60460,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s4, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68950,7 +60476,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68963,23 +60489,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68994,8 +60506,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -69007,23 +60519,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69036,10 +60534,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -69054,16 +60552,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69075,7 +60565,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69088,19 +60578,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s4, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69112,7 +60594,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69125,23 +60607,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69156,8 +60624,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -69169,23 +60637,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69198,10 +60652,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -69216,16 +60670,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x25, #0xffffffffffffffe4", + "sub w12, w9, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69252,15 +60698,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x14, #0xffffffffffffffe4", - "str s2, [x9, w14, sxtw]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x12]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -69289,16 +60728,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69310,7 +60741,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69323,23 +60754,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69352,10 +60769,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -69370,16 +60787,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69391,7 +60800,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69404,19 +60813,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69428,7 +60829,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69441,23 +60842,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69472,8 +60859,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -69485,23 +60872,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69514,10 +60887,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -69532,16 +60905,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69553,7 +60918,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69566,19 +60931,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s4, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69590,7 +60947,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69603,23 +60960,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69634,8 +60977,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -69647,23 +60990,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69676,10 +61005,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -69694,16 +61023,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69715,7 +61036,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69728,19 +61049,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s4, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69752,7 +61065,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69765,23 +61078,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69796,8 +61095,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -69809,23 +61108,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69838,10 +61123,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -69856,16 +61141,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x12, #0xffffffffffffffe8", + "sub w13, w9, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69892,15 +61169,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x15, #0xffffffffffffffe8", - "str s2, [x9, w15, sxtw]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x13]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -69929,16 +61199,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69950,7 +61212,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69963,23 +61225,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69992,10 +61240,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70010,16 +61258,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70031,7 +61271,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70044,19 +61284,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s4, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70068,7 +61300,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70081,23 +61313,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70112,8 +61330,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70125,23 +61343,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70154,10 +61358,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -70172,16 +61376,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70193,7 +61389,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70206,19 +61402,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s4, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70230,7 +61418,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70243,23 +61431,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70274,8 +61448,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70287,23 +61461,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70316,10 +61476,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -70334,16 +61494,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70355,7 +61507,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70368,19 +61520,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s4, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70392,7 +61536,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70405,23 +61549,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70436,8 +61566,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70449,23 +61579,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70478,10 +61594,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -70496,16 +61612,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x13, #0xffffffffffffffec", + "sub w14, w9, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70532,15 +61640,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x16, #0xffffffffffffffec", - "str s2, [x9, w16, sxtw]", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x14]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -70569,16 +61670,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s3, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70590,7 +61683,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70603,23 +61696,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70632,10 +61711,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70650,16 +61729,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s3, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70671,7 +61742,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70684,19 +61755,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70708,7 +61771,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70721,23 +61784,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70752,8 +61801,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70765,23 +61814,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70794,10 +61829,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -70812,16 +61847,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s3, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70833,7 +61860,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70846,19 +61873,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s4, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70870,7 +61889,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70883,23 +61902,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70914,8 +61919,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70927,23 +61932,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70956,10 +61947,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -70974,16 +61965,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s3, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70995,7 +61978,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71008,19 +61991,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s4, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71032,7 +62007,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71045,23 +62020,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71076,8 +62037,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -71089,23 +62050,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71118,10 +62065,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -71136,16 +62083,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x14, #0xfffffffffffffff0", + "sub w15, w9, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71172,15 +62111,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x17, #0xfffffffffffffff0", - "str s2, [x9, w17, sxtw]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x15]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -71209,16 +62141,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s3, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71230,7 +62154,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71243,23 +62167,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71272,10 +62182,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -71290,16 +62200,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s3, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71311,7 +62213,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71324,19 +62226,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71348,7 +62242,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71361,23 +62255,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71392,8 +62272,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -71405,23 +62285,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71434,10 +62300,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -71452,16 +62318,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s3, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71473,7 +62331,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71486,19 +62344,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s4, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71510,7 +62360,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71523,23 +62373,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71554,8 +62390,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -71567,23 +62403,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71596,10 +62418,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -71614,16 +62436,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s3, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71635,7 +62449,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71648,19 +62462,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s4, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71672,7 +62478,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71685,23 +62491,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71716,8 +62508,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -71729,23 +62521,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71758,10 +62536,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -71776,16 +62554,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x15, #0xfffffffffffffff4", + "sub w16, w9, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71812,15 +62582,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x29, #0xfffffffffffffff4", - "str s2, [x9, w29, sxtw]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x16]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -71849,16 +62612,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71870,7 +62625,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71883,23 +62638,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71912,10 +62653,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -71930,16 +62671,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s3, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71951,7 +62684,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71964,19 +62697,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71988,7 +62713,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72001,23 +62726,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72032,8 +62743,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -72045,23 +62756,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72074,10 +62771,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -72092,16 +62789,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s3, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72113,7 +62802,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72126,19 +62815,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s4, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72150,7 +62831,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72163,23 +62844,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72194,8 +62861,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -72207,23 +62874,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72236,10 +62889,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -72254,16 +62907,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s3, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72275,7 +62920,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72288,19 +62933,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s4, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72312,7 +62949,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72325,23 +62962,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72356,8 +62979,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -72369,23 +62992,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72398,10 +63007,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -72416,16 +63025,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s3, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72437,7 +63038,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72450,19 +63051,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72474,7 +63067,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72487,23 +63080,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72518,8 +63097,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -72531,19 +63110,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72555,7 +63126,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72568,19 +63139,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s5, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72592,7 +63155,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72605,23 +63168,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72634,10 +63183,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -72649,23 +63198,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72680,8 +63215,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -72693,19 +63228,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72717,7 +63244,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72730,19 +63257,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s5, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72754,7 +63273,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72767,23 +63286,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72796,10 +63301,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -72811,23 +63316,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72842,8 +63333,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -72855,19 +63346,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72879,7 +63362,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72892,19 +63375,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s5, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72916,7 +63391,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72929,23 +63404,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72958,10 +63419,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -72973,23 +63434,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73004,8 +63451,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -73017,19 +63464,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73041,7 +63480,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73054,19 +63493,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s5, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73078,7 +63509,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73091,23 +63522,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73120,10 +63537,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -73135,19 +63552,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s5, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73159,7 +63568,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73172,19 +63581,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s6, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73196,7 +63597,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73209,23 +63610,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73238,10 +63625,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -73253,23 +63640,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73282,10 +63655,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -73297,19 +63670,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s5, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73321,7 +63686,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73334,19 +63699,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s6, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73358,7 +63715,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73371,23 +63728,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73400,10 +63743,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -73415,23 +63758,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73444,10 +63773,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -73459,19 +63788,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s5, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73483,7 +63804,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73496,19 +63817,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s6, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73520,7 +63833,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73533,23 +63846,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73562,10 +63861,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -73577,23 +63876,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73606,10 +63891,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -73621,19 +63906,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s5, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73645,7 +63922,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73658,19 +63935,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s6, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73682,7 +63951,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73695,23 +63964,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73724,10 +63979,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -73739,19 +63994,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s6, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73763,7 +64010,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73776,19 +64023,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s7, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73800,7 +64039,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73813,23 +64052,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73842,10 +64067,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -73857,23 +64082,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73886,10 +64097,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -73901,19 +64112,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s6, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73925,7 +64128,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73938,19 +64141,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s7, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73962,7 +64157,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73975,23 +64170,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74004,10 +64185,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -74019,23 +64200,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74048,10 +64215,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -74063,19 +64230,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s6, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74087,7 +64246,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74100,19 +64259,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s7, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74124,7 +64275,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74137,23 +64288,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74166,10 +64303,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -74181,23 +64318,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74210,10 +64333,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -74225,19 +64348,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s6, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74249,7 +64364,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74262,19 +64377,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s7, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74286,7 +64393,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74299,23 +64406,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74328,10 +64421,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -74343,19 +64436,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s7, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74367,7 +64452,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74380,19 +64465,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s8, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74404,7 +64481,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74417,23 +64494,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74446,10 +64509,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -74461,23 +64524,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74490,10 +64539,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -74505,19 +64554,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s7, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74529,7 +64570,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74542,19 +64583,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s8, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74566,7 +64599,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74579,23 +64612,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74608,10 +64627,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -74623,23 +64642,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74652,10 +64657,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -74667,19 +64672,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s7, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74691,7 +64688,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74704,19 +64701,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s8, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74728,7 +64717,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74741,23 +64730,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74770,10 +64745,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -74785,23 +64760,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74814,10 +64775,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -74829,19 +64790,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s7, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74853,7 +64806,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74866,19 +64819,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s8, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74890,7 +64835,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74903,23 +64848,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74932,10 +64863,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -74947,19 +64878,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s8, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74971,7 +64894,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74984,19 +64907,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s9, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75008,7 +64923,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -75021,23 +64936,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75050,10 +64951,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -75065,23 +64966,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75094,10 +64981,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -75109,19 +64996,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s8, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75133,7 +65012,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -75146,19 +65025,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s9, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75170,7 +65041,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -75183,23 +65054,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75212,10 +65069,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -75227,23 +65084,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75256,10 +65099,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -75271,19 +65114,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s8, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75295,7 +65130,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -75308,19 +65143,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s9, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75332,7 +65159,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -75345,23 +65172,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75374,10 +65187,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -75389,23 +65202,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75418,10 +65217,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -75433,55 +65232,42 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x9, w20, sxtw]", + "add w20, w8, #0x40 (64)", + "str s8, [x20]", + "ldr s8, [x9, w21, sxtw]", + "add w20, w8, #0x3c (60)", + "str s8, [x20]", + "ldr s8, [x9, w22, sxtw]", + "add w20, w8, #0x38 (56)", + "str s8, [x20]", + "ldr s8, [x9, w23, sxtw]", + "add w20, w8, #0x34 (52)", + "str s8, [x20]", + "ldr s8, [x9, w24, sxtw]", + "add w20, w8, #0x30 (48)", + "str s8, [x20]", + "ldr s8, [x9, w25, sxtw]", + "add w20, w8, #0x2c (44)", + "str s8, [x20]", + "ldr s8, [x9, w12, sxtw]", + "add w20, w8, #0x28 (40)", + "str s8, [x20]", + "ldr s8, [x9, w13, sxtw]", + "add w20, w8, #0x24 (36)", + "str s8, [x20]", + "ldr s8, [x9, w14, sxtw]", + "add w20, w8, #0x20 (32)", + "str s8, [x20]", + "ldr s8, [x9, w15, sxtw]", + "add w20, w8, #0x1c (28)", + "str s8, [x20]", + "mov w20, #0x0", + "strb w20, [x28, #1017]", + "add w21, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75508,51 +65294,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x21]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75565,8 +65309,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -75579,51 +65323,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w25, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x21]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75636,8 +65338,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -75650,51 +65352,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w12, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x21]", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75707,8 +65366,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -75721,51 +65380,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w13, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x21]", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75778,8 +65394,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -75792,14 +65408,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w14, sxtw]", + "str s2, [x21]", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75811,1665 +65421,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w15, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w16, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w17, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w29, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "mov w24, #0x0", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "str w7, [x8]", - "mov w20, #0x26ea", - "movk w20, #0x1, lsl #16", - "mov w22, #0xd118", - "movk w22, #0x818, lsl #16", - "add w22, w20, w22", - "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", - "ldr x0, [x28, #2280]", - "and x3, x22, #0xfffff", - "add x0, x0, x3, lsl #4", - "ldp x1, x0, [x0]" - ] - }, - "Block7": { - "ExpectedInstructionCount": 11003, - "x86Insts": [ - "push ebp", - "mov ebp,esp", - "push ebx", - "sub esp,0x84", - "mov ebx,dword [ebp + 0x8]", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x30]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0xc]", - "fmulp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x34]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x1c]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x38]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x2c]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x3c]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x3c]", - "fmulp", - "faddp", - "fstp dword [ebp + -0x30]", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x30]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x8]", - "fmulp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x34]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x18]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x38]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x28]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x3c]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x38]", - "fmulp", - "faddp", - "fstp dword [ebp + -0x2c]", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x30]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x4]", - "fmulp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x34]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x14]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x38]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x24]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x3c]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x34]", - "fmulp", - "faddp", - "fstp dword [ebp + -0x28]", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x30]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax]", - "fmulp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x34]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x10]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x38]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x20]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x3c]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x30]", - "fmulp", - "faddp", - "fstp dword [ebp + -0x24]", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x20]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0xc]", - "fmulp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x24]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x1c]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x28]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x2c]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x2c]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x3c]", - "fmulp", - "faddp", - "fstp dword [ebp + -0x20]", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x20]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x8]", - "fmulp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x24]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x18]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x28]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x28]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x2c]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x38]", - "fmulp", - "faddp", - "fstp dword [ebp + -0x1c]", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x20]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x4]", - "fmulp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x24]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x14]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x28]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x24]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x2c]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x34]", - "fmulp", - "faddp", - "fstp dword [ebp + -0x18]", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x20]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax]", - "fmulp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x24]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x10]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x28]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x20]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x2c]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x30]", - "fmulp", - "faddp", - "fstp dword [ebp + -0x14]", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x10]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0xc]", - "fmulp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x14]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x1c]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x18]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x2c]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x1c]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x3c]", - "fmulp", - "faddp", - "fstp dword [ebp + -0x10]", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x10]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x8]", - "fmulp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x14]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x18]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x18]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x28]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x1c]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x38]", - "fmulp", - "faddp", - "fstp dword [ebp + -0xc]", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x10]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x4]", - "fmulp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x14]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x14]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x18]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x24]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x1c]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x34]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x10]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax]", - "fmulp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x14]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x10]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x18]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x20]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x1c]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x30]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0xc]", - "fmulp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x4]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x1c]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x8]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x2c]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0xc]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x3c]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x8]", - "fmulp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x4]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x18]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x8]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x28]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0xc]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x38]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x4]", - "fmulp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x4]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x14]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x8]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x24]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0xc]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x34]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax]", - "fmulp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x4]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x10]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0x8]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x20]", - "fmulp", - "faddp", - "mov eax,dword [ebp + 0x10]", - "fld dword [eax + 0xc]", - "mov eax,dword [ebp + 0xc]", - "fld dword [eax + 0x30]", - "fmulp", - "faddp", - "fld dword [ebp + -0x30]", - "fstp dword [esp + 0x40]", - "fld dword [ebp + -0x2c]", - "fstp dword [esp + 0x3c]", - "fld dword [ebp + -0x28]", - "fstp dword [esp + 0x38]", - "fld dword [ebp + -0x24]", - "fstp dword [esp + 0x34]", - "fld dword [ebp + -0x20]", - "fstp dword [esp + 0x30]", - "fld dword [ebp + -0x1c]", - "fstp dword [esp + 0x2c]", - "fld dword [ebp + -0x18]", - "fstp dword [esp + 0x28]", - "fld dword [ebp + -0x14]", - "fstp dword [esp + 0x24]", - "fld dword [ebp + -0x10]", - "fstp dword [esp + 0x20]", - "fld dword [ebp + -0xc]", - "fstp dword [esp + 0x1c]", - "fxch st5", - "fstp dword [esp + 0x18]", - "fxch st3", - "fstp dword [esp + 0x14]", - "fxch", - "fstp dword [esp + 0x10]", - "fstp dword [esp + 0xc]", - "fstp dword [esp + 0x8]", - "fstp dword [esp + 0x4]", - "mov dword [esp],ebx", - "call 0x0818d57a", - "mov eax,ebx", - "add esp,0x84", - "pop ebx", - "pop ebp" - ], - "ExpectedArm64ASM": [ - "str w9, [x8, #-4]!", - "mov x9, x8", - "str w7, [x8, #-4]!", - "subs w26, w8, #0x84 (132)", - "cfinv", - "mov x27, x8", - "mov x8, x26", - "ldr w7, [x9, #8]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -77480,15 +65436,453 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x23, #0xffffffffffffffd0", - "str s2, [x9, w23, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x21]", + "str w7, [x8]", + "mov w21, #0x26ea", + "movk w21, #0x1, lsl #16", + "mov w22, #0xd118", + "movk w22, #0x818, lsl #16", + "add w22, w21, w22", + "str w21, [x8, #-4]!", + "strb w20, [x28, #1298]", + "ldr x0, [x28, #2280]", + "and x3, x22, #0xfffff", + "add x0, x0, x3, lsl #4", + "ldp x1, x0, [x0]" + ] + }, + "Block7": { + "ExpectedInstructionCount": 7584, + "x86Insts": [ + "push ebp", + "mov ebp,esp", + "push ebx", + "sub esp,0x84", + "mov ebx,dword [ebp + 0x8]", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x30]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0xc]", + "fmulp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x34]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x1c]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x38]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x2c]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x3c]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x3c]", + "fmulp", + "faddp", + "fstp dword [ebp + -0x30]", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x30]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x8]", + "fmulp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x34]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x18]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x38]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x28]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x3c]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x38]", + "fmulp", + "faddp", + "fstp dword [ebp + -0x2c]", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x30]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x4]", + "fmulp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x34]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x14]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x38]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x24]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x3c]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x34]", + "fmulp", + "faddp", + "fstp dword [ebp + -0x28]", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x30]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax]", + "fmulp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x34]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x10]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x38]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x20]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x3c]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x30]", + "fmulp", + "faddp", + "fstp dword [ebp + -0x24]", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x20]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0xc]", + "fmulp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x24]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x1c]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x28]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x2c]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x2c]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x3c]", + "fmulp", + "faddp", + "fstp dword [ebp + -0x20]", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x20]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x8]", + "fmulp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x24]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x18]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x28]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x28]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x2c]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x38]", + "fmulp", + "faddp", + "fstp dword [ebp + -0x1c]", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x20]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x4]", + "fmulp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x24]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x14]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x28]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x24]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x2c]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x34]", + "fmulp", + "faddp", + "fstp dword [ebp + -0x18]", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x20]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax]", + "fmulp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x24]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x10]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x28]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x20]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x2c]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x30]", + "fmulp", + "faddp", + "fstp dword [ebp + -0x14]", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x10]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0xc]", + "fmulp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x14]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x1c]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x18]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x2c]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x1c]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x3c]", + "fmulp", + "faddp", + "fstp dword [ebp + -0x10]", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x10]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x8]", + "fmulp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x14]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x18]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x18]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x28]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x1c]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x38]", + "fmulp", + "faddp", + "fstp dword [ebp + -0xc]", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x10]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x4]", + "fmulp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x14]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x14]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x18]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x24]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x1c]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x34]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x10]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax]", + "fmulp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x14]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x10]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x18]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x20]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x1c]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x30]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0xc]", + "fmulp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x4]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x1c]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x8]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x2c]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0xc]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x3c]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x8]", + "fmulp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x4]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x18]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x8]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x28]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0xc]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x38]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x4]", + "fmulp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x4]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x14]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x8]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x24]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0xc]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x34]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax]", + "fmulp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x4]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x10]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0x8]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x20]", + "fmulp", + "faddp", + "mov eax,dword [ebp + 0x10]", + "fld dword [eax + 0xc]", + "mov eax,dword [ebp + 0xc]", + "fld dword [eax + 0x30]", + "fmulp", + "faddp", + "fld dword [ebp + -0x30]", + "fstp dword [esp + 0x40]", + "fld dword [ebp + -0x2c]", + "fstp dword [esp + 0x3c]", + "fld dword [ebp + -0x28]", + "fstp dword [esp + 0x38]", + "fld dword [ebp + -0x24]", + "fstp dword [esp + 0x34]", + "fld dword [ebp + -0x20]", + "fstp dword [esp + 0x30]", + "fld dword [ebp + -0x1c]", + "fstp dword [esp + 0x2c]", + "fld dword [ebp + -0x18]", + "fstp dword [esp + 0x28]", + "fld dword [ebp + -0x14]", + "fstp dword [esp + 0x24]", + "fld dword [ebp + -0x10]", + "fstp dword [esp + 0x20]", + "fld dword [ebp + -0xc]", + "fstp dword [esp + 0x1c]", + "fxch st5", + "fstp dword [esp + 0x18]", + "fxch st3", + "fstp dword [esp + 0x14]", + "fxch", + "fstp dword [esp + 0x10]", + "fstp dword [esp + 0xc]", + "fstp dword [esp + 0x8]", + "fstp dword [esp + 0x4]", + "mov dword [esp],ebx", + "call 0x0818d57a", + "mov eax,ebx", + "add esp,0x84", + "pop ebx", + "pop ebp" + ], + "ExpectedArm64ASM": [ + "str w9, [x8, #-4]!", + "mov x9, x8", + "str w7, [x8, #-4]!", + "subs w26, w8, #0x84 (132)", + "cfinv", + "mov x27, x8", + "mov x8, x26", + "ldr w7, [x9, #8]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -77517,16 +65911,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s3, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77538,7 +65924,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77551,23 +65937,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77580,10 +65952,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -77598,16 +65970,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77619,7 +65983,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77632,19 +65996,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77656,7 +66012,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77669,23 +66025,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77700,8 +66042,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -77713,23 +66055,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77742,10 +66070,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -77760,16 +66088,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77781,7 +66101,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77794,19 +66114,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s4, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77818,7 +66130,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77831,23 +66143,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77862,8 +66160,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -77875,23 +66173,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77904,10 +66188,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -77922,16 +66206,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77943,7 +66219,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77956,19 +66232,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s4, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77980,7 +66248,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77993,23 +66261,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78024,8 +66278,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -78037,23 +66291,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78066,10 +66306,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -78084,16 +66324,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x20, #0xffffffffffffffd0", + "sub w21, w9, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78120,15 +66352,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x24, #0xffffffffffffffd4", - "str s2, [x9, w24, sxtw]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x21]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -78157,16 +66382,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s3, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78178,7 +66395,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78191,23 +66408,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78220,10 +66423,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -78238,16 +66441,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78259,7 +66454,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78272,19 +66467,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78296,7 +66483,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78309,23 +66496,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78340,8 +66513,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -78353,23 +66526,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78382,10 +66541,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -78400,16 +66559,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78421,7 +66572,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78434,19 +66585,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s4, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78458,7 +66601,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78471,23 +66614,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78502,8 +66631,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -78515,23 +66644,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78544,10 +66659,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -78562,16 +66677,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78583,7 +66690,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78596,19 +66703,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s4, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78620,7 +66719,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78633,23 +66732,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78664,8 +66749,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -78677,23 +66762,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78706,10 +66777,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -78724,16 +66795,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x21, #0xffffffffffffffd4", + "sub w22, w9, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78760,15 +66823,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x25, #0xffffffffffffffd8", - "str s2, [x9, w25, sxtw]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x22]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -78797,16 +66853,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78818,7 +66866,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78831,23 +66879,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78860,10 +66894,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -78878,16 +66912,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78899,7 +66925,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78912,19 +66938,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78936,7 +66954,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78949,23 +66967,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78980,8 +66984,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -78993,23 +66997,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79022,10 +67012,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -79040,16 +67030,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79061,7 +67043,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79074,19 +67056,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s4, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79098,7 +67072,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79111,23 +67085,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79142,8 +67102,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -79155,23 +67115,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79184,10 +67130,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -79202,16 +67148,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79223,7 +67161,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79236,19 +67174,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s4, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79260,7 +67190,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79273,23 +67203,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79304,8 +67220,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -79317,23 +67233,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79346,10 +67248,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -79364,16 +67266,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x22, #0xffffffffffffffd8", + "sub w23, w9, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79400,16 +67294,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x12, #0xffffffffffffffdc", - "str s2, [x9, w12, sxtw]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x23]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79437,16 +67324,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79458,7 +67337,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79471,23 +67350,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79500,10 +67365,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -79518,16 +67383,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79539,7 +67396,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79552,19 +67409,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s4, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79576,7 +67425,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79589,23 +67438,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79620,8 +67455,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -79633,23 +67468,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79662,10 +67483,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -79680,16 +67501,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79701,7 +67514,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79714,19 +67527,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s4, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79738,7 +67543,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79751,23 +67556,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79782,8 +67573,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -79795,23 +67586,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79824,10 +67601,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -79842,16 +67619,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79863,7 +67632,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79876,19 +67645,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s4, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79900,7 +67661,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79913,23 +67674,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79944,8 +67691,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -79957,23 +67704,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79986,10 +67719,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -80004,16 +67737,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x23, #0xffffffffffffffdc", + "sub w24, w9, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80040,15 +67765,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x13, #0xffffffffffffffe0", - "str s2, [x9, w13, sxtw]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x24]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -80077,16 +67795,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s3, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80098,7 +67808,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80111,23 +67821,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80140,10 +67836,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -80158,16 +67854,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80179,7 +67867,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80192,19 +67880,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80216,7 +67896,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80229,23 +67909,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80260,8 +67926,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -80273,23 +67939,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80302,10 +67954,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -80320,16 +67972,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80341,7 +67985,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80354,19 +67998,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s4, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80378,7 +68014,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80391,23 +68027,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80422,8 +68044,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -80435,23 +68057,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80464,10 +68072,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -80482,16 +68090,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80503,7 +68103,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80516,19 +68116,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s4, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80540,7 +68132,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80553,23 +68145,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80584,8 +68162,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -80597,23 +68175,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80626,10 +68190,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -80644,16 +68208,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x24, #0xffffffffffffffe0", + "sub w25, w9, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80680,15 +68236,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x14, #0xffffffffffffffe4", - "str s2, [x9, w14, sxtw]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x25]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -80717,16 +68266,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s3, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80738,7 +68279,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80751,23 +68292,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80780,10 +68307,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -80798,16 +68325,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80819,7 +68338,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80832,19 +68351,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80856,7 +68367,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80869,23 +68380,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80900,8 +68397,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -80913,23 +68410,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80942,10 +68425,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -80960,16 +68443,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80981,7 +68456,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80994,19 +68469,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s4, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81018,7 +68485,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81031,23 +68498,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81062,8 +68515,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -81075,23 +68528,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81104,10 +68543,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -81122,16 +68561,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81143,7 +68574,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81156,19 +68587,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s4, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81180,7 +68603,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81193,23 +68616,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81224,8 +68633,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -81237,23 +68646,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81266,10 +68661,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -81284,16 +68679,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x25, #0xffffffffffffffe4", + "sub w12, w9, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81320,15 +68707,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x15, #0xffffffffffffffe8", - "str s2, [x9, w15, sxtw]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x12]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -81357,16 +68737,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81378,7 +68750,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81391,23 +68763,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81420,10 +68778,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -81438,16 +68796,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81459,7 +68809,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81472,19 +68822,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81496,7 +68838,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81509,23 +68851,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81540,8 +68868,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -81553,23 +68881,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81582,10 +68896,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -81600,16 +68914,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81621,7 +68927,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81634,19 +68940,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s4, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81658,7 +68956,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81671,23 +68969,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81702,8 +68986,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -81715,23 +68999,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81744,10 +69014,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -81762,16 +69032,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81783,7 +69045,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81796,19 +69058,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s4, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81820,7 +69074,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81833,23 +69087,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81864,8 +69104,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -81877,23 +69117,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81906,10 +69132,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -81924,16 +69150,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x12, #0xffffffffffffffe8", + "sub w13, w9, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81960,16 +69178,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x16, #0xffffffffffffffec", - "str s2, [x9, w16, sxtw]", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x13]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81997,16 +69208,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82018,7 +69221,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82031,23 +69234,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82060,10 +69249,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -82078,16 +69267,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82099,7 +69280,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82112,19 +69293,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s4, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82136,7 +69309,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82149,23 +69322,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82180,8 +69339,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -82193,23 +69352,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82222,10 +69367,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -82240,16 +69385,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82261,7 +69398,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82274,19 +69411,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s4, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82298,7 +69427,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82311,23 +69440,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82342,8 +69457,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -82352,26 +69467,12 @@ "ldp x6, x7, [x28, #296]", "ldr x8, [x28, #312]", "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82384,10 +69485,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -82402,16 +69503,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82423,7 +69516,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82436,19 +69529,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s4, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82460,7 +69545,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82473,23 +69558,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82504,8 +69575,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -82517,23 +69588,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82546,10 +69603,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -82564,16 +69621,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x13, #0xffffffffffffffec", + "sub w14, w9, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82600,15 +69649,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x17, #0xfffffffffffffff0", - "str s2, [x9, w17, sxtw]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x14]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -82637,16 +69679,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s3, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82658,7 +69692,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82671,23 +69705,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82700,10 +69720,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -82718,16 +69738,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s3, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82739,7 +69751,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82752,19 +69764,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82776,7 +69780,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82789,23 +69793,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82820,8 +69810,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -82833,23 +69823,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82862,10 +69838,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -82880,16 +69856,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s3, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82901,7 +69869,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82914,19 +69882,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s4, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82938,7 +69898,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82951,23 +69911,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82982,8 +69928,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -82995,23 +69941,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83024,10 +69956,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -83042,16 +69974,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s3, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83063,7 +69987,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83076,19 +70000,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s4, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83100,7 +70016,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83113,23 +70029,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83144,8 +70046,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -83157,23 +70059,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83186,10 +70074,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -83204,16 +70092,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x14, #0xfffffffffffffff0", + "sub w15, w9, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83240,15 +70120,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x29, #0xfffffffffffffff4", - "str s2, [x9, w29, sxtw]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x15]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -83277,16 +70150,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s3, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83298,7 +70163,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83311,23 +70176,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83340,10 +70191,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -83358,16 +70209,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s3, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83379,7 +70222,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83392,19 +70235,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83416,7 +70251,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83429,23 +70264,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83460,8 +70281,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -83473,23 +70294,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83502,10 +70309,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -83520,16 +70327,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s3, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83541,7 +70340,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83554,19 +70353,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s4, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83578,7 +70369,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83591,23 +70382,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83622,8 +70399,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -83635,23 +70412,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83664,10 +70427,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -83682,53 +70445,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83740,7 +70458,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83749,111 +70467,15 @@ "ldp x4, x5, [x28, #280]", "ldp x6, x7, [x28, #296]", "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83865,7 +70487,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83878,19 +70500,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83902,10 +70514,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -83915,23 +70530,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83944,11 +70545,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -83962,16 +70563,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "mov x15, #0xfffffffffffffff4", + "sub w16, w9, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83983,10 +70576,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -83996,18 +70590,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", + "fmov s2, s0", + "str s2, [x16]", + "ldr w4, [x9, #16]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84036,20 +70621,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84061,13 +70634,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -84077,23 +70647,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84106,11 +70662,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -84124,16 +70680,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s3, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84145,7 +70693,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84158,19 +70706,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84182,7 +70722,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84195,23 +70735,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84226,8 +70752,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -84239,23 +70765,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84268,10 +70780,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -84286,16 +70798,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s3, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84307,7 +70811,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84320,19 +70824,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s4, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84344,7 +70840,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84357,23 +70853,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84388,8 +70870,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -84401,23 +70883,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84430,10 +70898,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -84448,16 +70916,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84469,7 +70929,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84482,19 +70942,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s4, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84506,7 +70958,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84519,23 +70971,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84550,8 +70988,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -84563,19 +71001,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84587,10 +71015,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -84603,16 +71034,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84624,7 +71047,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84637,23 +71060,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84665,13 +71076,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -84681,23 +71089,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84712,9 +71106,9 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -84725,19 +71119,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84749,7 +71135,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84762,19 +71148,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s5, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84786,7 +71164,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84799,23 +71177,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84828,10 +71192,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -84843,23 +71207,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84874,8 +71224,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -84887,19 +71237,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84911,7 +71253,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84924,19 +71266,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s5, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84948,7 +71282,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84961,23 +71295,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84990,10 +71310,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -85005,23 +71325,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85036,8 +71342,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -85049,19 +71355,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85073,7 +71371,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85086,19 +71384,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s5, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85110,7 +71400,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85123,23 +71413,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85152,10 +71428,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -85167,19 +71443,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85191,10 +71457,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85204,19 +71473,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85228,7 +71489,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85241,23 +71502,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s5, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85269,13 +71518,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85285,23 +71531,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85314,11 +71546,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -85326,22 +71558,14 @@ "ldp x6, x7, [x28, #296]", "ldr x8, [x28, #312]", "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s5, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85353,7 +71577,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85366,19 +71590,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s6, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85390,7 +71606,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85403,23 +71619,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85432,10 +71634,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -85447,23 +71649,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85476,10 +71664,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -85491,19 +71679,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s5, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85515,7 +71695,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85528,19 +71708,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s6, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85552,7 +71724,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85565,23 +71737,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85594,10 +71752,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -85609,23 +71767,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85638,10 +71782,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -85653,19 +71797,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s5, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85677,7 +71813,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85690,19 +71826,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s6, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85714,7 +71842,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85727,23 +71855,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85756,10 +71870,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -85771,19 +71885,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85795,10 +71899,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85808,19 +71915,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s5, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85832,7 +71931,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85845,23 +71944,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s6, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85873,13 +71960,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85889,23 +71973,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85918,11 +71988,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -85933,19 +72003,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s6, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85957,7 +72019,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85970,19 +72032,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s7, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85994,7 +72048,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86007,23 +72061,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86036,10 +72076,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -86051,23 +72091,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86080,10 +72106,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -86095,19 +72121,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s6, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86119,7 +72137,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86132,19 +72150,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s7, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86156,7 +72166,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86169,23 +72179,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86198,10 +72194,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -86213,23 +72209,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86242,10 +72224,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -86257,19 +72239,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s6, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86281,7 +72255,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86294,19 +72268,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s7, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86318,7 +72284,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86331,23 +72297,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86360,10 +72312,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -86375,19 +72327,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86399,10 +72341,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86412,19 +72357,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s6, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86436,7 +72373,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86449,23 +72386,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s7, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86477,13 +72402,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86493,23 +72415,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86522,11 +72430,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -86537,19 +72445,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s7, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86561,7 +72461,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86574,19 +72474,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s8, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86598,7 +72490,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86611,23 +72503,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86640,10 +72518,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -86655,23 +72533,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86684,10 +72548,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -86699,19 +72563,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s7, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86723,7 +72579,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86736,60 +72592,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s8, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86800,14 +72607,11 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86817,23 +72621,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86846,11 +72636,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -86861,18 +72651,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86884,10 +72665,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86897,19 +72681,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s7, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86921,11 +72697,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86935,15 +72710,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s8, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86955,7 +72726,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86968,19 +72739,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86993,10 +72754,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87006,15 +72769,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w25, sxtw]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87026,10 +72783,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87039,19 +72799,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s7, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87063,11 +72815,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87077,15 +72828,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w12, sxtw]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s8, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87097,7 +72844,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -87110,19 +72857,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87135,10 +72872,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87148,15 +72887,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w13, sxtw]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s8, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87168,7 +72903,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -87181,19 +72916,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s9, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87205,11 +72932,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87219,15 +72945,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w14, sxtw]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87239,10 +72959,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87252,19 +72975,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87277,10 +72990,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87290,15 +73005,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w15, sxtw]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s8, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87310,7 +73021,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -87323,19 +73034,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s9, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87347,11 +73050,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87361,15 +73063,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w16, sxtw]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87381,10 +73077,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87394,19 +73093,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87419,10 +73108,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87432,15 +73123,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w17, sxtw]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s8, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87452,7 +73139,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -87465,19 +73152,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s9, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87489,11 +73168,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87503,15 +73181,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w29, sxtw]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87523,10 +73195,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87536,19 +73211,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87561,10 +73226,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87574,29 +73241,42 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "mov w24, #0x0", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x9, w20, sxtw]", + "add w20, w8, #0x40 (64)", + "str s8, [x20]", + "ldr s8, [x9, w21, sxtw]", + "add w20, w8, #0x3c (60)", + "str s8, [x20]", + "ldr s8, [x9, w22, sxtw]", + "add w20, w8, #0x38 (56)", + "str s8, [x20]", + "ldr s8, [x9, w23, sxtw]", + "add w20, w8, #0x34 (52)", + "str s8, [x20]", + "ldr s8, [x9, w24, sxtw]", + "add w20, w8, #0x30 (48)", + "str s8, [x20]", + "ldr s8, [x9, w25, sxtw]", + "add w20, w8, #0x2c (44)", + "str s8, [x20]", + "ldr s8, [x9, w12, sxtw]", + "add w20, w8, #0x28 (40)", + "str s8, [x20]", + "ldr s8, [x9, w13, sxtw]", + "add w20, w8, #0x24 (36)", + "str s8, [x20]", + "ldr s8, [x9, w14, sxtw]", + "add w20, w8, #0x20 (32)", + "str s8, [x20]", + "ldr s8, [x9, w15, sxtw]", + "add w20, w8, #0x1c (28)", + "str s8, [x20]", + "mov w20, #0x0", + "strb w20, [x28, #1017]", + "add w21, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87623,27 +73303,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x21]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87656,8 +73318,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -87670,27 +73332,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w24, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x21]", + "strb w20, [x28, #1017]", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87703,8 +73347,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -87717,15 +73361,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x21]", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87738,8 +73375,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -87752,15 +73389,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x21]", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87773,8 +73403,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -87787,15 +73417,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x21]", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87808,8 +73431,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -87822,20 +73445,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x21]", "str w7, [x8]", - "mov w20, #0x2bf5", - "movk w20, #0x1, lsl #16", + "mov w21, #0x2bf5", + "movk w21, #0x1, lsl #16", "mov w22, #0xd10b", "movk w22, #0x818, lsl #16", - "add w22, w20, w22", - "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", + "add w22, w21, w22", + "str w21, [x8, #-4]!", + "strb w20, [x28, #1298]", "ldr x0, [x28, #2280]", "and x3, x22, #0xfffff", "add x0, x0, x3, lsl #4", @@ -87843,7 +73461,7 @@ ] }, "Block8": { - "ExpectedInstructionCount": 8590, + "ExpectedInstructionCount": 8522, "x86Insts": [ "fadd dword [esp + 0x40]", "lea edx,[ecx + ecx*0x2]", @@ -88078,7 +73696,6 @@ "add esp,0x74" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88107,6 +73724,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -88144,7 +73762,6 @@ "add w6, w5, w5, lsl #1", "add w10, w6, w5, lsl #1", "sub w7, w5, #0x2 (2)", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88207,7 +73824,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88239,14 +73855,14 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "add w11, w10, w5, lsl #1", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88309,7 +73925,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88372,7 +73987,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88403,12 +74017,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88471,7 +74086,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88534,7 +74148,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x2c (44)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -88563,13 +74177,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88600,12 +74215,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88668,7 +74284,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88731,7 +74346,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x28 (40)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -88760,16 +74375,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88799,14 +74415,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w7, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, w7, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88868,10 +74485,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88901,25 +74517,25 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "mov w23, #0x0", - "mov w24, #0x8000", - "fmov d3, x23", - "mov v3.d[1], x24", + "mov w22, #0x0", + "mov w23, #0x8000", + "fmov d3, x22", + "mov v3.d[1], x23", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w10, lsl #2", - "ldr s2, [x25]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88981,9 +74597,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w7, lsl #2", - "ldr s2, [x25]", + "add w24, w4, w7, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89013,15 +74628,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w10, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89083,7 +74699,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89112,16 +74728,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w10, lsl #2", - "ldr s2, [x25]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89151,15 +74768,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w5, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89221,7 +74839,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89250,16 +74868,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w6, lsl #2", - "ldr s2, [x25]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89289,15 +74908,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89359,10 +74979,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w6, lsl #2", - "ldr s2, [x25]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89392,15 +75011,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89462,7 +75082,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89491,16 +75111,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w6, lsl #2", - "ldr s2, [x25]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89530,15 +75151,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89600,7 +75222,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89629,16 +75251,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w6, lsl #2", - "ldr s2, [x25]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89668,15 +75291,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89738,7 +75362,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89767,28 +75391,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -89824,7 +75448,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, w7, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89853,26 +75477,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, w7, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89935,7 +75560,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89964,30 +75590,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w5, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "strb w22, [x28, #1017]", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90023,7 +75645,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90052,29 +75675,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w6, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w25, [x28, #1298]", + "lsl w24, w21, w24", + "orr w24, w25, w24", + "strb w24, [x28, #1298]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90105,15 +75730,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90149,7 +75775,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90178,29 +75805,21 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w6, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90231,12 +75850,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90299,7 +75919,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90330,12 +75949,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90398,22 +76018,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90449,22 +76069,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90500,12 +76120,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90519,10 +76138,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -90537,14 +76156,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90573,30 +76195,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w10, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90632,22 +76254,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90683,12 +76305,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90720,14 +76341,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90756,43 +76380,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w10, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90823,12 +76432,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90891,7 +76501,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90922,12 +76531,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90990,7 +76600,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91021,15 +76630,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -91065,7 +76675,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91096,15 +76705,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -91140,12 +76750,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91177,14 +76786,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -91213,15 +76825,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w11, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91252,15 +76863,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -91296,7 +76908,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91327,15 +76938,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -91371,12 +76983,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91390,10 +77001,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -91408,14 +77019,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -91444,45 +77058,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w11, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w5, lsl #2", - "ldr s2, [x25]", + "add w24, w4, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91512,14 +77111,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w10, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91581,10 +77181,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w5, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91614,23 +77213,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", + "fmov d3, x22", + "mov v3.d[1], x23", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w10, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91692,9 +77291,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w5, lsl #2", - "ldr s2, [x25]", + "add w24, w4, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91724,14 +77322,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w10, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91793,7 +77392,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -91822,16 +77421,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w10, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91861,15 +77461,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w5, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91931,7 +77532,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -91960,15 +77561,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w11, lsl #2", - "ldr s2, [x25]", + "add w24, w4, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91998,117 +77600,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w6, lsl #2", - "ldr s2, [x25]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w6, lsl #2", - "ldr s2, [x25]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w11, lsl #2", - "ldr s2, [x25]", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92170,44 +77670,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w6, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92237,14 +77702,154 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add w24, w8, #0x10 (16)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add w24, w4, w6, lsl #2", + "ldr s2, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92306,7 +77911,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92335,16 +77940,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w6, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92374,15 +77980,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92444,7 +78051,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92473,28 +78080,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -92530,7 +78137,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92559,26 +78166,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, w5, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92641,7 +78249,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92670,30 +78279,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, #0x4 (4)", - "add w25, w25, w5, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "strb w22, [x28, #1017]", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -92729,7 +78334,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92758,28 +78363,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, w6, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w25, [x28, #1298]", + "lsl w24, w21, w24", + "orr w24, w25, w24", + "strb w24, [x28, #1298]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92810,15 +78418,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -92854,7 +78463,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92883,29 +78493,21 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, #0x4 (4)", - "add w25, w25, w6, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92936,12 +78538,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93004,7 +78607,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93035,12 +78637,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93103,22 +78706,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93154,7 +78757,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93217,7 +78819,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -93246,17 +78848,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, w10, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93292,7 +78894,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93355,7 +78956,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -93384,29 +78986,21 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, #0x4 (4)", - "add w25, w25, w10, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93437,12 +79031,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93505,7 +79100,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93536,12 +79130,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93604,7 +79199,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93635,35 +79229,36 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", + "fmov d3, x22", + "mov v3.d[1], x23", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93699,10 +79294,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93738,7 +79332,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -93767,26 +79361,25 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, w11, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb w22, [x28, #1017]", "add w25, w20, #0x2 (2)", "and w25, w25, #0x7", "add x0, x28, x25, lsl #4", @@ -93825,10 +79418,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93864,7 +79454,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -93893,46 +79484,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, #0x4 (4)", - "add w25, w25, w11, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x8 (8)", - "add w25, w25, w5, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93962,15 +79538,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x8 (8)", - "add w25, w25, w10, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94032,10 +79609,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0xc (12)", - "add w25, w25, w5, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0xc (12)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94065,23 +79641,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", + "fmov d3, x22", + "mov v3.d[1], x23", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0xc (12)", - "add w24, w24, w10, lsl #2", - "ldr s2, [x24]", + "add w23, w4, #0xc (12)", + "add w23, w23, w10, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94143,10 +79719,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x8 (8)", - "add w24, w24, w5, lsl #2", - "ldr s2, [x24]", + "add w23, w4, #0x8 (8)", + "add w23, w23, w5, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94176,15 +79751,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x8 (8)", - "add w24, w24, w10, lsl #2", - "ldr s2, [x24]", + "ldrb w23, [x28, #1298]", + "lsl w24, w21, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", + "add w23, w4, #0x8 (8)", + "add w23, w23, w10, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94246,7 +79822,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -94275,16 +79851,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w22, w22, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0xc (12)", - "add w24, w24, w10, lsl #2", - "ldr s2, [x24]", + "add w23, w4, #0xc (12)", + "add w23, w23, w10, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94314,15 +79891,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0xc (12)", - "add w24, w24, w5, lsl #2", - "ldr s2, [x24]", + "ldrb w23, [x28, #1298]", + "lsl w24, w21, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", + "add w23, w4, #0xc (12)", + "add w23, w23, w5, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94384,7 +79962,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -94413,16 +79991,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w22, w22, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x8 (8)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "add w23, w4, #0x8 (8)", + "add w23, w23, w11, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94452,15 +80031,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x8 (8)", - "add w24, w24, w6, lsl #2", - "ldr s2, [x24]", + "ldrb w23, [x28, #1298]", + "lsl w24, w21, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", + "add w23, w4, #0x8 (8)", + "add w23, w23, w6, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94522,10 +80102,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0xc (12)", - "add w24, w24, w6, lsl #2", - "ldr s2, [x24]", + "add w23, w4, #0xc (12)", + "add w23, w23, w6, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94555,15 +80134,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0xc (12)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "ldrb w23, [x28, #1298]", + "lsl w24, w21, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", + "add w23, w4, #0xc (12)", + "add w23, w23, w11, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94625,7 +80205,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -94654,16 +80234,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w22, w22, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x8 (8)", - "add w24, w24, w6, lsl #2", - "ldr s2, [x24]", + "add w23, w4, #0x8 (8)", + "add w23, w23, w6, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94693,15 +80274,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x8 (8)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "ldrb w23, [x28, #1298]", + "lsl w24, w21, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", + "add w23, w4, #0x8 (8)", + "add w23, w23, w11, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94763,7 +80345,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -94792,16 +80374,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w22, w22, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0xc (12)", - "add w24, w24, w6, lsl #2", - "ldr s2, [x24]", + "add w23, w4, #0xc (12)", + "add w23, w23, w6, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94831,15 +80414,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0xc (12)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "ldrb w23, [x28, #1298]", + "lsl w24, w21, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", + "add w23, w4, #0xc (12)", + "add w23, w23, w11, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94901,7 +80485,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -94930,28 +80514,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w22, w22, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w23, [x28, #1298]", + "lsl w24, w21, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -94987,7 +80571,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w4, #0x8 (8)", + "add w23, w23, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -95016,27 +80601,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x8 (8)", - "add w24, w24, w5, lsl #2", - "str s2, [x24]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w22, w22, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w23, [x28, #1298]", + "lsl w24, w21, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95099,7 +80684,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w4, #0xc (12)", + "add w23, w23, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -95128,30 +80714,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0xc (12)", - "add w24, w24, w5, lsl #2", - "str s2, [x24]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w22, w22, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "strb w22, [x28, #1017]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -95187,7 +80769,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w4, #0x8 (8)", + "add w23, w23, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -95216,29 +80799,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x8 (8)", - "add w24, w24, w6, lsl #2", - "str s2, [x24]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w22, w22, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w24, [x28, #1298]", + "lsl w23, w21, w23", + "orr w23, w24, w23", + "strb w23, [x28, #1298]", + "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w22, w22, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95269,15 +80854,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w23, [x28, #1298]", + "lsl w24, w21, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -95313,7 +80899,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w4, #0xc (12)", + "add w23, w23, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -95342,29 +80929,21 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0xc (12)", - "add w24, w24, w6, lsl #2", - "str s2, [x24]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w22, w22, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w22, w22, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95395,12 +80974,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w23, [x28, #1298]", + "lsl w24, w21, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95463,7 +81043,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95494,12 +81073,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w23, [x28, #1298]", + "lsl w24, w21, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95562,22 +81142,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w23, [x28, #1298]", + "lsl w24, w21, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -95613,22 +81193,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w23, [x28, #1298]", + "lsl w24, w21, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -95664,12 +81244,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95683,10 +81262,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -95701,14 +81280,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1298]", + "lsl w24, w21, w20", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w4, #0x8 (8)", + "add w23, w23, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -95737,30 +81319,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x8 (8)", - "add w24, w24, w10, lsl #2", - "str s2, [x24]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w22, w22, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "strb w22, [x28, #1017]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -95796,19 +81374,17 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb w22, [x28, #1017]", "add w24, w20, #0x1 (1)", "and w24, w24, #0x7", "add x0, x28, x24, lsl #4", @@ -95847,12 +81423,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95884,26 +81457,28 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1298]", + "lsl w24, w21, w20", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb w22, [x28, #1017]", + "add w22, w4, #0xc (12)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -95932,43 +81507,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w10, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95999,12 +81559,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96067,7 +81628,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96098,12 +81658,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96166,7 +81727,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96197,15 +81757,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -96241,7 +81802,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96272,15 +81832,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -96316,12 +81877,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96353,14 +81913,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -96389,15 +81952,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96428,15 +81990,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -96472,7 +82035,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96503,15 +82065,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -96547,12 +82110,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96566,10 +82128,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -96584,14 +82146,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0xc (12)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -96620,11 +82185,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w11, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -96632,33 +82197,19 @@ "add x8, x8, #0x4 (4)", "ldr w10, [x8]", "add x8, x8, #0x4 (4)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8]", "add x8, x8, #0x4 (4)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -96666,12 +82217,11 @@ "add x8, x8, #0x4 (4)", "mvn w27, w8", "adds w26, w8, #0x74 (116)", - "strb w21, [x28, #1298]", "mov x8, x26" ] }, "Block9": { - "ExpectedInstructionCount": 8488, + "ExpectedInstructionCount": 8441, "x86Insts": [ "fadd dword [esp + 0x40]", "lea edx,[ecx + ecx*0x2]", @@ -96897,7 +82447,6 @@ "add esp,0x74" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96926,6 +82475,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -96963,7 +82513,6 @@ "add w6, w5, w5, lsl #1", "add w10, w6, w5, lsl #1", "sub w7, w5, #0x2 (2)", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97026,7 +82575,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97058,14 +82606,14 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "add w11, w10, w5, lsl #1", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97128,7 +82676,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97191,7 +82738,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97222,12 +82768,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97290,7 +82837,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97353,7 +82899,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x30 (48)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -97382,13 +82928,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97419,12 +82966,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97487,7 +83035,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97550,7 +83097,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x2c (44)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -97579,16 +83126,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97618,14 +83166,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w7, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, w7, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97687,10 +83236,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97720,15 +83268,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97790,9 +83339,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w7, lsl #2", - "ldr s2, [x23]", + "add w22, w4, w7, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97822,15 +83370,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97892,7 +83441,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -97921,16 +83470,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97960,15 +83510,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98030,7 +83581,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98059,16 +83610,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98098,15 +83650,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98168,10 +83721,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98201,15 +83753,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98271,7 +83824,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98300,16 +83853,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98339,15 +83893,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98409,7 +83964,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98438,16 +83993,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98477,15 +84033,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98547,7 +84104,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98576,29 +84133,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x0", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -98634,7 +84190,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, w7, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98663,14 +84219,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, w7, lsl #2", - "str s2, [x24]", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98701,15 +84257,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -98745,7 +84302,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98774,30 +84332,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w5, lsl #2", - "str s2, [x24]", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "mov w23, #0x0", + "strb w23, [x28, #1017]", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -98833,7 +84388,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98862,29 +84418,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x8 (8)", - "add w24, w24, w6, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w24, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w24, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98947,7 +84505,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98976,15 +84535,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w6, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99015,12 +84573,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99083,7 +84642,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99114,12 +84672,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99182,22 +84741,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99233,22 +84792,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99284,12 +84843,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99303,10 +84861,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -99321,14 +84879,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -99357,30 +84918,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x8 (8)", - "add w24, w24, w10, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99416,22 +84977,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99467,12 +85028,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99504,14 +85064,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -99540,43 +85103,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w10, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99607,12 +85155,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99675,7 +85224,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99706,12 +85254,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99774,7 +85323,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99805,15 +85353,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99849,7 +85398,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99880,15 +85428,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99924,12 +85473,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99961,14 +85509,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -99997,15 +85548,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x8 (8)", - "add w24, w24, w11, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100036,15 +85586,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -100080,7 +85631,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100111,15 +85661,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -100155,12 +85706,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100174,10 +85724,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -100192,14 +85742,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -100228,45 +85781,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w11, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w5, lsl #2", - "ldr s2, [x24]", + "add w22, w4, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100296,14 +85834,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w10, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100365,10 +85904,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w5, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100398,15 +85936,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w10, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100468,9 +86007,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w5, lsl #2", - "ldr s2, [x24]", + "add w22, w4, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100500,14 +86038,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w10, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100569,7 +86108,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -100598,16 +86137,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w5, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100637,15 +86177,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w10, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100707,7 +86248,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -100736,15 +86277,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w6, lsl #2", - "ldr s2, [x24]", + "add w22, w4, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100774,14 +86316,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w11, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100843,10 +86386,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w6, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100876,15 +86418,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100946,7 +86489,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -100975,15 +86518,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w6, lsl #2", - "ldr s2, [x24]", + "add w22, w4, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -101013,14 +86557,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w11, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -101082,7 +86627,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101111,16 +86656,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w6, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -101150,15 +86696,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -101220,7 +86767,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101249,28 +86796,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101306,7 +86853,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101335,14 +86882,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, w5, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101373,15 +86920,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101417,7 +86965,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101446,30 +86995,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x4 (4)", - "add w24, w24, w5, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "strb w23, [x28, #1017]", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101505,7 +87050,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101534,28 +87079,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, w6, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w24, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w24, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101618,7 +87166,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101647,15 +87196,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x4 (4)", - "add w24, w24, w6, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101686,12 +87234,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101754,7 +87303,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101785,12 +87333,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101853,22 +87402,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101904,7 +87453,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101967,7 +87515,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101996,17 +87544,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, w10, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102042,7 +87590,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102105,7 +87652,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -102134,29 +87682,21 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x4 (4)", - "add w24, w24, w10, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102187,12 +87727,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102255,7 +87796,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102286,12 +87826,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102354,7 +87895,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102385,36 +87925,37 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "mov w24, #0x8000", + "mov w22, #0x8000", "fmov d3, x23", - "mov v3.d[1], x24", + "mov v3.d[1], x22", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102450,10 +87991,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102489,7 +88029,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -102518,26 +88058,25 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, w11, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb w23, [x28, #1017]", "add w24, w20, #0x2 (2)", "and w24, w24, #0x7", "add x0, x28, x24, lsl #4", @@ -102576,10 +88115,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102615,7 +88151,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -102644,46 +88181,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x4 (4)", - "add w24, w24, w11, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x8 (8)", - "add w24, w24, w5, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102713,15 +88235,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x8 (8)", - "add w24, w24, w10, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102783,10 +88306,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0xc (12)", - "add w24, w24, w5, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0xc (12)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102816,15 +88338,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0xc (12)", - "add w24, w24, w10, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0xc (12)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102886,10 +88409,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x8 (8)", - "add w24, w24, w5, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102919,15 +88441,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x8 (8)", - "add w24, w24, w10, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102989,7 +88512,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103018,16 +88541,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0xc (12)", - "add w24, w24, w5, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0xc (12)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103057,15 +88581,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0xc (12)", - "add w24, w24, w10, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0xc (12)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103127,7 +88652,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103156,16 +88681,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x8 (8)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103195,15 +88721,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x8 (8)", - "add w24, w24, w6, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103265,10 +88792,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0xc (12)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0xc (12)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103298,15 +88824,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0xc (12)", - "add w24, w24, w6, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0xc (12)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103368,7 +88895,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103397,16 +88924,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x8 (8)", - "add w24, w24, w6, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103436,15 +88964,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x8 (8)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103506,7 +89035,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103535,16 +89064,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0xc (12)", - "add w24, w24, w6, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0xc (12)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103574,15 +89104,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0xc (12)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0xc (12)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103644,7 +89175,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103673,28 +89204,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -103730,7 +89261,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103759,15 +89291,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x8 (8)", - "add w24, w24, w5, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -103798,15 +89329,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -103842,7 +89374,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0xc (12)", + "add w22, w22, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103871,30 +89404,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0xc (12)", - "add w24, w24, w5, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "strb w23, [x28, #1017]", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -103930,7 +89459,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103959,29 +89489,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x8 (8)", - "add w24, w24, w6, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w24, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w24, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104044,7 +89576,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0xc (12)", + "add w22, w22, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -104073,15 +89606,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0xc (12)", - "add w24, w24, w6, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104112,12 +89644,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104180,7 +89713,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104211,12 +89743,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104279,22 +89812,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -104330,22 +89863,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x4 (4)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -104381,12 +89914,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104400,10 +89932,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -104418,14 +89950,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -104454,30 +89989,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x8 (8)", - "add w24, w24, w10, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "strb w23, [x28, #1017]", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -104513,19 +90044,17 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb w23, [x28, #1017]", "add w24, w20, #0x1 (1)", "and w24, w24, #0x7", "add x0, x28, x24, lsl #4", @@ -104564,12 +90093,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104601,26 +90127,28 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb w23, [x28, #1017]", + "add w22, w4, #0xc (12)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -104649,43 +90177,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w10, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104716,12 +90229,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104784,7 +90298,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104815,12 +90328,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104883,7 +90397,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104914,15 +90427,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -104958,7 +90472,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104989,15 +90502,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -105033,12 +90547,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -105070,14 +90583,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -105106,15 +90622,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -105145,15 +90660,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -105189,7 +90705,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -105220,15 +90735,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -105264,12 +90780,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -105283,10 +90798,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -105301,14 +90816,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0xc (12)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -105337,11 +90855,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w11, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -105349,33 +90867,19 @@ "add x8, x8, #0x4 (4)", "ldr w10, [x8]", "add x8, x8, #0x4 (4)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8]", "add x8, x8, #0x4 (4)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -105383,12 +90887,11 @@ "add x8, x8, #0x4 (4)", "mvn w27, w8", "adds w26, w8, #0x74 (116)", - "strb w21, [x28, #1298]", "mov x8, x26" ] }, "Block10": { - "ExpectedInstructionCount": 8405, + "ExpectedInstructionCount": 6382, "x86Insts": [ "push ebp", "mov ebp,esp", @@ -105817,7 +91320,6 @@ "sub w8, w8, #0x14 (20)", "ldr w4, [x9, #8]", "add w4, w4, #0x78 (120)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -105846,19 +91348,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x38 (56)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -105870,7 +91362,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -105883,23 +91375,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -105930,16 +91408,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x20, #0xfffffffffffffff8", + "sub w21, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -105966,16 +91436,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x23, #0xfffffffffffffff8", - "str s2, [x9, w23, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x21]", "ldr w4, [x9, #8]", "add w4, w4, #0x7c (124)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106004,17 +91467,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x3c (60)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106026,7 +91481,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106039,23 +91494,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106086,16 +91527,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x21, #0xfffffffffffffffc", + "sub w22, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106122,18 +91555,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x24, #0xfffffffffffffffc", - "str s2, [x9, w24, sxtw]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x22]", "ldr w4, [x9, #8]", "add w4, w4, #0x78 (120)", "ldr w6, [x9, #8]", "add w6, w6, #0x78 (120)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106162,17 +91588,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x38 (56)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106184,7 +91602,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106197,23 +91615,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106226,10 +91630,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -106244,16 +91648,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106281,16 +91675,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x7c (124)", "ldr w6, [x9, #8]", "add w6, w6, #0x7c (124)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106319,17 +91707,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x3c (60)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106341,7 +91721,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106354,23 +91734,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106383,10 +91749,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -106401,16 +91767,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106438,22 +91794,16 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w6, w4, #0x38 (56)", - "ldr w4, [x9, w23, sxtw]", + "ldr w4, [x9, w20, sxtw]", "str w4, [x6]", "ldr w4, [x9, #8]", "add w6, w4, #0x3c (60)", - "ldr w4, [x9, w24, sxtw]", + "ldr w4, [x9, w21, sxtw]", "str w4, [x6]", "ldr w4, [x9, #8]", "add w4, w4, #0x70 (112)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106482,17 +91832,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x30 (48)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106504,7 +91846,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106517,23 +91859,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106564,16 +91892,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w22, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106600,15 +91919,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x22]", "ldr w4, [x9, #8]", "add w4, w4, #0x74 (116)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106637,17 +91950,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x34 (52)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106659,7 +91964,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106672,23 +91977,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106719,16 +92010,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w22, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106755,17 +92037,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x22]", "ldr w4, [x9, #8]", "add w4, w4, #0x70 (112)", "ldr w6, [x9, #8]", "add w6, w6, #0x70 (112)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106794,17 +92070,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x30 (48)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106816,7 +92084,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106829,23 +92097,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106858,10 +92112,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -106876,16 +92130,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106913,16 +92157,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x74 (116)", "ldr w6, [x9, #8]", "add w6, w6, #0x74 (116)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106951,17 +92189,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x34 (52)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106973,7 +92203,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106986,23 +92216,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107015,10 +92231,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -107033,16 +92249,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107070,15 +92276,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x30 (48)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s2, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107106,17 +92306,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w25, #0x3140", - "movk w25, #0x855, lsl #16", - "ldr s2, [x25]", + "mov w22, #0x3140", + "movk w22, #0x855, lsl #16", + "ldr s3, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107128,7 +92320,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107141,23 +92333,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107170,10 +92348,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -107188,15 +92366,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s3, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107208,7 +92378,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107221,20 +92391,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x3144", - "movk w12, #0x855, lsl #16", - "ldr s2, [x12]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov w23, #0x3144", + "movk w23, #0x855, lsl #16", + "ldr s4, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107246,7 +92408,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107259,23 +92421,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107290,8 +92438,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -107303,23 +92451,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107332,10 +92466,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -107350,16 +92484,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107387,133 +92511,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x34 (52)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w13, #0x3148", - "movk w13, #0x855, lsl #16", - "ldr s2, [x13]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107541,15 +92541,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x25]", + "mov w24, #0x3148", + "movk w24, #0x855, lsl #16", + "ldr s3, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107561,7 +92555,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107574,23 +92568,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107603,10 +92583,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -107621,20 +92601,62 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x9, w21, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107649,8 +92671,38 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -107665,16 +92717,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107702,14 +92744,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x68 (104)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -107738,17 +92774,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x28 (40)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107760,7 +92788,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107773,23 +92801,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107820,16 +92834,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w25, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107856,15 +92861,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x25]", "ldr w4, [x9, #8]", "add w4, w4, #0x6c (108)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -107893,17 +92892,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x2c (44)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107915,7 +92906,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107928,23 +92919,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107975,16 +92952,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w25, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108011,17 +92979,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x25]", "ldr w4, [x9, #8]", "add w4, w4, #0x68 (104)", "ldr w6, [x9, #8]", "add w6, w6, #0x68 (104)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -108050,17 +93012,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x28 (40)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108072,7 +93026,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108085,23 +93039,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108114,10 +93054,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -108132,16 +93072,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108169,16 +93099,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x6c (108)", "ldr w6, [x9, #8]", "add w6, w6, #0x6c (108)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -108207,17 +93131,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x2c (44)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108229,7 +93145,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108242,23 +93158,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108271,10 +93173,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -108289,16 +93191,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108326,15 +93218,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x28 (40)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s2, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108362,15 +93248,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s3, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108382,7 +93260,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108395,11 +93273,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108412,10 +93288,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -108430,12 +93306,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w14, #0x313c", - "movk w14, #0x855, lsl #16", - "ldr s2, [x14]", + "mov w25, #0x313c", + "movk w25, #0x855, lsl #16", + "ldr s3, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108447,7 +93320,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108460,23 +93333,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108489,10 +93348,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -108507,16 +93366,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108544,15 +93393,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x2c (44)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s2, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108580,15 +93423,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s3, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108600,7 +93435,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108613,11 +93448,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108630,10 +93463,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -108648,10 +93481,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x14]", + "ldr s3, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108663,7 +93493,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108676,23 +93506,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108705,10 +93521,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -108723,16 +93539,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108760,14 +93566,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x60 (96)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -108796,17 +93596,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x20 (32)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108818,7 +93610,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108831,23 +93623,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108878,16 +93656,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w12, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108914,15 +93683,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x12]", "ldr w4, [x9, #8]", "add w4, w4, #0x64 (100)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -108951,17 +93714,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x24 (36)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108973,7 +93728,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108986,23 +93741,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109033,16 +93774,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w12, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109069,17 +93801,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x12]", "ldr w4, [x9, #8]", "add w4, w4, #0x60 (96)", "ldr w6, [x9, #8]", "add w6, w6, #0x60 (96)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -109108,17 +93834,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x20 (32)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109130,7 +93848,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109143,23 +93861,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109172,10 +93876,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -109190,16 +93894,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109227,16 +93921,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x64 (100)", "ldr w6, [x9, #8]", "add w6, w6, #0x64 (100)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -109265,17 +93953,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x24 (36)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109287,7 +93967,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109300,23 +93980,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109329,10 +93995,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -109347,16 +94013,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109384,15 +94040,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x20 (32)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s2, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109420,15 +94070,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "ldr s3, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109440,7 +94082,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109453,23 +94095,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109482,10 +94110,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -109500,15 +94128,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s3, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109520,7 +94140,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109533,20 +94153,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w15, #0x314c", - "movk w15, #0x855, lsl #16", - "ldr s2, [x15]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov w12, #0x314c", + "movk w12, #0x855, lsl #16", + "ldr s4, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109558,7 +94170,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109571,23 +94183,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109602,8 +94200,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -109615,23 +94213,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109644,10 +94228,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -109662,16 +94246,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109699,15 +94273,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x24 (36)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109735,15 +94303,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "ldr s3, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109755,7 +94315,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109768,23 +94328,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109797,10 +94343,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -109815,15 +94361,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109835,7 +94373,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109848,18 +94386,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x25]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109871,7 +94401,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109884,23 +94414,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109915,8 +94431,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -109928,23 +94444,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109957,10 +94459,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -109975,16 +94477,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110012,14 +94504,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x58 (88)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110048,17 +94534,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x18 (24)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110070,7 +94548,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -110083,23 +94561,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110130,16 +94594,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w13, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110166,15 +94621,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x13]", "ldr w4, [x9, #8]", "add w4, w4, #0x1c (28)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110203,17 +94652,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x5c (92)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110225,7 +94666,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -110238,23 +94679,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110285,16 +94712,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w13, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110321,17 +94739,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x13]", "ldr w4, [x9, #8]", "add w4, w4, #0x58 (88)", "ldr w6, [x9, #8]", "add w6, w6, #0x58 (88)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110360,17 +94772,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x18 (24)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110382,7 +94786,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -110395,23 +94799,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110424,10 +94814,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -110442,16 +94832,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110479,16 +94859,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x5c (92)", "ldr w6, [x9, #8]", "add w6, w6, #0x5c (92)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110517,17 +94891,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x1c (28)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110539,7 +94905,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -110552,23 +94918,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110581,10 +94933,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -110599,16 +94951,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110636,22 +94978,16 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w6, w4, #0x18 (24)", - "ldr w4, [x9, w24, sxtw]", + "ldr w4, [x9, w21, sxtw]", "str w4, [x6]", "ldr w4, [x9, #8]", "add w6, w4, #0x1c (28)", - "ldr w4, [x9, w23, sxtw]", + "ldr w4, [x9, w20, sxtw]", "str w4, [x6]", "ldr w4, [x9, #8]", "add w4, w4, #0x10 (16)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110680,17 +95016,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x50 (80)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110702,7 +95030,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -110715,23 +95043,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110762,16 +95076,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w13, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110798,15 +95103,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x13]", "ldr w4, [x9, #8]", "add w4, w4, #0x14 (20)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110835,17 +95134,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x54 (84)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110857,7 +95148,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -110870,23 +95161,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110917,16 +95194,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w13, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110953,17 +95221,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x13]", "ldr w4, [x9, #8]", "add w4, w4, #0x50 (80)", "ldr w6, [x9, #8]", "add w6, w6, #0x50 (80)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110992,17 +95254,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111014,7 +95268,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111027,23 +95281,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111056,10 +95296,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -111074,16 +95314,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111111,16 +95341,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x54 (84)", "ldr w6, [x9, #8]", "add w6, w6, #0x54 (84)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -111149,17 +95373,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x14 (20)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111171,7 +95387,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111184,23 +95400,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111213,10 +95415,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -111231,16 +95433,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111268,15 +95460,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111304,15 +95490,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x25]", + "ldr s3, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111324,7 +95502,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111337,23 +95515,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111366,10 +95530,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -111384,15 +95548,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111404,7 +95560,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111417,18 +95573,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111440,7 +95588,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111453,23 +95601,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111484,8 +95618,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -111497,23 +95631,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111526,10 +95646,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -111544,16 +95664,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111581,15 +95691,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x14 (20)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111617,15 +95721,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "ldr s3, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111637,7 +95733,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111650,23 +95746,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111679,10 +95761,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -111697,15 +95779,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111717,7 +95791,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111730,18 +95804,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x15]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111753,7 +95819,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111766,23 +95832,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111797,8 +95849,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -111810,23 +95862,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111839,10 +95877,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -111857,16 +95895,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111894,14 +95922,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x8 (8)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -111930,17 +95952,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x48 (72)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111952,7 +95966,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111965,23 +95979,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112012,16 +96012,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w12, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112048,15 +96039,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x12]", "ldr w4, [x9, #8]", "add w4, w4, #0xc (12)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -112085,17 +96070,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x4c (76)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112107,7 +96084,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -112120,23 +96097,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112167,16 +96130,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w12, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112203,17 +96157,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x12]", "ldr w4, [x9, #8]", "add w4, w4, #0x48 (72)", "ldr w6, [x9, #8]", "add w6, w6, #0x48 (72)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -112242,17 +96190,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x8 (8)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112264,7 +96204,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -112277,23 +96217,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112306,10 +96232,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -112324,16 +96250,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112361,16 +96277,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x4c (76)", "ldr w6, [x9, #8]", "add w6, w6, #0x4c (76)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -112399,17 +96309,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0xc (12)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112421,7 +96323,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -112434,23 +96336,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112463,10 +96351,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -112481,16 +96369,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112518,51 +96396,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x8 (8)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112590,8 +96426,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112603,11 +96438,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -112622,10 +96484,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x14]", + "ldr s3, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112637,7 +96496,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -112650,23 +96509,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112679,10 +96524,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -112697,16 +96542,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112734,15 +96569,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0xc (12)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112770,15 +96599,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112790,7 +96611,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -112803,11 +96624,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112820,10 +96639,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -112838,10 +96657,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x14]", + "ldr s3, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112853,7 +96669,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -112866,23 +96682,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112895,10 +96697,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -112913,16 +96715,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112950,13 +96742,7 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -112985,17 +96771,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x40 (64)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113007,7 +96785,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113020,23 +96798,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113067,16 +96831,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w25, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113103,15 +96858,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x25]", "ldr w4, [x9, #8]", "add w4, w4, #0x4 (4)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -113140,17 +96889,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x44 (68)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113162,7 +96903,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113175,23 +96916,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113222,16 +96949,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w25, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113258,17 +96976,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x25]", "ldr w4, [x9, #8]", "add w6, w4, #0x40 (64)", "ldr w4, [x9, #8]", "add w4, w4, #0x40 (64)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -113297,16 +97009,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113318,7 +97022,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113331,23 +97035,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113360,10 +97050,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -113378,16 +97068,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113415,54 +97095,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x44 (68)", "ldr w6, [x9, #8]", "add w6, w6, #0x44 (68)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w6, [x9, #8]", - "add w6, w6, #0x4 (4)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -113491,20 +97127,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr w6, [x9, #8]", + "add w6, w6, #0x4 (4)", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113516,11 +97141,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -113535,16 +97187,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113572,13 +97214,7 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113606,15 +97242,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "ldr s3, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113626,7 +97254,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113639,23 +97267,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113668,10 +97282,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -113686,15 +97300,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113706,7 +97312,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113719,18 +97325,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x25]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113742,7 +97340,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113755,23 +97353,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113786,8 +97370,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -113799,23 +97383,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113828,10 +97398,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -113846,17 +97416,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113884,17 +97444,11 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "adds w26, w4, #0x4 (4)", "mov x27, x4", "mov x4, x26", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113922,15 +97476,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x25]", + "ldr s3, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113942,7 +97488,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113955,23 +97501,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113984,10 +97516,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -114002,15 +97534,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -114022,7 +97546,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -114035,18 +97559,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x12]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -114058,7 +97574,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -114071,23 +97587,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -114102,8 +97604,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -114115,23 +97617,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -114144,10 +97632,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -114162,16 +97650,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -114199,22 +97677,24 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "str w4, [x8]", "mov w20, #0x37f1", "movk w20, #0x1, lsl #16", - "mov w22, #0xda1c", - "movk w22, #0x816, lsl #16", - "add w22, w20, w22", + "mov w21, #0xda1c", + "movk w21, #0x816, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", + "ldrb w20, [x28, #1019]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "mov w23, #0x1", + "lsl w20, w23, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", "ldr x0, [x28, #2280]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] diff --git a/unittests/InstructionCountCI/FlagM/x87.json b/unittests/InstructionCountCI/FlagM/x87.json index 51bb0bddf3..48ff8c48c0 100644 --- a/unittests/InstructionCountCI/FlagM/x87.json +++ b/unittests/InstructionCountCI/FlagM/x87.json @@ -19,7 +19,6 @@ "0xd8 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48,6 +47,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -90,7 +90,6 @@ "0xd8 !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -119,6 +118,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -161,7 +161,6 @@ "0xd8 !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -190,6 +189,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -238,7 +238,6 @@ "0xd8 !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -267,6 +266,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -311,10 +311,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub dword [rax]": { @@ -323,7 +323,6 @@ "0xd8 !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -352,6 +351,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -394,7 +394,6 @@ "0xd8 !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -423,6 +422,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -465,7 +465,6 @@ "0xd8 !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -494,6 +493,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -536,7 +536,6 @@ "0xd8 !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -565,6 +564,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -602,15 +602,13 @@ ] }, "fadd st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -644,7 +642,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -978,15 +976,13 @@ ] }, "fmul st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1020,7 +1016,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -1354,16 +1350,13 @@ ] }, "fcom st0, st0": { - "ExpectedInstructionCount": 45, + "ExpectedInstructionCount": 43, "Comment": [ "0xd8 11b 0xd0 /2" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1379,10 +1372,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1395,15 +1388,16 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov x20, x0", - "ubfx x22, x20, #1, #1", - "ubfx x23, x20, #0, #1", + "ubfx x21, x20, #1, #1", + "ubfx x22, x20, #0, #1", "ubfx x20, x20, #2, #1", + "orr w21, w21, w20", "orr w22, w22, w20", - "orr w23, w23, w20", - "strb w22, [x28, #1016]", + "strb w21, [x28, #1016]", + "mov w21, #0x0", "strb w21, [x28, #1017]", "strb w20, [x28, #1018]", - "strb w23, [x28, #1022]" + "strb w22, [x28, #1022]" ] }, "fcom st0, st1": { @@ -1413,10 +1407,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1431,10 +1425,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1466,10 +1460,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1484,10 +1478,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1519,10 +1513,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1537,10 +1531,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1572,10 +1566,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1590,10 +1584,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1625,10 +1619,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1643,10 +1637,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1678,10 +1672,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1696,10 +1690,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1731,10 +1725,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1749,10 +1743,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1778,16 +1772,13 @@ ] }, "fcomp st0, st0": { - "ExpectedInstructionCount": 53, + "ExpectedInstructionCount": 51, "Comment": [ "0xd8 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1803,10 +1794,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1818,24 +1809,25 @@ "ld1 {v2.2d, v3.2d}, [sp], #32", "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", - "mov x22, x0", - "ubfx x23, x22, #1, #1", - "ubfx x24, x22, #0, #1", - "ubfx x22, x22, #2, #1", - "orr w23, w23, w22", - "orr w24, w24, w22", - "strb w23, [x28, #1016]", - "strb w21, [x28, #1017]", - "strb w22, [x28, #1018]", - "strb w24, [x28, #1022]", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", + "strb w22, [x28, #1016]", + "mov w22, #0x0", + "strb w22, [x28, #1017]", + "strb w21, [x28, #1018]", + "strb w23, [x28, #1022]", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st1": { @@ -1845,12 +1837,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1864,10 +1856,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1893,10 +1885,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st2": { @@ -1906,11 +1898,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1924,10 +1916,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1954,10 +1946,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st3": { @@ -1967,11 +1959,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1985,10 +1977,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2015,10 +2007,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st4": { @@ -2028,11 +2020,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2046,10 +2038,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2076,10 +2068,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st5": { @@ -2089,11 +2081,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2107,10 +2099,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2137,10 +2129,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st6": { @@ -2150,11 +2142,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2168,10 +2160,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2198,10 +2190,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st7": { @@ -2211,11 +2203,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2229,10 +2221,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2259,22 +2251,20 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2290,10 +2280,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2308,7 +2298,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -2642,15 +2632,13 @@ ] }, "fsubr st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2684,7 +2672,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -2695,11 +2683,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2713,10 +2701,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2742,11 +2730,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2760,10 +2748,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2789,11 +2777,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2807,10 +2795,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2836,11 +2824,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2854,10 +2842,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2883,11 +2871,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2901,10 +2889,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2930,11 +2918,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2948,10 +2936,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2977,11 +2965,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2995,10 +2983,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -3018,15 +3006,13 @@ ] }, "fdiv st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3042,10 +3028,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3060,7 +3046,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -3394,15 +3380,13 @@ ] }, "fdivr st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xf8 /7" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3436,7 +3420,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -3447,11 +3431,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3465,10 +3449,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3494,11 +3478,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3512,10 +3496,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3541,11 +3525,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3559,10 +3543,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3588,11 +3572,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3606,10 +3590,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3635,11 +3619,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3653,10 +3637,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3682,11 +3666,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3700,10 +3684,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3729,11 +3713,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3747,10 +3731,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3775,7 +3759,6 @@ "0xd9 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3804,16 +3787,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fst dword [rax]": { @@ -3894,21 +3878,22 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fldenv [rax]": { - "ExpectedInstructionCount": 48, + "ExpectedInstructionCount": 50, "Comment": [ "0xd9 !11b /4" ], "ExpectedArm64ASM": [ "ldrh w20, [x4]", "strh w20, [x28, #1296]", - "ldr w20, [x4, #4]", + "add x20, x4, #0x4 (4)", + "ldr w20, [x20]", "ubfx w21, w20, #11, #3", "strb w21, [x28, #1019]", "ubfx w21, w20, #8, #1", @@ -3919,7 +3904,8 @@ "strb w22, [x28, #1017]", "strb w23, [x28, #1018]", "strb w20, [x28, #1022]", - "ldr w20, [x4, #8]", + "add x20, x4, #0x8 (8)", + "ldr w20, [x20]", "ubfx w21, w20, #0, #2", "mrs x22, nzcv", "cmp x21, #0x3 (3)", @@ -4047,26 +4033,24 @@ ] }, "fld st0": { - "ExpectedInstructionCount": 15, + "ExpectedInstructionCount": 13, "Comment": [ "0xd9 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st1": { @@ -4083,13 +4067,13 @@ "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st2": { @@ -4106,13 +4090,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st3": { @@ -4129,13 +4113,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st4": { @@ -4152,13 +4136,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st5": { @@ -4175,13 +4159,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st6": { @@ -4198,13 +4182,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st7": { @@ -4221,34 +4205,23 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fxch st0, st0": { - "ExpectedInstructionCount": 13, + "ExpectedInstructionCount": 2, "Comment": [ "0xd9 11b 0xc8 /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "strb w21, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st1": { @@ -4258,18 +4231,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st2": { @@ -4279,18 +4252,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st3": { @@ -4300,18 +4273,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st4": { @@ -4321,18 +4294,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x4 (4)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st5": { @@ -4342,18 +4315,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x5 (5)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st6": { @@ -4363,18 +4336,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x6 (6)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st7": { @@ -4384,18 +4357,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x7 (7)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fnop": { @@ -4521,18 +4494,18 @@ "0xd9 11b 0xe8 /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2624]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2624]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2t": { @@ -4541,18 +4514,18 @@ "0xd9 11b 0xe9 /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2640]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2640]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2e": { @@ -4561,18 +4534,18 @@ "0xd9 11b 0xea /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2656]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2656]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldpi": { @@ -4581,18 +4554,18 @@ "0xd9 11b 0xeb /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2672]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2672]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldlg2": { @@ -4601,18 +4574,18 @@ "0xd9 11b 0xec /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2688]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2688]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldln2": { @@ -4621,18 +4594,18 @@ "0xd9 11b 0xed /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2704]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2704]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldz": { @@ -4641,18 +4614,18 @@ "0xd9 11b 0xee /5" ], "ExpectedArm64ASM": [ + "movi v2.2d, #0x0", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "f2xm1": { @@ -4697,22 +4670,17 @@ ] }, "fyl2x": { - "ExpectedInstructionCount": 45, + "ExpectedInstructionCount": 42, "Comment": [ "0xd9 11b 0xf1 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4726,10 +4694,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1640]", "blr x5", "ldr w4, [x28, #1000]", @@ -4744,9 +4712,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fptan": { @@ -4756,13 +4726,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -4793,33 +4756,35 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldr q3, [x28, #2624]", - "mov w23, #0x0", - "strb w23, [x28, #1018]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q3, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldr q2, [x28, #2624]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fpatan": { - "ExpectedInstructionCount": 45, + "ExpectedInstructionCount": 42, "Comment": [ "0xd9 11b 0xf3 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4851,9 +4816,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fxtract": { @@ -4863,13 +4830,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -4930,9 +4890,16 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fprem1": { @@ -4944,9 +4911,9 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4960,10 +4927,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1656]", "blr x5", "ldr w4, [x28, #1000]", @@ -4978,10 +4945,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x0", - "strb w21, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fdecstp": { @@ -5017,9 +4984,9 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5033,10 +5000,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1664]", "blr x5", "ldr w4, [x28, #1000]", @@ -5051,31 +5018,22 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x0", - "strb w21, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fyl2xp1": { - "ExpectedInstructionCount": 76, + "ExpectedInstructionCount": 77, "Comment": [ "0xd9 11b 0xf9 /7" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2624]", "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "ldr q4, [x28, #2624]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5088,10 +5046,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v4.d[0]", - "umov w4, v4.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5106,6 +5064,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5118,10 +5084,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1640]", "blr x5", "ldr w4, [x28, #1000]", @@ -5136,9 +5102,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsqrt": { @@ -5189,13 +5157,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -5254,13 +5215,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w23, #0x0", - "strb w23, [x28, #1018]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "frndint": { @@ -5313,9 +5281,9 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5329,10 +5297,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1672]", "blr x5", "ldr w4, [x28, #1000]", @@ -5388,10 +5356,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x0", - "strb w21, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fcos": { @@ -5431,10 +5399,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x0", - "strb w21, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fiadd dword [rax]": { @@ -5443,8 +5411,7 @@ "0xda !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5456,7 +5423,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5472,6 +5439,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5514,8 +5482,7 @@ "0xda !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5527,7 +5494,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5543,6 +5510,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5585,8 +5553,7 @@ "0xda !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5598,7 +5565,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5614,6 +5581,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5662,8 +5630,7 @@ "0xda !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5675,7 +5642,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5691,6 +5658,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5735,10 +5703,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub dword [rax]": { @@ -5747,8 +5715,7 @@ "0xda !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5760,7 +5727,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5776,6 +5743,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5818,8 +5786,7 @@ "0xda !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5831,7 +5798,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5847,6 +5814,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5889,8 +5857,7 @@ "0xda !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5902,7 +5869,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5918,6 +5885,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5960,8 +5928,7 @@ "0xda !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5973,7 +5940,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5989,6 +5956,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -6026,7 +5994,7 @@ ] }, "fcmovb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc0 /0" ], @@ -6034,13 +6002,11 @@ "csetm x20, hs", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6056,11 +6022,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6076,11 +6042,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6096,11 +6062,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6116,11 +6082,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6136,11 +6102,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6156,11 +6122,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6176,17 +6142,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmove st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc8 /1" ], @@ -6194,13 +6160,11 @@ "csetm x20, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6216,11 +6180,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6236,11 +6200,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6256,11 +6220,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6276,11 +6240,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6296,11 +6260,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6316,11 +6280,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6336,17 +6300,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovbe st0, st0": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 12, "Comment": [ "0xda 11b 0xd0 /0" ], @@ -6356,13 +6320,11 @@ "csel x20, x20, x21, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6380,11 +6342,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6402,11 +6364,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6424,11 +6386,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6446,11 +6408,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6468,11 +6430,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6490,11 +6452,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6512,17 +6474,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xda 11b 0xd8 /1" ], @@ -6535,13 +6497,11 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6563,11 +6523,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6589,11 +6549,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6615,11 +6575,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6641,11 +6601,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6667,11 +6627,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6693,11 +6653,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6719,29 +6679,29 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" ] }, "fucompp": { - "ExpectedInstructionCount": 57, + "ExpectedInstructionCount": 60, "Comment": [ "0xda 11b 0xe9 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -6755,10 +6715,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -6784,57 +6744,59 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fild dword [rax]": { - "ExpectedInstructionCount": 35, + "ExpectedInstructionCount": 34, "Comment": [ "0xdf !11b /5" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "sxtw x20, w20", + "mrs x21, nzcv", + "mov w22, #0x0", + "cmp x20, #0x0 (0)", + "mov w23, #0x8000", + "csel x23, x23, xzr, lt", + "cneg x20, x20, mi", + "mov w24, #0x3f", + "mov x0, #0x3f", + "clz x25, x20", + "sub x25, x0, x25", + "sub x24, x24, x25", + "lsl x25, x20, x24", + "mov w30, #0x403e", + "sub x24, x30, x24", + "cmp x20, #0x0 (0)", + "csel x20, x22, x24, eq", + "orr x20, x23, x20", + "fmov d2, x25", + "fmov d3, x20", + "mov v2.d[1], v3.d[0]", + "msr nzcv, x21", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr w22, [x4]", - "mov w23, #0x0", - "sxtw x22, w22", - "mrs x24, nzcv", - "cmp x22, #0x0 (0)", - "mov w25, #0x8000", - "csel x25, x25, xzr, lt", - "cneg x22, x22, mi", - "mov w30, #0x3f", - "mov x0, #0x3f", - "clz x18, x22", - "sub x18, x0, x18", - "sub x30, x30, x18", - "lsl x18, x22, x30", - "mov w23, #0x403e", - "sub x23, x23, x30", - "mov w30, #0x0", - "cmp x22, #0x0 (0)", - "csel x22, x30, x23, eq", - "orr x22, x25, x22", - "fmov d2, x18", - "fmov d3, x22", - "mov v2.d[1], v3.d[0]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "msr nzcv, x24", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp dword [rax]": { @@ -6877,10 +6839,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist dword [rax]": { @@ -6961,10 +6923,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fld tword [rax]": { @@ -6973,22 +6935,22 @@ "0xdb !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr q2, [x4]", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp tword [rax]": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 15, "Comment": [ "0xdb !11b /7" ], @@ -6998,19 +6960,20 @@ "ldr q2, [x0, #1040]", "str d2, [x4]", "mov x21, v2.d[1]", - "strh w21, [x4, #8]", + "add x22, x4, #0x8 (8)", + "strh w21, [x22]", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcmovnb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc0 /0" ], @@ -7018,13 +6981,11 @@ "csetm x20, lo", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7040,11 +7001,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7060,11 +7021,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7080,11 +7041,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7100,11 +7061,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7120,11 +7081,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7140,11 +7101,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7160,17 +7121,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovne st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc8 /1" ], @@ -7178,13 +7139,11 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7200,11 +7159,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7220,11 +7179,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7240,11 +7199,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7260,11 +7219,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7280,11 +7239,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7300,11 +7259,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7320,17 +7279,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovnbe st0, st0": { - "ExpectedInstructionCount": 13, + "ExpectedInstructionCount": 11, "Comment": [ "0xdb 11b 0xd0 /2" ], @@ -7339,13 +7298,11 @@ "csel x20, x20, xzr, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7362,11 +7319,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7383,11 +7340,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7404,11 +7361,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7425,11 +7382,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7446,11 +7403,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7467,11 +7424,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7488,17 +7445,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovnu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xdb 11b 0xd8 /3" ], @@ -7511,13 +7468,11 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7539,11 +7494,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7565,11 +7520,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7591,11 +7546,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7617,11 +7572,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7643,11 +7598,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7669,11 +7624,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7695,11 +7650,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7730,15 +7685,13 @@ ] }, "fucomi st0, st0": { - "ExpectedInstructionCount": 43, + "ExpectedInstructionCount": 41, "Comment": [ "0xdb 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7754,10 +7707,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7787,10 +7740,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7805,10 +7758,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7838,10 +7791,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7856,10 +7809,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7889,10 +7842,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7907,10 +7860,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7940,10 +7893,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7958,10 +7911,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7991,10 +7944,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8009,10 +7962,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8042,10 +7995,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8060,10 +8013,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8093,10 +8046,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8111,10 +8064,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8138,15 +8091,13 @@ ] }, "fcomi st0, st0": { - "ExpectedInstructionCount": 43, + "ExpectedInstructionCount": 41, "Comment": [ "0xdb 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8162,10 +8113,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8195,10 +8146,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8213,10 +8164,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8246,10 +8197,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8264,10 +8215,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8297,10 +8248,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8315,10 +8266,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8348,10 +8299,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8366,10 +8317,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8399,10 +8350,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8417,10 +8368,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8450,10 +8401,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8468,10 +8419,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8501,10 +8452,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8519,10 +8470,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8551,7 +8502,6 @@ "0xdc !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8580,6 +8530,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8622,7 +8573,6 @@ "0xdc !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8651,6 +8601,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8693,7 +8644,6 @@ "0xdc !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8722,6 +8672,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8770,7 +8721,6 @@ "0xdc !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8799,6 +8749,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8843,10 +8794,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub qword [rax]": { @@ -8855,7 +8806,6 @@ "0xdc !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8884,6 +8834,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8926,7 +8877,6 @@ "0xdc !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8955,6 +8905,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8997,7 +8948,6 @@ "0xdc !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9026,6 +8976,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9068,7 +9019,6 @@ "0xdc !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9097,6 +9047,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9134,7 +9085,7 @@ ] }, "db 0xdc, 0xc0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fadd st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9142,9 +9093,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9178,7 +9127,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9189,10 +9138,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9225,7 +9174,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9236,10 +9185,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9272,7 +9221,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9283,10 +9232,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9319,7 +9268,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9330,10 +9279,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9366,7 +9315,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9377,10 +9326,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9413,7 +9362,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9424,12 +9373,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9460,7 +9409,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9471,10 +9420,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9507,12 +9456,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "db 0xdc, 0xc8": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fmul st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9520,9 +9469,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9556,7 +9503,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9567,10 +9514,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9603,7 +9550,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9614,10 +9561,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9650,7 +9597,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9661,10 +9608,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9697,7 +9644,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9708,10 +9655,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9744,7 +9691,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9755,10 +9702,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9791,7 +9738,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9802,10 +9749,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9838,7 +9785,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9849,10 +9796,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9885,12 +9832,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "db 0xdc, 0xe0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fsubr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9898,9 +9845,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9934,7 +9879,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10268,7 +10213,7 @@ ] }, "db 0xdc, 0xe8": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fsub st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -10276,9 +10221,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -10294,10 +10237,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10312,7 +10255,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10323,10 +10266,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10341,10 +10284,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10359,7 +10302,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10370,10 +10313,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10388,10 +10331,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10406,7 +10349,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10417,10 +10360,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10435,10 +10378,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10453,7 +10396,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10464,10 +10407,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10482,10 +10425,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10500,7 +10443,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10511,10 +10454,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10529,10 +10472,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10547,7 +10490,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10558,10 +10501,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10576,10 +10519,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10594,7 +10537,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10605,10 +10548,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10623,10 +10566,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10641,12 +10584,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "db 0xdc, 0xf0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fdivr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -10654,9 +10597,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -10690,7 +10631,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11024,7 +10965,7 @@ ] }, "db 0xdc, 0xf8": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fdiv st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -11032,9 +10973,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -11050,10 +10989,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11068,7 +11007,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11079,10 +11018,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11097,10 +11036,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11115,7 +11054,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11126,10 +11065,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11144,11 +11083,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1632]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -11162,7 +11101,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11173,10 +11112,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11191,10 +11130,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11209,7 +11148,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11220,10 +11159,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11238,10 +11177,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11256,7 +11195,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11267,10 +11206,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11285,10 +11224,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11303,7 +11242,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11314,10 +11253,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11332,10 +11271,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11350,7 +11289,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11361,10 +11300,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11379,10 +11318,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11397,7 +11336,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11407,7 +11346,6 @@ "0xdd !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -11436,16 +11374,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp qword [rax]": { @@ -11488,10 +11427,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fst qword [rax]": { @@ -11572,10 +11511,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "frstor [rax]": { @@ -11824,14 +11763,12 @@ ] }, "ffree st0": { - "ExpectedInstructionCount": 8, + "ExpectedInstructionCount": 6, "Comment": [ "0xdd 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w20, w20, #0x0 (0)", - "and w20, w20, #0x7", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w20, w22, w20", @@ -11952,24 +11889,11 @@ ] }, "fst st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 0, "Comment": [ "0xdd 11b 0xd0 /2" ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", - "strb w20, [x28, #1298]" - ] + "ExpectedArm64ASM": [] }, "fst st1": { "ExpectedInstructionCount": 12, @@ -11978,16 +11902,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "lsl w21, w21, w22", - "orr w20, w20, w21", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", "strb w20, [x28, #1298]" ] }, @@ -11998,16 +11922,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12018,16 +11942,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12038,16 +11962,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12058,16 +11982,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12078,16 +12002,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12098,230 +12022,235 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, "fstp st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 11, "Comment": [ "0xdd 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w21, w23, w21", - "orr w21, w22, w21", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "mov w21, #0x1", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp st1": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xd9 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", "ldrb w23, [x28, #1298]", "lsl w22, w21, w22", "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st2": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xda /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st3": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdb /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st4": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdc /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x4 (4)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st5": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdd /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x5 (5)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st6": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xde /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x6 (6)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st7": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdf /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x7 (7)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucom st0": { - "ExpectedInstructionCount": 45, + "ExpectedInstructionCount": 43, "Comment": [ "0xdd 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12337,10 +12266,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12353,15 +12282,16 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov x20, x0", - "ubfx x22, x20, #1, #1", - "ubfx x23, x20, #0, #1", + "ubfx x21, x20, #1, #1", + "ubfx x22, x20, #0, #1", "ubfx x20, x20, #2, #1", + "orr w21, w21, w20", "orr w22, w22, w20", - "orr w23, w23, w20", - "strb w22, [x28, #1016]", + "strb w21, [x28, #1016]", + "mov w21, #0x0", "strb w21, [x28, #1017]", "strb w20, [x28, #1018]", - "strb w23, [x28, #1022]" + "strb w22, [x28, #1022]" ] }, "fucom st1": { @@ -12371,10 +12301,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12389,10 +12319,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12424,10 +12354,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12442,10 +12372,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12477,10 +12407,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12495,10 +12425,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12530,10 +12460,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12548,10 +12478,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12583,10 +12513,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12601,10 +12531,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12636,10 +12566,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12654,10 +12584,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12689,10 +12619,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12707,10 +12637,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12736,16 +12666,13 @@ ] }, "fucomp st0": { - "ExpectedInstructionCount": 53, + "ExpectedInstructionCount": 51, "Comment": [ "0xdd 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12761,10 +12688,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12776,24 +12703,25 @@ "ld1 {v2.2d, v3.2d}, [sp], #32", "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", - "mov x22, x0", - "ubfx x23, x22, #1, #1", - "ubfx x24, x22, #0, #1", - "ubfx x22, x22, #2, #1", - "orr w23, w23, w22", - "orr w24, w24, w22", - "strb w23, [x28, #1016]", - "strb w21, [x28, #1017]", - "strb w22, [x28, #1018]", - "strb w24, [x28, #1022]", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", + "strb w22, [x28, #1016]", + "mov w22, #0x0", + "strb w22, [x28, #1017]", + "strb w21, [x28, #1018]", + "strb w23, [x28, #1022]", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st1": { @@ -12803,12 +12731,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12822,10 +12750,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12851,10 +12779,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st2": { @@ -12864,11 +12792,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12882,10 +12810,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12912,10 +12840,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st3": { @@ -12925,11 +12853,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12943,10 +12871,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12973,10 +12901,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st4": { @@ -12986,11 +12914,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13004,10 +12932,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13034,10 +12962,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st5": { @@ -13047,11 +12975,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13065,10 +12993,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13095,10 +13023,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st6": { @@ -13108,11 +13036,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13126,10 +13054,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13156,10 +13084,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st7": { @@ -13169,11 +13097,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13187,10 +13115,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13217,10 +13145,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fiadd word [rax]": { @@ -13229,8 +13157,7 @@ "0xde !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13242,7 +13169,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13258,6 +13185,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13300,8 +13228,7 @@ "0xde !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13313,7 +13240,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13329,6 +13256,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13371,8 +13299,7 @@ "0xde !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13384,7 +13311,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13400,6 +13327,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13448,8 +13376,7 @@ "0xde !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13461,7 +13388,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13477,6 +13404,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13521,10 +13449,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub word [rax]": { @@ -13533,8 +13461,7 @@ "0xde !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13546,7 +13473,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13562,6 +13489,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13604,8 +13532,7 @@ "0xde !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13617,7 +13544,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13633,6 +13560,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13675,8 +13603,7 @@ "0xde !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13688,7 +13615,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13704,6 +13631,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13746,8 +13674,7 @@ "0xde !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13759,7 +13686,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13775,6 +13702,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13812,15 +13740,13 @@ ] }, "faddp st0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -13854,16 +13780,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st1": { @@ -13873,12 +13799,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13910,15 +13836,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st2": { @@ -13928,11 +13854,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13964,16 +13890,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st3": { @@ -13983,11 +13909,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14019,16 +13945,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st4": { @@ -14038,11 +13964,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14074,16 +14000,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st5": { @@ -14093,11 +14019,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14129,16 +14055,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st6": { @@ -14148,11 +14074,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14184,16 +14110,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st7": { @@ -14203,11 +14129,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14239,28 +14165,26 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "0xde 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -14294,16 +14218,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st1": { @@ -14313,12 +14237,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14350,15 +14274,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st2": { @@ -14368,11 +14292,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14404,16 +14328,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st3": { @@ -14423,11 +14347,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14459,16 +14383,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st4": { @@ -14478,11 +14402,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14514,16 +14438,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st5": { @@ -14533,11 +14457,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14569,16 +14493,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st6": { @@ -14588,11 +14512,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14624,16 +14548,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st7": { @@ -14643,11 +14567,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14679,31 +14603,31 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fcompp": { - "ExpectedInstructionCount": 57, + "ExpectedInstructionCount": 60, "Comment": [ "0xde 11b 0xd9 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14717,10 +14641,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -14746,18 +14670,21 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fsubrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -14765,9 +14692,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -14801,16 +14726,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st1, st0": { @@ -14857,15 +14782,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st2, st0": { @@ -14911,16 +14836,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st3, st0": { @@ -14966,16 +14891,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st4, st0": { @@ -15021,16 +14946,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st5, st0": { @@ -15076,16 +15001,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st6, st0": { @@ -15131,16 +15056,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st7, st0": { @@ -15186,20 +15111,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe8": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fsubp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -15207,9 +15132,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -15225,10 +15148,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15243,16 +15166,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st1, st0": { @@ -15262,12 +15185,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15281,10 +15204,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15299,15 +15222,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st2, st0": { @@ -15317,11 +15240,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15335,10 +15258,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15353,16 +15276,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st3, st0": { @@ -15372,11 +15295,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15390,10 +15313,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15408,17 +15331,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" - ] + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" + ] }, "fsubp st4, st0": { "ExpectedInstructionCount": 47, @@ -15427,11 +15350,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15445,10 +15368,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15463,16 +15386,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st5, st0": { @@ -15482,11 +15405,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15500,10 +15423,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15518,16 +15441,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st6, st0": { @@ -15537,11 +15460,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15555,10 +15478,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15573,16 +15496,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st7, st0": { @@ -15592,11 +15515,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15610,10 +15533,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15628,20 +15551,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fdivrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -15649,9 +15572,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -15685,16 +15606,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivrp st1, st0": { @@ -15741,15 +15662,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivrp st2, st0": { @@ -15795,16 +15716,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st3, st0": { @@ -15850,16 +15771,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st4, st0": { @@ -15905,16 +15826,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st5, st0": { @@ -15960,16 +15881,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st6, st0": { @@ -16015,16 +15936,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st7, st0": { @@ -16070,20 +15991,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf8": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fdivp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -16091,9 +16012,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -16109,10 +16028,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16127,16 +16046,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st1, st0": { @@ -16146,12 +16065,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16165,10 +16084,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16183,15 +16102,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st2, st0": { @@ -16201,11 +16120,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16219,10 +16138,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16237,16 +16156,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st3, st0": { @@ -16256,11 +16175,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16274,10 +16193,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16292,16 +16211,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st4, st0": { @@ -16311,11 +16230,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16329,10 +16248,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16347,16 +16266,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st5, st0": { @@ -16366,11 +16285,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16384,10 +16303,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16402,16 +16321,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st6, st0": { @@ -16421,11 +16340,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16439,10 +16358,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16457,16 +16376,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st7, st0": { @@ -16476,11 +16395,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16494,10 +16413,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16512,59 +16431,58 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fild word [rax]": { - "ExpectedInstructionCount": 35, + "ExpectedInstructionCount": 34, "Comment": [ "0xdf !11b /0" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "mrs x21, nzcv", + "mov w22, #0x0", + "cmp x20, #0x0 (0)", + "mov w23, #0x8000", + "csel x23, x23, xzr, lt", + "cneg x20, x20, mi", + "mov w24, #0x3f", + "mov x0, #0x3f", + "clz x25, x20", + "sub x25, x0, x25", + "sub x24, x24, x25", + "lsl x25, x20, x24", + "mov w30, #0x403e", + "sub x24, x30, x24", + "cmp x20, #0x0 (0)", + "csel x20, x22, x24, eq", + "orr x20, x23, x20", + "fmov d2, x25", + "fmov d3, x20", + "mov v2.d[1], v3.d[0]", + "msr nzcv, x21", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldrh w22, [x4]", - "mov w23, #0x0", - "sxth x22, w22", - "mrs x24, nzcv", - "cmp x22, #0x0 (0)", - "mov w25, #0x8000", - "csel x25, x25, xzr, lt", - "cneg x22, x22, mi", - "mov w30, #0x3f", - "mov x0, #0x3f", - "clz x18, x22", - "sub x18, x0, x18", - "sub x30, x30, x18", - "lsl x18, x22, x30", - "mov w23, #0x403e", - "sub x23, x23, x30", - "mov w30, #0x0", - "cmp x22, #0x0 (0)", - "csel x22, x30, x23, eq", - "orr x22, x25, x22", - "fmov d2, x18", - "fmov d3, x22", - "mov v2.d[1], v3.d[0]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "msr nzcv, x24", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp word [rax]": { @@ -16607,10 +16525,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist word [rax]": { @@ -16691,26 +16609,18 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fbld tword [rax]": { "ExpectedInstructionCount": 40, - "Comment": [ - "0xdf !11b /4" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", - "strb w20, [x28, #1019]", + "Comment": [ + "0xdf !11b /4" + ], + "ExpectedArm64ASM": [ "ldr q2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16740,9 +16650,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fbstp tword [rax]": { @@ -16789,10 +16707,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "ffreep st0": { @@ -16911,15 +16829,13 @@ ] }, "fucomip st0": { - "ExpectedInstructionCount": 51, + "ExpectedInstructionCount": 49, "Comment": [ "0xdf 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -16935,10 +16851,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -16963,10 +16879,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st1": { @@ -16976,12 +16892,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16995,10 +16911,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17022,10 +16938,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st2": { @@ -17035,11 +16951,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17053,10 +16969,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17081,10 +16997,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st3": { @@ -17094,11 +17010,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17112,10 +17028,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17140,10 +17056,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st4": { @@ -17153,11 +17069,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17171,10 +17087,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17199,10 +17115,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st5": { @@ -17212,11 +17128,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17230,10 +17146,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17258,10 +17174,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st6": { @@ -17271,11 +17187,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17289,10 +17205,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17317,10 +17233,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st7": { @@ -17330,11 +17246,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17348,10 +17264,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17376,22 +17292,20 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st0": { - "ExpectedInstructionCount": 51, + "ExpectedInstructionCount": 49, "Comment": [ "0xdf 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -17407,10 +17321,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17435,10 +17349,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st1": { @@ -17448,12 +17362,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17467,10 +17381,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17494,10 +17408,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st2": { @@ -17507,11 +17421,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17525,10 +17439,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17553,10 +17467,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st3": { @@ -17566,11 +17480,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17584,10 +17498,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17612,10 +17526,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st4": { @@ -17625,11 +17539,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17643,10 +17557,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17671,10 +17585,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st5": { @@ -17684,11 +17598,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17702,10 +17616,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17730,10 +17644,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st6": { @@ -17743,11 +17657,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17761,10 +17675,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17789,10 +17703,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st7": { @@ -17802,11 +17716,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17820,10 +17734,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17848,10 +17762,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] } } diff --git a/unittests/InstructionCountCI/FlagM/x87_f64.json b/unittests/InstructionCountCI/FlagM/x87_f64.json index 84fe07d0c7..fc0f34935c 100644 --- a/unittests/InstructionCountCI/FlagM/x87_f64.json +++ b/unittests/InstructionCountCI/FlagM/x87_f64.json @@ -21,9 +21,9 @@ "0xd8 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -37,9 +37,9 @@ "0xd8 !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -53,9 +53,9 @@ "0xd8 !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -76,9 +76,9 @@ "0xd8 !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -95,10 +95,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub dword [rax]": { @@ -107,9 +107,9 @@ "0xd8 !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -123,9 +123,9 @@ "0xd8 !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -139,9 +139,9 @@ "0xd8 !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -155,9 +155,9 @@ "0xd8 !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -166,20 +166,18 @@ ] }, "fadd st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -310,20 +308,18 @@ ] }, "fmul st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -454,28 +450,26 @@ ] }, "fcom st0, st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 15, "Comment": [ "0xd8 11b 0xd0 /2" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", - "cset w20, vs", + "mov w20, #0x0", + "cset w21, vs", "axflag", "cset w22, lo", "strb w22, [x28, #1016]", "cset w22, eq", "strb w22, [x28, #1022]", - "strb w21, [x28, #1017]", - "strb w20, [x28, #1018]" + "strb w20, [x28, #1017]", + "strb w21, [x28, #1018]" ] }, "fcom st0, st1": { @@ -654,36 +648,34 @@ ] }, "fcomp st0, st0": { - "ExpectedInstructionCount": 25, + "ExpectedInstructionCount": 23, "Comment": [ "0xd8 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", - "mov w22, #0x1", + "mov w21, #0x1", + "mov w22, #0x0", "cset w23, vs", "axflag", "cset w24, lo", "strb w24, [x28, #1016]", "cset w24, eq", "strb w24, [x28, #1022]", - "strb w21, [x28, #1017]", + "strb w22, [x28, #1017]", "strb w23, [x28, #1018]", - "ldrb w21, [x28, #1298]", - "lsl w22, w22, w20", - "bic w21, w21, w22", + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st1": { @@ -713,10 +705,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st2": { @@ -746,10 +738,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st3": { @@ -779,10 +771,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st4": { @@ -812,10 +804,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st5": { @@ -845,10 +837,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st6": { @@ -878,10 +870,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st7": { @@ -911,27 +903,25 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1062,20 +1052,18 @@ ] }, "fsubr st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1086,13 +1074,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1104,13 +1092,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1122,13 +1110,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1140,13 +1128,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1158,13 +1146,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1176,13 +1164,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1194,32 +1182,30 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "fdiv st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1350,20 +1336,18 @@ ] }, "fdivr st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xf8 /7" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1374,13 +1358,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1392,13 +1376,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1410,13 +1394,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1428,13 +1412,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1446,13 +1430,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1464,13 +1448,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1482,13 +1466,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1499,19 +1483,19 @@ "0xd9 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fst dword [rax]": { @@ -1542,10 +1526,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fldenv [rax]": { @@ -1711,26 +1695,24 @@ ] }, "fld st0": { - "ExpectedInstructionCount": 15, + "ExpectedInstructionCount": 13, "Comment": [ "0xd9 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st1": { @@ -1747,13 +1729,13 @@ "ldr d2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st2": { @@ -1770,13 +1752,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st3": { @@ -1793,13 +1775,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st4": { @@ -1816,13 +1798,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st5": { @@ -1839,13 +1821,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st6": { @@ -1862,13 +1844,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st7": { @@ -1885,34 +1867,23 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fxch st0, st0": { - "ExpectedInstructionCount": 13, + "ExpectedInstructionCount": 2, "Comment": [ "0xd9 11b 0xc8 /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "strb w21, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st1": { @@ -1922,18 +1893,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st2": { @@ -1943,18 +1914,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st3": { @@ -1964,18 +1935,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st4": { @@ -1985,18 +1956,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st5": { @@ -2006,18 +1977,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st6": { @@ -2027,18 +1998,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st7": { @@ -2048,18 +2019,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fnop": { @@ -2120,7 +2091,7 @@ ] }, "fxam": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xd9 11b 0xe5 /4" ], @@ -2133,16 +2104,14 @@ "strb w21, [x28, #1017]", "ldrb w21, [x28, #1298]", "lsr w20, w21, w20", - "mov w21, #0x1", "and w20, w20, #0x1", - "mov w22, #0x0", - "mrs x23, nzcv", + "mrs x21, nzcv", "cmp x20, #0x1 (1)", - "csel x21, x22, x21, eq", - "strb w21, [x28, #1016]", + "cset x22, ne", + "strb w22, [x28, #1016]", "strb w20, [x28, #1018]", - "strb w21, [x28, #1022]", - "msr nzcv, x23" + "strb w22, [x28, #1022]", + "msr nzcv, x21" ] }, "fld1": { @@ -2151,19 +2120,19 @@ "0xd9 11b 0xe8 /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x3ff0000000000000", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x3ff0000000000000", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2t": { @@ -2172,22 +2141,22 @@ "0xd9 11b 0xe9 /5" ], "ExpectedArm64ASM": [ + "mov x20, #0xa372", + "movk x20, #0x979, lsl #16", + "movk x20, #0x934f, lsl #32", + "movk x20, #0x400a, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0xa372", - "movk x22, #0x979, lsl #16", - "movk x22, #0x934f, lsl #32", - "movk x22, #0x400a, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2e": { @@ -2196,22 +2165,22 @@ "0xd9 11b 0xea /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x82fe", + "movk x20, #0x652b, lsl #16", + "movk x20, #0x1547, lsl #32", + "movk x20, #0x3ff7, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x82fe", - "movk x22, #0x652b, lsl #16", - "movk x22, #0x1547, lsl #32", - "movk x22, #0x3ff7, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldpi": { @@ -2220,22 +2189,22 @@ "0xd9 11b 0xeb /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x2d18", + "movk x20, #0x5444, lsl #16", + "movk x20, #0x21fb, lsl #32", + "movk x20, #0x4009, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x2d18", - "movk x22, #0x5444, lsl #16", - "movk x22, #0x21fb, lsl #32", - "movk x22, #0x4009, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldlg2": { @@ -2244,22 +2213,22 @@ "0xd9 11b 0xec /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x79ff", + "movk x20, #0x509f, lsl #16", + "movk x20, #0x4413, lsl #32", + "movk x20, #0x3fd3, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x79ff", - "movk x22, #0x509f, lsl #16", - "movk x22, #0x4413, lsl #32", - "movk x22, #0x3fd3, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldln2": { @@ -2268,22 +2237,22 @@ "0xd9 11b 0xed /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x39ef", + "movk x20, #0xfefa, lsl #16", + "movk x20, #0x2e42, lsl #32", + "movk x20, #0x3fe6, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x39ef", - "movk x22, #0xfefa, lsl #16", - "movk x22, #0x2e42, lsl #32", - "movk x22, #0x3fe6, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldz": { @@ -2292,19 +2261,19 @@ "0xd9 11b 0xee /5" ], "ExpectedArm64ASM": [ + "mov w20, #0x0", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov w22, #0x0", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "f2xm1": { @@ -2372,25 +2341,20 @@ ] }, "fyl2x": { - "ExpectedInstructionCount": 67, + "ExpectedInstructionCount": 64, "Comment": [ "0xd9 11b 0xf1 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2441,9 +2405,11 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fptan": { @@ -2453,13 +2419,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "mrs x0, nzcv", @@ -2513,34 +2472,36 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov x23, #0x3ff0000000000000", - "fmov d3, x23", - "mov w23, #0x0", - "strb w23, [x28, #1018]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str d3, [x0, #1040]", - "strb w21, [x28, #1298]" + "mov x21, #0x3ff0000000000000", + "fmov d2, x21", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fpatan": { - "ExpectedInstructionCount": 67, + "ExpectedInstructionCount": 64, "Comment": [ "0xd9 11b 0xf3 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr d3, [x0, #1040]", "mov v0.8b, v3.8b", "mov v1.8b, v2.8b", @@ -2594,9 +2555,11 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fxtract": { @@ -2606,28 +2569,28 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "mov x23, v2.d[0]", - "and x24, x23, #0x7ff0000000000000", - "lsr x24, x24, #52", - "sub x24, x24, #0x3ff (1023)", - "scvtf d2, x24", - "and x23, x23, #0x800fffffffffffff", - "orr x23, x23, #0x3ff0000000000000", - "fmov d3, x23", + "mov x21, v2.d[0]", + "and x22, x21, #0x7ff0000000000000", + "lsr x22, x22, #52", + "sub x22, x22, #0x3ff (1023)", + "scvtf d2, x22", + "and x21, x21, #0x800fffffffffffff", + "orr x21, x21, #0x3ff0000000000000", + "fmov d3, x21", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str d3, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fprem1": { @@ -2639,12 +2602,12 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2695,10 +2658,10 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov w21, #0x0", - "strb w21, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fdecstp": { @@ -2734,12 +2697,12 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2790,35 +2753,34 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov w21, #0x0", - "strb w21, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fyl2xp1": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 71, "Comment": [ "0xd9 11b 0xf9 /7" ], "ExpectedArm64ASM": [ + "mov x20, #0x3ff0000000000000", + "fmov d2, x20", "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", + "ldr d3, [x0, #1040]", + "fadd d2, d3, d2", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov x20, #0x3ff0000000000000", - "fmov d4, x20", - "fadd d2, d2, d4", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2869,9 +2831,11 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsqrt": { @@ -2895,13 +2859,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "mrs x0, nzcv", @@ -3006,13 +2963,20 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov w23, #0x0", - "strb w23, [x28, #1018]", "add x0, x28, x20, lsl #4", "str d3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "frndint": { @@ -3038,12 +3002,12 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3158,10 +3122,10 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov w21, #0x0", - "strb w21, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fcos": { @@ -3224,10 +3188,10 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov w21, #0x0", - "strb w21, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fiadd dword [rax]": { @@ -3236,9 +3200,9 @@ "0xda !11b /0" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -3252,9 +3216,9 @@ "0xda !11b /1" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -3268,9 +3232,9 @@ "0xda !11b /2" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -3291,9 +3255,9 @@ "0xda !11b /3" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -3310,10 +3274,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub dword [rax]": { @@ -3322,9 +3286,9 @@ "0xda !11b /4" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -3338,9 +3302,9 @@ "0xda !11b /5" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -3354,9 +3318,9 @@ "0xda !11b /6" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -3370,9 +3334,9 @@ "0xda !11b /7" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -3381,7 +3345,7 @@ ] }, "fcmovb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc0 /0" ], @@ -3389,15 +3353,13 @@ "csetm x20, hs", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st1": { @@ -3411,13 +3373,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st2": { @@ -3431,13 +3393,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st3": { @@ -3451,13 +3413,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st4": { @@ -3471,13 +3433,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st5": { @@ -3491,13 +3453,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st6": { @@ -3511,13 +3473,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st7": { @@ -3531,17 +3493,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc8 /1" ], @@ -3549,15 +3511,13 @@ "csetm x20, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmove st0, st1": { @@ -3571,13 +3531,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmove st0, st2": { @@ -3591,13 +3551,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmove st0, st3": { @@ -3611,13 +3571,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmove st0, st4": { @@ -3631,13 +3591,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmove st0, st5": { @@ -3651,13 +3611,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmove st0, st6": { @@ -3671,13 +3631,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmove st0, st7": { @@ -3691,17 +3651,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st0": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 12, "Comment": [ "0xda 11b 0xd0 /0" ], @@ -3711,15 +3671,13 @@ "csel x20, x20, x21, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st1": { @@ -3735,13 +3693,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st2": { @@ -3757,13 +3715,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st3": { @@ -3779,13 +3737,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st4": { @@ -3801,13 +3759,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st5": { @@ -3823,13 +3781,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st6": { @@ -3845,13 +3803,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st7": { @@ -3867,17 +3825,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xda 11b 0xd8 /1" ], @@ -3890,15 +3848,13 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3918,13 +3874,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3944,13 +3900,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3970,13 +3926,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3996,13 +3952,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4022,13 +3978,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4048,13 +4004,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4074,18 +4030,18 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, "fucompp": { - "ExpectedInstructionCount": 29, + "ExpectedInstructionCount": 32, "Comment": [ "0xda 11b 0xe9 /5" ], @@ -4111,14 +4067,17 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fild dword [rax]": { @@ -4127,19 +4086,19 @@ "0xdf !11b /5" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr w22, [x4]", - "scvtf d2, w22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp dword [rax]": { @@ -4157,10 +4116,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist dword [rax]": { @@ -4193,10 +4152,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fld tword [rax]": { @@ -4205,7 +4164,6 @@ "0xdb !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4233,16 +4191,17 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v2.8b, v0.8b", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp tword [rax]": { @@ -4288,14 +4247,14 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcmovnb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc0 /0" ], @@ -4303,15 +4262,13 @@ "csetm x20, lo", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st1": { @@ -4325,13 +4282,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st2": { @@ -4345,13 +4302,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st3": { @@ -4365,13 +4322,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st4": { @@ -4385,13 +4342,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st5": { @@ -4405,13 +4362,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st6": { @@ -4425,13 +4382,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st7": { @@ -4445,17 +4402,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc8 /1" ], @@ -4463,15 +4420,13 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovne st0, st1": { @@ -4485,13 +4440,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovne st0, st2": { @@ -4505,13 +4460,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovne st0, st3": { @@ -4525,13 +4480,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovne st0, st4": { @@ -4545,13 +4500,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovne st0, st5": { @@ -4565,13 +4520,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovne st0, st6": { @@ -4585,13 +4540,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovne st0, st7": { @@ -4605,17 +4560,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st0": { - "ExpectedInstructionCount": 13, + "ExpectedInstructionCount": 11, "Comment": [ "0xdb 11b 0xd0 /2" ], @@ -4624,15 +4579,13 @@ "csel x20, x20, xzr, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st1": { @@ -4647,13 +4600,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st2": { @@ -4668,13 +4621,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st3": { @@ -4689,13 +4642,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st4": { @@ -4710,13 +4663,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st5": { @@ -4731,13 +4684,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st6": { @@ -4752,13 +4705,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st7": { @@ -4773,17 +4726,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xdb 11b 0xd8 /3" ], @@ -4796,15 +4749,13 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4824,13 +4775,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4850,13 +4801,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4876,13 +4827,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4902,13 +4853,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4928,13 +4879,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4954,13 +4905,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4980,13 +4931,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -5022,15 +4973,13 @@ ] }, "fucomi st0, st0": { - "ExpectedInstructionCount": 11, + "ExpectedInstructionCount": 9, "Comment": [ "0xdb 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -5174,15 +5123,13 @@ ] }, "fcomi st0, st0": { - "ExpectedInstructionCount": 11, + "ExpectedInstructionCount": 9, "Comment": [ "0xdb 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -5331,8 +5278,8 @@ "0xdc !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -5346,8 +5293,8 @@ "0xdc !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -5361,8 +5308,8 @@ "0xdc !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -5383,8 +5330,8 @@ "0xdc !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -5401,10 +5348,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub qword [rax]": { @@ -5413,8 +5360,8 @@ "0xdc !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -5428,8 +5375,8 @@ "0xdc !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -5443,8 +5390,8 @@ "0xdc !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -5458,8 +5405,8 @@ "0xdc !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -5468,7 +5415,7 @@ ] }, "db 0xdc, 0xc0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fadd st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5476,14 +5423,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5494,14 +5439,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5512,14 +5457,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5530,14 +5475,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5548,14 +5493,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5566,14 +5511,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5584,14 +5529,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5602,19 +5547,19 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "db 0xdc, 0xc8": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fmul st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5622,14 +5567,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5640,14 +5583,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5658,14 +5601,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5676,14 +5619,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5694,14 +5637,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5712,14 +5655,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5730,14 +5673,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5748,19 +5691,19 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "db 0xdc, 0xe0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fsubr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5768,14 +5711,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5906,7 +5847,7 @@ ] }, "db 0xdc, 0xe8": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fsub st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5914,14 +5855,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5932,14 +5871,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5950,14 +5889,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5968,14 +5907,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5986,14 +5925,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6004,14 +5943,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6022,14 +5961,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6040,19 +5979,19 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "db 0xdc, 0xf0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fdivr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -6060,14 +5999,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6198,7 +6135,7 @@ ] }, "db 0xdc, 0xf8": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fdiv st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -6206,14 +6143,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6224,14 +6159,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6242,14 +6177,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6260,14 +6195,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6278,14 +6213,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6296,14 +6231,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6314,14 +6249,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6332,14 +6267,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6349,18 +6284,18 @@ "0xdd !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp qword [rax]": { @@ -6378,10 +6313,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fst qword [rax]": { @@ -6410,10 +6345,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "frstor [rax]": { @@ -7096,14 +7031,12 @@ ] }, "ffree st0": { - "ExpectedInstructionCount": 8, + "ExpectedInstructionCount": 6, "Comment": [ "0xdd 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w20, w20, #0x0 (0)", - "and w20, w20, #0x7", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w20, w22, w20", @@ -7224,24 +7157,11 @@ ] }, "fst st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 0, "Comment": [ "0xdd 11b 0xd0 /2" ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", - "strb w20, [x28, #1298]" - ] + "ExpectedArm64ASM": [] }, "fst st1": { "ExpectedInstructionCount": 12, @@ -7250,16 +7170,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "lsl w21, w21, w22", - "orr w20, w20, w21", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", "strb w20, [x28, #1298]" ] }, @@ -7270,16 +7190,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7290,16 +7210,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7310,16 +7230,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7330,16 +7250,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7350,16 +7270,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7370,242 +7290,248 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, "fstp st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 11, "Comment": [ "0xdd 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w21, w23, w21", - "orr w21, w22, w21", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "mov w21, #0x1", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp st1": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xd9 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w23, [x28, #1298]", "lsl w22, w21, w22", "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st2": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xda /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st3": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdb /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st4": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdc /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st5": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdd /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st6": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xde /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st7": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdf /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucom st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 15, "Comment": [ "0xdd 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", - "cset w20, vs", + "mov w20, #0x0", + "cset w21, vs", "axflag", "cset w22, lo", "strb w22, [x28, #1016]", "cset w22, eq", "strb w22, [x28, #1022]", - "strb w21, [x28, #1017]", - "strb w20, [x28, #1018]" + "strb w20, [x28, #1017]", + "strb w21, [x28, #1018]" ] }, "fucom st1": { @@ -7784,36 +7710,34 @@ ] }, "fucomp st0": { - "ExpectedInstructionCount": 25, + "ExpectedInstructionCount": 23, "Comment": [ "0xdd 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", - "mov w22, #0x1", + "mov w21, #0x1", + "mov w22, #0x0", "cset w23, vs", "axflag", "cset w24, lo", "strb w24, [x28, #1016]", "cset w24, eq", "strb w24, [x28, #1022]", - "strb w21, [x28, #1017]", + "strb w22, [x28, #1017]", "strb w23, [x28, #1018]", - "ldrb w21, [x28, #1298]", - "lsl w22, w22, w20", - "bic w21, w21, w22", + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st1": { @@ -7843,10 +7767,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st2": { @@ -7876,10 +7800,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st3": { @@ -7909,10 +7833,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st4": { @@ -7942,10 +7866,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st5": { @@ -7975,10 +7899,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st6": { @@ -8008,10 +7932,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st7": { @@ -8041,10 +7965,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fiadd word [rax]": { @@ -8053,10 +7977,10 @@ "0xde !11b /0" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -8070,10 +7994,10 @@ "0xde !11b /1" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -8087,10 +8011,10 @@ "0xde !11b /2" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -8111,10 +8035,10 @@ "0xde !11b /3" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -8131,10 +8055,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub word [rax]": { @@ -8143,10 +8067,10 @@ "0xde !11b /4" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -8160,10 +8084,10 @@ "0xde !11b /5" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -8177,10 +8101,10 @@ "0xde !11b /6" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -8194,10 +8118,10 @@ "0xde !11b /7" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -8206,29 +8130,27 @@ ] }, "faddp st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st1": { @@ -8238,23 +8160,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st2": { @@ -8264,23 +8186,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st3": { @@ -8290,23 +8212,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st4": { @@ -8316,23 +8238,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st5": { @@ -8342,23 +8264,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st6": { @@ -8368,23 +8290,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st7": { @@ -8394,49 +8316,47 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xde 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st1": { @@ -8446,23 +8366,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st2": { @@ -8472,23 +8392,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st3": { @@ -8498,23 +8418,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st4": { @@ -8524,23 +8444,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st5": { @@ -8550,23 +8470,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st6": { @@ -8576,23 +8496,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st7": { @@ -8602,27 +8522,27 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fcompp": { - "ExpectedInstructionCount": 29, + "ExpectedInstructionCount": 32, "Comment": [ "0xde 11b 0xd9 /3" ], @@ -8648,18 +8568,21 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fsubrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -8667,23 +8590,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st1, st0": { @@ -8701,15 +8622,15 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st2, st0": { @@ -8726,16 +8647,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st3, st0": { @@ -8752,18 +8673,18 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" - ] - }, + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" + ] + }, "fsubrp st4, st0": { "ExpectedInstructionCount": 18, "Comment": [ @@ -8778,16 +8699,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st5, st0": { @@ -8804,16 +8725,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st6, st0": { @@ -8830,16 +8751,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st7, st0": { @@ -8856,20 +8777,20 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe8": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fsubp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -8877,23 +8798,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st1, st0": { @@ -8903,23 +8822,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w23, [x28, #1298]", + "fsub d2, d3, d2", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st2, st0": { @@ -8929,23 +8848,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st3, st0": { @@ -8955,23 +8874,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st4, st0": { @@ -8981,23 +8900,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st5, st0": { @@ -9007,23 +8926,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st6, st0": { @@ -9033,23 +8952,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st7, st0": { @@ -9059,27 +8978,27 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fdivrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9087,23 +9006,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivrp st1, st0": { @@ -9121,15 +9038,15 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivrp st2, st0": { @@ -9146,16 +9063,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st3, st0": { @@ -9172,16 +9089,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st4, st0": { @@ -9198,16 +9115,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st5, st0": { @@ -9224,16 +9141,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st6, st0": { @@ -9250,16 +9167,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st7, st0": { @@ -9276,20 +9193,20 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf8": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fdivp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9297,23 +9214,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st1, st0": { @@ -9323,23 +9238,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w23, [x28, #1298]", + "fdiv d2, d3, d2", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st2, st0": { @@ -9349,23 +9264,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st3, st0": { @@ -9375,23 +9290,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st4, st0": { @@ -9401,23 +9316,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st5, st0": { @@ -9427,23 +9342,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st6, st0": { @@ -9453,23 +9368,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st7, st0": { @@ -9479,23 +9394,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fild word [rax]": { @@ -9504,20 +9419,20 @@ "0xdf !11b /0" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldrh w22, [x4]", - "sxth x22, w22", - "scvtf d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp word [rax]": { @@ -9535,10 +9450,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist word [rax]": { @@ -9571,10 +9486,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fbld tword [rax]": { @@ -9583,14 +9498,6 @@ "0xdf !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", - "strb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9646,9 +9553,17 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v2.8b, v0.8b", + "ldrb w20, [x28, #1019]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fbstp tword [rax]": { @@ -9722,10 +9637,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "ffreep st0": { @@ -9844,15 +9759,13 @@ ] }, "fucomip st0": { - "ExpectedInstructionCount": 19, + "ExpectedInstructionCount": 17, "Comment": [ "0xdf 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -9864,10 +9777,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st1": { @@ -9891,10 +9804,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st2": { @@ -9918,10 +9831,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st3": { @@ -9945,10 +9858,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st4": { @@ -9972,10 +9885,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st5": { @@ -9999,10 +9912,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st6": { @@ -10026,10 +9939,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st7": { @@ -10053,22 +9966,20 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st0": { - "ExpectedInstructionCount": 19, + "ExpectedInstructionCount": 17, "Comment": [ "0xdf 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -10080,10 +9991,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st1": { @@ -10107,10 +10018,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st2": { @@ -10134,10 +10045,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st3": { @@ -10161,10 +10072,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st4": { @@ -10188,10 +10099,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st5": { @@ -10215,10 +10126,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st6": { @@ -10242,10 +10153,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st7": { @@ -10269,10 +10180,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] } } diff --git a/unittests/InstructionCountCI/x87.json b/unittests/InstructionCountCI/x87.json index 8d20b60613..8a2af00b10 100644 --- a/unittests/InstructionCountCI/x87.json +++ b/unittests/InstructionCountCI/x87.json @@ -18,7 +18,6 @@ "0xd8 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47,6 +46,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -89,7 +89,6 @@ "0xd8 !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -118,6 +117,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -160,7 +160,6 @@ "0xd8 !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -189,6 +188,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -237,7 +237,6 @@ "0xd8 !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -266,6 +265,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -310,10 +310,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub dword [rax]": { @@ -322,7 +322,6 @@ "0xd8 !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -351,6 +350,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -393,7 +393,6 @@ "0xd8 !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -422,6 +421,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -464,7 +464,6 @@ "0xd8 !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -493,6 +492,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -535,7 +535,6 @@ "0xd8 !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -564,6 +563,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -601,15 +601,13 @@ ] }, "fadd st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -643,7 +641,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -977,15 +975,13 @@ ] }, "fmul st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1019,7 +1015,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -1353,16 +1349,13 @@ ] }, "fcom st0, st0": { - "ExpectedInstructionCount": 45, + "ExpectedInstructionCount": 43, "Comment": [ "0xd8 11b 0xd0 /2" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1378,10 +1371,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1394,15 +1387,16 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov x20, x0", - "ubfx x22, x20, #1, #1", - "ubfx x23, x20, #0, #1", + "ubfx x21, x20, #1, #1", + "ubfx x22, x20, #0, #1", "ubfx x20, x20, #2, #1", + "orr w21, w21, w20", "orr w22, w22, w20", - "orr w23, w23, w20", - "strb w22, [x28, #1016]", + "strb w21, [x28, #1016]", + "mov w21, #0x0", "strb w21, [x28, #1017]", "strb w20, [x28, #1018]", - "strb w23, [x28, #1022]" + "strb w22, [x28, #1022]" ] }, "fcom st0, st1": { @@ -1412,10 +1406,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1430,10 +1424,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1465,10 +1459,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1483,10 +1477,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1518,10 +1512,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1536,10 +1530,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1571,10 +1565,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1589,10 +1583,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1624,10 +1618,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1642,10 +1636,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1677,10 +1671,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1695,10 +1689,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1730,10 +1724,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1748,10 +1742,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1777,16 +1771,13 @@ ] }, "fcomp st0, st0": { - "ExpectedInstructionCount": 53, + "ExpectedInstructionCount": 51, "Comment": [ "0xd8 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1802,10 +1793,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1817,24 +1808,25 @@ "ld1 {v2.2d, v3.2d}, [sp], #32", "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", - "mov x22, x0", - "ubfx x23, x22, #1, #1", - "ubfx x24, x22, #0, #1", - "ubfx x22, x22, #2, #1", - "orr w23, w23, w22", - "orr w24, w24, w22", - "strb w23, [x28, #1016]", - "strb w21, [x28, #1017]", - "strb w22, [x28, #1018]", - "strb w24, [x28, #1022]", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", + "strb w22, [x28, #1016]", + "mov w22, #0x0", + "strb w22, [x28, #1017]", + "strb w21, [x28, #1018]", + "strb w23, [x28, #1022]", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st1": { @@ -1844,12 +1836,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1863,10 +1855,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1892,10 +1884,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st2": { @@ -1905,11 +1897,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1923,10 +1915,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1953,10 +1945,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st3": { @@ -1966,11 +1958,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1984,10 +1976,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2014,10 +2006,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st4": { @@ -2027,11 +2019,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2045,10 +2037,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2075,10 +2067,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st5": { @@ -2088,11 +2080,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2106,11 +2098,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1504]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -2136,10 +2128,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st6": { @@ -2149,11 +2141,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2167,10 +2159,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2197,10 +2189,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st7": { @@ -2210,11 +2202,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2228,10 +2220,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2258,22 +2250,20 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2289,10 +2279,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2307,7 +2297,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -2641,15 +2631,13 @@ ] }, "fsubr st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2683,7 +2671,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -2694,11 +2682,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2712,10 +2700,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2741,11 +2729,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2759,10 +2747,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2788,11 +2776,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2806,10 +2794,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2835,11 +2823,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2853,10 +2841,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2882,11 +2870,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2900,10 +2888,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2929,11 +2917,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2947,10 +2935,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2976,11 +2964,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2994,10 +2982,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -3017,15 +3005,13 @@ ] }, "fdiv st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3041,10 +3027,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3059,7 +3045,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -3393,15 +3379,13 @@ ] }, "fdivr st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xf8 /7" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3435,7 +3419,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -3446,11 +3430,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3464,10 +3448,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3493,11 +3477,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3511,10 +3495,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3540,11 +3524,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3558,10 +3542,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3587,11 +3571,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3605,10 +3589,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3634,11 +3618,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3652,10 +3636,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3681,11 +3665,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3699,10 +3683,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3728,11 +3712,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3746,10 +3730,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3774,7 +3758,6 @@ "0xd9 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3803,16 +3786,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fst dword [rax]": { @@ -3893,21 +3877,22 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fldenv [rax]": { - "ExpectedInstructionCount": 48, + "ExpectedInstructionCount": 50, "Comment": [ "0xd9 !11b /4" ], "ExpectedArm64ASM": [ "ldrh w20, [x4]", "strh w20, [x28, #1296]", - "ldr w20, [x4, #4]", + "add x20, x4, #0x4 (4)", + "ldr w20, [x20]", "ubfx w21, w20, #11, #3", "strb w21, [x28, #1019]", "ubfx w21, w20, #8, #1", @@ -3918,7 +3903,8 @@ "strb w22, [x28, #1017]", "strb w23, [x28, #1018]", "strb w20, [x28, #1022]", - "ldr w20, [x4, #8]", + "add x20, x4, #0x8 (8)", + "ldr w20, [x20]", "ubfx w21, w20, #0, #2", "mrs x22, nzcv", "cmp x21, #0x3 (3)", @@ -4046,26 +4032,24 @@ ] }, "fld st0": { - "ExpectedInstructionCount": 15, + "ExpectedInstructionCount": 13, "Comment": [ "0xd9 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st1": { @@ -4082,13 +4066,13 @@ "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st2": { @@ -4105,13 +4089,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st3": { @@ -4128,13 +4112,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st4": { @@ -4151,13 +4135,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st5": { @@ -4174,13 +4158,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st6": { @@ -4197,13 +4181,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st7": { @@ -4220,34 +4204,23 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fxch st0, st0": { - "ExpectedInstructionCount": 13, + "ExpectedInstructionCount": 2, "Comment": [ "0xd9 11b 0xc8 /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "strb w21, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st1": { @@ -4257,18 +4230,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st2": { @@ -4278,18 +4251,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st3": { @@ -4299,18 +4272,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st4": { @@ -4320,18 +4293,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x4 (4)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st5": { @@ -4341,18 +4314,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x5 (5)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st6": { @@ -4362,18 +4335,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x6 (6)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st7": { @@ -4383,18 +4356,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x7 (7)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fnop": { @@ -4520,18 +4493,18 @@ "0xd9 11b 0xe8 /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2624]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2624]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2t": { @@ -4540,18 +4513,18 @@ "0xd9 11b 0xe9 /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2640]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2640]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2e": { @@ -4560,18 +4533,18 @@ "0xd9 11b 0xea /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2656]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2656]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldpi": { @@ -4580,18 +4553,18 @@ "0xd9 11b 0xeb /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2672]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2672]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldlg2": { @@ -4600,18 +4573,18 @@ "0xd9 11b 0xec /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2688]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2688]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldln2": { @@ -4620,18 +4593,18 @@ "0xd9 11b 0xed /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2704]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2704]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldz": { @@ -4640,18 +4613,18 @@ "0xd9 11b 0xee /5" ], "ExpectedArm64ASM": [ + "movi v2.2d, #0x0", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "f2xm1": { @@ -4696,22 +4669,17 @@ ] }, "fyl2x": { - "ExpectedInstructionCount": 45, + "ExpectedInstructionCount": 42, "Comment": [ "0xd9 11b 0xf1 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4725,10 +4693,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1640]", "blr x5", "ldr w4, [x28, #1000]", @@ -4743,9 +4711,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fptan": { @@ -4755,13 +4725,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -4792,33 +4755,35 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldr q3, [x28, #2624]", - "mov w23, #0x0", - "strb w23, [x28, #1018]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q3, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldr q2, [x28, #2624]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fpatan": { - "ExpectedInstructionCount": 45, + "ExpectedInstructionCount": 42, "Comment": [ "0xd9 11b 0xf3 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4850,9 +4815,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fxtract": { @@ -4862,13 +4829,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -4929,9 +4889,16 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fprem1": { @@ -4943,9 +4910,9 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4959,10 +4926,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1656]", "blr x5", "ldr w4, [x28, #1000]", @@ -4977,10 +4944,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x0", - "strb w21, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fdecstp": { @@ -5016,9 +4983,9 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5032,10 +4999,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1664]", "blr x5", "ldr w4, [x28, #1000]", @@ -5050,31 +5017,22 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x0", - "strb w21, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fyl2xp1": { - "ExpectedInstructionCount": 76, + "ExpectedInstructionCount": 77, "Comment": [ "0xd9 11b 0xf9 /7" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2624]", "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "ldr q4, [x28, #2624]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5087,10 +5045,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v4.d[0]", - "umov w4, v4.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5105,6 +5063,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5117,10 +5083,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1640]", "blr x5", "ldr w4, [x28, #1000]", @@ -5135,9 +5101,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsqrt": { @@ -5188,13 +5156,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -5253,13 +5214,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w23, #0x0", - "strb w23, [x28, #1018]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "frndint": { @@ -5312,9 +5280,9 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5328,10 +5296,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1672]", "blr x5", "ldr w4, [x28, #1000]", @@ -5387,10 +5355,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x0", - "strb w21, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fcos": { @@ -5430,10 +5398,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x0", - "strb w21, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fiadd dword [rax]": { @@ -5442,8 +5410,7 @@ "0xda !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5455,7 +5422,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5471,6 +5438,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5513,8 +5481,7 @@ "0xda !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5526,7 +5493,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5542,6 +5509,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5584,8 +5552,7 @@ "0xda !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5597,7 +5564,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5613,6 +5580,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5661,8 +5629,7 @@ "0xda !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5674,7 +5641,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5690,6 +5657,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5734,10 +5702,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub dword [rax]": { @@ -5746,8 +5714,7 @@ "0xda !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5759,7 +5726,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5775,6 +5742,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5817,8 +5785,7 @@ "0xda !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5830,7 +5797,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5846,6 +5813,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5888,8 +5856,7 @@ "0xda !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5901,7 +5868,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5917,6 +5884,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5959,8 +5927,7 @@ "0xda !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5972,7 +5939,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5988,6 +5955,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -6025,7 +5993,7 @@ ] }, "fcmovb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc0 /0" ], @@ -6033,13 +6001,11 @@ "csetm x20, hs", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6055,11 +6021,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6075,11 +6041,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6095,11 +6061,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6115,11 +6081,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6135,11 +6101,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6155,11 +6121,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6175,17 +6141,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmove st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc8 /1" ], @@ -6193,13 +6159,11 @@ "csetm x20, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6215,11 +6179,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6235,11 +6199,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6255,11 +6219,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6275,11 +6239,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6295,11 +6259,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6315,11 +6279,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6335,17 +6299,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovbe st0, st0": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 12, "Comment": [ "0xda 11b 0xd0 /0" ], @@ -6355,13 +6319,11 @@ "csel x20, x20, x21, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6379,11 +6341,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6401,11 +6363,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6423,11 +6385,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6445,11 +6407,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6467,11 +6429,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6489,11 +6451,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6511,17 +6473,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xda 11b 0xd8 /1" ], @@ -6534,13 +6496,11 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6562,11 +6522,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6588,11 +6548,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6614,11 +6574,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6640,11 +6600,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6666,11 +6626,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6692,11 +6652,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6718,29 +6678,29 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" ] }, "fucompp": { - "ExpectedInstructionCount": 57, + "ExpectedInstructionCount": 60, "Comment": [ "0xda 11b 0xe9 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -6754,10 +6714,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -6783,57 +6743,59 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fild dword [rax]": { - "ExpectedInstructionCount": 35, + "ExpectedInstructionCount": 34, "Comment": [ "0xdf !11b /5" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "sxtw x20, w20", + "mrs x21, nzcv", + "mov w22, #0x0", + "cmp x20, #0x0 (0)", + "mov w23, #0x8000", + "csel x23, x23, xzr, lt", + "cneg x20, x20, mi", + "mov w24, #0x3f", + "mov x0, #0x3f", + "clz x25, x20", + "sub x25, x0, x25", + "sub x24, x24, x25", + "lsl x25, x20, x24", + "mov w30, #0x403e", + "sub x24, x30, x24", + "cmp x20, #0x0 (0)", + "csel x20, x22, x24, eq", + "orr x20, x23, x20", + "fmov d2, x25", + "fmov d3, x20", + "mov v2.d[1], v3.d[0]", + "msr nzcv, x21", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr w22, [x4]", - "mov w23, #0x0", - "sxtw x22, w22", - "mrs x24, nzcv", - "cmp x22, #0x0 (0)", - "mov w25, #0x8000", - "csel x25, x25, xzr, lt", - "cneg x22, x22, mi", - "mov w30, #0x3f", - "mov x0, #0x3f", - "clz x18, x22", - "sub x18, x0, x18", - "sub x30, x30, x18", - "lsl x18, x22, x30", - "mov w23, #0x403e", - "sub x23, x23, x30", - "mov w30, #0x0", - "cmp x22, #0x0 (0)", - "csel x22, x30, x23, eq", - "orr x22, x25, x22", - "fmov d2, x18", - "fmov d3, x22", - "mov v2.d[1], v3.d[0]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "msr nzcv, x24", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp dword [rax]": { @@ -6876,10 +6838,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist dword [rax]": { @@ -6960,10 +6922,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fld tword [rax]": { @@ -6972,22 +6934,22 @@ "0xdb !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr q2, [x4]", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp tword [rax]": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 15, "Comment": [ "0xdb !11b /7" ], @@ -6997,19 +6959,20 @@ "ldr q2, [x0, #1040]", "str d2, [x4]", "mov x21, v2.d[1]", - "strh w21, [x4, #8]", + "add x22, x4, #0x8 (8)", + "strh w21, [x22]", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcmovnb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc0 /0" ], @@ -7017,13 +6980,11 @@ "csetm x20, lo", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7039,11 +7000,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7059,11 +7020,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7079,11 +7040,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7099,11 +7060,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7119,11 +7080,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7139,11 +7100,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7159,17 +7120,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovne st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc8 /1" ], @@ -7177,13 +7138,11 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7199,11 +7158,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7219,11 +7178,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7239,11 +7198,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7259,11 +7218,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7279,11 +7238,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7299,11 +7258,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7319,17 +7278,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovnbe st0, st0": { - "ExpectedInstructionCount": 13, + "ExpectedInstructionCount": 11, "Comment": [ "0xdb 11b 0xd0 /2" ], @@ -7338,13 +7297,11 @@ "csel x20, x20, xzr, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7361,11 +7318,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7382,11 +7339,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7403,11 +7360,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7424,11 +7381,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7445,11 +7402,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7466,11 +7423,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7487,17 +7444,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovnu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xdb 11b 0xd8 /3" ], @@ -7510,13 +7467,11 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7538,11 +7493,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7564,11 +7519,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7590,11 +7545,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7616,11 +7571,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7642,11 +7597,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7668,11 +7623,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7694,11 +7649,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7729,15 +7684,13 @@ ] }, "fucomi st0, st0": { - "ExpectedInstructionCount": 44, + "ExpectedInstructionCount": 42, "Comment": [ "0xdb 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7753,10 +7706,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7787,10 +7740,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7805,10 +7758,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7839,10 +7792,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7857,10 +7810,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7891,10 +7844,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7909,10 +7862,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7943,10 +7896,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7961,10 +7914,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7995,10 +7948,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8013,10 +7966,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8047,10 +8000,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8065,10 +8018,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8099,10 +8052,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8117,10 +8070,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8145,15 +8098,13 @@ ] }, "fcomi st0, st0": { - "ExpectedInstructionCount": 44, + "ExpectedInstructionCount": 42, "Comment": [ "0xdb 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8169,10 +8120,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8203,10 +8154,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8221,10 +8172,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8255,10 +8206,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8273,10 +8224,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8307,10 +8258,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8325,10 +8276,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8359,10 +8310,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8377,10 +8328,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8411,10 +8362,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8429,10 +8380,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8463,10 +8414,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8481,10 +8432,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8515,10 +8466,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8533,10 +8484,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8566,7 +8517,6 @@ "0xdc !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8595,6 +8545,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8637,7 +8588,6 @@ "0xdc !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8666,6 +8616,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8708,7 +8659,6 @@ "0xdc !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8737,6 +8687,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8785,7 +8736,6 @@ "0xdc !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8814,6 +8764,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8858,10 +8809,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub qword [rax]": { @@ -8870,7 +8821,6 @@ "0xdc !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8899,6 +8849,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8941,7 +8892,6 @@ "0xdc !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8970,6 +8920,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9012,7 +8963,6 @@ "0xdc !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9041,6 +8991,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9083,7 +9034,6 @@ "0xdc !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9112,6 +9062,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9149,7 +9100,7 @@ ] }, "db 0xdc, 0xc0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fadd st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9157,9 +9108,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9193,7 +9142,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9204,10 +9153,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9240,7 +9189,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9251,10 +9200,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9287,7 +9236,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9298,10 +9247,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9334,7 +9283,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9345,10 +9294,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9381,7 +9330,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9392,10 +9341,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9428,7 +9377,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9439,12 +9388,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9475,7 +9424,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9486,10 +9435,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9522,12 +9471,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "db 0xdc, 0xc8": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fmul st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9535,9 +9484,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9571,7 +9518,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9582,10 +9529,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9618,7 +9565,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9629,10 +9576,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9665,7 +9612,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9676,10 +9623,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9712,7 +9659,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9723,10 +9670,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9759,7 +9706,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9770,10 +9717,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9806,7 +9753,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9817,10 +9764,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9853,7 +9800,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9864,10 +9811,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9900,12 +9847,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "db 0xdc, 0xe0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fsubr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9913,9 +9860,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9949,7 +9894,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10283,7 +10228,7 @@ ] }, "db 0xdc, 0xe8": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fsub st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -10291,9 +10236,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -10309,10 +10252,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10327,7 +10270,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10338,10 +10281,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10356,10 +10299,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10374,7 +10317,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10385,10 +10328,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10403,10 +10346,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10421,7 +10364,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10432,10 +10375,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10450,10 +10393,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10468,7 +10411,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10479,10 +10422,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10497,10 +10440,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10515,7 +10458,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10526,10 +10469,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10544,10 +10487,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10562,7 +10505,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10573,10 +10516,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10591,10 +10534,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10609,7 +10552,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10620,10 +10563,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10638,10 +10581,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10656,12 +10599,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "db 0xdc, 0xf0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fdivr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -10669,9 +10612,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -10705,7 +10646,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11039,7 +10980,7 @@ ] }, "db 0xdc, 0xf8": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fdiv st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -11047,9 +10988,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -11065,10 +11004,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11083,7 +11022,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11094,10 +11033,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11112,10 +11051,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11130,7 +11069,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11141,10 +11080,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11159,11 +11098,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1632]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -11177,7 +11116,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11188,10 +11127,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11206,10 +11145,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11224,7 +11163,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11235,10 +11174,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11253,10 +11192,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11271,7 +11210,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11282,10 +11221,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11300,10 +11239,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11318,7 +11257,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11329,10 +11268,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11347,10 +11286,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11365,7 +11304,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11376,10 +11315,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11394,10 +11333,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11412,7 +11351,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11422,7 +11361,6 @@ "0xdd !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -11451,16 +11389,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp qword [rax]": { @@ -11503,10 +11442,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fst qword [rax]": { @@ -11587,10 +11526,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "frstor [rax]": { @@ -11839,14 +11778,12 @@ ] }, "ffree st0": { - "ExpectedInstructionCount": 8, + "ExpectedInstructionCount": 6, "Comment": [ "0xdd 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w20, w20, #0x0 (0)", - "and w20, w20, #0x7", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w20, w22, w20", @@ -11967,24 +11904,11 @@ ] }, "fst st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 0, "Comment": [ "0xdd 11b 0xd0 /2" ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", - "strb w20, [x28, #1298]" - ] + "ExpectedArm64ASM": [] }, "fst st1": { "ExpectedInstructionCount": 12, @@ -11993,16 +11917,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "lsl w21, w21, w22", - "orr w20, w20, w21", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", "strb w20, [x28, #1298]" ] }, @@ -12013,16 +11937,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12033,16 +11957,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12053,16 +11977,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12073,16 +11997,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12093,16 +12017,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12113,230 +12037,235 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, "fstp st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 11, "Comment": [ "0xdd 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w21, w23, w21", - "orr w21, w22, w21", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "mov w21, #0x1", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp st1": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xd9 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", "ldrb w23, [x28, #1298]", "lsl w22, w21, w22", "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st2": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xda /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st3": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdb /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st4": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdc /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x4 (4)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st5": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdd /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x5 (5)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st6": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xde /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x6 (6)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st7": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdf /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x7 (7)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucom st0": { - "ExpectedInstructionCount": 45, + "ExpectedInstructionCount": 43, "Comment": [ "0xdd 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12352,10 +12281,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12368,15 +12297,16 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov x20, x0", - "ubfx x22, x20, #1, #1", - "ubfx x23, x20, #0, #1", + "ubfx x21, x20, #1, #1", + "ubfx x22, x20, #0, #1", "ubfx x20, x20, #2, #1", + "orr w21, w21, w20", "orr w22, w22, w20", - "orr w23, w23, w20", - "strb w22, [x28, #1016]", + "strb w21, [x28, #1016]", + "mov w21, #0x0", "strb w21, [x28, #1017]", "strb w20, [x28, #1018]", - "strb w23, [x28, #1022]" + "strb w22, [x28, #1022]" ] }, "fucom st1": { @@ -12386,10 +12316,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12404,10 +12334,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12439,10 +12369,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12457,10 +12387,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12492,10 +12422,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12510,10 +12440,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12545,10 +12475,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12563,10 +12493,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12598,10 +12528,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12616,10 +12546,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12651,10 +12581,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12669,10 +12599,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12704,10 +12634,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12722,10 +12652,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12751,16 +12681,13 @@ ] }, "fucomp st0": { - "ExpectedInstructionCount": 53, + "ExpectedInstructionCount": 51, "Comment": [ "0xdd 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12776,10 +12703,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12791,24 +12718,25 @@ "ld1 {v2.2d, v3.2d}, [sp], #32", "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", - "mov x22, x0", - "ubfx x23, x22, #1, #1", - "ubfx x24, x22, #0, #1", - "ubfx x22, x22, #2, #1", - "orr w23, w23, w22", - "orr w24, w24, w22", - "strb w23, [x28, #1016]", - "strb w21, [x28, #1017]", - "strb w22, [x28, #1018]", - "strb w24, [x28, #1022]", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", + "strb w22, [x28, #1016]", + "mov w22, #0x0", + "strb w22, [x28, #1017]", + "strb w21, [x28, #1018]", + "strb w23, [x28, #1022]", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st1": { @@ -12818,12 +12746,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12837,10 +12765,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12866,10 +12794,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st2": { @@ -12879,11 +12807,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12897,10 +12825,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12927,10 +12855,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st3": { @@ -12940,11 +12868,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12958,10 +12886,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12988,10 +12916,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st4": { @@ -13001,11 +12929,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13019,10 +12947,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13049,10 +12977,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st5": { @@ -13062,11 +12990,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13080,10 +13008,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13110,10 +13038,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st6": { @@ -13123,11 +13051,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13141,10 +13069,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13171,10 +13099,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st7": { @@ -13184,11 +13112,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13202,10 +13130,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13232,10 +13160,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fiadd word [rax]": { @@ -13244,8 +13172,7 @@ "0xde !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13257,7 +13184,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13273,6 +13200,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13315,8 +13243,7 @@ "0xde !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13328,7 +13255,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13344,6 +13271,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13386,8 +13314,7 @@ "0xde !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13399,7 +13326,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13415,6 +13342,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13463,8 +13391,7 @@ "0xde !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13476,7 +13403,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13492,6 +13419,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13536,10 +13464,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub word [rax]": { @@ -13548,8 +13476,7 @@ "0xde !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13561,7 +13488,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13577,6 +13504,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13619,8 +13547,7 @@ "0xde !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13632,7 +13559,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13648,6 +13575,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13690,8 +13618,7 @@ "0xde !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13703,7 +13630,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13719,6 +13646,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13761,8 +13689,7 @@ "0xde !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13774,7 +13701,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13790,6 +13717,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13827,15 +13755,13 @@ ] }, "faddp st0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -13869,16 +13795,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st1": { @@ -13888,12 +13814,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13925,15 +13851,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st2": { @@ -13943,11 +13869,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13979,16 +13905,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st3": { @@ -13998,11 +13924,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14034,16 +13960,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st4": { @@ -14053,11 +13979,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14089,16 +14015,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st5": { @@ -14108,11 +14034,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14144,16 +14070,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st6": { @@ -14163,11 +14089,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14199,16 +14125,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st7": { @@ -14218,11 +14144,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14254,28 +14180,26 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "0xde 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -14309,16 +14233,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st1": { @@ -14328,12 +14252,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14365,15 +14289,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st2": { @@ -14383,11 +14307,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14419,16 +14343,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st3": { @@ -14438,11 +14362,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14474,16 +14398,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st4": { @@ -14493,11 +14417,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14529,16 +14453,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st5": { @@ -14548,11 +14472,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14584,16 +14508,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st6": { @@ -14603,11 +14527,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14639,16 +14563,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st7": { @@ -14658,11 +14582,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14694,31 +14618,31 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fcompp": { - "ExpectedInstructionCount": 57, + "ExpectedInstructionCount": 60, "Comment": [ "0xde 11b 0xd9 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14732,10 +14656,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -14761,18 +14685,21 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fsubrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -14780,9 +14707,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -14816,16 +14741,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st1, st0": { @@ -14872,15 +14797,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st2, st0": { @@ -14926,16 +14851,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st3, st0": { @@ -14981,16 +14906,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st4, st0": { @@ -15036,16 +14961,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st5, st0": { @@ -15091,16 +15016,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st6, st0": { @@ -15146,16 +15071,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st7, st0": { @@ -15201,20 +15126,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe8": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fsubp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -15222,9 +15147,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -15240,10 +15163,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15258,16 +15181,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st1, st0": { @@ -15277,12 +15200,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15296,10 +15219,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15314,15 +15237,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st2, st0": { @@ -15332,11 +15255,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15350,10 +15273,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15368,30 +15291,30 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" - ] - }, - "fsubp st3, st0": { + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" + ] + }, + "fsubp st3, st0": { "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xeb /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15405,10 +15328,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15423,16 +15346,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st4, st0": { @@ -15442,11 +15365,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15460,10 +15383,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15478,16 +15401,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st5, st0": { @@ -15497,11 +15420,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15515,10 +15438,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15533,16 +15456,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st6, st0": { @@ -15552,11 +15475,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15570,10 +15493,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15588,16 +15511,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st7, st0": { @@ -15607,11 +15530,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15625,10 +15548,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15643,20 +15566,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fdivrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -15664,9 +15587,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -15700,16 +15621,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivrp st1, st0": { @@ -15756,15 +15677,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivrp st2, st0": { @@ -15810,16 +15731,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st3, st0": { @@ -15865,16 +15786,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st4, st0": { @@ -15920,16 +15841,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st5, st0": { @@ -15975,16 +15896,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st6, st0": { @@ -16030,16 +15951,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st7, st0": { @@ -16085,20 +16006,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf8": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fdivp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -16106,9 +16027,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -16124,10 +16043,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16142,16 +16061,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st1, st0": { @@ -16161,12 +16080,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16180,10 +16099,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16198,15 +16117,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st2, st0": { @@ -16216,11 +16135,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16234,10 +16153,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16252,16 +16171,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st3, st0": { @@ -16271,11 +16190,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16289,10 +16208,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16307,16 +16226,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st4, st0": { @@ -16326,11 +16245,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16344,10 +16263,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16362,16 +16281,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st5, st0": { @@ -16381,11 +16300,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16399,10 +16318,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16417,16 +16336,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st6, st0": { @@ -16436,11 +16355,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16454,10 +16373,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16472,16 +16391,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st7, st0": { @@ -16491,11 +16410,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16509,10 +16428,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16527,59 +16446,58 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fild word [rax]": { - "ExpectedInstructionCount": 35, + "ExpectedInstructionCount": 34, "Comment": [ "0xdf !11b /0" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "mrs x21, nzcv", + "mov w22, #0x0", + "cmp x20, #0x0 (0)", + "mov w23, #0x8000", + "csel x23, x23, xzr, lt", + "cneg x20, x20, mi", + "mov w24, #0x3f", + "mov x0, #0x3f", + "clz x25, x20", + "sub x25, x0, x25", + "sub x24, x24, x25", + "lsl x25, x20, x24", + "mov w30, #0x403e", + "sub x24, x30, x24", + "cmp x20, #0x0 (0)", + "csel x20, x22, x24, eq", + "orr x20, x23, x20", + "fmov d2, x25", + "fmov d3, x20", + "mov v2.d[1], v3.d[0]", + "msr nzcv, x21", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", - "strb w20, [x28, #1019]", - "ldrh w22, [x4]", - "mov w23, #0x0", - "sxth x22, w22", - "mrs x24, nzcv", - "cmp x22, #0x0 (0)", - "mov w25, #0x8000", - "csel x25, x25, xzr, lt", - "cneg x22, x22, mi", - "mov w30, #0x3f", - "mov x0, #0x3f", - "clz x18, x22", - "sub x18, x0, x18", - "sub x30, x30, x18", - "lsl x18, x22, x30", - "mov w23, #0x403e", - "sub x23, x23, x30", - "mov w30, #0x0", - "cmp x22, #0x0 (0)", - "csel x22, x30, x23, eq", - "orr x22, x25, x22", - "fmov d2, x18", - "fmov d3, x22", - "mov v2.d[1], v3.d[0]", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "msr nzcv, x24", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp word [rax]": { @@ -16622,10 +16540,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist word [rax]": { @@ -16706,10 +16624,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fbld tword [rax]": { @@ -16718,14 +16636,6 @@ "0xdf !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", - "strb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16755,9 +16665,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fbstp tword [rax]": { @@ -16804,10 +16722,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "ffreep st0": { @@ -16926,15 +16844,13 @@ ] }, "fucomip st0": { - "ExpectedInstructionCount": 52, + "ExpectedInstructionCount": 50, "Comment": [ "0xdf 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -16950,10 +16866,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -16978,11 +16894,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st1": { @@ -16992,12 +16908,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17011,10 +16927,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17038,11 +16954,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x23", - "strb w21, [x28, #1298]" + "msr nzcv, x23" ] }, "fucomip st2": { @@ -17052,11 +16968,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17070,10 +16986,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17098,11 +17014,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st3": { @@ -17112,11 +17028,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17130,10 +17046,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17158,11 +17074,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st4": { @@ -17172,11 +17088,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17190,10 +17106,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17218,11 +17134,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st5": { @@ -17232,11 +17148,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17250,10 +17166,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17278,11 +17194,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st6": { @@ -17292,11 +17208,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17310,10 +17226,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17338,11 +17254,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st7": { @@ -17352,11 +17268,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17370,10 +17286,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17398,23 +17314,21 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st0": { - "ExpectedInstructionCount": 52, + "ExpectedInstructionCount": 50, "Comment": [ "0xdf 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -17430,10 +17344,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17458,11 +17372,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st1": { @@ -17472,12 +17386,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17491,10 +17405,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17518,11 +17432,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x23", - "strb w21, [x28, #1298]" + "msr nzcv, x23" ] }, "fcomip st2": { @@ -17532,11 +17446,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17550,10 +17464,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17578,11 +17492,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st3": { @@ -17592,11 +17506,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17610,10 +17524,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17638,11 +17552,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st4": { @@ -17652,11 +17566,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17670,10 +17584,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17698,11 +17612,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st5": { @@ -17712,11 +17626,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17730,10 +17644,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17758,11 +17672,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st6": { @@ -17772,11 +17686,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17790,10 +17704,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17818,11 +17732,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st7": { @@ -17832,11 +17746,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17850,10 +17764,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17878,11 +17792,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] } } diff --git a/unittests/InstructionCountCI/x87_f64.json b/unittests/InstructionCountCI/x87_f64.json index f0b5d9010b..c787c023d4 100644 --- a/unittests/InstructionCountCI/x87_f64.json +++ b/unittests/InstructionCountCI/x87_f64.json @@ -20,9 +20,9 @@ "0xd8 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -36,9 +36,9 @@ "0xd8 !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -52,9 +52,9 @@ "0xd8 !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -76,9 +76,9 @@ "0xd8 !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -96,10 +96,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub dword [rax]": { @@ -108,9 +108,9 @@ "0xd8 !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -124,9 +124,9 @@ "0xd8 !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -140,9 +140,9 @@ "0xd8 !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -156,9 +156,9 @@ "0xd8 !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -167,20 +167,18 @@ ] }, "fadd st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -311,20 +309,18 @@ ] }, "fmul st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -455,29 +451,27 @@ ] }, "fcom st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xd8 11b 0xd0 /2" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", - "cset w20, vs", + "mov w20, #0x0", + "cset w21, vs", "cset w22, eq", "cset w23, mi", - "orr w23, w23, w20", + "orr w23, w23, w21", "strb w23, [x28, #1016]", - "orr w22, w22, w20", + "orr w22, w22, w21", "strb w22, [x28, #1022]", - "strb w21, [x28, #1017]", - "strb w20, [x28, #1018]" + "strb w20, [x28, #1017]", + "strb w21, [x28, #1018]" ] }, "fcom st0, st1": { @@ -663,21 +657,19 @@ ] }, "fcomp st0, st0": { - "ExpectedInstructionCount": 26, + "ExpectedInstructionCount": 24, "Comment": [ "0xd8 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", - "mov w22, #0x1", + "mov w21, #0x1", + "mov w22, #0x0", "cset w23, vs", "cset w24, eq", "cset w25, mi", @@ -685,15 +677,15 @@ "strb w25, [x28, #1016]", "orr w24, w24, w23", "strb w24, [x28, #1022]", - "strb w21, [x28, #1017]", + "strb w22, [x28, #1017]", "strb w23, [x28, #1018]", - "ldrb w21, [x28, #1298]", - "lsl w22, w22, w20", - "bic w21, w21, w22", + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st1": { @@ -724,10 +716,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st2": { @@ -758,10 +750,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st3": { @@ -792,10 +784,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st4": { @@ -826,10 +818,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st5": { @@ -860,10 +852,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st6": { @@ -894,10 +886,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st7": { @@ -928,27 +920,25 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1079,20 +1069,18 @@ ] }, "fsubr st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1103,13 +1091,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1121,13 +1109,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1139,13 +1127,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1157,13 +1145,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1175,13 +1163,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1193,13 +1181,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1211,32 +1199,30 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "fdiv st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1367,20 +1353,18 @@ ] }, "fdivr st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xf8 /7" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1391,13 +1375,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1409,13 +1393,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1427,13 +1411,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1445,13 +1429,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1463,13 +1447,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1481,13 +1465,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1499,13 +1483,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1516,19 +1500,19 @@ "0xd9 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fst dword [rax]": { @@ -1559,10 +1543,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fldenv [rax]": { @@ -1728,26 +1712,24 @@ ] }, "fld st0": { - "ExpectedInstructionCount": 15, + "ExpectedInstructionCount": 13, "Comment": [ "0xd9 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st1": { @@ -1764,13 +1746,13 @@ "ldr d2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st2": { @@ -1787,13 +1769,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st3": { @@ -1810,13 +1792,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st4": { @@ -1833,13 +1815,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st5": { @@ -1856,13 +1838,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st6": { @@ -1879,13 +1861,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st7": { @@ -1902,34 +1884,23 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fxch st0, st0": { - "ExpectedInstructionCount": 13, + "ExpectedInstructionCount": 2, "Comment": [ "0xd9 11b 0xc8 /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "strb w21, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st1": { @@ -1939,18 +1910,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st2": { @@ -1960,18 +1931,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st3": { @@ -1981,18 +1952,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st4": { @@ -2002,18 +1973,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st5": { @@ -2023,18 +1994,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st6": { @@ -2044,18 +2015,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fxch st0, st7": { @@ -2065,18 +2036,18 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "mov w22, #0x0", - "strb w22, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1017]" ] }, "fnop": { @@ -2138,7 +2109,7 @@ ] }, "fxam": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xd9 11b 0xe5 /4" ], @@ -2151,16 +2122,14 @@ "strb w21, [x28, #1017]", "ldrb w21, [x28, #1298]", "lsr w20, w21, w20", - "mov w21, #0x1", "and w20, w20, #0x1", - "mov w22, #0x0", - "mrs x23, nzcv", + "mrs x21, nzcv", "cmp x20, #0x1 (1)", - "csel x21, x22, x21, eq", - "strb w21, [x28, #1016]", + "cset x22, ne", + "strb w22, [x28, #1016]", "strb w20, [x28, #1018]", - "strb w21, [x28, #1022]", - "msr nzcv, x23" + "strb w22, [x28, #1022]", + "msr nzcv, x21" ] }, "fld1": { @@ -2169,19 +2138,19 @@ "0xd9 11b 0xe8 /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x3ff0000000000000", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x3ff0000000000000", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2t": { @@ -2190,22 +2159,22 @@ "0xd9 11b 0xe9 /5" ], "ExpectedArm64ASM": [ + "mov x20, #0xa372", + "movk x20, #0x979, lsl #16", + "movk x20, #0x934f, lsl #32", + "movk x20, #0x400a, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0xa372", - "movk x22, #0x979, lsl #16", - "movk x22, #0x934f, lsl #32", - "movk x22, #0x400a, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2e": { @@ -2214,22 +2183,22 @@ "0xd9 11b 0xea /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x82fe", + "movk x20, #0x652b, lsl #16", + "movk x20, #0x1547, lsl #32", + "movk x20, #0x3ff7, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x82fe", - "movk x22, #0x652b, lsl #16", - "movk x22, #0x1547, lsl #32", - "movk x22, #0x3ff7, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldpi": { @@ -2238,22 +2207,22 @@ "0xd9 11b 0xeb /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x2d18", + "movk x20, #0x5444, lsl #16", + "movk x20, #0x21fb, lsl #32", + "movk x20, #0x4009, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x2d18", - "movk x22, #0x5444, lsl #16", - "movk x22, #0x21fb, lsl #32", - "movk x22, #0x4009, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldlg2": { @@ -2262,22 +2231,22 @@ "0xd9 11b 0xec /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x79ff", + "movk x20, #0x509f, lsl #16", + "movk x20, #0x4413, lsl #32", + "movk x20, #0x3fd3, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x79ff", - "movk x22, #0x509f, lsl #16", - "movk x22, #0x4413, lsl #32", - "movk x22, #0x3fd3, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldln2": { @@ -2286,22 +2255,22 @@ "0xd9 11b 0xed /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x39ef", + "movk x20, #0xfefa, lsl #16", + "movk x20, #0x2e42, lsl #32", + "movk x20, #0x3fe6, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x39ef", - "movk x22, #0xfefa, lsl #16", - "movk x22, #0x2e42, lsl #32", - "movk x22, #0x3fe6, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldz": { @@ -2310,19 +2279,19 @@ "0xd9 11b 0xee /5" ], "ExpectedArm64ASM": [ + "mov w20, #0x0", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov w22, #0x0", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "f2xm1": { @@ -2390,25 +2359,20 @@ ] }, "fyl2x": { - "ExpectedInstructionCount": 67, + "ExpectedInstructionCount": 64, "Comment": [ "0xd9 11b 0xf1 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2459,9 +2423,11 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fptan": { @@ -2471,13 +2437,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "mrs x0, nzcv", @@ -2531,34 +2490,36 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov x23, #0x3ff0000000000000", - "fmov d3, x23", - "mov w23, #0x0", - "strb w23, [x28, #1018]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str d3, [x0, #1040]", - "strb w21, [x28, #1298]" + "mov x21, #0x3ff0000000000000", + "fmov d2, x21", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fpatan": { - "ExpectedInstructionCount": 67, + "ExpectedInstructionCount": 64, "Comment": [ "0xd9 11b 0xf3 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr d3, [x0, #1040]", "mov v0.8b, v3.8b", "mov v1.8b, v2.8b", @@ -2612,9 +2573,11 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fxtract": { @@ -2624,28 +2587,28 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "mov x23, v2.d[0]", - "and x24, x23, #0x7ff0000000000000", - "lsr x24, x24, #52", - "sub x24, x24, #0x3ff (1023)", - "scvtf d2, x24", - "and x23, x23, #0x800fffffffffffff", - "orr x23, x23, #0x3ff0000000000000", - "fmov d3, x23", + "mov x21, v2.d[0]", + "and x22, x21, #0x7ff0000000000000", + "lsr x22, x22, #52", + "sub x22, x22, #0x3ff (1023)", + "scvtf d2, x22", + "and x21, x21, #0x800fffffffffffff", + "orr x21, x21, #0x3ff0000000000000", + "fmov d3, x21", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str d3, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fprem1": { @@ -2657,12 +2620,12 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2713,10 +2676,10 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov w21, #0x0", - "strb w21, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fdecstp": { @@ -2752,12 +2715,12 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2808,35 +2771,34 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov w21, #0x0", - "strb w21, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fyl2xp1": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 71, "Comment": [ "0xd9 11b 0xf9 /7" ], "ExpectedArm64ASM": [ + "mov x20, #0x3ff0000000000000", + "fmov d2, x20", "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", + "ldr d3, [x0, #1040]", + "fadd d2, d3, d2", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov x20, #0x3ff0000000000000", - "fmov d4, x20", - "fadd d2, d2, d4", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2887,9 +2849,11 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsqrt": { @@ -2913,13 +2877,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "mrs x0, nzcv", @@ -3024,13 +2981,20 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov w23, #0x0", - "strb w23, [x28, #1018]", "add x0, x28, x20, lsl #4", "str d3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "frndint": { @@ -3056,12 +3020,12 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3176,10 +3140,10 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov w21, #0x0", - "strb w21, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fcos": { @@ -3242,10 +3206,10 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov w21, #0x0", - "strb w21, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "mov w20, #0x0", + "strb w20, [x28, #1018]" ] }, "fiadd dword [rax]": { @@ -3254,9 +3218,9 @@ "0xda !11b /0" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -3270,9 +3234,9 @@ "0xda !11b /1" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -3286,9 +3250,9 @@ "0xda !11b /2" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -3310,9 +3274,9 @@ "0xda !11b /3" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -3330,10 +3294,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub dword [rax]": { @@ -3342,9 +3306,9 @@ "0xda !11b /4" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -3358,9 +3322,9 @@ "0xda !11b /5" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -3374,9 +3338,9 @@ "0xda !11b /6" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -3390,9 +3354,9 @@ "0xda !11b /7" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -3401,7 +3365,7 @@ ] }, "fcmovb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc0 /0" ], @@ -3409,15 +3373,13 @@ "csetm x20, hs", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st1": { @@ -3431,13 +3393,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st2": { @@ -3451,13 +3413,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st3": { @@ -3471,13 +3433,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st4": { @@ -3491,13 +3453,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st5": { @@ -3511,13 +3473,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st6": { @@ -3531,13 +3493,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovb st0, st7": { @@ -3551,17 +3513,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc8 /1" ], @@ -3569,15 +3531,13 @@ "csetm x20, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmove st0, st1": { @@ -3591,13 +3551,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmove st0, st2": { @@ -3611,13 +3571,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmove st0, st3": { @@ -3631,13 +3591,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmove st0, st4": { @@ -3651,13 +3611,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmove st0, st5": { @@ -3671,13 +3631,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmove st0, st6": { @@ -3691,13 +3651,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmove st0, st7": { @@ -3711,17 +3671,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st0": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 12, "Comment": [ "0xda 11b 0xd0 /0" ], @@ -3731,15 +3691,13 @@ "csel x20, x20, x21, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st1": { @@ -3755,13 +3713,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st2": { @@ -3777,13 +3735,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st3": { @@ -3799,13 +3757,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st4": { @@ -3821,13 +3779,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st5": { @@ -3843,13 +3801,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st6": { @@ -3865,13 +3823,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st7": { @@ -3887,17 +3845,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xda 11b 0xd8 /1" ], @@ -3910,15 +3868,13 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3938,13 +3894,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3964,13 +3920,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3990,13 +3946,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4016,13 +3972,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4042,13 +3998,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4068,13 +4024,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4094,18 +4050,18 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, "fucompp": { - "ExpectedInstructionCount": 30, + "ExpectedInstructionCount": 33, "Comment": [ "0xda 11b 0xe9 /5" ], @@ -4132,14 +4088,17 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fild dword [rax]": { @@ -4148,19 +4107,19 @@ "0xdf !11b /5" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr w22, [x4]", - "scvtf d2, w22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp dword [rax]": { @@ -4178,10 +4137,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist dword [rax]": { @@ -4214,10 +4173,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fld tword [rax]": { @@ -4226,7 +4185,6 @@ "0xdb !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4254,16 +4212,17 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v2.8b, v0.8b", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp tword [rax]": { @@ -4309,14 +4268,14 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcmovnb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc0 /0" ], @@ -4324,15 +4283,13 @@ "csetm x20, lo", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st1": { @@ -4346,13 +4303,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st2": { @@ -4366,13 +4323,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st3": { @@ -4386,13 +4343,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st4": { @@ -4406,13 +4363,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st5": { @@ -4426,13 +4383,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st6": { @@ -4446,13 +4403,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st7": { @@ -4466,17 +4423,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc8 /1" ], @@ -4484,15 +4441,13 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovne st0, st1": { @@ -4506,13 +4461,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovne st0, st2": { @@ -4526,13 +4481,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovne st0, st3": { @@ -4546,13 +4501,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovne st0, st4": { @@ -4566,13 +4521,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovne st0, st5": { @@ -4586,13 +4541,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovne st0, st6": { @@ -4606,13 +4561,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovne st0, st7": { @@ -4626,17 +4581,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st0": { - "ExpectedInstructionCount": 13, + "ExpectedInstructionCount": 11, "Comment": [ "0xdb 11b 0xd0 /2" ], @@ -4645,15 +4600,13 @@ "csel x20, x20, xzr, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st1": { @@ -4668,13 +4621,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st2": { @@ -4689,13 +4642,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st3": { @@ -4710,13 +4663,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st4": { @@ -4731,13 +4684,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st5": { @@ -4752,13 +4705,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st6": { @@ -4773,13 +4726,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st7": { @@ -4794,17 +4747,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xdb 11b 0xd8 /3" ], @@ -4817,15 +4770,13 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4845,13 +4796,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4871,13 +4822,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4897,13 +4848,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4923,13 +4874,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4949,13 +4900,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4975,13 +4926,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -5001,13 +4952,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -5043,15 +4994,13 @@ ] }, "fucomi st0, st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 15, "Comment": [ "0xdb 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -5243,15 +5192,13 @@ ] }, "fcomi st0, st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 15, "Comment": [ "0xdb 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -5448,8 +5395,8 @@ "0xdc !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -5463,8 +5410,8 @@ "0xdc !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -5478,8 +5425,8 @@ "0xdc !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -5501,8 +5448,8 @@ "0xdc !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -5520,10 +5467,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub qword [rax]": { @@ -5532,8 +5479,8 @@ "0xdc !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -5547,8 +5494,8 @@ "0xdc !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -5562,8 +5509,8 @@ "0xdc !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -5577,8 +5524,8 @@ "0xdc !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -5587,7 +5534,7 @@ ] }, "db 0xdc, 0xc0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fadd st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5595,14 +5542,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5613,14 +5558,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5631,14 +5576,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5649,14 +5594,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5667,14 +5612,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5685,14 +5630,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5703,14 +5648,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5721,19 +5666,19 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "db 0xdc, 0xc8": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fmul st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5741,14 +5686,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5759,14 +5702,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5777,14 +5720,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5795,14 +5738,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5813,14 +5756,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5831,14 +5774,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5849,14 +5792,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5867,19 +5810,19 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "db 0xdc, 0xe0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fsubr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5887,14 +5830,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6025,7 +5966,7 @@ ] }, "db 0xdc, 0xe8": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fsub st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -6033,14 +5974,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6051,14 +5990,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6069,14 +6008,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6087,14 +6026,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6105,14 +6044,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6123,14 +6062,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6141,14 +6080,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6159,19 +6098,19 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "db 0xdc, 0xf0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fdivr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -6179,14 +6118,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6317,7 +6254,7 @@ ] }, "db 0xdc, 0xf8": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fdiv st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -6325,14 +6262,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6343,14 +6278,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6361,14 +6296,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6379,14 +6314,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6397,14 +6332,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6415,14 +6350,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6433,14 +6368,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6451,14 +6386,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6468,18 +6403,18 @@ "0xdd !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp qword [rax]": { @@ -6497,10 +6432,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fst qword [rax]": { @@ -6529,10 +6464,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "frstor [rax]": { @@ -7215,14 +7150,12 @@ ] }, "ffree st0": { - "ExpectedInstructionCount": 8, + "ExpectedInstructionCount": 6, "Comment": [ "0xdd 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w20, w20, #0x0 (0)", - "and w20, w20, #0x7", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w20, w22, w20", @@ -7343,24 +7276,11 @@ ] }, "fst st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 0, "Comment": [ "0xdd 11b 0xd0 /2" ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", - "strb w20, [x28, #1298]" - ] + "ExpectedArm64ASM": [] }, "fst st1": { "ExpectedInstructionCount": 12, @@ -7369,16 +7289,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "lsl w21, w21, w22", - "orr w20, w20, w21", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", "strb w20, [x28, #1298]" ] }, @@ -7389,16 +7309,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7409,16 +7329,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7429,16 +7349,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7449,16 +7369,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7469,16 +7389,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7489,243 +7409,249 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, "fstp st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 11, "Comment": [ "0xdd 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w21, w23, w21", - "orr w21, w22, w21", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "mov w21, #0x1", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp st1": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xd9 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w23, [x28, #1298]", "lsl w22, w21, w22", "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st2": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xda /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st3": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdb /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st4": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdc /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st5": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdd /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st6": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xde /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st7": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdf /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucom st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xdd 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", - "cset w20, vs", + "mov w20, #0x0", + "cset w21, vs", "cset w22, eq", "cset w23, mi", - "orr w23, w23, w20", + "orr w23, w23, w21", "strb w23, [x28, #1016]", - "orr w22, w22, w20", + "orr w22, w22, w21", "strb w22, [x28, #1022]", - "strb w21, [x28, #1017]", - "strb w20, [x28, #1018]" + "strb w20, [x28, #1017]", + "strb w21, [x28, #1018]" ] }, "fucom st1": { @@ -7911,21 +7837,19 @@ ] }, "fucomp st0": { - "ExpectedInstructionCount": 26, + "ExpectedInstructionCount": 24, "Comment": [ "0xdd 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x0", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", - "mov w22, #0x1", + "mov w21, #0x1", + "mov w22, #0x0", "cset w23, vs", "cset w24, eq", "cset w25, mi", @@ -7933,15 +7857,15 @@ "strb w25, [x28, #1016]", "orr w24, w24, w23", "strb w24, [x28, #1022]", - "strb w21, [x28, #1017]", + "strb w22, [x28, #1017]", "strb w23, [x28, #1018]", - "ldrb w21, [x28, #1298]", - "lsl w22, w22, w20", - "bic w21, w21, w22", + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st1": { @@ -7972,10 +7896,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st2": { @@ -8006,10 +7930,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st3": { @@ -8040,10 +7964,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st4": { @@ -8074,10 +7998,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st5": { @@ -8108,10 +8032,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st6": { @@ -8142,10 +8066,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st7": { @@ -8176,10 +8100,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fiadd word [rax]": { @@ -8188,10 +8112,10 @@ "0xde !11b /0" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -8205,10 +8129,10 @@ "0xde !11b /1" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -8222,10 +8146,10 @@ "0xde !11b /2" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -8247,10 +8171,10 @@ "0xde !11b /3" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -8268,10 +8192,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub word [rax]": { @@ -8280,10 +8204,10 @@ "0xde !11b /4" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -8297,10 +8221,10 @@ "0xde !11b /5" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -8314,10 +8238,10 @@ "0xde !11b /6" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -8331,10 +8255,10 @@ "0xde !11b /7" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -8343,29 +8267,27 @@ ] }, "faddp st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st1": { @@ -8375,23 +8297,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st2": { @@ -8401,23 +8323,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st3": { @@ -8427,23 +8349,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st4": { @@ -8453,23 +8375,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st5": { @@ -8479,23 +8401,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st6": { @@ -8505,23 +8427,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st7": { @@ -8531,49 +8453,47 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xde 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st1": { @@ -8583,23 +8503,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st2": { @@ -8609,23 +8529,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st3": { @@ -8635,23 +8555,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st4": { @@ -8661,23 +8581,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st5": { @@ -8687,23 +8607,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st6": { @@ -8713,23 +8633,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st7": { @@ -8739,27 +8659,27 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fcompp": { - "ExpectedInstructionCount": 30, + "ExpectedInstructionCount": 33, "Comment": [ "0xde 11b 0xd9 /3" ], @@ -8786,18 +8706,21 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fsubrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -8805,23 +8728,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st1, st0": { @@ -8839,15 +8760,15 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st2, st0": { @@ -8864,16 +8785,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st3, st0": { @@ -8890,20 +8811,20 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" - ] - }, - "fsubrp st4, st0": { - "ExpectedInstructionCount": 18, + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" + ] + }, + "fsubrp st4, st0": { + "ExpectedInstructionCount": 18, "Comment": [ "0xde 11b 0xe4 /4" ], @@ -8916,16 +8837,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st5, st0": { @@ -8942,16 +8863,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st6, st0": { @@ -8968,16 +8889,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st7, st0": { @@ -8994,20 +8915,20 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe8": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fsubp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9015,23 +8936,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st1, st0": { @@ -9041,23 +8960,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w23, [x28, #1298]", + "fsub d2, d3, d2", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st2, st0": { @@ -9067,23 +8986,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st3, st0": { @@ -9093,23 +9012,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st4, st0": { @@ -9119,23 +9038,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st5, st0": { @@ -9145,23 +9064,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st6, st0": { @@ -9171,23 +9090,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st7, st0": { @@ -9197,27 +9116,27 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fdivrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9225,23 +9144,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivrp st1, st0": { @@ -9259,15 +9176,15 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivrp st2, st0": { @@ -9284,16 +9201,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st3, st0": { @@ -9310,16 +9227,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st4, st0": { @@ -9336,16 +9253,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st5, st0": { @@ -9362,16 +9279,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st6, st0": { @@ -9388,16 +9305,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st7, st0": { @@ -9414,20 +9331,20 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf8": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fdivp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9435,23 +9352,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st1, st0": { @@ -9461,23 +9376,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w23, [x28, #1298]", + "fdiv d2, d3, d2", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st2, st0": { @@ -9487,23 +9402,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st3, st0": { @@ -9513,23 +9428,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st4, st0": { @@ -9539,23 +9454,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st5, st0": { @@ -9565,23 +9480,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st6, st0": { @@ -9591,23 +9506,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st7, st0": { @@ -9617,23 +9532,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fild word [rax]": { @@ -9642,20 +9557,20 @@ "0xdf !11b /0" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldrh w22, [x4]", - "sxth x22, w22", - "scvtf d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp word [rax]": { @@ -9673,10 +9588,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist word [rax]": { @@ -9709,10 +9624,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fbld tword [rax]": { @@ -9721,14 +9636,6 @@ "0xdf !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", - "strb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9784,9 +9691,17 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v2.8b, v0.8b", + "ldrb w20, [x28, #1019]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fbstp tword [rax]": { @@ -9860,10 +9775,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "ffreep st0": { @@ -9982,15 +9897,13 @@ ] }, "fucomip st0": { - "ExpectedInstructionCount": 25, + "ExpectedInstructionCount": 23, "Comment": [ "0xdf 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -10007,11 +9920,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st1": { @@ -10040,11 +9953,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st2": { @@ -10073,11 +9986,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st3": { @@ -10106,11 +10019,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st4": { @@ -10139,11 +10052,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st5": { @@ -10172,11 +10085,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st6": { @@ -10205,11 +10118,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st7": { @@ -10238,23 +10151,21 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st0": { - "ExpectedInstructionCount": 25, + "ExpectedInstructionCount": 23, "Comment": [ "0xdf 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -10271,11 +10182,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st1": { @@ -10304,11 +10215,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st2": { @@ -10337,11 +10248,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st3": { @@ -10370,11 +10281,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st4": { @@ -10403,11 +10314,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st5": { @@ -10436,11 +10347,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st6": { @@ -10469,11 +10380,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st7": { @@ -10502,11 +10413,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] } }