From 641df8d7eeb4931ce6547fbaaccbf47eeeac1fda Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 28 Aug 2024 09:27:31 -0400 Subject: [PATCH] InstCountCI: Update Signed-off-by: Alyssa Rosenzweig --- .../InstructionCountCI/FlagM/FlagOpts.json | 28 ++++++++----------- 1 file changed, 11 insertions(+), 17 deletions(-) diff --git a/unittests/InstructionCountCI/FlagM/FlagOpts.json b/unittests/InstructionCountCI/FlagM/FlagOpts.json index ea7a2c7a43..14ea57ae0d 100644 --- a/unittests/InstructionCountCI/FlagM/FlagOpts.json +++ b/unittests/InstructionCountCI/FlagM/FlagOpts.json @@ -203,27 +203,21 @@ }, "Variable rotate-through-carry dead": { "x86InstructionCount": 2, - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 11, "x86Insts": [ "rcr rax, cl", "test rax, rdx" ], "ExpectedArm64ASM": [ "and x20, x7, #0x3f", - "cbz x20, #+0x38", + "cbz x20, #+0x20", "lsr x20, x4, x7", "cset w21, lo", "neg x22, x7", "lsl x23, x4, x22", "orr x20, x20, x23, lsl #1", - "sub x23, x7, #0x1 (1)", - "lsr x23, x4, x23", - "eor x23, x23, #0x1", - "rmif x23, #63, #nzCv", "lsl x21, x21, x22", "orr x4, x20, x21", - "eor x20, x4, x4, lsr #1", - "rmif x20, #62, #nzcV", "ands x26, x4, x5", "cfinv" ] @@ -309,7 +303,7 @@ "test cl, cl" ], "ExpectedArm64ASM": [ - "cmn wzr, w4, lsl #16", + "tst w4, #0xffff", "cset x20, eq", "bfxil x4, x20, #0, #8", "cmn wzr, w7, lsl #24", @@ -326,10 +320,10 @@ "test cl, cl" ], "ExpectedArm64ASM": [ - "and w20, w4, w6", - "cmn wzr, w20, lsl #16", - "cset x21, eq", - "bfxil x4, x21, #0, #8", + "and w0, w4, w6", + "tst w0, #0xffff", + "cset x20, eq", + "bfxil x4, x20, #0, #8", "cmn wzr, w7, lsl #24", "cfinv", "mov x26, x7" @@ -345,10 +339,10 @@ ], "ExpectedArm64ASM": [ "mov w20, #0x89", - "and w20, w4, w20", - "cmn wzr, w20, lsl #24", - "cset x21, ne", - "bfxil x4, x21, #0, #8", + "and w0, w4, w20", + "tst w0, #0xff", + "cset x20, ne", + "bfxil x4, x20, #0, #8", "cmn wzr, w7, lsl #24", "cfinv", "mov x26, x7"