diff --git a/unittests/InstructionCountCI/Atomics.json b/unittests/InstructionCountCI/Atomics.json
index d5642d9b60..69c73716e1 100644
--- a/unittests/InstructionCountCI/Atomics.json
+++ b/unittests/InstructionCountCI/Atomics.json
@@ -16,7 +16,7 @@
       "Comment": "0x00",
       "ExpectedArm64ASM": [
         "ldaddalb w7, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "lsl w0, w20, #24",
         "cmn w0, w7, lsl #24",
         "add w26, w20, w7",
@@ -30,7 +30,7 @@
       "Comment": "0x01",
       "ExpectedArm64ASM": [
         "ldaddalh w7, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "lsl w0, w20, #16",
         "cmn w0, w7, lsl #16",
         "add w26, w20, w7",
@@ -44,7 +44,7 @@
       "Comment": "0x01",
       "ExpectedArm64ASM": [
         "ldaddal w7, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "adds w26, w20, w7",
         "mrs x20, nzcv",
         "eor w20, w20, #0x20000000",
@@ -90,7 +90,7 @@
       "ExpectedArm64ASM": [
         "cinc w20, w7, lo",
         "ldaddalb w20, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "uxtb w21, w7",
         "cinc w22, w21, lo",
         "add w23, w20, w22",
@@ -114,7 +114,7 @@
       "ExpectedArm64ASM": [
         "cinc w20, w7, lo",
         "ldaddalh w20, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "uxth w21, w7",
         "cinc w22, w21, lo",
         "add w23, w20, w22",
@@ -138,7 +138,7 @@
       "ExpectedArm64ASM": [
         "cinc w20, w7, lo",
         "ldaddal w20, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "mrs x21, nzcv",
         "eor w21, w21, #0x20000000",
         "msr nzcv, x21",
@@ -155,7 +155,7 @@
         "cinc w20, w7, lo",
         "neg w1, w20",
         "ldaddalb w1, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "uxtb w20, w20",
         "uxtb w21, w7",
         "cinc w22, w21, lo",
@@ -181,7 +181,7 @@
         "cinc w20, w7, lo",
         "neg w1, w20",
         "ldaddalh w1, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "uxth w20, w20",
         "uxth w21, w7",
         "cinc w22, w21, lo",
@@ -207,7 +207,7 @@
         "cinc w20, w7, lo",
         "neg w1, w20",
         "ldaddal w1, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "sbcs w26, w20, w7"
       ]
     },
@@ -255,7 +255,7 @@
       "ExpectedArm64ASM": [
         "neg w1, w7",
         "ldaddalb w1, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "lsl w0, w20, #24",
         "cmp w0, w7, lsl #24",
         "sub w26, w20, w7"
@@ -267,7 +267,7 @@
       "ExpectedArm64ASM": [
         "neg w1, w7",
         "ldaddalh w1, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "lsl w0, w20, #16",
         "cmp w0, w7, lsl #16",
         "sub w26, w20, w7"
@@ -279,7 +279,7 @@
       "ExpectedArm64ASM": [
         "neg w1, w7",
         "ldaddal w1, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "subs w26, w20, w7"
       ]
     },
@@ -321,7 +321,7 @@
       "Comment": "0x01",
       "ExpectedArm64ASM": [
         "ldaddal x7, x20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "adds x26, x20, x7",
         "mrs x20, nzcv",
         "eor w20, w20, #0x20000000",
@@ -364,7 +364,7 @@
       "ExpectedArm64ASM": [
         "uxtb w20, w6",
         "ldaddalb w20, w21, [x4]",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "lsl w0, w21, #24",
         "cmn w0, w20, lsl #24",
         "add w26, w21, w20",
@@ -380,7 +380,7 @@
       "ExpectedArm64ASM": [
         "uxth w20, w6",
         "ldaddalh w20, w21, [x4]",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "lsl w0, w21, #16",
         "cmn w0, w20, lsl #16",
         "add w26, w21, w20",
@@ -396,7 +396,7 @@
       "ExpectedArm64ASM": [
         "mov w20, w6",
         "ldaddal w20, w6, [x4]",
-        "eor w27, w6, w20",
+        "eor x27, x6, x20",
         "adds w26, w6, w20",
         "mrs x20, nzcv",
         "eor w20, w20, #0x20000000",
@@ -408,7 +408,7 @@
       "Comment": "0x0f 0xc1",
       "ExpectedArm64ASM": [
         "ldaddal x6, x20, [x4]",
-        "eor w27, w20, w6",
+        "eor x27, x20, x6",
         "adds x26, x20, x6",
         "mrs x21, nzcv",
         "eor w21, w21, #0x20000000",
diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst_32bit.json b/unittests/InstructionCountCI/FEXOpt/MultiInst_32bit.json
index 9f2dc6db77..5246691c02 100644
--- a/unittests/InstructionCountCI/FEXOpt/MultiInst_32bit.json
+++ b/unittests/InstructionCountCI/FEXOpt/MultiInst_32bit.json
@@ -41,7 +41,7 @@
         "mul w5, w5, w11",
         "ldr w4, [x6, #12]",
         "ldr w20, [x6, #4]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs w26, w4, w20",
         "mov x4, x26"
       ]
diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO_32bit.json b/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO_32bit.json
index 69bc00aa52..b614599fb6 100644
--- a/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO_32bit.json
+++ b/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO_32bit.json
@@ -61,7 +61,7 @@
         "mov w20, w20",
         "ldapur w20, [x20]",
         "nop",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs w26, w4, w20",
         "mov x4, x26"
       ]
diff --git a/unittests/InstructionCountCI/FlagM/Atomics.json b/unittests/InstructionCountCI/FlagM/Atomics.json
index 440034bd3d..168361f019 100644
--- a/unittests/InstructionCountCI/FlagM/Atomics.json
+++ b/unittests/InstructionCountCI/FlagM/Atomics.json
@@ -17,7 +17,7 @@
       "Comment": "0x00",
       "ExpectedArm64ASM": [
         "ldaddalb w7, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "lsl w0, w20, #24",
         "cmn w0, w7, lsl #24",
         "add w26, w20, w7",
@@ -29,7 +29,7 @@
       "Comment": "0x01",
       "ExpectedArm64ASM": [
         "ldaddalh w7, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "lsl w0, w20, #16",
         "cmn w0, w7, lsl #16",
         "add w26, w20, w7",
@@ -41,7 +41,7 @@
       "Comment": "0x01",
       "ExpectedArm64ASM": [
         "ldaddal w7, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "adds w26, w20, w7",
         "cfinv"
       ]
@@ -81,7 +81,7 @@
       "ExpectedArm64ASM": [
         "cinc w20, w7, lo",
         "ldaddalb w20, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "uxtb w21, w7",
         "cinc w22, w21, lo",
         "add w23, w20, w22",
@@ -102,7 +102,7 @@
       "ExpectedArm64ASM": [
         "cinc w20, w7, lo",
         "ldaddalh w20, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "uxth w21, w7",
         "cinc w22, w21, lo",
         "add w23, w20, w22",
@@ -123,7 +123,7 @@
       "ExpectedArm64ASM": [
         "cinc w20, w7, lo",
         "ldaddal w20, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "cfinv",
         "adcs w26, w20, w7",
         "cfinv"
@@ -136,7 +136,7 @@
         "cinc w20, w7, lo",
         "neg w1, w20",
         "ldaddalb w1, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "uxtb w20, w20",
         "uxtb w21, w7",
         "cinc w22, w21, lo",
@@ -159,7 +159,7 @@
         "cinc w20, w7, lo",
         "neg w1, w20",
         "ldaddalh w1, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "uxth w20, w20",
         "uxth w21, w7",
         "cinc w22, w21, lo",
@@ -182,7 +182,7 @@
         "cinc w20, w7, lo",
         "neg w1, w20",
         "ldaddal w1, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "sbcs w26, w20, w7"
       ]
     },
@@ -224,7 +224,7 @@
       "ExpectedArm64ASM": [
         "neg w1, w7",
         "ldaddalb w1, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "lsl w0, w20, #24",
         "cmp w0, w7, lsl #24",
         "sub w26, w20, w7"
@@ -236,7 +236,7 @@
       "ExpectedArm64ASM": [
         "neg w1, w7",
         "ldaddalh w1, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "lsl w0, w20, #16",
         "cmp w0, w7, lsl #16",
         "sub w26, w20, w7"
@@ -248,7 +248,7 @@
       "ExpectedArm64ASM": [
         "neg w1, w7",
         "ldaddal w1, w20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "subs w26, w20, w7"
       ]
     },
@@ -286,7 +286,7 @@
       "Comment": "0x01",
       "ExpectedArm64ASM": [
         "ldaddal x7, x20, [x4]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "adds x26, x20, x7",
         "cfinv"
       ]
@@ -297,7 +297,7 @@
       "ExpectedArm64ASM": [
         "uxtb w20, w6",
         "ldaddalb w20, w21, [x4]",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "lsl w0, w21, #24",
         "cmn w0, w20, lsl #24",
         "add w26, w21, w20",
@@ -311,7 +311,7 @@
       "ExpectedArm64ASM": [
         "uxth w20, w6",
         "ldaddalh w20, w21, [x4]",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "lsl w0, w21, #16",
         "cmn w0, w20, lsl #16",
         "add w26, w21, w20",
@@ -325,7 +325,7 @@
       "ExpectedArm64ASM": [
         "mov w20, w6",
         "ldaddal w20, w6, [x4]",
-        "eor w27, w6, w20",
+        "eor x27, x6, x20",
         "adds w26, w6, w20",
         "cfinv"
       ]
@@ -335,7 +335,7 @@
       "Comment": "0x0f 0xc1",
       "ExpectedArm64ASM": [
         "ldaddal x6, x20, [x4]",
-        "eor w27, w20, w6",
+        "eor x27, x20, x6",
         "adds x26, x20, x6",
         "cfinv",
         "mov x6, x20"
diff --git a/unittests/InstructionCountCI/FlagM/FlagOpts.json b/unittests/InstructionCountCI/FlagM/FlagOpts.json
index e4c373942c..e557304b41 100644
--- a/unittests/InstructionCountCI/FlagM/FlagOpts.json
+++ b/unittests/InstructionCountCI/FlagM/FlagOpts.json
@@ -35,7 +35,7 @@
       ],
       "ExpectedArm64ASM": [
         "subs x4, x4, x6",
-        "eor w27, w7, w5",
+        "eor x27, x7, x5",
         "sbcs x26, x7, x5",
         "mov x7, x26"
       ]
@@ -50,7 +50,7 @@
       ],
       "ExpectedArm64ASM": [
         "adds x4, x4, x6",
-        "eor w27, w7, w5",
+        "eor x27, x7, x5",
         "adcs x26, x7, x5",
         "mov x7, x26"
       ]
diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks.json b/unittests/InstructionCountCI/FlagM/HotBlocks.json
index 1ecf8eb9c4..5be17293cc 100644
--- a/unittests/InstructionCountCI/FlagM/HotBlocks.json
+++ b/unittests/InstructionCountCI/FlagM/HotBlocks.json
@@ -31,7 +31,7 @@
         "and w5, w5, #0x1f",
         "add x5, x5, #0x1 (1)",
         "lsl x5, x5, #6",
-        "eor w27, w5, w7",
+        "eor x27, x5, x7",
         "adds x26, x5, x7",
         "cfinv",
         "mov x5, x26"
@@ -165,7 +165,7 @@
         "add v16.2d, v16.2d, v17.2d",
         "str q16, [x16, x4, sxtx]",
         "add x4, x4, #0x10 (16)",
-        "eor w27, w10, w4",
+        "eor x27, x10, x4",
         "subs x26, x10, x4"
       ]
     },
@@ -197,7 +197,7 @@
         "ldr x20, [x6, x5, sxtx #3]",
         "eor x20, x20, x19",
         "str x20, [x6, x5, sxtx #3]",
-        "eor w27, w11, w4",
+        "eor x27, x11, x4",
         "subs x26, x11, x4"
       ]
     },
@@ -218,7 +218,7 @@
         "mov x15, x13",
         "orr x15, x15, #0x1",
         "ldr x20, [x10, x15, sxtx #3]",
-        "eor w27, w17, w20",
+        "eor x27, x17, x20",
         "subs x26, x17, x20"
       ]
     },
@@ -484,7 +484,7 @@
         "stp q19, q8, [x7, #32]",
         "stp q20, q9, [x7]",
         "sub x7, x7, #0x80 (128)",
-        "eor w27, w11, w7",
+        "eor x27, x11, x7",
         "subs x26, x11, x7",
         "stp q4, q5, [x28, #128]",
         "stp q2, q3, [x28, #96]",
@@ -545,7 +545,7 @@
         "stp q19, q8, [x11, #64]",
         "stp q20, q9, [x11, #96]",
         "add x11, x11, #0x80 (128)",
-        "eor w27, w5, w11",
+        "eor x27, x5, x11",
         "subs x26, x5, x11",
         "stp q4, q5, [x28, #128]",
         "stp q2, q3, [x28, #96]",
@@ -592,7 +592,7 @@
         "add x20, x11, x12, lsl #3",
         "str q18, [x20]",
         "add x12, x12, #0x4 (4)",
-        "eor w27, w10, w12",
+        "eor x27, x10, x12",
         "subs x26, x10, x12"
       ]
     },
diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json
index 41e089d9a5..a9387082d5 100644
--- a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json
+++ b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json
@@ -42,7 +42,7 @@
         "orr w20, w20, w5",
         "str w20, [x4]",
         "add w4, w4, #0x4 (4)",
-        "eor w27, w10, w6",
+        "eor x27, x10, x6",
         "subs w26, w10, w6"
       ]
     },
diff --git a/unittests/InstructionCountCI/FlagM/Primary.json b/unittests/InstructionCountCI/FlagM/Primary.json
index 6e8845b53a..7a7b7c0ef0 100644
--- a/unittests/InstructionCountCI/FlagM/Primary.json
+++ b/unittests/InstructionCountCI/FlagM/Primary.json
@@ -16,7 +16,7 @@
       "ExpectedInstructionCount": 6,
       "Comment": "0x00",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "lsl w0, w6, #24",
         "cmn w0, w7, lsl #24",
         "add w26, w6, w7",
@@ -28,7 +28,7 @@
       "ExpectedInstructionCount": 6,
       "Comment": "0x01",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "lsl w0, w6, #16",
         "cmn w0, w7, lsl #16",
         "add w26, w6, w7",
@@ -40,7 +40,7 @@
       "ExpectedInstructionCount": 4,
       "Comment": "0x01",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "adds w26, w6, w7",
         "cfinv",
         "mov x6, x26"
@@ -50,7 +50,7 @@
       "ExpectedInstructionCount": 4,
       "Comment": "0x01",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "adds x26, x6, x7",
         "cfinv",
         "mov x6, x26"
@@ -63,7 +63,7 @@
         "add bl, cl but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "lsl w0, w7, #24",
         "cmn w0, w6, lsl #24",
         "add w26, w7, w6",
@@ -78,7 +78,7 @@
         "add bx, cx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "lsl w0, w7, #16",
         "cmn w0, w6, lsl #16",
         "add w26, w7, w6",
@@ -93,7 +93,7 @@
         "add ebx, ecx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "adds w26, w7, w6",
         "cfinv",
         "mov x7, x26"
@@ -106,7 +106,7 @@
         "add rbx, rcx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "adds x26, x7, x6",
         "cfinv",
         "mov x7, x26"
@@ -389,7 +389,7 @@
       "ExpectedInstructionCount": 14,
       "Comment": "0x10",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "uxtb w20, w7",
         "cinc w21, w20, lo",
         "add w22, w6, w21",
@@ -409,7 +409,7 @@
       "ExpectedInstructionCount": 14,
       "Comment": "0x11",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "uxth w20, w7",
         "cinc w21, w20, lo",
         "add w22, w6, w21",
@@ -429,7 +429,7 @@
       "ExpectedInstructionCount": 5,
       "Comment": "0x11",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "cfinv",
         "adcs w26, w6, w7",
         "cfinv",
@@ -440,7 +440,7 @@
       "ExpectedInstructionCount": 5,
       "Comment": "0x11",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "cfinv",
         "adcs x26, x6, x7",
         "cfinv",
@@ -454,7 +454,7 @@
         "adc bl, cl but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "uxtb w20, w6",
         "cinc w21, w20, lo",
         "add w22, w7, w21",
@@ -477,7 +477,7 @@
         "adc bx, cx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "uxth w20, w6",
         "cinc w21, w20, lo",
         "add w22, w7, w21",
@@ -500,7 +500,7 @@
         "adc ebx, ecx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "cfinv",
         "adcs w26, w7, w6",
         "cfinv",
@@ -514,7 +514,7 @@
         "adc rbx, rcx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "cfinv",
         "adcs x26, x7, x6",
         "cfinv",
@@ -657,7 +657,7 @@
       "ExpectedInstructionCount": 15,
       "Comment": "0x18",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "uxtb w20, w6",
         "uxtb w21, w7",
         "cinc w22, w21, lo",
@@ -678,7 +678,7 @@
       "ExpectedInstructionCount": 15,
       "Comment": "0x19",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "uxth w20, w6",
         "uxth w21, w7",
         "cinc w22, w21, lo",
@@ -699,7 +699,7 @@
       "ExpectedInstructionCount": 3,
       "Comment": "0x19",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "sbcs w26, w6, w7",
         "mov x6, x26"
       ]
@@ -708,7 +708,7 @@
       "ExpectedInstructionCount": 3,
       "Comment": "0x19",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "sbcs x26, x6, x7",
         "mov x6, x26"
       ]
@@ -720,7 +720,7 @@
         "sbb bl, cl but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "uxtb w20, w7",
         "uxtb w21, w6",
         "cinc w22, w21, lo",
@@ -744,7 +744,7 @@
         "sbb bx, cx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "uxth w20, w7",
         "uxth w21, w6",
         "cinc w22, w21, lo",
@@ -768,7 +768,7 @@
         "sbb ebx, ecx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "sbcs w26, w7, w6",
         "mov x7, x26"
       ]
@@ -780,7 +780,7 @@
         "sbb rbx, rcx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "sbcs x26, x7, x6",
         "mov x7, x26"
       ]
@@ -1081,7 +1081,7 @@
       "ExpectedInstructionCount": 5,
       "Comment": "0x28",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "lsl w0, w6, #24",
         "cmp w0, w7, lsl #24",
         "sub w26, w6, w7",
@@ -1092,7 +1092,7 @@
       "ExpectedInstructionCount": 5,
       "Comment": "0x29",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "lsl w0, w6, #16",
         "cmp w0, w7, lsl #16",
         "sub w26, w6, w7",
@@ -1103,7 +1103,7 @@
       "ExpectedInstructionCount": 3,
       "Comment": "0x29",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "subs w26, w6, w7",
         "mov x6, x26"
       ]
@@ -1112,7 +1112,7 @@
       "ExpectedInstructionCount": 3,
       "Comment": "0x29",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "subs x26, x6, x7",
         "mov x6, x26"
       ]
@@ -1124,7 +1124,7 @@
         "sub bl, cl but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "lsl w0, w7, #24",
         "cmp w0, w6, lsl #24",
         "sub w26, w7, w6",
@@ -1138,7 +1138,7 @@
         "sub bx, cx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "lsl w0, w7, #16",
         "cmp w0, w6, lsl #16",
         "sub w26, w7, w6",
@@ -1152,7 +1152,7 @@
         "sub ebx, ecx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "subs w26, w7, w6",
         "mov x7, x26"
       ]
@@ -1164,7 +1164,7 @@
         "sub rbx, rcx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "subs x26, x7, x6",
         "mov x7, x26"
       ]
@@ -1387,7 +1387,7 @@
       "ExpectedInstructionCount": 4,
       "Comment": "0x38",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "lsl w0, w6, #24",
         "cmp w0, w7, lsl #24",
         "sub w26, w6, w7"
@@ -1437,7 +1437,7 @@
       "ExpectedInstructionCount": 4,
       "Comment": "0x39",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "lsl w0, w6, #16",
         "cmp w0, w7, lsl #16",
         "sub w26, w6, w7"
@@ -1447,7 +1447,7 @@
       "ExpectedInstructionCount": 2,
       "Comment": "0x39",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "subs w26, w6, w7"
       ]
     },
@@ -1455,7 +1455,7 @@
       "ExpectedInstructionCount": 2,
       "Comment": "0x39",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "subs x26, x6, x7"
       ]
     },
@@ -1466,7 +1466,7 @@
         "cmp bl, cl but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "lsl w0, w7, #24",
         "cmp w0, w6, lsl #24",
         "sub w26, w7, w6"
@@ -1479,7 +1479,7 @@
         "cmp bx, cx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "lsl w0, w7, #16",
         "cmp w0, w6, lsl #16",
         "sub w26, w7, w6"
@@ -1492,7 +1492,7 @@
         "cmp ebx, ecx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "subs w26, w7, w6"
       ]
     },
@@ -1503,7 +1503,7 @@
         "cmp rbx, rcx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "subs x26, x7, x6"
       ]
     },
@@ -1700,7 +1700,7 @@
       "Comment": "0x9c",
       "ExpectedArm64ASM": [
         "cset w20, lo",
-        "eor w21, w27, w26",
+        "eor x21, x27, x26",
         "ubfx w21, w21, #4, #1",
         "orr x20, x20, x21, lsl #4",
         "ldrb w21, [x28, #984]",
@@ -1745,7 +1745,7 @@
       "Comment": "0x9c",
       "ExpectedArm64ASM": [
         "cset w20, lo",
-        "eor w21, w27, w26",
+        "eor x21, x27, x26",
         "ubfx w21, w21, #4, #1",
         "orr x20, x20, x21, lsl #4",
         "ldrb w21, [x28, #984]",
@@ -1850,7 +1850,7 @@
       "Comment": "0x9f",
       "ExpectedArm64ASM": [
         "cset w20, lo",
-        "eor w21, w27, w26",
+        "eor x21, x27, x26",
         "ubfx w21, w21, #4, #1",
         "orr x20, x20, x21, lsl #4",
         "eor w0, w26, w26, lsr #4",
@@ -1873,7 +1873,7 @@
       "ExpectedArm64ASM": [
         "ldrb w20, [x11]",
         "ldrb w21, [x10]",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "lsl w0, w21, #24",
         "cmp w0, w20, lsl #24",
         "sub w26, w21, w20",
@@ -1890,7 +1890,7 @@
       "ExpectedArm64ASM": [
         "ldrh w20, [x11]",
         "ldrh w21, [x10]",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "lsl w0, w21, #16",
         "cmp w0, w20, lsl #16",
         "sub w26, w21, w20",
@@ -1908,7 +1908,7 @@
       "ExpectedArm64ASM": [
         "ldr w20, [x11]",
         "ldr w21, [x10]",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "subs w26, w21, w20",
         "ldrsb x20, [x28, #986]",
         "lsl x20, x20, #2",
@@ -1924,7 +1924,7 @@
       "ExpectedArm64ASM": [
         "ldr x20, [x11]",
         "ldr x21, [x10]",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "subs x26, x21, x20",
         "ldrsb x20, [x28, #986]",
         "lsl x20, x20, #3",
@@ -1956,7 +1956,7 @@
         "sub x10, x10, #0x1 (1)",
         "ccmp x27, x26, #nzcv, ne",
         "b.eq #-0x18",
-        "eor w20, w27, w26",
+        "eor x20, x27, x26",
         "lsl w0, w27, #24",
         "cmp w0, w26, lsl #24",
         "sub w26, w27, w26",
@@ -1987,7 +1987,7 @@
         "sub x10, x10, #0x2 (2)",
         "ccmp x27, x26, #nzcv, ne",
         "b.eq #-0x18",
-        "eor w20, w27, w26",
+        "eor x20, x27, x26",
         "lsl w0, w27, #16",
         "cmp w0, w26, lsl #16",
         "sub w26, w27, w26",
@@ -2018,7 +2018,7 @@
         "sub x10, x10, #0x4 (4)",
         "ccmp x27, x26, #nzcv, ne",
         "b.eq #-0x18",
-        "eor w20, w27, w26",
+        "eor x20, x27, x26",
         "subs w26, w27, w26",
         "mov x27, x20"
       ]
@@ -2047,7 +2047,7 @@
         "sub x10, x10, #0x8 (8)",
         "ccmp x27, x26, #nzcv, ne",
         "b.eq #-0x18",
-        "eor w20, w27, w26",
+        "eor x20, x27, x26",
         "subs x26, x27, x26",
         "mov x27, x20"
       ]
@@ -2076,7 +2076,7 @@
         "sub x10, x10, #0x1 (1)",
         "ccmp x27, x26, #nZcv, ne",
         "b.ne #-0x18",
-        "eor w20, w27, w26",
+        "eor x20, x27, x26",
         "lsl w0, w27, #24",
         "cmp w0, w26, lsl #24",
         "sub w26, w27, w26",
@@ -2107,7 +2107,7 @@
         "sub x10, x10, #0x2 (2)",
         "ccmp x27, x26, #nZcv, ne",
         "b.ne #-0x18",
-        "eor w20, w27, w26",
+        "eor x20, x27, x26",
         "lsl w0, w27, #16",
         "cmp w0, w26, lsl #16",
         "sub w26, w27, w26",
@@ -2138,7 +2138,7 @@
         "sub x10, x10, #0x4 (4)",
         "ccmp x27, x26, #nZcv, ne",
         "b.ne #-0x18",
-        "eor w20, w27, w26",
+        "eor x20, x27, x26",
         "subs w26, w27, w26",
         "mov x27, x20"
       ]
@@ -2167,7 +2167,7 @@
         "sub x10, x10, #0x8 (8)",
         "ccmp x27, x26, #nZcv, ne",
         "b.ne #-0x18",
-        "eor w20, w27, w26",
+        "eor x20, x27, x26",
         "subs x26, x27, x26",
         "mov x27, x20"
       ]
@@ -2241,7 +2241,7 @@
       "Comment": "0xae",
       "ExpectedArm64ASM": [
         "ldrb w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #24",
         "cmp w0, w20, lsl #24",
         "sub w26, w4, w20",
@@ -2254,7 +2254,7 @@
       "Comment": "0xaf",
       "ExpectedArm64ASM": [
         "ldrh w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #16",
         "cmp w0, w20, lsl #16",
         "sub w26, w4, w20",
@@ -2267,7 +2267,7 @@
       "Comment": "0xaf",
       "ExpectedArm64ASM": [
         "ldr w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs w26, w4, w20",
         "ldrsb x20, [x28, #986]",
         "add x11, x11, x20, lsl #2"
@@ -2278,7 +2278,7 @@
       "Comment": "0xaf",
       "ExpectedArm64ASM": [
         "ldr x20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs x26, x4, x20",
         "ldrsb x20, [x28, #986]",
         "add x11, x11, x20, lsl #3"
@@ -2294,7 +2294,7 @@
         "b #+0x2c",
         "cbz x7, #+0x24",
         "ldrb w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #24",
         "cmp w0, w20, lsl #24",
         "sub w26, w4, w20",
@@ -2304,7 +2304,7 @@
         "b #+0x28",
         "cbz x7, #+0x24",
         "ldrb w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #24",
         "cmp w0, w20, lsl #24",
         "sub w26, w4, w20",
@@ -2323,7 +2323,7 @@
         "b #+0x2c",
         "cbz x7, #+0x24",
         "ldrh w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #16",
         "cmp w0, w20, lsl #16",
         "sub w26, w4, w20",
@@ -2333,7 +2333,7 @@
         "b #+0x28",
         "cbz x7, #+0x24",
         "ldrh w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #16",
         "cmp w0, w20, lsl #16",
         "sub w26, w4, w20",
@@ -2352,7 +2352,7 @@
         "b #+0x24",
         "cbz x7, #+0x1c",
         "ldr w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs w26, w4, w20",
         "sub x7, x7, #0x1 (1)",
         "add x11, x11, #0x4 (4)",
@@ -2360,7 +2360,7 @@
         "b #+0x20",
         "cbz x7, #+0x1c",
         "ldr w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs w26, w4, w20",
         "sub x7, x7, #0x1 (1)",
         "sub x11, x11, #0x4 (4)",
@@ -2377,7 +2377,7 @@
         "b #+0x24",
         "cbz x7, #+0x1c",
         "ldr x20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs x26, x4, x20",
         "sub x7, x7, #0x1 (1)",
         "add x11, x11, #0x8 (8)",
@@ -2385,7 +2385,7 @@
         "b #+0x20",
         "cbz x7, #+0x1c",
         "ldr x20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs x26, x4, x20",
         "sub x7, x7, #0x1 (1)",
         "sub x11, x11, #0x8 (8)",
@@ -2402,7 +2402,7 @@
         "b #+0x2c",
         "cbz x7, #+0x24",
         "ldrb w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #24",
         "cmp w0, w20, lsl #24",
         "sub w26, w4, w20",
@@ -2412,7 +2412,7 @@
         "b #+0x28",
         "cbz x7, #+0x24",
         "ldrb w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #24",
         "cmp w0, w20, lsl #24",
         "sub w26, w4, w20",
@@ -2431,7 +2431,7 @@
         "b #+0x2c",
         "cbz x7, #+0x24",
         "ldrh w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #16",
         "cmp w0, w20, lsl #16",
         "sub w26, w4, w20",
@@ -2441,7 +2441,7 @@
         "b #+0x28",
         "cbz x7, #+0x24",
         "ldrh w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #16",
         "cmp w0, w20, lsl #16",
         "sub w26, w4, w20",
@@ -2460,7 +2460,7 @@
         "b #+0x24",
         "cbz x7, #+0x1c",
         "ldr w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs w26, w4, w20",
         "sub x7, x7, #0x1 (1)",
         "add x11, x11, #0x4 (4)",
@@ -2468,7 +2468,7 @@
         "b #+0x20",
         "cbz x7, #+0x1c",
         "ldr w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs w26, w4, w20",
         "sub x7, x7, #0x1 (1)",
         "sub x11, x11, #0x4 (4)",
@@ -2485,7 +2485,7 @@
         "b #+0x24",
         "cbz x7, #+0x1c",
         "ldr x20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs x26, x4, x20",
         "sub x7, x7, #0x1 (1)",
         "add x11, x11, #0x8 (8)",
@@ -2493,7 +2493,7 @@
         "b #+0x20",
         "cbz x7, #+0x1c",
         "ldr x20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs x26, x4, x20",
         "sub x7, x7, #0x1 (1)",
         "sub x11, x11, #0x8 (8)",
diff --git a/unittests/InstructionCountCI/FlagM/Primary_32Bit.json b/unittests/InstructionCountCI/FlagM/Primary_32Bit.json
index a97da8f2c9..e4bac5ca61 100644
--- a/unittests/InstructionCountCI/FlagM/Primary_32Bit.json
+++ b/unittests/InstructionCountCI/FlagM/Primary_32Bit.json
@@ -99,7 +99,7 @@
         "and x22, x20, #0xf",
         "cmp x22, #0x9 (9)",
         "cset x22, hi",
-        "eor w23, w27, w26",
+        "eor x23, x27, x26",
         "ubfx w23, w23, #4, #1",
         "orr x22, x23, x22",
         "cmp x20, #0x99 (153)",
@@ -126,7 +126,7 @@
         "and x22, x20, #0xf",
         "cmp x22, #0x9 (9)",
         "cset x22, hi",
-        "eor w23, w27, w26",
+        "eor x23, x27, x26",
         "ubfx w23, w23, #4, #1",
         "orr x22, x23, x22",
         "cmp x20, #0x99 (153)",
@@ -155,7 +155,7 @@
         "and x20, x4, #0xf",
         "cmp x20, #0x9 (9)",
         "cset x20, hi",
-        "eor w21, w27, w26",
+        "eor x21, x27, x26",
         "ubfx w21, w21, #4, #1",
         "orr x20, x21, x20",
         "cmp wzr, w20",
@@ -174,7 +174,7 @@
         "and x20, x4, #0xf",
         "cmp x20, #0x9 (9)",
         "cset x20, hi",
-        "eor w21, w27, w26",
+        "eor x21, x27, x26",
         "ubfx w21, w21, #4, #1",
         "orr x20, x21, x20",
         "cmp wzr, w20",
@@ -315,7 +315,7 @@
       "Comment": "0x9c",
       "ExpectedArm64ASM": [
         "cset w20, lo",
-        "eor w21, w27, w26",
+        "eor x21, x27, x26",
         "ubfx w21, w21, #4, #1",
         "orr x20, x20, x21, lsl #4",
         "ldrb w21, [x28, #984]",
@@ -360,7 +360,7 @@
       "Comment": "0x9c",
       "ExpectedArm64ASM": [
         "cset w20, lo",
-        "eor w21, w27, w26",
+        "eor x21, x27, x26",
         "ubfx w21, w21, #4, #1",
         "orr x20, x20, x21, lsl #4",
         "ldrb w21, [x28, #984]",
diff --git a/unittests/InstructionCountCI/FlagM/Secondary.json b/unittests/InstructionCountCI/FlagM/Secondary.json
index 7ec21f5b9a..6010289c5d 100644
--- a/unittests/InstructionCountCI/FlagM/Secondary.json
+++ b/unittests/InstructionCountCI/FlagM/Secondary.json
@@ -1033,7 +1033,7 @@
     "cmpxchg cl, bl": {
       "ExpectedInstructionCount": 7,
       "ExpectedArm64ASM": [
-        "eor w27, w4, w7",
+        "eor x27, x4, x7",
         "lsl w0, w4, #24",
         "cmp w0, w7, lsl #24",
         "sub w26, w4, w7",
@@ -1045,7 +1045,7 @@
     "cmpxchg cx, bx": {
       "ExpectedInstructionCount": 7,
       "ExpectedArm64ASM": [
-        "eor w27, w4, w7",
+        "eor x27, x4, x7",
         "lsl w0, w4, #16",
         "cmp w0, w7, lsl #16",
         "sub w26, w4, w7",
@@ -1058,7 +1058,7 @@
       "ExpectedInstructionCount": 5,
       "ExpectedArm64ASM": [
         "mov w20, w7",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs w26, w4, w20",
         "csel x4, x4, x20, eq",
         "csel x7, x6, x7, eq"
@@ -1067,7 +1067,7 @@
     "cmpxchg rcx, rbx": {
       "ExpectedInstructionCount": 6,
       "ExpectedArm64ASM": [
-        "eor w27, w4, w7",
+        "eor x27, x4, x7",
         "subs x26, x4, x7",
         "csel x20, x6, x7, eq",
         "mov x21, x7",
@@ -1082,7 +1082,7 @@
         "mov x1, x4",
         "casal x1, x6, [x4]",
         "mov x20, x1",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs x26, x4, x20",
         "mov x4, x20"
       ]
@@ -1107,7 +1107,7 @@
         "mov w1, w21",
         "casalb w1, w20, [x4]",
         "mov w20, w1",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "lsl w0, w21, #24",
         "cmp w0, w20, lsl #24",
         "sub w26, w21, w20",
@@ -1134,7 +1134,7 @@
         "mov w1, w21",
         "casalh w1, w20, [x4]",
         "mov w20, w1",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "lsl w0, w21, #16",
         "cmp w0, w20, lsl #16",
         "sub w26, w21, w20",
@@ -1146,7 +1146,7 @@
       "Comment": "0x0f 0xb1",
       "ExpectedArm64ASM": [
         "mov w20, w4",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs w26, w4, w20",
         "mov x4, x6"
       ]
@@ -1160,7 +1160,7 @@
         "mov w1, w21",
         "casal w1, w20, [x4]",
         "mov w20, w1",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "subs w26, w21, w20",
         "csel x4, x4, x20, eq"
       ]
@@ -1505,7 +1505,7 @@
       "ExpectedArm64ASM": [
         "uxtb w20, w4",
         "uxtb w21, w6",
-        "eor w27, w20, w21",
+        "eor x27, x20, x21",
         "lsl w0, w20, #24",
         "cmn w0, w21, lsl #24",
         "add w26, w20, w21",
@@ -1520,7 +1520,7 @@
       "ExpectedArm64ASM": [
         "uxtb w20, w6",
         "ldaddalb w20, w21, [x4]",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "lsl w0, w21, #24",
         "cmn w0, w20, lsl #24",
         "add w26, w21, w20",
@@ -1534,7 +1534,7 @@
       "ExpectedArm64ASM": [
         "uxth w20, w4",
         "uxth w21, w6",
-        "eor w27, w20, w21",
+        "eor x27, x20, x21",
         "lsl w0, w20, #16",
         "cmn w0, w21, lsl #16",
         "add w26, w20, w21",
@@ -1549,7 +1549,7 @@
       "ExpectedArm64ASM": [
         "uxth w20, w6",
         "ldaddalh w20, w21, [x4]",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "lsl w0, w21, #16",
         "cmn w0, w20, lsl #16",
         "add w26, w21, w20",
@@ -1563,7 +1563,7 @@
       "ExpectedArm64ASM": [
         "mov w20, w4",
         "mov w21, w6",
-        "eor w27, w20, w21",
+        "eor x27, x20, x21",
         "adds w26, w20, w21",
         "cfinv",
         "mov x6, x20",
@@ -1576,7 +1576,7 @@
       "ExpectedArm64ASM": [
         "mov w20, w6",
         "ldaddal w20, w6, [x4]",
-        "eor w27, w6, w20",
+        "eor x27, x6, x20",
         "adds w26, w6, w20",
         "cfinv"
       ]
@@ -1585,7 +1585,7 @@
       "ExpectedInstructionCount": 5,
       "Comment": "0x0f 0xc1",
       "ExpectedArm64ASM": [
-        "eor w27, w4, w6",
+        "eor x27, x4, x6",
         "adds x26, x4, x6",
         "cfinv",
         "mov x6, x4",
@@ -1597,7 +1597,7 @@
       "Comment": "0x0f 0xc1",
       "ExpectedArm64ASM": [
         "ldaddal x6, x20, [x4]",
-        "eor w27, w20, w6",
+        "eor x27, x20, x6",
         "adds x26, x20, x6",
         "cfinv",
         "mov x6, x20"
diff --git a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json
index f0ab2fa532..6552e9a8f1 100644
--- a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json
+++ b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json
@@ -26706,7 +26706,7 @@
         "add w20, w4, #0x7c0 (1984)",
         "str s2, [x20]",
         "ldr w20, [x7, #4096]",
-        "eor w27, w20, w7",
+        "eor x27, x20, x7",
         "subs w26, w20, w7",
         "add w4, w7, #0x800 (2048)",
         "strb wzr, [x28, #1298]"
@@ -71701,7 +71701,7 @@
         "mov w20, #0x1",
         "add w5, w5, #0x1 (1)",
         "ldr w21, [x8, #28]",
-        "eor w27, w5, w21",
+        "eor x27, x5, x21",
         "subs w26, w5, w21",
         "ldr s2, [x8, #196]",
         "mrs x0, nzcv",
diff --git a/unittests/InstructionCountCI/Primary.json b/unittests/InstructionCountCI/Primary.json
index d8a1c1a386..4038bb2add 100644
--- a/unittests/InstructionCountCI/Primary.json
+++ b/unittests/InstructionCountCI/Primary.json
@@ -15,7 +15,7 @@
       "ExpectedInstructionCount": 8,
       "Comment": "0x00",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "lsl w0, w6, #24",
         "cmn w0, w7, lsl #24",
         "add w26, w6, w7",
@@ -29,7 +29,7 @@
       "ExpectedInstructionCount": 8,
       "Comment": "0x01",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "lsl w0, w6, #16",
         "cmn w0, w7, lsl #16",
         "add w26, w6, w7",
@@ -43,7 +43,7 @@
       "ExpectedInstructionCount": 6,
       "Comment": "0x01",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "adds w26, w6, w7",
         "mrs x20, nzcv",
         "eor w20, w20, #0x20000000",
@@ -55,7 +55,7 @@
       "ExpectedInstructionCount": 6,
       "Comment": "0x01",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "adds x26, x6, x7",
         "mrs x20, nzcv",
         "eor w20, w20, #0x20000000",
@@ -70,7 +70,7 @@
         "add bl, cl but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "lsl w0, w7, #24",
         "cmn w0, w6, lsl #24",
         "add w26, w7, w6",
@@ -87,7 +87,7 @@
         "add bx, cx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "lsl w0, w7, #16",
         "cmn w0, w6, lsl #16",
         "add w26, w7, w6",
@@ -104,7 +104,7 @@
         "add ebx, ecx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "adds w26, w7, w6",
         "mrs x20, nzcv",
         "eor w20, w20, #0x20000000",
@@ -119,7 +119,7 @@
         "add rbx, rcx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "adds x26, x7, x6",
         "mrs x20, nzcv",
         "eor w20, w20, #0x20000000",
@@ -438,7 +438,7 @@
       "ExpectedInstructionCount": 17,
       "Comment": "0x10",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "uxtb w20, w7",
         "cinc w21, w20, lo",
         "add w22, w6, w21",
@@ -461,7 +461,7 @@
       "ExpectedInstructionCount": 17,
       "Comment": "0x11",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "uxth w20, w7",
         "cinc w21, w20, lo",
         "add w22, w6, w21",
@@ -484,7 +484,7 @@
       "ExpectedInstructionCount": 9,
       "Comment": "0x11",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "mrs x20, nzcv",
         "eor w20, w20, #0x20000000",
         "msr nzcv, x20",
@@ -499,7 +499,7 @@
       "ExpectedInstructionCount": 9,
       "Comment": "0x11",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "mrs x20, nzcv",
         "eor w20, w20, #0x20000000",
         "msr nzcv, x20",
@@ -517,7 +517,7 @@
         "adc bl, cl but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "uxtb w20, w6",
         "cinc w21, w20, lo",
         "add w22, w7, w21",
@@ -543,7 +543,7 @@
         "adc bx, cx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "uxth w20, w6",
         "cinc w21, w20, lo",
         "add w22, w7, w21",
@@ -569,7 +569,7 @@
         "adc ebx, ecx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "mrs x20, nzcv",
         "eor w20, w20, #0x20000000",
         "msr nzcv, x20",
@@ -587,7 +587,7 @@
         "adc rbx, rcx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "mrs x20, nzcv",
         "eor w20, w20, #0x20000000",
         "msr nzcv, x20",
@@ -762,7 +762,7 @@
       "ExpectedInstructionCount": 18,
       "Comment": "0x18",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "uxtb w20, w6",
         "uxtb w21, w7",
         "cinc w22, w21, lo",
@@ -786,7 +786,7 @@
       "ExpectedInstructionCount": 18,
       "Comment": "0x19",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "uxth w20, w6",
         "uxth w21, w7",
         "cinc w22, w21, lo",
@@ -810,7 +810,7 @@
       "ExpectedInstructionCount": 3,
       "Comment": "0x19",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "sbcs w26, w6, w7",
         "mov x6, x26"
       ]
@@ -819,7 +819,7 @@
       "ExpectedInstructionCount": 3,
       "Comment": "0x19",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "sbcs x26, x6, x7",
         "mov x6, x26"
       ]
@@ -831,7 +831,7 @@
         "sbb bl, cl but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "uxtb w20, w7",
         "uxtb w21, w6",
         "cinc w22, w21, lo",
@@ -858,7 +858,7 @@
         "sbb bx, cx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "uxth w20, w7",
         "uxth w21, w6",
         "cinc w22, w21, lo",
@@ -885,7 +885,7 @@
         "sbb ebx, ecx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "sbcs w26, w7, w6",
         "mov x7, x26"
       ]
@@ -897,7 +897,7 @@
         "sbb rbx, rcx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "sbcs x26, x7, x6",
         "mov x7, x26"
       ]
@@ -1242,7 +1242,7 @@
       "ExpectedInstructionCount": 5,
       "Comment": "0x28",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "lsl w0, w6, #24",
         "cmp w0, w7, lsl #24",
         "sub w26, w6, w7",
@@ -1253,7 +1253,7 @@
       "ExpectedInstructionCount": 5,
       "Comment": "0x29",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "lsl w0, w6, #16",
         "cmp w0, w7, lsl #16",
         "sub w26, w6, w7",
@@ -1264,7 +1264,7 @@
       "ExpectedInstructionCount": 3,
       "Comment": "0x29",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "subs w26, w6, w7",
         "mov x6, x26"
       ]
@@ -1273,7 +1273,7 @@
       "ExpectedInstructionCount": 3,
       "Comment": "0x29",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "subs x26, x6, x7",
         "mov x6, x26"
       ]
@@ -1285,7 +1285,7 @@
         "sub bl, cl but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "lsl w0, w7, #24",
         "cmp w0, w6, lsl #24",
         "sub w26, w7, w6",
@@ -1299,7 +1299,7 @@
         "sub bx, cx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "lsl w0, w7, #16",
         "cmp w0, w6, lsl #16",
         "sub w26, w7, w6",
@@ -1313,7 +1313,7 @@
         "sub ebx, ecx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "subs w26, w7, w6",
         "mov x7, x26"
       ]
@@ -1325,7 +1325,7 @@
         "sub rbx, rcx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "subs x26, x7, x6",
         "mov x7, x26"
       ]
@@ -1560,7 +1560,7 @@
       "ExpectedInstructionCount": 4,
       "Comment": "0x38",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "lsl w0, w6, #24",
         "cmp w0, w7, lsl #24",
         "sub w26, w6, w7"
@@ -1614,7 +1614,7 @@
       "ExpectedInstructionCount": 4,
       "Comment": "0x39",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "lsl w0, w6, #16",
         "cmp w0, w7, lsl #16",
         "sub w26, w6, w7"
@@ -1624,7 +1624,7 @@
       "ExpectedInstructionCount": 2,
       "Comment": "0x39",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "subs w26, w6, w7"
       ]
     },
@@ -1632,7 +1632,7 @@
       "ExpectedInstructionCount": 2,
       "Comment": "0x39",
       "ExpectedArm64ASM": [
-        "eor w27, w6, w7",
+        "eor x27, x6, x7",
         "subs x26, x6, x7"
       ]
     },
@@ -1643,7 +1643,7 @@
         "cmp bl, cl but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "lsl w0, w7, #24",
         "cmp w0, w6, lsl #24",
         "sub w26, w7, w6"
@@ -1656,7 +1656,7 @@
         "cmp bx, cx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "lsl w0, w7, #16",
         "cmp w0, w6, lsl #16",
         "sub w26, w7, w6"
@@ -1669,7 +1669,7 @@
         "cmp ebx, ecx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "subs w26, w7, w6"
       ]
     },
@@ -1680,7 +1680,7 @@
         "cmp rbx, rcx but modrm.rm as source"
       ],
       "ExpectedArm64ASM": [
-        "eor w27, w7, w6",
+        "eor x27, x7, x6",
         "subs x26, x7, x6"
       ]
     },
@@ -1996,10 +1996,10 @@
       "ExpectedInstructionCount": 4,
       "Comment": "0x86",
       "ExpectedArm64ASM": [
-        "mov x20, x7",
-        "bfxil x20, x6, #0, #8",
-        "bfxil x6, x7, #0, #8",
-        "mov x7, x20"
+        "mov x20, x6",
+        "bfxil x20, x7, #0, #8",
+        "bfxil x7, x6, #0, #8",
+        "mov x6, x20"
       ]
     },
     "xchg [rax], cl": {
@@ -2014,10 +2014,10 @@
       "ExpectedInstructionCount": 4,
       "Comment": "0x87",
       "ExpectedArm64ASM": [
-        "mov x20, x7",
-        "bfxil x20, x6, #0, #16",
-        "bfxil x6, x7, #0, #16",
-        "mov x7, x20"
+        "mov x20, x6",
+        "bfxil x20, x7, #0, #16",
+        "bfxil x7, x6, #0, #16",
+        "mov x6, x20"
       ]
     },
     "xchg [rax], cx": {
@@ -2032,9 +2032,9 @@
       "ExpectedInstructionCount": 3,
       "Comment": "0x87",
       "ExpectedArm64ASM": [
-        "mov w20, w6",
-        "mov w6, w7",
-        "mov x7, x20"
+        "mov w20, w7",
+        "mov w7, w6",
+        "mov x6, x20"
       ]
     },
     "xchg [rax], ecx": {
@@ -2604,7 +2604,7 @@
       "Comment": "0x9c",
       "ExpectedArm64ASM": [
         "cset w20, lo",
-        "eor w21, w27, w26",
+        "eor x21, x27, x26",
         "ubfx w21, w21, #4, #1",
         "orr x20, x20, x21, lsl #4",
         "ldrb w21, [x28, #984]",
@@ -2649,7 +2649,7 @@
       "Comment": "0x9c",
       "ExpectedArm64ASM": [
         "cset w20, lo",
-        "eor w21, w27, w26",
+        "eor x21, x27, x26",
         "ubfx w21, w21, #4, #1",
         "orr x20, x20, x21, lsl #4",
         "ldrb w21, [x28, #984]",
@@ -2763,7 +2763,7 @@
       "Comment": "0x9f",
       "ExpectedArm64ASM": [
         "cset w20, lo",
-        "eor w21, w27, w26",
+        "eor x21, x27, x26",
         "ubfx w21, w21, #4, #1",
         "orr x20, x20, x21, lsl #4",
         "eor w0, w26, w26, lsr #4",
@@ -3249,7 +3249,7 @@
       "ExpectedArm64ASM": [
         "ldrb w20, [x11]",
         "ldrb w21, [x10]",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "lsl w0, w21, #24",
         "cmp w0, w20, lsl #24",
         "sub w26, w21, w20",
@@ -3266,7 +3266,7 @@
       "ExpectedArm64ASM": [
         "ldrh w20, [x11]",
         "ldrh w21, [x10]",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "lsl w0, w21, #16",
         "cmp w0, w20, lsl #16",
         "sub w26, w21, w20",
@@ -3284,7 +3284,7 @@
       "ExpectedArm64ASM": [
         "ldr w20, [x11]",
         "ldr w21, [x10]",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "subs w26, w21, w20",
         "ldrsb x20, [x28, #986]",
         "lsl x20, x20, #2",
@@ -3300,7 +3300,7 @@
       "ExpectedArm64ASM": [
         "ldr x20, [x11]",
         "ldr x21, [x10]",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "subs x26, x21, x20",
         "ldrsb x20, [x28, #986]",
         "lsl x20, x20, #3",
@@ -3332,7 +3332,7 @@
         "sub x10, x10, #0x1 (1)",
         "ccmp x27, x26, #nzcv, ne",
         "b.eq #-0x18",
-        "eor w20, w27, w26",
+        "eor x20, x27, x26",
         "lsl w0, w27, #24",
         "cmp w0, w26, lsl #24",
         "sub w26, w27, w26",
@@ -3363,7 +3363,7 @@
         "sub x10, x10, #0x2 (2)",
         "ccmp x27, x26, #nzcv, ne",
         "b.eq #-0x18",
-        "eor w20, w27, w26",
+        "eor x20, x27, x26",
         "lsl w0, w27, #16",
         "cmp w0, w26, lsl #16",
         "sub w26, w27, w26",
@@ -3394,7 +3394,7 @@
         "sub x10, x10, #0x4 (4)",
         "ccmp x27, x26, #nzcv, ne",
         "b.eq #-0x18",
-        "eor w20, w27, w26",
+        "eor x20, x27, x26",
         "subs w26, w27, w26",
         "mov x27, x20"
       ]
@@ -3423,7 +3423,7 @@
         "sub x10, x10, #0x8 (8)",
         "ccmp x27, x26, #nzcv, ne",
         "b.eq #-0x18",
-        "eor w20, w27, w26",
+        "eor x20, x27, x26",
         "subs x26, x27, x26",
         "mov x27, x20"
       ]
@@ -3452,7 +3452,7 @@
         "sub x10, x10, #0x1 (1)",
         "ccmp x27, x26, #nZcv, ne",
         "b.ne #-0x18",
-        "eor w20, w27, w26",
+        "eor x20, x27, x26",
         "lsl w0, w27, #24",
         "cmp w0, w26, lsl #24",
         "sub w26, w27, w26",
@@ -3483,7 +3483,7 @@
         "sub x10, x10, #0x2 (2)",
         "ccmp x27, x26, #nZcv, ne",
         "b.ne #-0x18",
-        "eor w20, w27, w26",
+        "eor x20, x27, x26",
         "lsl w0, w27, #16",
         "cmp w0, w26, lsl #16",
         "sub w26, w27, w26",
@@ -3514,7 +3514,7 @@
         "sub x10, x10, #0x4 (4)",
         "ccmp x27, x26, #nZcv, ne",
         "b.ne #-0x18",
-        "eor w20, w27, w26",
+        "eor x20, x27, x26",
         "subs w26, w27, w26",
         "mov x27, x20"
       ]
@@ -3543,7 +3543,7 @@
         "sub x10, x10, #0x8 (8)",
         "ccmp x27, x26, #nZcv, ne",
         "b.ne #-0x18",
-        "eor w20, w27, w26",
+        "eor x20, x27, x26",
         "subs x26, x27, x26",
         "mov x27, x20"
       ]
@@ -4034,7 +4034,7 @@
       "Comment": "0xae",
       "ExpectedArm64ASM": [
         "ldrb w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #24",
         "cmp w0, w20, lsl #24",
         "sub w26, w4, w20",
@@ -4047,7 +4047,7 @@
       "Comment": "0xaf",
       "ExpectedArm64ASM": [
         "ldrh w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #16",
         "cmp w0, w20, lsl #16",
         "sub w26, w4, w20",
@@ -4060,7 +4060,7 @@
       "Comment": "0xaf",
       "ExpectedArm64ASM": [
         "ldr w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs w26, w4, w20",
         "ldrsb x20, [x28, #986]",
         "add x11, x11, x20, lsl #2"
@@ -4071,7 +4071,7 @@
       "Comment": "0xaf",
       "ExpectedArm64ASM": [
         "ldr x20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs x26, x4, x20",
         "ldrsb x20, [x28, #986]",
         "add x11, x11, x20, lsl #3"
@@ -4087,7 +4087,7 @@
         "b #+0x2c",
         "cbz x7, #+0x24",
         "ldrb w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #24",
         "cmp w0, w20, lsl #24",
         "sub w26, w4, w20",
@@ -4097,7 +4097,7 @@
         "b #+0x28",
         "cbz x7, #+0x24",
         "ldrb w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #24",
         "cmp w0, w20, lsl #24",
         "sub w26, w4, w20",
@@ -4116,7 +4116,7 @@
         "b #+0x2c",
         "cbz x7, #+0x24",
         "ldrh w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #16",
         "cmp w0, w20, lsl #16",
         "sub w26, w4, w20",
@@ -4126,7 +4126,7 @@
         "b #+0x28",
         "cbz x7, #+0x24",
         "ldrh w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #16",
         "cmp w0, w20, lsl #16",
         "sub w26, w4, w20",
@@ -4145,7 +4145,7 @@
         "b #+0x24",
         "cbz x7, #+0x1c",
         "ldr w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs w26, w4, w20",
         "sub x7, x7, #0x1 (1)",
         "add x11, x11, #0x4 (4)",
@@ -4153,7 +4153,7 @@
         "b #+0x20",
         "cbz x7, #+0x1c",
         "ldr w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs w26, w4, w20",
         "sub x7, x7, #0x1 (1)",
         "sub x11, x11, #0x4 (4)",
@@ -4170,7 +4170,7 @@
         "b #+0x24",
         "cbz x7, #+0x1c",
         "ldr x20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs x26, x4, x20",
         "sub x7, x7, #0x1 (1)",
         "add x11, x11, #0x8 (8)",
@@ -4178,7 +4178,7 @@
         "b #+0x20",
         "cbz x7, #+0x1c",
         "ldr x20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs x26, x4, x20",
         "sub x7, x7, #0x1 (1)",
         "sub x11, x11, #0x8 (8)",
@@ -4195,7 +4195,7 @@
         "b #+0x2c",
         "cbz x7, #+0x24",
         "ldrb w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #24",
         "cmp w0, w20, lsl #24",
         "sub w26, w4, w20",
@@ -4205,7 +4205,7 @@
         "b #+0x28",
         "cbz x7, #+0x24",
         "ldrb w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #24",
         "cmp w0, w20, lsl #24",
         "sub w26, w4, w20",
@@ -4224,7 +4224,7 @@
         "b #+0x2c",
         "cbz x7, #+0x24",
         "ldrh w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #16",
         "cmp w0, w20, lsl #16",
         "sub w26, w4, w20",
@@ -4234,7 +4234,7 @@
         "b #+0x28",
         "cbz x7, #+0x24",
         "ldrh w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "lsl w0, w4, #16",
         "cmp w0, w20, lsl #16",
         "sub w26, w4, w20",
@@ -4253,7 +4253,7 @@
         "b #+0x24",
         "cbz x7, #+0x1c",
         "ldr w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs w26, w4, w20",
         "sub x7, x7, #0x1 (1)",
         "add x11, x11, #0x4 (4)",
@@ -4261,7 +4261,7 @@
         "b #+0x20",
         "cbz x7, #+0x1c",
         "ldr w20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs w26, w4, w20",
         "sub x7, x7, #0x1 (1)",
         "sub x11, x11, #0x4 (4)",
@@ -4278,7 +4278,7 @@
         "b #+0x24",
         "cbz x7, #+0x1c",
         "ldr x20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs x26, x4, x20",
         "sub x7, x7, #0x1 (1)",
         "add x11, x11, #0x8 (8)",
@@ -4286,7 +4286,7 @@
         "b #+0x20",
         "cbz x7, #+0x1c",
         "ldr x20, [x11]",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs x26, x4, x20",
         "sub x7, x7, #0x1 (1)",
         "sub x11, x11, #0x8 (8)",
diff --git a/unittests/InstructionCountCI/Primary_32Bit.json b/unittests/InstructionCountCI/Primary_32Bit.json
index 59f1110f44..2c27708d4c 100644
--- a/unittests/InstructionCountCI/Primary_32Bit.json
+++ b/unittests/InstructionCountCI/Primary_32Bit.json
@@ -98,7 +98,7 @@
         "and x22, x20, #0xf",
         "cmp x22, #0x9 (9)",
         "cset x22, hi",
-        "eor w23, w27, w26",
+        "eor x23, x27, x26",
         "ubfx w23, w23, #4, #1",
         "orr x22, x23, x22",
         "cmp x20, #0x99 (153)",
@@ -127,7 +127,7 @@
         "and x22, x20, #0xf",
         "cmp x22, #0x9 (9)",
         "cset x22, hi",
-        "eor w23, w27, w26",
+        "eor x23, x27, x26",
         "ubfx w23, w23, #4, #1",
         "orr x22, x23, x22",
         "cmp x20, #0x99 (153)",
@@ -158,7 +158,7 @@
         "and x20, x4, #0xf",
         "cmp x20, #0x9 (9)",
         "cset x20, hi",
-        "eor w21, w27, w26",
+        "eor x21, x27, x26",
         "ubfx w21, w21, #4, #1",
         "orr x20, x21, x20",
         "cmp wzr, w20",
@@ -177,7 +177,7 @@
         "and x20, x4, #0xf",
         "cmp x20, #0x9 (9)",
         "cset x20, hi",
-        "eor w21, w27, w26",
+        "eor x21, x27, x26",
         "ubfx w21, w21, #4, #1",
         "orr x20, x21, x20",
         "cmp wzr, w20",
diff --git a/unittests/InstructionCountCI/Secondary.json b/unittests/InstructionCountCI/Secondary.json
index e3b85a382a..8013f37de9 100644
--- a/unittests/InstructionCountCI/Secondary.json
+++ b/unittests/InstructionCountCI/Secondary.json
@@ -1965,7 +1965,7 @@
         "mov w1, w21",
         "casalb w1, w20, [x4]",
         "mov w20, w1",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "lsl w0, w21, #24",
         "cmp w0, w20, lsl #24",
         "sub w26, w21, w20",
@@ -1992,7 +1992,7 @@
         "mov w1, w21",
         "casalh w1, w20, [x4]",
         "mov w20, w1",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "lsl w0, w21, #16",
         "cmp w0, w20, lsl #16",
         "sub w26, w21, w20",
@@ -2004,7 +2004,7 @@
       "Comment": "0x0f 0xb1",
       "ExpectedArm64ASM": [
         "mov w20, w4",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs w26, w4, w20",
         "mov x4, x6"
       ]
@@ -2018,7 +2018,7 @@
         "mov w1, w21",
         "casal w1, w20, [x4]",
         "mov w20, w1",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "subs w26, w21, w20",
         "csel x4, x4, x20, eq"
       ]
@@ -2039,7 +2039,7 @@
         "mov x1, x4",
         "casal x1, x6, [x4]",
         "mov x20, x1",
-        "eor w27, w4, w20",
+        "eor x27, x4, x20",
         "subs x26, x4, x20",
         "mov x4, x20"
       ]
@@ -2563,7 +2563,7 @@
       "ExpectedArm64ASM": [
         "uxtb w20, w4",
         "uxtb w21, w6",
-        "eor w27, w20, w21",
+        "eor x27, x20, x21",
         "lsl w0, w20, #24",
         "cmn w0, w21, lsl #24",
         "add w26, w20, w21",
@@ -2580,7 +2580,7 @@
       "ExpectedArm64ASM": [
         "uxtb w20, w6",
         "ldaddalb w20, w21, [x4]",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "lsl w0, w21, #24",
         "cmn w0, w20, lsl #24",
         "add w26, w21, w20",
@@ -2596,7 +2596,7 @@
       "ExpectedArm64ASM": [
         "uxth w20, w4",
         "uxth w21, w6",
-        "eor w27, w20, w21",
+        "eor x27, x20, x21",
         "lsl w0, w20, #16",
         "cmn w0, w21, lsl #16",
         "add w26, w20, w21",
@@ -2613,7 +2613,7 @@
       "ExpectedArm64ASM": [
         "uxth w20, w6",
         "ldaddalh w20, w21, [x4]",
-        "eor w27, w21, w20",
+        "eor x27, x21, x20",
         "lsl w0, w21, #16",
         "cmn w0, w20, lsl #16",
         "add w26, w21, w20",
@@ -2629,7 +2629,7 @@
       "ExpectedArm64ASM": [
         "mov w20, w4",
         "mov w21, w6",
-        "eor w27, w20, w21",
+        "eor x27, x20, x21",
         "adds w26, w20, w21",
         "mrs x21, nzcv",
         "eor w21, w21, #0x20000000",
@@ -2644,7 +2644,7 @@
       "ExpectedArm64ASM": [
         "mov w20, w6",
         "ldaddal w20, w6, [x4]",
-        "eor w27, w6, w20",
+        "eor x27, x6, x20",
         "adds w26, w6, w20",
         "mrs x20, nzcv",
         "eor w20, w20, #0x20000000",
@@ -2655,7 +2655,7 @@
       "ExpectedInstructionCount": 7,
       "Comment": "0x0f 0xc1",
       "ExpectedArm64ASM": [
-        "eor w27, w4, w6",
+        "eor x27, x4, x6",
         "adds x26, x4, x6",
         "mrs x20, nzcv",
         "eor w20, w20, #0x20000000",
@@ -2669,7 +2669,7 @@
       "Comment": "0x0f 0xc1",
       "ExpectedArm64ASM": [
         "ldaddal x6, x20, [x4]",
-        "eor w27, w20, w6",
+        "eor x27, x20, x6",
         "adds x26, x20, x6",
         "mrs x21, nzcv",
         "eor w21, w21, #0x20000000",