diff --git a/unittests/InstructionCountCI/AVX128/VEX_map1.json b/unittests/InstructionCountCI/AVX128/VEX_map1.json index 85f0f3f6c1..d95a722156 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map1.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map1.json @@ -2891,8 +2891,8 @@ "fcmp s16, s17", "mov w27, #0x0", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "vucomisd xmm0, xmm1": { @@ -2904,8 +2904,8 @@ "fcmp d16, d17", "mov w27, #0x0", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "vcomiss xmm0, xmm1": { @@ -2917,8 +2917,8 @@ "fcmp s16, s17", "mov w27, #0x0", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "vcomisd xmm0, xmm1": { @@ -2930,8 +2930,8 @@ "fcmp d16, d17", "mov w27, #0x0", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "vaddps xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/FlagM/FlagOpts.json b/unittests/InstructionCountCI/FlagM/FlagOpts.json index d8919c5fc5..e4c373942c 100644 --- a/unittests/InstructionCountCI/FlagM/FlagOpts.json +++ b/unittests/InstructionCountCI/FlagM/FlagOpts.json @@ -203,27 +203,21 @@ }, "Variable rotate-through-carry dead": { "x86InstructionCount": 2, - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 11, "x86Insts": [ "rcr rax, cl", "test rax, rdx" ], "ExpectedArm64ASM": [ "and x20, x7, #0x3f", - "cbz x20, #+0x38", + "cbz x20, #+0x20", "lsr x20, x4, x7", "cset w21, lo", "neg x22, x7", "lsl x23, x4, x22", "orr x20, x20, x23, lsl #1", - "sub x23, x7, #0x1 (1)", - "lsr x23, x4, x23", - "eor x23, x23, #0x1", - "rmif x23, #63, #nzCv", "lsl x21, x21, x22", "orr x4, x20, x21", - "eor x20, x4, x4, lsr #1", - "rmif x20, #62, #nzcV", "ands x26, x4, x5", "cfinv" ] @@ -290,10 +284,10 @@ "ExpectedArm64ASM": [ "and w26, w4, w6", "mov x4, x26", - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", - "and x20, x20, #0x1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", + "and w20, w20, #0x1", "bfxil x7, x20, #0, #8", "cmn wzr, w7, lsl #24", "cfinv", @@ -302,7 +296,7 @@ }, "UCOMISS use only PF": { "x86InstructionCount": 3, - "ExpectedInstructionCount": 8, + "ExpectedInstructionCount": 4, "x86Insts": [ "ucomiss xmm0, xmm1", "setnp cl", @@ -311,11 +305,7 @@ "ExpectedArm64ASM": [ "fcmp s16, s17", "cset w26, vc", - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", - "and x20, x20, #0x1", - "bfxil x7, x20, #0, #8", + "bfxil x7, x26, #0, #8", "subs x26, x4, #0x0 (0)" ] }, @@ -328,7 +318,7 @@ "test cl, cl" ], "ExpectedArm64ASM": [ - "cmn wzr, w4, lsl #16", + "tst w4, #0xffff", "cset x20, eq", "bfxil x4, x20, #0, #8", "cmn wzr, w7, lsl #24", @@ -345,10 +335,10 @@ "test cl, cl" ], "ExpectedArm64ASM": [ - "and w20, w4, w6", - "cmn wzr, w20, lsl #16", - "cset x21, eq", - "bfxil x4, x21, #0, #8", + "and w0, w4, w6", + "tst w0, #0xffff", + "cset x20, eq", + "bfxil x4, x20, #0, #8", "cmn wzr, w7, lsl #24", "cfinv", "mov x26, x7" @@ -364,10 +354,10 @@ ], "ExpectedArm64ASM": [ "mov w20, #0x89", - "and w20, w4, w20", - "cmn wzr, w20, lsl #24", - "cset x21, ne", - "bfxil x4, x21, #0, #8", + "and w0, w4, w20", + "tst w0, #0xff", + "cset x20, ne", + "bfxil x4, x20, #0, #8", "cmn wzr, w7, lsl #24", "cfinv", "mov x26, x7" diff --git a/unittests/InstructionCountCI/FlagM/Primary.json b/unittests/InstructionCountCI/FlagM/Primary.json index 205fe0dd11..9202ecda7b 100644 --- a/unittests/InstructionCountCI/FlagM/Primary.json +++ b/unittests/InstructionCountCI/FlagM/Primary.json @@ -1728,9 +1728,9 @@ "orr x20, x20, x21, lsl #20", "ldrb w21, [x28, #997]", "orr x20, x20, x21, lsl #21", - "eor w21, w26, w26, lsr #4", - "eor w21, w21, w21, lsr #2", - "eor w21, w21, w21, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w21, w0, w0, lsr #1", "orr x21, x21, #0xfffffffffffffffe", "orn x20, x20, x21, ror #62", "mrs x21, nzcv", @@ -1773,9 +1773,9 @@ "orr x20, x20, x21, lsl #20", "ldrb w21, [x28, #997]", "orr x20, x20, x21, lsl #21", - "eor w21, w26, w26, lsr #4", - "eor w21, w21, w21, lsr #2", - "eor w21, w21, w21, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w21, w0, w0, lsr #1", "orr x21, x21, #0xfffffffffffffffe", "orn x20, x20, x21, ror #62", "mrs x21, nzcv", @@ -1847,9 +1847,9 @@ "eor w21, w27, w26", "ubfx w21, w21, #4, #1", "orr x20, x20, x21, lsl #4", - "eor w21, w26, w26, lsr #4", - "eor w21, w21, w21, lsr #2", - "eor w21, w21, w21, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w21, w0, w0, lsr #1", "orr x21, x21, #0xfffffffffffffffe", "orn x20, x20, x21, ror #62", "mrs x21, nzcv", diff --git a/unittests/InstructionCountCI/FlagM/Secondary.json b/unittests/InstructionCountCI/FlagM/Secondary.json index 3139496772..423ca77570 100644 --- a/unittests/InstructionCountCI/FlagM/Secondary.json +++ b/unittests/InstructionCountCI/FlagM/Secondary.json @@ -257,9 +257,9 @@ "ExpectedInstructionCount": 8, "Comment": "0x0f 0x4a", "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "mrs x21, nzcv", "tst w20, #0x1", "csel w20, w6, w4, ne", @@ -271,9 +271,9 @@ "ExpectedInstructionCount": 7, "Comment": "0x0f 0x4a", "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "mrs x21, nzcv", "tst w20, #0x1", "csel w4, w6, w4, ne", @@ -284,9 +284,9 @@ "ExpectedInstructionCount": 7, "Comment": "0x0f 0x4a", "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "mrs x21, nzcv", "tst w20, #0x1", "csel x4, x6, x4, ne", @@ -297,9 +297,9 @@ "ExpectedInstructionCount": 8, "Comment": "0x0f 0x4b", "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "mrs x21, nzcv", "tst w20, #0x1", "csel w20, w6, w4, ne", @@ -311,9 +311,9 @@ "ExpectedInstructionCount": 7, "Comment": "0x0f 0x4b", "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "mrs x21, nzcv", "tst w20, #0x1", "csel w4, w6, w4, ne", @@ -324,9 +324,9 @@ "ExpectedInstructionCount": 7, "Comment": "0x0f 0x4b", "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "mrs x21, nzcv", "tst w20, #0x1", "csel x4, x6, x4, ne", @@ -505,10 +505,10 @@ "ExpectedInstructionCount": 5, "Comment": "0x0f 0x9a", "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", - "and x20, x20, #0x1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", + "and w20, w20, #0x1", "bfxil x4, x20, #0, #8" ] }, @@ -516,10 +516,10 @@ "ExpectedInstructionCount": 5, "Comment": "0x0f 0x9b", "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", - "and x20, x20, #0x1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", + "and w20, w20, #0x1", "bfxil x4, x20, #0, #8" ] }, diff --git a/unittests/InstructionCountCI/FlagM/x87.json b/unittests/InstructionCountCI/FlagM/x87.json index 2dc678dd70..2b9b8b1185 100644 --- a/unittests/InstructionCountCI/FlagM/x87.json +++ b/unittests/InstructionCountCI/FlagM/x87.json @@ -6439,9 +6439,9 @@ "0xda 11b 0xd8 /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -6460,9 +6460,9 @@ "0xda 11b 0xd9 /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -6483,9 +6483,9 @@ "0xda 11b 0xda /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -6506,9 +6506,9 @@ "0xda 11b 0xdb /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -6529,9 +6529,9 @@ "0xda 11b 0xdc /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -6552,9 +6552,9 @@ "0xda 11b 0xdd /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -6575,9 +6575,9 @@ "0xda 11b 0xde /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -6598,9 +6598,9 @@ "0xda 11b 0xdf /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -7377,9 +7377,9 @@ "0xdb 11b 0xd8 /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -7398,9 +7398,9 @@ "0xdb 11b 0xd9 /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -7421,9 +7421,9 @@ "0xdb 11b 0xda /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -7444,9 +7444,9 @@ "0xdb 11b 0xdb /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -7467,9 +7467,9 @@ "0xdb 11b 0xdc /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -7490,9 +7490,9 @@ "0xdb 11b 0xdd /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -7513,9 +7513,9 @@ "0xdb 11b 0xde /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -7536,9 +7536,9 @@ "0xdb 11b 0xdf /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", diff --git a/unittests/InstructionCountCI/FlagM/x87_f64.json b/unittests/InstructionCountCI/FlagM/x87_f64.json index 9d2b28fca7..77a203b7ce 100644 --- a/unittests/InstructionCountCI/FlagM/x87_f64.json +++ b/unittests/InstructionCountCI/FlagM/x87_f64.json @@ -3790,9 +3790,9 @@ "0xda 11b 0xd8 /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -3811,9 +3811,9 @@ "0xda 11b 0xd9 /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -3834,9 +3834,9 @@ "0xda 11b 0xda /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -3857,9 +3857,9 @@ "0xda 11b 0xdb /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -3880,9 +3880,9 @@ "0xda 11b 0xdc /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -3903,9 +3903,9 @@ "0xda 11b 0xdd /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -3926,9 +3926,9 @@ "0xda 11b 0xde /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -3949,9 +3949,9 @@ "0xda 11b 0xdf /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -4658,9 +4658,9 @@ "0xdb 11b 0xd8 /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -4679,9 +4679,9 @@ "0xdb 11b 0xd9 /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -4702,9 +4702,9 @@ "0xdb 11b 0xda /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -4725,9 +4725,9 @@ "0xdb 11b 0xdb /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -4748,9 +4748,9 @@ "0xdb 11b 0xdc /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -4771,9 +4771,9 @@ "0xdb 11b 0xdd /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -4794,9 +4794,9 @@ "0xdb 11b 0xde /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -4817,9 +4817,9 @@ "0xdb 11b 0xdf /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", diff --git a/unittests/InstructionCountCI/Primary.json b/unittests/InstructionCountCI/Primary.json index 367d7d6cf0..008fb83622 100644 --- a/unittests/InstructionCountCI/Primary.json +++ b/unittests/InstructionCountCI/Primary.json @@ -2625,9 +2625,9 @@ "orr x20, x20, x21, lsl #20", "ldrb w21, [x28, #997]", "orr x20, x20, x21, lsl #21", - "eor w21, w26, w26, lsr #4", - "eor w21, w21, w21, lsr #2", - "eor w21, w21, w21, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w21, w0, w0, lsr #1", "orr x21, x21, #0xfffffffffffffffe", "orn x20, x20, x21, ror #62", "mrs x21, nzcv", @@ -2670,9 +2670,9 @@ "orr x20, x20, x21, lsl #20", "ldrb w21, [x28, #997]", "orr x20, x20, x21, lsl #21", - "eor w21, w26, w26, lsr #4", - "eor w21, w21, w21, lsr #2", - "eor w21, w21, w21, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w21, w0, w0, lsr #1", "orr x21, x21, #0xfffffffffffffffe", "orn x20, x20, x21, ror #62", "mrs x21, nzcv", @@ -2754,9 +2754,9 @@ "eor w21, w27, w26", "ubfx w21, w21, #4, #1", "orr x20, x20, x21, lsl #4", - "eor w21, w26, w26, lsr #4", - "eor w21, w21, w21, lsr #2", - "eor w21, w21, w21, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w21, w0, w0, lsr #1", "orr x21, x21, #0xfffffffffffffffe", "orn x20, x20, x21, ror #62", "mrs x21, nzcv", diff --git a/unittests/InstructionCountCI/Secondary.json b/unittests/InstructionCountCI/Secondary.json index 6fe5947ddf..92cbb0127f 100644 --- a/unittests/InstructionCountCI/Secondary.json +++ b/unittests/InstructionCountCI/Secondary.json @@ -210,8 +210,8 @@ "fcmp s16, s17", "mov w27, #0x0", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "comiss xmm0, xmm1": { @@ -221,8 +221,8 @@ "fcmp s16, s17", "mov w27, #0x0", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "rdtsc": { @@ -459,9 +459,9 @@ "ExpectedInstructionCount": 8, "Comment": "0x0f 0x4a", "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "mrs x21, nzcv", "tst w20, #0x1", "csel w20, w6, w4, ne", @@ -473,9 +473,9 @@ "ExpectedInstructionCount": 7, "Comment": "0x0f 0x4a", "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "mrs x21, nzcv", "tst w20, #0x1", "csel w4, w6, w4, ne", @@ -486,9 +486,9 @@ "ExpectedInstructionCount": 7, "Comment": "0x0f 0x4a", "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "mrs x21, nzcv", "tst w20, #0x1", "csel x4, x6, x4, ne", @@ -499,9 +499,9 @@ "ExpectedInstructionCount": 8, "Comment": "0x0f 0x4b", "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "mrs x21, nzcv", "tst w20, #0x1", "csel w20, w6, w4, ne", @@ -513,9 +513,9 @@ "ExpectedInstructionCount": 7, "Comment": "0x0f 0x4b", "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "mrs x21, nzcv", "tst w20, #0x1", "csel w4, w6, w4, ne", @@ -526,9 +526,9 @@ "ExpectedInstructionCount": 7, "Comment": "0x0f 0x4b", "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "mrs x21, nzcv", "tst w20, #0x1", "csel x4, x6, x4, ne", @@ -1222,10 +1222,10 @@ "ExpectedInstructionCount": 5, "Comment": "0x0f 0x9a", "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", - "and x20, x20, #0x1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", + "and w20, w20, #0x1", "bfxil x4, x20, #0, #8" ] }, @@ -1233,10 +1233,10 @@ "ExpectedInstructionCount": 5, "Comment": "0x0f 0x9b", "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", - "and x20, x20, #0x1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", + "and w20, w20, #0x1", "bfxil x4, x20, #0, #8" ] }, diff --git a/unittests/InstructionCountCI/Secondary_OpSize.json b/unittests/InstructionCountCI/Secondary_OpSize.json index 0d2cd86c39..fb7baad182 100644 --- a/unittests/InstructionCountCI/Secondary_OpSize.json +++ b/unittests/InstructionCountCI/Secondary_OpSize.json @@ -148,8 +148,8 @@ "fcmp d16, d17", "mov w27, #0x0", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "comisd xmm0, xmm1": { @@ -159,8 +159,8 @@ "fcmp d16, d17", "mov w27, #0x0", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "movmskpd eax, xmm0": { diff --git a/unittests/InstructionCountCI/VEX_map1.json b/unittests/InstructionCountCI/VEX_map1.json index 5eea168930..2ad2dc6fd0 100644 --- a/unittests/InstructionCountCI/VEX_map1.json +++ b/unittests/InstructionCountCI/VEX_map1.json @@ -3361,8 +3361,8 @@ "fcmp s16, s17", "mov w27, #0x0", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "vucomisd xmm0, xmm1": { @@ -3374,8 +3374,8 @@ "fcmp d16, d17", "mov w27, #0x0", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "vcomiss xmm0, xmm1": { @@ -3387,8 +3387,8 @@ "fcmp s16, s17", "mov w27, #0x0", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "vcomisd xmm0, xmm1": { @@ -3400,8 +3400,8 @@ "fcmp d16, d17", "mov w27, #0x0", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "vaddps xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/x87.json b/unittests/InstructionCountCI/x87.json index 8f0540d35a..f6f1067a8f 100644 --- a/unittests/InstructionCountCI/x87.json +++ b/unittests/InstructionCountCI/x87.json @@ -6438,9 +6438,9 @@ "0xda 11b 0xd8 /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -6459,9 +6459,9 @@ "0xda 11b 0xd9 /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -6482,9 +6482,9 @@ "0xda 11b 0xda /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -6505,9 +6505,9 @@ "0xda 11b 0xdb /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -6528,9 +6528,9 @@ "0xda 11b 0xdc /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -6551,9 +6551,9 @@ "0xda 11b 0xdd /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -6574,9 +6574,9 @@ "0xda 11b 0xde /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -6597,9 +6597,9 @@ "0xda 11b 0xdf /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -7376,9 +7376,9 @@ "0xdb 11b 0xd8 /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -7397,9 +7397,9 @@ "0xdb 11b 0xd9 /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -7420,9 +7420,9 @@ "0xdb 11b 0xda /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -7443,9 +7443,9 @@ "0xdb 11b 0xdb /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -7466,9 +7466,9 @@ "0xdb 11b 0xdc /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -7489,9 +7489,9 @@ "0xdb 11b 0xdd /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -7512,9 +7512,9 @@ "0xdb 11b 0xde /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -7535,9 +7535,9 @@ "0xdb 11b 0xdf /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", diff --git a/unittests/InstructionCountCI/x87_f64.json b/unittests/InstructionCountCI/x87_f64.json index af6213bf5e..b91037d209 100644 --- a/unittests/InstructionCountCI/x87_f64.json +++ b/unittests/InstructionCountCI/x87_f64.json @@ -3810,9 +3810,9 @@ "0xda 11b 0xd8 /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -3831,9 +3831,9 @@ "0xda 11b 0xd9 /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -3854,9 +3854,9 @@ "0xda 11b 0xda /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -3877,9 +3877,9 @@ "0xda 11b 0xdb /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -3900,9 +3900,9 @@ "0xda 11b 0xdc /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -3923,9 +3923,9 @@ "0xda 11b 0xdd /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -3946,9 +3946,9 @@ "0xda 11b 0xde /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -3969,9 +3969,9 @@ "0xda 11b 0xdf /1" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eon w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eon w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -4679,9 +4679,9 @@ "0xdb 11b 0xd8 /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -4700,9 +4700,9 @@ "0xdb 11b 0xd9 /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -4723,9 +4723,9 @@ "0xdb 11b 0xda /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -4746,9 +4746,9 @@ "0xdb 11b 0xdb /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -4769,9 +4769,9 @@ "0xdb 11b 0xdc /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -4792,9 +4792,9 @@ "0xdb 11b 0xdd /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -4815,9 +4815,9 @@ "0xdb 11b 0xde /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -4838,9 +4838,9 @@ "0xdb 11b 0xdf /3" ], "ExpectedArm64ASM": [ - "eor w20, w26, w26, lsr #4", - "eor w20, w20, w20, lsr #2", - "eor w20, w20, w20, lsr #1", + "eor w0, w26, w26, lsr #4", + "eor w0, w0, w0, lsr #2", + "eor w20, w0, w0, lsr #1", "sbfx x20, x20, #0, #1", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", @@ -4899,8 +4899,8 @@ "ldr d3, [x0, #1040]", "fcmp d3, d2", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "fucomi st0, st1": { @@ -4918,8 +4918,8 @@ "ldr d3, [x0, #1040]", "fcmp d3, d2", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "fucomi st0, st2": { @@ -4937,8 +4937,8 @@ "ldr d3, [x0, #1040]", "fcmp d3, d2", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "fucomi st0, st3": { @@ -4956,8 +4956,8 @@ "ldr d3, [x0, #1040]", "fcmp d3, d2", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "fucomi st0, st4": { @@ -4975,8 +4975,8 @@ "ldr d3, [x0, #1040]", "fcmp d3, d2", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "fucomi st0, st5": { @@ -4994,8 +4994,8 @@ "ldr d3, [x0, #1040]", "fcmp d3, d2", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "fucomi st0, st6": { @@ -5013,8 +5013,8 @@ "ldr d3, [x0, #1040]", "fcmp d3, d2", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "fucomi st0, st7": { @@ -5032,8 +5032,8 @@ "ldr d3, [x0, #1040]", "fcmp d3, d2", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "fcomi st0, st0": { @@ -5049,8 +5049,8 @@ "ldr d3, [x0, #1040]", "fcmp d3, d2", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "fcomi st0, st1": { @@ -5068,8 +5068,8 @@ "ldr d3, [x0, #1040]", "fcmp d3, d2", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "fcomi st0, st2": { @@ -5087,8 +5087,8 @@ "ldr d3, [x0, #1040]", "fcmp d3, d2", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "fcomi st0, st3": { @@ -5106,8 +5106,8 @@ "ldr d3, [x0, #1040]", "fcmp d3, d2", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "fcomi st0, st4": { @@ -5125,8 +5125,8 @@ "ldr d3, [x0, #1040]", "fcmp d3, d2", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "fcomi st0, st5": { @@ -5144,8 +5144,8 @@ "ldr d3, [x0, #1040]", "fcmp d3, d2", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "fcomi st0, st6": { @@ -5163,8 +5163,8 @@ "ldr d3, [x0, #1040]", "fcmp d3, d2", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "fcomi st0, st7": { @@ -5182,8 +5182,8 @@ "ldr d3, [x0, #1040]", "fcmp d3, d2", "cset w26, vc", - "csetm x20, eq", - "ccmn x26, x20, #nzCv, le" + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le" ] }, "fadd qword [rax]": { @@ -9693,8 +9693,8 @@ "fcmp d3, d2", "mov w21, #0x1", "cset w26, vc", - "csetm x22, eq", - "ccmn x26, x22, #nzCv, le", + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le", "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", @@ -9720,8 +9720,8 @@ "ldr d3, [x0, #1040]", "fcmp d3, d2", "cset w26, vc", - "csetm x22, eq", - "ccmn x26, x22, #nzCv, le", + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le", "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", @@ -9747,8 +9747,8 @@ "fcmp d3, d2", "mov w21, #0x1", "cset w26, vc", - "csetm x22, eq", - "ccmn x26, x22, #nzCv, le", + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le", "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", @@ -9774,8 +9774,8 @@ "fcmp d3, d2", "mov w21, #0x1", "cset w26, vc", - "csetm x22, eq", - "ccmn x26, x22, #nzCv, le", + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le", "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", @@ -9801,8 +9801,8 @@ "fcmp d3, d2", "mov w21, #0x1", "cset w26, vc", - "csetm x22, eq", - "ccmn x26, x22, #nzCv, le", + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le", "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", @@ -9828,8 +9828,8 @@ "fcmp d3, d2", "mov w21, #0x1", "cset w26, vc", - "csetm x22, eq", - "ccmn x26, x22, #nzCv, le", + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le", "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", @@ -9855,8 +9855,8 @@ "fcmp d3, d2", "mov w21, #0x1", "cset w26, vc", - "csetm x22, eq", - "ccmn x26, x22, #nzCv, le", + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le", "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", @@ -9882,8 +9882,8 @@ "fcmp d3, d2", "mov w21, #0x1", "cset w26, vc", - "csetm x22, eq", - "ccmn x26, x22, #nzCv, le", + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le", "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", @@ -9907,8 +9907,8 @@ "fcmp d3, d2", "mov w21, #0x1", "cset w26, vc", - "csetm x22, eq", - "ccmn x26, x22, #nzCv, le", + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le", "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", @@ -9934,8 +9934,8 @@ "ldr d3, [x0, #1040]", "fcmp d3, d2", "cset w26, vc", - "csetm x22, eq", - "ccmn x26, x22, #nzCv, le", + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le", "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", @@ -9961,8 +9961,8 @@ "fcmp d3, d2", "mov w21, #0x1", "cset w26, vc", - "csetm x22, eq", - "ccmn x26, x22, #nzCv, le", + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le", "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", @@ -9988,8 +9988,8 @@ "fcmp d3, d2", "mov w21, #0x1", "cset w26, vc", - "csetm x22, eq", - "ccmn x26, x22, #nzCv, le", + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le", "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", @@ -10015,8 +10015,8 @@ "fcmp d3, d2", "mov w21, #0x1", "cset w26, vc", - "csetm x22, eq", - "ccmn x26, x22, #nzCv, le", + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le", "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", @@ -10042,8 +10042,8 @@ "fcmp d3, d2", "mov w21, #0x1", "cset w26, vc", - "csetm x22, eq", - "ccmn x26, x22, #nzCv, le", + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le", "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", @@ -10069,8 +10069,8 @@ "fcmp d3, d2", "mov w21, #0x1", "cset w26, vc", - "csetm x22, eq", - "ccmn x26, x22, #nzCv, le", + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le", "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", @@ -10096,8 +10096,8 @@ "fcmp d3, d2", "mov w21, #0x1", "cset w26, vc", - "csetm x22, eq", - "ccmn x26, x22, #nzCv, le", + "csetm x0, eq", + "ccmn x26, x0, #nzCv, le", "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21",