From 3e7e3ea2f4746570ff4cc8b2dc80857d981d44e3 Mon Sep 17 00:00:00 2001 From: Katetc <katec@ucar.edu> Date: Thu, 7 Dec 2023 16:38:29 -0700 Subject: [PATCH 1/5] Point to updated PUMAS external --- Externals_CAM.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Externals_CAM.cfg b/Externals_CAM.cfg index 8dcc95cb66..b66e4a2d25 100644 --- a/Externals_CAM.cfg +++ b/Externals_CAM.cfg @@ -32,7 +32,7 @@ required = True local_path = src/physics/pumas protocol = git repo_url = https://github.com/ESCOMP/PUMAS -tag = pumas_cam-release_v1.29 +tag = pumas_cam-release_v1.35 required = True [pumas-frozen] From 9743f9dbd58e9f30d661911e7a947a326dded760 Mon Sep 17 00:00:00 2001 From: Cheryl Craig <cacraig@ucar.edu> Date: Tue, 2 Jan 2024 14:46:03 -0700 Subject: [PATCH 2/5] Remove cheyenne testing and make all cheyenne tests be derecho ones --- cime_config/testdefs/testlist_cam.xml | 674 +++++++++++++------------- test/system/test_driver.sh | 75 +-- 2 files changed, 341 insertions(+), 408 deletions(-) diff --git a/cime_config/testdefs/testlist_cam.xml b/cime_config/testdefs/testlist_cam.xml index 2285fcaf4b..26b1eff3d7 100644 --- a/cime_config/testdefs/testlist_cam.xml +++ b/cime_config/testdefs/testlist_cam.xml @@ -7,11 +7,11 @@ <test compset="F2000climo" grid="f09_f09_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cime_baselines"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="aux_cam_short"/> - <machine name="cheyenne" compiler="intel" category="aux_cam_one"/> + <machine name="derecho" compiler="intel" category="aux_cime_baselines"/> + <machine name="derecho" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam_short"/> + <machine name="derecho" compiler="intel" category="aux_cam_one"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -27,8 +27,8 @@ </test> <test compset="F2010climo" grid="f09_f09_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prealpha"/> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -36,7 +36,7 @@ </test> <test compset="F2000climo" grid="f10_f10_mg37" name="SMS_Lm13_Vnuopc" testmods="cam/outfrq1m" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">03:00:00</option> @@ -44,7 +44,7 @@ </test> <test compset="F2000climo" grid="f09_f09_mg17" name="PFS_Vnuopc"> <machines> - <machine name="cheyenne" compiler="gnu" category="prebeta"/> + <machine name="derecho" compiler="gnu" category="prebeta"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -53,8 +53,8 @@ <test compset="FHIST" grid="f09_f09_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cime_baselines"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="aux_cime_baselines"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -63,8 +63,8 @@ <test compset="FHIST_BGC" grid="f09_f09_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cime_baselines"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="aux_cime_baselines"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -73,8 +73,8 @@ <test compset="FHIST_BDRD" grid="f09_f09_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="aux_cam_short"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam_short"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -83,10 +83,10 @@ <test compset="F1850" grid="f09_f09_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cime_baselines"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="aux_cam_short"/> + <machine name="derecho" compiler="intel" category="aux_cime_baselines"/> + <machine name="derecho" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam_short"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -95,7 +95,7 @@ <test compset="FHIST" grid="f19_f19_mg17" name="SMS_Ln9_Vnuopc" testmods="cam/outfrq9s_nochem"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -109,7 +109,7 @@ <!-- CAM Tests at non-scientific resolutions --> <test compset="F2000climo" grid="f19_f19_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/cosp"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -117,7 +117,7 @@ </test> <test compset="F2000climo" grid="f19_f19_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="gnu" category="prealpha"/> + <machine name="derecho" compiler="gnu" category="prealpha"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -125,7 +125,7 @@ </test> <test compset="F2000climo" grid="ne30_ne30_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -134,8 +134,8 @@ <test compset="F2010climo" grid="f09_f09_mg17" name="SMS_Ln9_Vnuopc" testmods="cam/nudging"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="cam_nudging"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="cam_nudging"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -144,8 +144,8 @@ <test compset="F2000climo" grid="f19_f19" name="SMS_Ln9_Vnuopc" testmods="cam/silhs"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="cam_silhs"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="cam_silhs"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -154,9 +154,9 @@ <test compset="F2000climo" grid="C96_C96_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s_mg3"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="fv3_cam"/> + <machine name="derecho" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="fv3_cam"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -167,9 +167,9 @@ <test compset="QPC6" grid="f19_f19_mg17" name="ERP_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cime_baselines"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cime_baselines"/> + <machine name="derecho" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -177,7 +177,7 @@ </test> <test compset="QPC6" grid="f09_f09_mg17" name="ERP_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -185,7 +185,7 @@ </test> <test compset="QPC6" grid="ne30_ne30_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -201,7 +201,7 @@ </test> <test compset="QPRCEMIP" grid="ne30_ne30_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -209,7 +209,7 @@ </test> <test compset="QPC5" grid="f19_f19_mg17" name="ERP_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -217,7 +217,7 @@ </test> <test compset="QPC4" grid="f19_f19_mg17" name="ERP_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -231,7 +231,7 @@ <test compset="QSC6" grid="f19_f19_mg17" name="ERP_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -239,9 +239,9 @@ </test> <test compset="QSC6" grid="f09_f09_mg17" name="ERP_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cime_baselines"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cime_baselines"/> + <machine name="derecho" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -249,7 +249,7 @@ </test> <test compset="QPC6" grid="ne30_ne30_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -257,7 +257,7 @@ </test> <test compset="QSC5" grid="f19_f19_mg17" name="ERP_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -265,7 +265,7 @@ </test> <test compset="QSC4" grid="f19_f19_mg17" name="ERP_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -274,8 +274,8 @@ <test compset="QPC6" grid="C48_C48_mg17" name="ERP_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prealpha"/> - <machine name="cheyenne" compiler="intel" category="fv3_cam"/> + <machine name="derecho" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="fv3_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -283,7 +283,7 @@ </test> <test compset="QPC5" grid="C48_C48_mg17" name="ERP_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="fv3_cam"/> + <machine name="derecho" compiler="intel" category="fv3_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -291,7 +291,7 @@ </test> <test compset="QPC4" grid="C48_C48_mg17" name="ERP_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="fv3_cam"/> + <machine name="derecho" compiler="intel" category="fv3_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -302,7 +302,7 @@ <!-- 012 --> <test compset="PC4" grid="f19_f19_mg17" name="SMS_D_Ld5_Vnuopc" testmods="cam/cam4_port5d"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -596,7 +596,7 @@ <test compset="F2000climo" grid="f10_f10_mg37" name="ERS_D_Ln9_Vnuopc" testmods="cam/carma_dust"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >CARMA dust test</option> @@ -605,7 +605,7 @@ </test> <test compset="F2000climo" grid="ne30pg3_ne30pg3_mg17" name="ERS_D_Ln9_Vnuopc" testmods="cam/carma_dust"> <machines> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >CARMA dust test</option> @@ -617,7 +617,7 @@ <machines> <machine name="izumi" compiler="nag" category="carma"/> <machine name="izumi" compiler="nag" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >CARMA sea salt test</option> @@ -628,7 +628,7 @@ <test compset="QPWmaC6" grid="f10_f10_mg37" name="ERS_D_Ln9_Vnuopc" testmods="cam/carma_meteor_smoke"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >CARMA test of aerosol from meteor smoke</option> @@ -639,7 +639,7 @@ <test compset="QPWmaC6" grid="f10_f10_mg37" name="ERS_D_Ln9_Vnuopc" testmods="cam/carma_meteor_impact"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >CARMA test of aerosols from meteor impact</option> @@ -650,7 +650,7 @@ <test compset="QPWmaC6" grid="f10_f10_mg37" name="ERS_D_Ln9_Vnuopc" testmods="cam/carma_pmc"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >CARMA Test of Polar Mesospheric Clouds (pmc)</option> @@ -661,7 +661,7 @@ <test compset="QPC5" grid="f10_f10_mg37" name="ERS_D_Ln9_Vnuopc" testmods="cam/carma_test_radiative"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >CARMA radiation test</option> @@ -672,7 +672,7 @@ <test compset="QPC5" grid="f10_f10_mg37" name="ERS_D_Ln9_Vnuopc" testmods="cam/carma_test_tracers"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >CARMA tracers test</option> @@ -683,7 +683,7 @@ <test compset="QPC5" grid="f10_f10_mg37" name="ERC_D_Ln9_Vnuopc" testmods="cam/carma_test_tracers2"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >CARMA tracers2 test</option> @@ -694,7 +694,7 @@ <test compset="QPC5" grid="f10_f10_mg37" name="ERC_D_Ln9_Vnuopc" testmods="cam/carma_test_passive"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >CARMA passive test</option> @@ -705,7 +705,7 @@ <test compset="QPC5" grid="f10_f10_mg37" name="ERC_D_Ln9_Vnuopc" testmods="cam/carma_test_swelling"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >CARMA particle swelling test</option> @@ -717,9 +717,9 @@ <machines> <machine name="izumi" compiler="nag" category="aux_cam"/> <machine name="izumi" compiler="nag" category="waccm"/> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> <machine name="izumi" compiler="nag" category="tem_diags"/> - <machine name="cheyenne" compiler="intel" category="tem_diags"/> + <machine name="derecho" compiler="intel" category="tem_diags"/> </machines> <options> <option name="comment" >TEM diagnostics and zonal-average output</option> @@ -728,10 +728,10 @@ </test> <test compset="FWsc2000climo" grid="mpasa120_mpasa120" name="ERS_Ld3" testmods="cam/outfrq1d_physgrid_tem_mpasa120_wcmsc"> <machines> - <machine name="cheyenne" compiler="intel" category="prealpha"/> - <machine name="cheyenne" compiler="intel" category="waccm"/> - <machine name="cheyenne" compiler="intel" category="frontogw_mpas"/> - <machine name="cheyenne" compiler="intel" category="tem_diags"/> + <machine name="derecho" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="frontogw_mpas"/> + <machine name="derecho" compiler="intel" category="tem_diags"/> </machines> <options> <option name="comment" >TEM diagnostics and zonal-average output</option> @@ -740,8 +740,8 @@ </test> <test compset="FWsc2000climo" grid="f09_f09_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s_physgrid_tem_1deg"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> - <machine name="cheyenne" compiler="intel" category="tem_diags"/> + <machine name="derecho" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="tem_diags"/> </machines> <options> <option name="comment" >TEM diagnostics and zonal-average output</option> @@ -752,7 +752,7 @@ <test compset="FW4ma2000" grid="f10_f10_mg37" name="SMS_D_Ln9_Vnuopc" testmods="cam/carma_sulfate"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >CARMA pure sulfate test</option> @@ -763,7 +763,7 @@ <test compset="FW4ma2000" grid="f10_f10_mg37" name="ERS_D_Ln9_Vnuopc" testmods="cam/carma_mixed_sulfate"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >CARMA mixed sulfate test</option> @@ -774,7 +774,7 @@ <test compset="QPC5" grid="f10_f10_mg37" name="ERC_D_Ln9_Vnuopc" testmods="cam/carma_test_growth"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >CARMA particle growth test</option> @@ -793,7 +793,7 @@ <test compset="QPC5" grid="ne5_ne5_mg37" name="SMS_D_Ln9_Vnuopc" testmods="cam/carma_sea_salt"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >Low-res unstructured grid CARMA sea salt test</option> @@ -803,7 +803,7 @@ <test compset="QPC5" grid="ne5_ne5_mg37" name="SMS_D_Ln9_Vnuopc" testmods="cam/carma_test_growth"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >Low-res unstructured grid CARMA growth test</option> @@ -813,7 +813,7 @@ <test compset="QPC5" grid="ne5_ne5_mg37" name="SMS_D_Ln9_Vnuopc" testmods="cam/carma_test_passive"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >Low-res unstructured grid CARMA passive test</option> @@ -823,7 +823,7 @@ <test compset="QPC5" grid="ne5_ne5_mg37" name="SMS_D_Ln9_Vnuopc" testmods="cam/carma_test_swelling"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >Low-res unstructured grid CARMA swelling test</option> @@ -833,7 +833,7 @@ <test compset="QPC5" grid="ne5_ne5_mg37" name="SMS_D_Ln9_Vnuopc" testmods="cam/carma_test_tracers2"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >Low-res unstructured grid CARMA tracers2 test</option> @@ -843,7 +843,7 @@ <test compset="QPC5" grid="ne5_ne5_mg37" name="SMS_D_Ln9_Vnuopc" testmods="cam/carma_test_radiative"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >Low-res unstructured grid CARMA radiative test</option> @@ -853,7 +853,7 @@ <test compset="QPC5" grid="ne5_ne5_mg37" name="ERC_D_Ln9_Vnuopc" testmods="cam/carma_test_tracers"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >Low-res unstructured grid CARMA test-tracers test</option> @@ -863,7 +863,7 @@ <test compset="QPWmaC6" grid="ne5pg3_ne5pg3_mg37" name="SMS_D_Ln9_Vnuopc" testmods="cam/carma_meteor_impact"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >Low-res unstructured grid CARMA meteor impact test</option> @@ -873,7 +873,7 @@ <test compset="QPWmaC6" grid="ne5pg3_ne5pg3_mg37" name="SMS_D_Ln9_Vnuopc" testmods="cam/carma_meteor_smoke"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >Low-res unstructured grid CARMA smoke test</option> @@ -883,7 +883,7 @@ <test compset="QPWmaC6" grid="ne5pg3_ne5pg3_mg37" name="SMS_D_Ln9_Vnuopc" testmods="cam/carma_pmc"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >Low-res unstructured grid CARMA PMC test</option> @@ -893,7 +893,7 @@ <test compset="QPWmaC4" grid="ne5pg3_ne5pg3_mg37" name="SMS_D_Ln9_Vnuopc" testmods="cam/carma_mixed_sulfate"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >Low-res unstructured grid CARMA mixed sulfate test</option> @@ -903,7 +903,7 @@ <test compset="QPWmaC4" grid="ne5pg3_ne5pg3_mg37" name="SMS_D_Ln9_Vnuopc" testmods="cam/carma_sulfate"> <machines> <machine name="izumi" compiler="nag" category="carma"/> - <machine name="cheyenne" compiler="intel" category="carma"/> + <machine name="derecho" compiler="intel" category="carma"/> </machines> <options> <option name="comment" >Low-res unstructured grid CARMA sulfate test</option> @@ -940,7 +940,7 @@ </test> <test compset="QPWmaC4" grid="f45_f45_mg37" name="SMS_D_Ln9_P24x3_Vnuopc" testmods="cam/outfrq9s_apmee" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -948,8 +948,8 @@ </test> <test compset="QPWmaC6" grid="f45_f45_mg37" name="ERP_Ln9_P24x3_Vnuopc" testmods="cam/outfrq9s_mee_fluxes" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1187,7 +1187,7 @@ <!-- 150 --> <test compset="FDABIP04" grid="T42_T42_mg17" name="ERC_D_Ln9_Vnuopc" testmods="cam/outfrq3s_usecase"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="comment" >150 tsm, ter</option> @@ -1197,7 +1197,7 @@ <!-- 151 --> <test compset="FHS94" grid="T42_T42_mg17" name="ERC_D_Ln9_Vnuopc" testmods="cam/outfrq3s_usecase"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="comment" >151 tsm, ter</option> @@ -1207,7 +1207,7 @@ <!-- 331 --> <test compset="QPC41850" grid="f45_f45_mg37" name="ERI_D_Ln18_Vnuopc" testmods="cam/co2rmp_usecase"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="comment" >331 tsm, ter, tbr</option> @@ -1219,7 +1219,7 @@ <machines> <machine name="izumi" compiler="gnu" category="aux_cam"/> <machine name="izumi" compiler="gnu" category="camchem"/> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -1228,8 +1228,8 @@ <test compset="QPMOZ" grid="f19_f19_mg17" name="ERC_D_Ln9_Vnuopc" testmods="cam/outfrq3s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1237,7 +1237,7 @@ </test> <test compset="QPC5M7" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1246,7 +1246,7 @@ <!-- 360 --> <test compset="QPC5HIST" grid="f19_f19_mg17" name="SMS_D_Ld2_Vnuopc" testmods="cam/volc_usecase"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="comment" >360 tsm</option> @@ -1256,7 +1256,7 @@ <!-- 370 --> <test compset="QPC2000climo" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq3s_usecase"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="comment" >370 tsm</option> @@ -1266,7 +1266,7 @@ <!-- 380 --> <test compset="QPC6" grid="f19_f19_mg17" name="ERC_D_Ln9_Vnuopc" testmods="cam/outfrq3s_cosp"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="comment" >380 tsm, ter</option> @@ -1276,8 +1276,8 @@ <!-- 391 --> <test compset="QPX2000" grid="f19_f19_mg17" name="ERC_D_Ln9_Vnuopc" testmods="cam/outfrq3s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> <options> <option name="comment" >391 tsm, ter</option> @@ -1286,8 +1286,8 @@ </test> <test compset="QPX2000" grid="ne16_ne16_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -1295,7 +1295,7 @@ </test> <test compset="FX2000" grid="ne30pg3_ne30pg3_mg17" name="SMS_D_Ln3_Vnuopc" testmods="cam/outfrq3s_edyngrid_320x385"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -1303,7 +1303,7 @@ </test> <test compset="FX2000" grid="ne30pg3_ne30pg3_mg17" name="ERS_Ln3_Vnuopc" testmods="cam/outfrq3s_edyngrid_640x769"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> <options> <option name="wallclock">01:00:00</option> @@ -1312,7 +1312,7 @@ <!-- 730 --> <test compset="FADIAB" grid="ne16_ne16_mg17" name="ERC_D_Ln9_Vnuopc" testmods="cam/terminator"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="comment" >730 tsm, ter</option> @@ -1322,7 +1322,7 @@ <!-- 735 --> <test compset="QPC5HIST" grid="ne16_ne16_mg17" name="ERC_D_Ln9_Vnuopc" testmods="cam/outfrq3s_usecase"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="comment" >735 tsm, ter</option> @@ -1332,7 +1332,7 @@ <!-- 742 --> <test compset="QPC6HIST" grid="ne16pg3_ne16pg3_mg17" name="ERC_D_Ln9_P144x1_Vnuopc" testmods="cam/outfrq3s_ttrac_usecase"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="comment" >742 tsm, ter</option> @@ -1342,7 +1342,7 @@ <!-- 001 --> <test compset="QPC5" grid="T42_T42_mg17" name="SCT_D_Ln7_Vnuopc" testmods="cam/scm_prep"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="comment" >001 tsc</option> @@ -1352,7 +1352,7 @@ <test compset="F2000climo" grid="mpasa120_mpasa120" name="ERS_Ln9_P288x1_Vnuopc" testmods="cam/outfrq9s_mpasa120"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:45:00</option> @@ -1361,7 +1361,7 @@ <test compset="F2000climo" grid="mpasa480_mpasa480" name="ERS_Ln9_P36x1_Vnuopc" testmods="cam/outfrq9s_mpasa480"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:45:00</option> @@ -1370,7 +1370,7 @@ <test compset="FHS94" grid="mpasa480z32_mpasa480" name="ERC_D_Ln9_Vnuopc" testmods="cam/outfrq3s_usecase"> <machines> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -1431,7 +1431,7 @@ <test compset="FHIST_DARTC6" grid="f09_f09_mg17" name="SMS_C80_P108x1_Lh1_Vnuopc" testmods="cam/dartcambigens"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:40:00</option> @@ -1442,8 +1442,8 @@ <!-- CAM SCAM runs --> <test compset="FSCAM" grid="T42_T42" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="test_scam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="test_scam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -1451,8 +1451,8 @@ </test> <test compset="FSCAM" grid="T42_T42" name="SMS_D_Ln9_Vnuopc" testmods="cam/scam_mpace_outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prealpha"/> - <machine name="cheyenne" compiler="intel" category="test_scam"/> + <machine name="derecho" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="test_scam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -1466,8 +1466,8 @@ <test compset="F2000dev" grid="ne30pg3_ne30pg3_mg17" name="ERP_D_Ln9_Vnuopc" testmods="cam/outfrq9s" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">01:00:00</option> @@ -1475,8 +1475,8 @@ </test> <test compset="F2000dev" grid="f09_f09_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s_mg3" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">01:00:00</option> @@ -1484,8 +1484,8 @@ </test> <test compset="F2000dev" grid="f19_f19" name="SMS_Ld1_Vnuopc" testmods="cam/outfrq1d" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">01:00:00</option> @@ -1502,12 +1502,12 @@ </test> <test compset="F2000climo" grid="f09_f09_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s_wetdep"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> </test> <test compset="F2000climo" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s_wetdep"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> </test> <test compset="F2000dev" grid="f09_f09_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s_mg3_default"> @@ -1557,7 +1557,7 @@ </test> <test compset="QPC4" grid="f19_f19_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="test_release"/> + <machine name="derecho" compiler="intel" category="test_release"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -1565,7 +1565,7 @@ </test> <test compset="QPC5" grid="f19_f19_mg17" name="ERP_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="test_release"/> + <machine name="derecho" compiler="intel" category="test_release"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -1573,7 +1573,7 @@ </test> <test compset="QSC4" grid="f19_f19_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="test_release"/> + <machine name="derecho" compiler="intel" category="test_release"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -1581,7 +1581,7 @@ </test> <test compset="QSC5" grid="f19_f19_mg17" name="ERP_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="test_release"/> + <machine name="derecho" compiler="intel" category="test_release"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -1589,7 +1589,7 @@ </test> <test compset="FSD" grid="f19_f19_mg17" name="ERP_D_Ln9_Vnuopc" testmods="cam/outfrq9s_sd"> <machines> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1597,7 +1597,7 @@ </test> <test compset="F2000climo" grid="f09_f09_mg17" name="ERP_D_Ln9_Vnuopc" testmods="cam/outfrq9s_contrail"> <machines> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1605,7 +1605,7 @@ </test> <test compset="FSD" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1613,8 +1613,8 @@ </test> <test compset="FCSD" grid="f09_f09_mg17" name="ERP_Lh12_Vnuopc" testmods="cam/outfrq3h"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1622,8 +1622,8 @@ </test> <test compset="FCnudged" grid="ne30_ne30_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1631,8 +1631,8 @@ </test> <test compset="FCnudged" grid="ne30_ne30_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq3s_zmean_nudging"> <machines> - <machine name="cheyenne" compiler="intel" category="zmean_nudging"/> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="zmean_nudging"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -1641,9 +1641,9 @@ </test> <test compset="FCnudged" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq3s_zmean_nudging"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> - <machine name="cheyenne" compiler="intel" category="zmean_nudging"/> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="zmean_nudging"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -1652,8 +1652,8 @@ </test> <test compset="FCnudged" grid="ne30_ne30_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq3s_zmean_nudging"> <machines> - <machine name="cheyenne" compiler="intel" category="zmean_nudging"/> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="zmean_nudging"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -1662,8 +1662,8 @@ </test> <test compset="FCnudged" grid="f09_f09_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq3s_zmean_nudging"> <machines> - <machine name="cheyenne" compiler="intel" category="zmean_nudging"/> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="zmean_nudging"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -1693,8 +1693,8 @@ </test> <test compset="FCnudged" grid="ne0CONUSne30x8_ne0CONUSne30x8_mt12" name="SMS_D_Ln9_Vnuopc_P1280x1" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prealpha"/> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -1703,8 +1703,8 @@ </test> <test compset="FHIST" grid="ne0CONUSne30x8_ne0CONUSne30x8_mt12" name="SMS_D_Ln9_Vnuopc_P1280x1" testmods="cam/outfrq9s" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="prealpha"/> - <machine name="cheyenne" compiler="intel" category="cam_refined"/> + <machine name="derecho" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="cam_refined"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -1712,8 +1712,8 @@ </test> <test compset="FHIST" grid="ne0ARCTICne30x4_ne0ARCTICne30x4_mt12" name="SMS_D_Ln9_Vnuopc_P1280x1" testmods="cam/outfrq9s" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="cam_refined"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="cam_refined"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1721,8 +1721,8 @@ </test> <test compset="FHIST" grid="ne0ARCTICGRISne30x8_ne0ARCTICGRISne30x8_mt12" name="SMS_D_Ln9_Vnuopc_P1280x1" testmods="cam/outfrq9s" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> - <machine name="cheyenne" compiler="intel" category="cam_refined"/> + <machine name="derecho" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="cam_refined"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1730,7 +1730,7 @@ </test> <test compset="FLTHIST" grid="ne30pg3_ne30pg3_mg17" name="SMS_D_Ln9" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1739,7 +1739,7 @@ </test> <test compset="FLTHIST" grid="ne30pg3_ne30pg3_mg17" name="ERP_D_Ln9" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -1748,7 +1748,7 @@ </test> <test compset="FMTHIST" grid="ne30pg3_ne30pg3_mg17" name="SMS_D_Ln9" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1757,7 +1757,7 @@ </test> <test compset="FMTHIST" grid="ne30pg3_ne30pg3_mg17" name="ERP_D_Ln9" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">00:40:00</option> @@ -1766,8 +1766,8 @@ </test> <test compset="FCts2nudged" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s_leapday"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1775,8 +1775,8 @@ </test> <test compset="FCts2SD" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1784,7 +1784,7 @@ </test> <test compset="FCts2SD" grid="f09_f09_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1792,8 +1792,8 @@ </test> <test compset="FC2010climo" grid="f09_f09_mg17" name="ERP_Ld3_Vnuopc" testmods="cam/outfrq1d"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1801,8 +1801,8 @@ </test> <test compset="FC2010climo" grid="ne30_ne30_mg17" name="SMS_Ld1_Vnuopc" testmods="cam/outfrq1d"> <machines> - <machine name="cheyenne" compiler="intel" category="prealpha"/> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1810,8 +1810,8 @@ </test> <test compset="FC2010climo" grid="ne30pg3_ne30pg3_mg17" name="SMS_Ld1_Vnuopc" testmods="cam/outfrq1d"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1819,13 +1819,13 @@ </test> <test compset="FC2010climo" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> </test> <test compset="FC2000climo" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s_wetdep"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1833,24 +1833,24 @@ </test> <test compset="FC2000climo" grid="f09_f09_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s_wetdep"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> </test> <test compset="FC2000climo" grid="f09_f09_mg17" name="ERP_Ld3_Vnuopc" testmods="cam/outfrq1d"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> </test> <test compset="FCHIST" grid="ne30_ne30_mg17" name="SMS_Ld1_Vnuopc" testmods="cam/outfrq1d"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> </test> <test compset="FCHIST" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s_ocnemis"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -1858,13 +1858,13 @@ </test> <test compset="FCHIST" grid="f09_f09_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s_ocnemis"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> </test> <test compset="FCHIST" grid="ne0CONUSne30x8_ne0CONUSne30x8_mt12" name="SMS_D_Ln9_Vnuopc_P1280x1" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -1873,7 +1873,7 @@ </test> <test compset="FCHIST" grid="ne0CONUSne30x8_ne0CONUSne30x8_mt12" name="ERS_Lh3_P1280x1" testmods="cam/outfrq3h"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> <options> <option name="wallclock">02:00:00</option> @@ -1882,8 +1882,8 @@ </test> <test compset="FCvbsxHIST" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -1892,18 +1892,18 @@ </test> <test compset="FCvbsxHIST" grid="f09_f09_mg17" name="ERP_Ld3_Vnuopc" testmods="cam/outfrq1d"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> </test> <test compset="FCfireHIST" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> </test> <test compset="FCfireHIST" grid="f09_f09_mg17" name="ERP_Ld3_Vnuopc" testmods="cam/outfrq1d"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">00:40:00</option> @@ -1913,8 +1913,8 @@ <!-- Test of CAM-chem component sets with Harmonized Emissions Component (HEMCO) --> <test compset="FCSD_HCO" grid="f09_f09_mg17" name="SMS_Lh12_Vnuopc" testmods="cam/outfrq3h" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="camchem_hco"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="camchem_hco"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1923,7 +1923,7 @@ </test> <test compset="FCSD_HCO" grid="f09_f09_mg17" name="ERS_Ln9_Vnuopc" testmods="cam/outfrq9s" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem_hco"/> + <machine name="derecho" compiler="intel" category="camchem_hco"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1932,8 +1932,8 @@ </test> <test compset="FCSD_HCO" grid="f09_f09_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="camchem_hco"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="camchem_hco"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1959,7 +1959,7 @@ <!-- SPCAM testing --> <test compset="FSPCAMS" grid="C48_C48_mg17" name="ERS_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="fv3_cam"/> + <machine name="derecho" compiler="intel" category="fv3_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -1967,7 +1967,7 @@ </test> <test compset="FSPCAMM" grid="C48_C48_mg17" name="ERS_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="fv3_cam"/> + <machine name="derecho" compiler="intel" category="fv3_cam"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1975,18 +1975,18 @@ </test> <test compset="FSPCAMCLBM" grid="C48_C48_mg17" name="ERS_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="fv3_cam"/> + <machine name="derecho" compiler="intel" category="fv3_cam"/> </machines> </test> <test compset="FSPCAMCLBS" grid="C48_C48_mg17" name="ERS_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="fv3_cam"/> + <machine name="derecho" compiler="intel" category="fv3_cam"/> </machines> </test> <test compset="FSPCAMS" grid="f19_f19_mg17" name="ERS_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> <machine name="izumi" compiler="nag" category="test_spcam"/> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -1994,8 +1994,8 @@ </test> <test compset="FSPCAMS" grid="f19_f19_mg17" name="ERS_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="test_spcam"/> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="test_spcam"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2003,8 +2003,8 @@ </test> <test compset="FSPCAMM" grid="f19_f19_mg17" name="ERS_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prealpha"/> - <machine name="cheyenne" compiler="intel" category="test_spcam"/> + <machine name="derecho" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="test_spcam"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2027,7 +2027,7 @@ <test compset="F2000climo" grid="C96_C96_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="fv3_cam"/> + <machine name="derecho" compiler="intel" category="fv3_cam"/> <machine name="izumi" compiler="intel" category="fv3_cam"/> <machine name="izumi" compiler="gnu" category="fv3_cam"/> </machines> @@ -2037,7 +2037,7 @@ </test> <test compset="F2010climo" grid="C96_C96_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="fv3_cam"/> + <machine name="derecho" compiler="intel" category="fv3_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2045,7 +2045,7 @@ </test> <test compset="F2000climo" grid="C96_C96_mg17" name="SMS_Lm13_Vnuopc" testmods="cam/outfrq1m" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="fv3_cam_long"/> + <machine name="derecho" compiler="intel" category="fv3_cam_long"/> </machines> <options> <option name="wallclock">03:00:00</option> @@ -2053,7 +2053,7 @@ </test> <test compset="F2000climo" grid="C96_C96_mg17" name="PFS_Vnuopc"> <machines> - <machine name="cheyenne" compiler="pgi" category="fv3_cam"/> + <machine name="derecho" compiler="pgi" category="fv3_cam"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -2062,7 +2062,7 @@ <test compset="FHIST" grid="C96_C96_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="fv3_cam"/> + <machine name="derecho" compiler="intel" category="fv3_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2071,7 +2071,7 @@ <test compset="FHIST_BGC" grid="C96_C96_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="fv3_cam"/> + <machine name="derecho" compiler="intel" category="fv3_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2080,7 +2080,7 @@ <test compset="F1850" grid="C96_C96_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="fv3_cam"/> + <machine name="derecho" compiler="intel" category="fv3_cam"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2090,7 +2090,7 @@ <!-- CAM Tests at non-scientific resolutions --> <test compset="F2000climo" grid="C48_C48_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/cosp"> <machines> - <machine name="cheyenne" compiler="intel" category="fv3_cam"/> + <machine name="derecho" compiler="intel" category="fv3_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2098,7 +2098,7 @@ </test> <test compset="F2000climo" grid="C48_C48_mg17" name="ERS_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="fv3_cam"/> + <machine name="derecho" compiler="intel" category="fv3_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2107,7 +2107,7 @@ <test compset="F2000climo" grid="C48_C48_mg17" name="SMS_Ln9_Vnuopc" testmods="cam/silhs"> <machines> - <machine name="cheyenne" compiler="intel" category="fv3_cam"/> + <machine name="derecho" compiler="intel" category="fv3_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2117,17 +2117,17 @@ <test compset="FHS94" grid="C48_C48_mg17" name="ERP_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="fv3_cam"/> + <machine name="derecho" compiler="intel" category="fv3_cam"/> </machines> </test> <test compset="FHS94" grid="C96_C96_mg17" name="ERP_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="fv3_cam"/> + <machine name="derecho" compiler="intel" category="fv3_cam"/> </machines> </test> <test compset="FKESSLER" grid="C48_C48_mg17" name="ERP_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="pgi" category="fv3_cam"/> + <machine name="derecho" compiler="pgi" category="fv3_cam"/> </machines> </test> <!-- @@@@@@@@@@@@@@@@@@@@@@ --> @@ -2136,8 +2136,8 @@ <test compset="FWsc2000climo" grid="mpasa120_mpasa120" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s_mpasa120"> <machines> - <machine name="cheyenne" compiler="intel" category="frontogw_mpas"/> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="frontogw_mpas"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -2145,8 +2145,8 @@ </test> <test compset="FWsc2000climo" grid="mpasa120_mpasa120" name="ERS_Ln9_Vnuopc" testmods="cam/outfrq9s_mpasa120"> <machines> - <machine name="cheyenne" compiler="intel" category="frontogw_mpas"/> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="frontogw_mpas"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -2155,8 +2155,8 @@ <test compset="FWSD" grid="f09_f09_mg17" name="ERP_Lh12_Vnuopc" testmods="cam/outfrq3h"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> <options> <option name="wallclock">00:40:00</option> @@ -2164,13 +2164,13 @@ </test> <test compset="FWSD" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> </test> <test compset="FMOZ" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2178,8 +2178,8 @@ </test> <test compset="FCLTHIST" grid="ne30pg3_ne30pg3_mg17" name="SMS_D_Ln9_Vnuopc_P1280x1" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> <options> <option name="wallclock">00:40:00</option> @@ -2188,7 +2188,7 @@ </test> <test compset="FCMTHIST" grid="ne30pg3_ne30pg3_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="camchem"/> </machines> <options> <option name="wallclock">00:40:00</option> @@ -2197,9 +2197,9 @@ </test> <test compset="FW2000climo" grid="f09_f09_mg17" name="SMS_Ld1_Vnuopc" testmods="cam/outfrq1d"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="waccm"/> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2207,8 +2207,8 @@ </test> <test compset="FW2000climo" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2216,8 +2216,8 @@ </test> <test compset="FWma2000climo" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2225,8 +2225,8 @@ </test> <test compset="FWma2000climo" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prealpha"/> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2234,8 +2234,8 @@ </test> <test compset="FWma2000climo" grid="ne30pg3_ne30pg3_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2243,7 +2243,7 @@ </test> <test compset="FW2000climo" grid="f19_f19_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2251,7 +2251,7 @@ </test> <test compset="FWma2000climo" grid="f19_f19_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2259,7 +2259,7 @@ </test> <test compset="FWma2000climo" grid="f09_f09_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2267,7 +2267,7 @@ </test> <test compset="FWma2000climo" grid="ne30pg3_ne30pg3_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2275,8 +2275,8 @@ </test> <test compset="FW2010climo" grid="f09_f09_mg17" name="SMS_Ld1_Vnuopc" testmods="cam/outfrq1d"> <machines> - <machine name="cheyenne" compiler="intel" category="prealpha"/> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -2284,13 +2284,13 @@ </test> <test compset="FW1850" grid="f09_f09_mg17" name="SMS_Ld1_Vnuopc" testmods="cam/outfrq1d"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> </test> <test compset="FW1850" grid="f09_f09_mg17" name="SMS_Ln9_Vnuopc" testmods="cam/reduced_hist3s"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2298,8 +2298,8 @@ </test> <test compset="FWHIST_BGC" grid="f09_f09_mg17" name="ERP_Ld3_Vnuopc" testmods="cam/reduced_hist1d"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -2307,7 +2307,7 @@ </test> <test compset="FWHIST" grid="f09_f09_mg17" name="ERP_Ld3_Vnuopc" testmods="cam/outfrq1d"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -2315,7 +2315,7 @@ </test> <test compset="FWHIST" grid="f09_f09_mg17" name="ERP_Ld3_Vnuopc" testmods="cam/reduced_hist1d"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:40:00</option> @@ -2323,8 +2323,8 @@ </test> <test compset="FWHIST" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/reduced_hist3s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2332,7 +2332,7 @@ </test> <test compset="FX2000" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2340,8 +2340,8 @@ </test> <test compset="FX2000" grid="ne16_ne16_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2349,8 +2349,8 @@ </test> <test compset="FX2000" grid="f09_f09_mg17" name="ERS_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -2358,8 +2358,8 @@ </test> <test compset="FXHIST" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s_amie"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2367,18 +2367,18 @@ </test> <test compset="QPX2000" grid="f19_f19_mg17" name="SMS_D_Ln9_P240x3" testmods="cam/outfrq9s_ltr"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> </test> <test compset="FXHIST" grid="f19_f19_mg17" name="ERS_Ld3_Vnuopc" testmods="cam/outfrq1d_ltr"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> </test> <test compset="FXHIST" grid="f19_f19_mg17" name="SMS_C2_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -2386,23 +2386,23 @@ </test> <test compset="FXHIST" grid="f19_f19_mg17" name="ERS_Ld3_Vnuopc" testmods="cam/outfrq1d_amie"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> </test> <test compset="FXHIST" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> </test> <test compset="FXHIST" grid="f19_f19_mg17" name="ERS_Ld3_Vnuopc" testmods="cam/outfrq1d_newyear"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> </test> <test compset="FXHIST" grid="f19_f19_mg17" name="ERS_Ld3_Vnuopc" testmods="cam/waccmx_weimer"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">00:50:00</option> @@ -2410,12 +2410,12 @@ </test> <test compset="FXHIST" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc_P384x3" testmods="cam/waccmx_weimer"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> </test> <test compset="FXHIST" grid="f19_f19_mg17" name="ERS_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2423,7 +2423,7 @@ </test> <test compset="FXmadHIST" grid="f19_f19_mg17" name="ERS_Ln9_Vnuopc" testmods="cam/outfrq9s" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2431,22 +2431,22 @@ </test> <test compset="FXmadHIST" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> </test> <test compset="FXmadHIST" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> </test> <test compset="FXmadSD" grid="f19_f19_mg17" name="ERS_Ln9_Vnuopc" testmods="cam/outfrq9s" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> </test> <test compset="FXmadSD" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2454,7 +2454,7 @@ </test> <test compset="FXmadSD" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2462,7 +2462,7 @@ </test> <test compset="FXSD" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2470,8 +2470,8 @@ </test> <test compset="FXSD" grid="f19_f19_mg17" name="ERS_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2479,7 +2479,7 @@ </test> <test compset="FXSD" grid="f09_f09_mg17" name="SMS_Lh3_Vnuopc" testmods="cam/outfrq3h"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2487,7 +2487,7 @@ </test> <test compset="FXSD" grid="f19_f19_mg17" name="SMS_Lh3_Vnuopc" testmods="cam/outfrq3h"> <machines> - <machine name="cheyenne" compiler="intel" category="waccmx"/> + <machine name="derecho" compiler="intel" category="waccmx"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2495,32 +2495,32 @@ </test> <test compset="FWmaHIST" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> </test> <test compset="FWmaHIST" grid="f09_f09_mg17" name="ERP_Ld3_Vnuopc" testmods="cam/outfrq3d"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> </test> <test compset="FWmadHIST" grid="f09_f09_mg17" name="ERP_Ld3_Vnuopc" testmods="cam/outfrq3d"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> </test> <test compset="FWmadHIST" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> </test> <test compset="FW4madHIST" grid="f19_f19_mg17" name="ERP_Ld3_Vnuopc" testmods="cam/outfrq3d" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> </test> <test compset="QPWmadC4" grid="f10_f10_mg37" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> <machine name="izumi" compiler="nag" category="waccm"/> <machine name="izumi" compiler="nag" category="prealpha"/> </machines> @@ -2538,8 +2538,8 @@ </test> <test compset="FW4madSD" grid="f19_f19_mg17" name="ERP_Lh12_Vnuopc" testmods="cam/outfrq3h" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2547,7 +2547,7 @@ </test> <test compset="FW4madSD" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2564,7 +2564,7 @@ </test> <test compset="FW4madSD" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> <options> <option name="wallclock">00:40:00</option> @@ -2572,8 +2572,8 @@ </test> <test compset="FWmaSD" grid="f09_f09_mg17" name="ERP_Lh12_Vnuopc" testmods="cam/outfrq3h"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:40:00</option> @@ -2581,23 +2581,23 @@ </test> <test compset="FWmaSD" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> </test> <test compset="FWmadSD" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> </test> <test compset="FWmaSD" grid="f19_f19_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> </test> <test compset="FWmadSD" grid="f09_f09_mg17" name="SMS_Lh3_Vnuopc" testmods="cam/outfrq3h"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:40:00</option> @@ -2605,18 +2605,18 @@ </test> <test compset="FWmaHIST" grid="f19_f19_mg17" name="ERP_Ld3_Vnuopc" testmods="cam/outfrq3d"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> </test> <test compset="FWmaHIST" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> </test> <test compset="FWsc1850" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2624,8 +2624,8 @@ </test> <test compset="FWscHIST" grid="f09_f09_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2633,13 +2633,13 @@ </test> <test compset="FWscHIST" grid="f09_f09_mg17" name="ERP_Ld3_Vnuopc" testmods="cam/outfrq3d"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> </test> <test compset="FWsc2010climo" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2647,8 +2647,8 @@ </test> <test compset="F1850" grid="f10_f10_mg37" name="ERS_Ld3_Vnuopc" testmods="cam/outfrq1d_14dec_ghg_cam_dev"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="ghg_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="ghg_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2657,7 +2657,7 @@ </test> <test compset="FWsc2000climo" grid="f10_f10_mg37" name="ERP_Ld3_Vnuopc" testmods="cam/outfrq1d_14dec"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2666,14 +2666,14 @@ </test> <test compset="FWsc2010climo" grid="f19_f19_mg17" name="ERP_Ld3_Vnuopc" testmods="cam/outfrq3d"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> </test> <test compset="FWsc1850" grid="f19_f19_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2681,18 +2681,18 @@ </test> <test compset="FWscHIST" grid="f19_f19_mg17" name="ERP_Ld3_Vnuopc" testmods="cam/outfrq3d"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> </test> <test compset="FWscHIST" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> </test> <test compset="FW2000climo" grid="ne30pg3_ne30pg3_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:40:00</option> @@ -2700,7 +2700,7 @@ </test> <test compset="FW2000climo" grid="ne30pg3_ne30pg3_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="waccm"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -2708,14 +2708,14 @@ </test> <test compset="FW2000climo" grid="ne30_ne30_mg17" name="SMS_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> </test> <test compset="FC2000climo" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc_P144x3" testmods="cam/outfrq9s_camchem_mam4"> <machines> - <machine name="cheyenne" compiler="intel" category="camchem"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="camchem"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2724,8 +2724,8 @@ </test> <test compset="FWma2000climo" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s_waccm_ma_mam4"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2734,8 +2734,8 @@ </test> <test compset="FW2000climo" grid="f19_f19_mg17" name="SMS_D_Ln9_Vnuopc" testmods="cam/outfrq9s_waccm_mam4"> <machines> - <machine name="cheyenne" compiler="intel" category="waccm"/> - <machine name="cheyenne" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="waccm"/> + <machine name="derecho" compiler="intel" category="prebeta"/> </machines> <options> <option name="wallclock">00:20:00</option> @@ -2744,9 +2744,9 @@ </test> <test compset="PC4" grid="f19_f19_mg17" name="SMS_Vnuopc" testmods="cam/cam4_port"> <machines> - <machine name="cheyenne" compiler="intel" category="prealpha"/> - <machine name="cheyenne" compiler="intel" category="test_port"/> - <machine name="cheyenne" compiler="pgi" category="test_port"/> + <machine name="derecho" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="test_port"/> + <machine name="derecho" compiler="pgi" category="test_port"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2754,8 +2754,8 @@ </test> <test compset="PC4" grid="f19_f19_mg17" name="SMS_D_Vnuopc" testmods="cam/cam4_port"> <machines> - <machine name="cheyenne" compiler="intel" category="prebeta"/> - <machine name="cheyenne" compiler="intel" category="test_port"/> + <machine name="derecho" compiler="intel" category="prebeta"/> + <machine name="derecho" compiler="intel" category="test_port"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2769,8 +2769,8 @@ </test> <test compset="PC5" grid="ne30_ne30_mg17" name="SMS_D_Vnuopc" testmods="cam/cam5_port_ne30"> <machines> - <machine name="cheyenne" compiler="intel" category="prealpha"/> - <machine name="cheyenne" compiler="intel" category="test_port"/> + <machine name="derecho" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="test_port"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2778,9 +2778,9 @@ </test> <test compset="PC6" grid="f09_f09_mg17" name="SMS_Ld5_Vnuopc" testmods="cam/cam6_port_f09"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> - <machine name="cheyenne" compiler="intel" category="prealpha"/> - <machine name="cheyenne" compiler="intel" category="test_port"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="test_port"/> </machines> <options> <option name="wallclock">00:30:00</option> @@ -2802,7 +2802,7 @@ <test compset="FADIAB" grid="ne0TESTONLYne5x4_ne0TESTONLYne5x4_mg37" name="ERS_Ln9_Vnuopc" testmods="cam/outfrq3s_refined" supported="false"> <machines> - <machine name="cheyenne" compiler="intel" category="aux_cam"/> + <machine name="derecho" compiler="intel" category="aux_cam"/> </machines> <options> <option name="wallclock">00:10:00</option> @@ -2816,7 +2816,7 @@ <test compset="FTJ16" grid="f09_f09_mg17" name="ERP_Ln9_Vnuopc" testmods="cam/outfrq9s"> <machines> - <machine name="cheyenne" compiler="intel" category="prealpha"/> + <machine name="derecho" compiler="intel" category="prealpha"/> </machines> </test> diff --git a/test/system/test_driver.sh b/test/system/test_driver.sh index a80121753d..80a632b14f 100755 --- a/test/system/test_driver.sh +++ b/test/system/test_driver.sh @@ -2,7 +2,7 @@ # # test_driver.sh: driver for the testing of CAM with standalone scripts # -# usage on hobart, izumi, leehill, cheyenne +# usage on hobart, izumi, leehill, derecho # ./test_driver.sh # # **more details in the CAM testing user's guide, accessible @@ -220,59 +220,6 @@ hostname=`hostname` case $hostname in - ##cheyenne - ch* | r* ) - submit_script_cime="`pwd -P`/test_driver_cheyenne_cime_${cur_time}.sh" - - if [ -z "$CAM_ACCOUNT" ]; then - echo "ERROR: Must set the environment variable CAM_ACCOUNT" - exit 2 - fi - - if [ -z "$CAM_BATCHQ" ]; then - export CAM_BATCHQ="regular" - fi - - # wallclock for run job - wallclock_limit="5:00:00" - - if [ $gmake_j = 0 ]; then - gmake_j=36 - fi - - # run tests on 2 nodes using 18 tasks/node, 2 threads/task - CAM_TASKS=36 - CAM_THREADS=2 - - # change parallel configuration on 2 nodes using 32 tasks, 1 threads/task - CAM_RESTART_TASKS=32 - CAM_RESTART_THREADS=1 - - mach_workspace="/glade/scratch" - - # Check for CESM baseline directory - if [ -n "${BL_TESTDIR}" ] && [ ! -d "${BL_TESTDIR}" ]; then - echo "CESM_BASELINE ${BL_TESTDIR} not found. Check BL_TESTDIR for correct tag name." - exit - fi - -#------------------------------------------- - -cat > ${submit_script_cime} << EOF -#!/bin/bash -# -#PBS -N cime-tests -#PBS -q $CAM_BATCHQ -#PBS -A $CAM_ACCOUNT -#PBS -l walltime=$wallclock_limit -#PBS -l select=1:ncpus=36:mpiprocs=36 -#PBS -j oe -#PBS -l inception=login - -EOF - -##^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ writing to batch script ^^^^^^^^^^^^^^^^^^^ - ;; ##derecho derecho* | dec* ) submit_script_cime="`pwd -P`/test_driver_derecho_cime_${cur_time}.sh" @@ -294,13 +241,13 @@ EOF fi # run tests on 1 node using 64 tasks/node, 2 threads/task - # These settings are ignored on cheyenne and derecho. + # These settings are ignored on derecho. # PE layouts come from config_pes.xml. CAM_TASKS=64 CAM_THREADS=2 # change parallel configuration on 1 nodes using 32 tasks, 1 threads/task - # These settings are ignored on cheyenne and derecho. + # These settings are ignored on derecho. # PE layouts come from config_pes.xml. CAM_RESTART_TASKS=32 CAM_RESTART_THREADS=1 @@ -505,9 +452,6 @@ esac cesm_test_mach="" comp="" -if [ "${hostname:0:4}" == "chey" ]; then - cesm_test_mach="cheyenne" -fi if [ "${hostname:0:5}" == "derec" ] || [ "${hostname:0:3}" == "dec" ]; then cesm_test_mach="derecho" fi @@ -531,14 +475,7 @@ if [ "${cesm_test_suite}" != "none" -a -n "${cesm_test_mach}" ]; then for cesm_test in ${cesm_test_suite}; do - # Force derecho to run the cheyenne testlist. - # After the transition to derecho is completed, this if statement can be removed and - # just the else needs to remain. - if [ "${cesm_test_mach}" == "derecho" ]; then - testargs="--xml-category ${cesm_test} --xml-machine cheyenne --mach ${cesm_test_mach} --retry 2" - else - testargs="--xml-category ${cesm_test} --xml-machine ${cesm_test_mach} --retry 2" - fi + testargs="--xml-category ${cesm_test} --xml-machine ${cesm_test_mach} --retry 2" if [ -n "${use_existing}" ]; then test_id="${use_existing}" @@ -614,10 +551,6 @@ if [ "${cesm_test_suite}" != "none" -a -n "${cesm_test_mach}" ]; then testargs="${testargs} --xml-compiler intel" fi case $hostname in - # cheyenne - chey* | r* ) - testargs="${testargs} --queue ${CAM_BATCHQ} --test-root ${cesm_testdir} --output-root ${cesm_testdir}" - ;; # derecho derec* | dec* ) testargs="${testargs} --queue ${CAM_BATCHQ} --test-root ${cesm_testdir} --output-root ${cesm_testdir}" From 3f02362404adfaf575b64ca103c765e888576d14 Mon Sep 17 00:00:00 2001 From: Cheryl Craig <cacraig@ucar.edu> Date: Tue, 2 Jan 2024 16:00:46 -0700 Subject: [PATCH 3/5] remove cheyenne from archive_baselines --- test/system/archive_baseline.sh | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-) diff --git a/test/system/archive_baseline.sh b/test/system/archive_baseline.sh index ff26b835f9..8460923a1f 100755 --- a/test/system/archive_baseline.sh +++ b/test/system/archive_baseline.sh @@ -12,7 +12,7 @@ cat << EOF1 NAME archive_baseline.sh - archive pretag baselines to set locations on - hobart, izumi and cheyenne. + hobart, izumi and derecho. SYNOPSIS @@ -32,7 +32,7 @@ BASELINE ARCHIVED LOCATION hobart, izumi: /fs/cgd/csm/models/atm/cam/pretag_bl/TAGNAME_pgi /fs/cgd/csm/models/atm/cam/pretag_bl/TAGNAME_nag - cheyenne: /glade/p/cesm/amwg/cesm_baselines/TAGNAME + derecho: /glade/campaign/cesm/community/amwg/cam_baselines/TAGNAME @@ -93,16 +93,6 @@ case $hostname in baselinedir="/fs/cgd/csm/models/atm/cam/pretag_bl/$cam_tag" ;; - ch*) - echo "server: cheyenne" - if [ -z "$CAM_FC" ]; then - CAM_FC="INTEL" - fi - test_file_list="tests_pretag_cheyenne" - cam_tag=$1 - baselinedir="/glade/p/cesm/amwg/cesm_baselines/$cam_tag" - ;; - de*) echo "server: derecho" if [ -z "$CAM_FC" ]; then From 24f45ce7a750d11a438b1b50d753fdeee3baebb7 Mon Sep 17 00:00:00 2001 From: Katetc <katec@ucar.edu> Date: Fri, 5 Jan 2024 11:21:26 -0700 Subject: [PATCH 4/5] Increased wallclock time for one test on derecho --- cime_config/testdefs/testlist_cam.xml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cime_config/testdefs/testlist_cam.xml b/cime_config/testdefs/testlist_cam.xml index 09d4183f4b..193e3d4246 100644 --- a/cime_config/testdefs/testlist_cam.xml +++ b/cime_config/testdefs/testlist_cam.xml @@ -77,7 +77,7 @@ <machine name="derecho" compiler="intel" category="aux_cam_short"/> </machines> <options> - <option name="wallclock">00:10:00</option> + <option name="wallclock">00:20:00</option> </options> </test> From 9249c0c6abe13a8aaff5032f27ec973138a7faf6 Mon Sep 17 00:00:00 2001 From: Katetc <katec@ucar.edu> Date: Fri, 5 Jan 2024 12:40:35 -0700 Subject: [PATCH 5/5] Finalize ChangeLog --- doc/ChangeLog | 80 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/doc/ChangeLog b/doc/ChangeLog index b5109f1d9a..2cb653ca46 100644 --- a/doc/ChangeLog +++ b/doc/ChangeLog @@ -1,5 +1,85 @@ =============================================================== +Tag name: cam6_3_145 +Originator(s): katetc, cacraigucar, andrewgettelman +Date: 05 Jan 2024 +One-line Summary: New PUMAS External with adjusted vapor deposition onto snow +Github PR URL: https://github.com/ESCOMP/CAM/pull/938 + +Purpose of changes (include the issue number and title text for each relevant GitHub issue): + + A one-line change in PUMAS resulting in a new tag for the external. Adds a corresponding + limiter for vapor deposition onto snow as used for rain. Also updates the test lists from + Cheyenne to Derecho in all cases. + Resolves Issue 936 - PUMAS update for vapor deposition onto snow + Resolves Issue 947 - Rename all cheyenne tests to derecho + +Describe any changes made to build system: None + +Describe any changes made to the namelist: None + +List any changes to the defaults for the boundary datasets: None + +Describe any substantial timing or memory changes: None + +Code reviewed by: PeterHjortLauritzen, cacraigucar, adamrher + +List all files eliminated: None + +List all files added and what they do: None + +List all existing files that have been modified, and describe the changes: + +M Externals_CAM.cfg + - Point to new pumas tag pumas_cam-release_v1.35 + +M cime_config/testdefs/testlist_cam.xml + - Change all Cheyenne to Derecho tests + - Change wallclock time from 00:10:00 to 00:20:00 for Derecho test + ERP_Ln9_Vnuopc.f09_f09_mg17.FHIST_BDRD.derecho_intel.cam-outfrq9s + +M test/system/archive_baseline.sh + - Change cheyenne to Derecho, remove support for Cheyenne + +M test/system/test_driver.sh + - Remove support for Cheyenne, updates for Derecho + +If there were any failures reported from running test_driver.sh on any test +platform, and checkin with these failures has been OK'd by the gatekeeper, +then copy the lines from the td.*.status files for the failed tests to the +appropriate machine below. All failed tests must be justified. + +derecho/intel/aux_cam: + ERP_Ln9_Vnuopc.C96_C96_mg17.F2000climo.derecho_intel.cam-outfrq9s_mg3 (Overall: PEND) + ERP_Ln9_Vnuopc.f09_f09_mg17.FCSD_HCO.derecho_intel.cam-outfrq9s (Overall: FAIL) + - pre-existing failures + + ERP_D_Ln9.ne30pg3_ne30pg3_mg17.FLTHIST.derecho_intel.cam-outfrq9s (Overall: DIFF) + ERP_D_Ln9_Vnuopc.ne30pg3_ne30pg3_mg17.F2000dev.derecho_intel.cam-outfrq9s (Overall: DIFF) + ERP_Ln9_Vnuopc.f09_f09_mg17.F2000dev.derecho_intel.cam-outfrq9s_mg3 (Overall: DIFF) + ERS_Ld3_Vnuopc.f10_f10_mg37.F1850.derecho_intel.cam-outfrq1d_14dec_ghg_cam_dev (Overall: DIFF) + SMS_D_Ln9.ne30pg3_ne30pg3_mg17.FMTHIST.derecho_intel.cam-outfrq9s (Overall: DIFF) + SMS_D_Ln9_Vnuopc_P1280x1.ne30pg3_ne30pg3_mg17.FCLTHIST.derecho_intel.cam-outfrq9s (Overall: DIFF) + SMS_Ld1_Vnuopc.f19_f19.F2000dev.derecho_intel.cam-outfrq1d (Overall: DIFF) + - Expected answer changes due to PUMAS update + +izumi/nag/aux_cam: + DAE_Vnuopc.f45_f45_mg37.FHS94.izumi_nag.cam-dae (Overall: FAIL) details: + - pre-existing failure + +izumi/gnu/aux_cam: + SMS_D_Ln9.f10_f10_mg37.2000_CAM%DEV%GHGMAM4_CLM50%SP_CICE%PRES_DOCN%DOM_MOSART_SGLC_SWAV_SESP.izumi_gnu.cam-outfrq9s (Overall: DIFF) + - Expected answer changes due to PUMAS update + +Summarize any changes to answers: + + Small but climate-changing impacts. Discussion and diagnostics here: https://github.com/NCAR/amwg_dev/issues/445 + +=============================================================== + + +=============================================================== + Tag name: cam6_3_144 Originator(s): katetc, cacraigucar, andrewgettelman, wkchuang, djgagne Date: 02 Jan 2024