From fa1af8850feb98555dfdfde746de9a3387ab81fd Mon Sep 17 00:00:00 2001 From: Ein Terakawa Date: Sun, 14 Feb 2021 12:09:33 +0900 Subject: [PATCH 01/15] Map PAL_MODE_INPUT_PULLUP to GPIO_PMD_QUASI --- os/hal/ports/NUMICRO/LLD/GPIOv1/hal_pal_lld.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/os/hal/ports/NUMICRO/LLD/GPIOv1/hal_pal_lld.c b/os/hal/ports/NUMICRO/LLD/GPIOv1/hal_pal_lld.c index aa2f94970d..f2f1d381fa 100644 --- a/os/hal/ports/NUMICRO/LLD/GPIOv1/hal_pal_lld.c +++ b/os/hal/ports/NUMICRO/LLD/GPIOv1/hal_pal_lld.c @@ -170,13 +170,13 @@ void _pal_lld_setgroupmode(ioportid_t port, uint32_t nucMode = 0; - if (mode == PAL_MODE_INPUT || mode == PAL_MODE_INPUT_PULLUP) + if (mode == PAL_MODE_INPUT) nucMode = GPIO_PMD_INPUT; else if (mode == PAL_MODE_OUTPUT_OPENDRAIN) nucMode = GPIO_PMD_OPEN_DRAIN; else if (mode == PAL_MODE_OUTPUT_PUSHPULL) nucMode = GPIO_PMD_OUTPUT; - else + else /* mode == PAL_MODE_INPUT_PULLUP */ nucMode = GPIO_PMD_QUASI; /* GPIO_SetMode(port, mask, nucMode); */ From 29119b29a4dd461336a0eae860fab5a77296b1df Mon Sep 17 00:00:00 2001 From: Ein Terakawa Date: Sun, 14 Feb 2021 12:11:20 +0900 Subject: [PATCH 02/15] Fix UART0 ALT_MFP setup for PB2 --- os/hal/ports/NUMICRO/LLD/SERIALv1/hal_serial_lld.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/os/hal/ports/NUMICRO/LLD/SERIALv1/hal_serial_lld.c b/os/hal/ports/NUMICRO/LLD/SERIALv1/hal_serial_lld.c index 6bcc1b2785..62e33463d4 100644 --- a/os/hal/ports/NUMICRO/LLD/SERIALv1/hal_serial_lld.c +++ b/os/hal/ports/NUMICRO/LLD/SERIALv1/hal_serial_lld.c @@ -310,7 +310,7 @@ void sd_lld_init(void) #if NUC123_SERIAL_USE_UART0 sdObjectInit(&SD0, NULL, notify0); /* Select UART0 Pins */ - SYS->ALT_MFP &= ~(SYS_ALT_MFP_PB3_MFP1_Msk | SYS_ALT_MFP_PB3_MFP1_Msk); + SYS->ALT_MFP &= ~(SYS_ALT_MFP_PB3_MFP1_Msk | SYS_ALT_MFP_PB2_MFP1_Msk); /* SYS->GPB_MFP |= SYS_GPB_MFP_PB1_UART0_TXD | SYS_GPB_MFP_PB0_UART0_RXD | SYS_GPB_MFP_PB3_UART0_nCTS | SYS_GPB_MFP_PB2_UART0_nRTS; */ SYS->GPB_MFP |= 0x0FUL; From f02d21db9eba87747a6ad267bd5be8d13c9648cc Mon Sep 17 00:00:00 2001 From: Ein Terakawa Date: Sun, 14 Feb 2021 12:14:04 +0900 Subject: [PATCH 03/15] Use NUC123_UARTx_NUMBER --- os/hal/ports/NUMICRO/LLD/SERIALv1/hal_serial_lld.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/os/hal/ports/NUMICRO/LLD/SERIALv1/hal_serial_lld.c b/os/hal/ports/NUMICRO/LLD/SERIALv1/hal_serial_lld.c index 62e33463d4..bed980253d 100644 --- a/os/hal/ports/NUMICRO/LLD/SERIALv1/hal_serial_lld.c +++ b/os/hal/ports/NUMICRO/LLD/SERIALv1/hal_serial_lld.c @@ -351,7 +351,7 @@ void sd_lld_start(SerialDriver* sdp, const SerialConfig* config) if (&SD0 == sdp) { CLK->APBCLK |= CLK_APBCLK_UART0_EN_Msk; CLK->CLKSEL1 = (CLK->CLKSEL1 & ~(CLK_CLKSEL1_UART_S_Msk)) | NUC123_SERIAL_CLKSRC; - nvicEnableVector(UART0_IRQn, NUC123_SERIAL_UART0_IRQ_PRIORITY); + nvicEnableVector(NUC123_UART0_NUMBER, NUC123_SERIAL_UART0_IRQ_PRIORITY); SYS->IPRSTC2 |= SYS_IPRSTC2_UART0_RST_Msk; SYS->IPRSTC2 &= ~(SYS_IPRSTC2_UART0_RST_Msk); } @@ -359,7 +359,7 @@ void sd_lld_start(SerialDriver* sdp, const SerialConfig* config) #if NUC123_SERIAL_USE_UART1 if (&SD1 == sdp) { CLK->APBCLK |= CLK_APBCLK_UART1_EN_Msk; - nvicEnableVector(NUC123_UART1_IRQn, NUC123_SERIAL_UART1_IRQ_PRIORITY); + nvicEnableVector(NUC123_UART1_NUMBER, NUC123_SERIAL_UART1_IRQ_PRIORITY); SYS->IPRSTC2 |= SYS_IPRSTC2_UART1_RST_Msk; SYS->IPRSTC2 &= ~(SYS_IPRSTC2_UART1_RST_Msk); } @@ -455,7 +455,7 @@ void sd_lld_stop(SerialDriver* sdp) #if NUC123_SERIAL_USE_UART0 if (&SD0 == sdp) { CLK->APBCLK &= ~CLK_APBCLK_UART0_EN_Msk; - nvicDisableVector(UART0_IRQn); + nvicDisableVector(NUC123_UART0_NUMBER); return; } #endif @@ -463,7 +463,7 @@ void sd_lld_stop(SerialDriver* sdp) #if NUC123_SERIAL_USE_UART1 if (&SD1 == sdp) { CLK->APBCLK &= ~CLK_APBCLK_UART1_EN_Msk; - nvicDisableVector(NUC123_UART1_IRQn); + nvicDisableVector(NUC123_UART1_NUMBER); return; } #endif From 89404b6597660c8723867fd078f70372c1e96f82 Mon Sep 17 00:00:00 2001 From: Ein Terakawa Date: Sun, 14 Feb 2021 12:14:46 +0900 Subject: [PATCH 04/15] Fix the case when only UART1 is used --- os/hal/ports/NUMICRO/LLD/SERIALv1/hal_serial_lld.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/os/hal/ports/NUMICRO/LLD/SERIALv1/hal_serial_lld.c b/os/hal/ports/NUMICRO/LLD/SERIALv1/hal_serial_lld.c index bed980253d..f3086c304b 100644 --- a/os/hal/ports/NUMICRO/LLD/SERIALv1/hal_serial_lld.c +++ b/os/hal/ports/NUMICRO/LLD/SERIALv1/hal_serial_lld.c @@ -306,6 +306,9 @@ OSAL_IRQ_HANDLER(NUC123_UART1_HANDLER) */ void sd_lld_init(void) { +#if NUC123_SERIAL_USE_UART0 || NUC123_SERIAL_USE_UART1 + CLK->CLKSEL1 = (CLK->CLKSEL1 & ~(CLK_CLKSEL1_UART_S_Msk)) | NUC123_SERIAL_CLKSRC; +#endif #if NUC123_SERIAL_USE_UART0 sdObjectInit(&SD0, NULL, notify0); @@ -350,7 +353,6 @@ void sd_lld_start(SerialDriver* sdp, const SerialConfig* config) #if NUC123_SERIAL_USE_UART0 if (&SD0 == sdp) { CLK->APBCLK |= CLK_APBCLK_UART0_EN_Msk; - CLK->CLKSEL1 = (CLK->CLKSEL1 & ~(CLK_CLKSEL1_UART_S_Msk)) | NUC123_SERIAL_CLKSRC; nvicEnableVector(NUC123_UART0_NUMBER, NUC123_SERIAL_UART0_IRQ_PRIORITY); SYS->IPRSTC2 |= SYS_IPRSTC2_UART0_RST_Msk; SYS->IPRSTC2 &= ~(SYS_IPRSTC2_UART0_RST_Msk); From 15a04daeabd2809f48d09f7167079db4f13445be Mon Sep 17 00:00:00 2001 From: Ein Terakawa Date: Sun, 14 Feb 2021 11:01:41 +0900 Subject: [PATCH 05/15] Remove unused symbols NUC123_PLLSRC and NUC123_HCLKSRC --- .../NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/mcuconf.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/mcuconf.h b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/mcuconf.h index b8a941ceb1..b6de5d7ada 100644 --- a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/mcuconf.h +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/mcuconf.h @@ -26,8 +26,6 @@ */ #define NUC123_HSE_ENABLED TRUE #define NUC123_PLL_ENABLED TRUE -#define NUC123_PLLSRC NUC123_PLLSRC_HSE -#define NUC123_HCLKSRC NUC123_HCLKSRC_PLL #define NUC123_MCUCONF From 2b85f6361a6730338625f349dc60b5b11d64eafa Mon Sep 17 00:00:00 2001 From: Ein Terakawa Date: Sun, 14 Feb 2021 11:02:35 +0900 Subject: [PATCH 06/15] Move NUC123_SERIAL_CLKSRC from halconf.h to mcuconf.h --- .../NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/halconf.h | 2 -- .../NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/mcuconf.h | 1 + 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/halconf.h b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/halconf.h index 81dd7ce0ad..4fb46b25b1 100644 --- a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/halconf.h +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/halconf.h @@ -36,8 +36,6 @@ #define PAL_USE_CALLBACKS TRUE #define PAL_USE_WAIT TRUE -#define NUC123_SERIAL_CLKSRC NUC123_SERIAL_CLKSRC_HSI - /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/mcuconf.h b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/mcuconf.h index b6de5d7ada..15a74bfa53 100644 --- a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/mcuconf.h +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/mcuconf.h @@ -26,6 +26,7 @@ */ #define NUC123_HSE_ENABLED TRUE #define NUC123_PLL_ENABLED TRUE +#define NUC123_SERIAL_CLKSRC NUC123_SERIAL_CLKSRC_HSI #define NUC123_MCUCONF From 8a3b1db73b61bbb4399566dcbb10fe756a9c425b Mon Sep 17 00:00:00 2001 From: Ein Terakawa Date: Sun, 14 Feb 2021 11:04:11 +0900 Subject: [PATCH 07/15] Minimize configuration for SERIAL test code --- .../NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/mcuconf.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/mcuconf.h b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/mcuconf.h index 15a74bfa53..e6030fc4df 100644 --- a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/mcuconf.h +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/cfg/mcuconf.h @@ -24,8 +24,6 @@ /* * HAL driver system settings. */ -#define NUC123_HSE_ENABLED TRUE -#define NUC123_PLL_ENABLED TRUE #define NUC123_SERIAL_CLKSRC NUC123_SERIAL_CLKSRC_HSI #define NUC123_MCUCONF From b0aadec2441b18b05959e29992a4de11b9579c7e Mon Sep 17 00:00:00 2001 From: Alex Lewontin Date: Sun, 24 Jan 2021 17:17:29 -0500 Subject: [PATCH 08/15] NUC123: Added CONFIG0/1 settings, and updated linker script --- .../ARMCMx/compilers/GCC/ld/NUC123xD4xx0.ld | 28 ++++++-- os/hal/ports/NUMICRO/NUC123/hal_lld.c | 3 + os/hal/ports/NUMICRO/NUC123/hal_lld.h | 64 ++++++++++++++++++- .../NUTINY-SDK-NUC123-V2.0/Blinky/Makefile | 2 +- .../NUTINY-SDK-NUC123-V2.0/PWM/Makefile | 2 +- .../NUTINY-SDK-NUC123-V2.0/SERIAL/Makefile | 2 +- .../NUTINY-SDK-NUC123-V2.0/USB_HID/Makefile | 2 +- 7 files changed, 92 insertions(+), 11 deletions(-) diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/NUC123xD4xx0.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/NUC123xD4xx0.ld index 538679122b..86c61bc6bb 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/ld/NUC123xD4xx0.ld +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/NUC123xD4xx0.ld @@ -20,15 +20,15 @@ */ MEMORY { - flash0 (rx) : org = 0x00000000, len = 64k - flash1 (rx) : org = 0x00000000, len = 0 - flash2 (rx) : org = 0x00000000, len = 0 - flash3 (rx) : org = 0x00000000, len = 0 - flash4 (rx) : org = 0x00000000, len = 0 + flash0 (rx) : org = 0x00000000, len = 0x11000 /* APROM */ + flash1 (rx) : org = 0x00000000, len = 0 /* Data flash placeholder */ + flash2 (rx) : org = 0x00100000, len = 0x1000 /* LDROM */ + flash3 (rx) : org = 0x00300000, len = 4 /* Config0 */ + flash4 (rx) : org = 0x00300004, len = 4 /* Config1 */ flash5 (rx) : org = 0x00000000, len = 0 flash6 (rx) : org = 0x00000000, len = 0 flash7 (rx) : org = 0x00000000, len = 0 - ram0 (wx) : org = 0x20000000, len = 20k + ram0 (wx) : org = 0x20000000, len = 0x5000 ram1 (wx) : org = 0x00000000, len = 0 ram2 (wx) : org = 0x00000000, len = 0 ram3 (wx) : org = 0x00000000, len = 0 @@ -38,6 +38,22 @@ MEMORY ram7 (wx) : org = 0x00000000, len = 0 } +REGION_ALIAS("CONFIG0", flash3); +REGION_ALIAS("CONFIG1", flash4); + +SECTIONS +{ + .nuc123_config0 : ALIGN(4) + { + KEEP(*(.nuc123_config0)) + } > CONFIG0 + + .nuc123_config1 : ALIGN(4) + { + KEEP(*(.nuc123_config1)) + } > CONFIG1 +} + /* For each data/text section two region are defined, a virtual region and a load region (_LMA suffix).*/ diff --git a/os/hal/ports/NUMICRO/NUC123/hal_lld.c b/os/hal/ports/NUMICRO/NUC123/hal_lld.c index b9db628ad2..fa99a59658 100644 --- a/os/hal/ports/NUMICRO/NUC123/hal_lld.c +++ b/os/hal/ports/NUMICRO/NUC123/hal_lld.c @@ -50,6 +50,9 @@ uint32_t SystemCoreClock = __HSI; /* System Clock Frequency (Core Clock)*/ uint32_t CyclesPerUs = (__HSI / 1000000); /* Cycles per micro second */ uint32_t PllClock = __HSI; /*!< PLL Clock Frequency */ +volatile const uint32_t config0 __attribute__((used, unused, section(".nuc123_config0"))) = NUC123_CONFIG0; +volatile const uint32_t config1 __attribute__((used, unused, section(".nuc123_config1"))) = NUC123_CONFIG1; + /*===========================================================================*/ /* Driver local functions. */ /*===========================================================================*/ diff --git a/os/hal/ports/NUMICRO/NUC123/hal_lld.h b/os/hal/ports/NUMICRO/NUC123/hal_lld.h index e94f902cb1..c351a8b424 100644 --- a/os/hal/ports/NUMICRO/NUC123/hal_lld.h +++ b/os/hal/ports/NUMICRO/NUC123/hal_lld.h @@ -114,6 +114,23 @@ #define NUC123_PLLSRC_HSI (1 << CLK_PLLCON_PLL_SRC_Pos) /**< PLL source is HSI. */ /** @} */ +/** + * @name User config bit definitions + * @{ + */ +#define NUC123_CONFIG0_DFEN_Pos 0 +#define NUC123_CONFIG0_DFEN_Msk (1 << NUC123_CONFIG0_DFEN_Pos) + +#define NUC123_CONFIG0_LOCK_Pos 1 +#define NUC123_CONFIG0_LOCK_Msk (1 << NUC123_CONFIG0_LOCK_Pos) + +#define NUC123_CONFIG0_DFVSEN_Pos 2 +#define NUC123_CONFIG0_DFVSEN_Msk (1 << NUC123_CONFIG0_DFVSEN_Pos) + +#define NUC123_CONFIG0_CGPFMFP_Pos 27 +#define NUC123_CONFIG0_CGPFMFP_Msk (1 << NUC123_CONFIG0_CGPFMFP_Pos) +/** @} */ + /*===========================================================================*/ /* Driver pre-compile time settings. */ /*===========================================================================*/ @@ -159,7 +176,7 @@ #endif /** - * @brief Clock source for the PLL. + * @brief Core clock speed. */ #if !defined(NUC123_HCLK) || defined(__DOXYGEN__) #if NUC123_PLL_ENABLED @@ -168,6 +185,21 @@ #define NUC123_HCLK __HIRC #endif #endif + +/** + * @brief Enables or disables data flash + */ +#if !defined(NUC123_DATAFLASH_ENABLED) || defined(__DOXYGEN__) +#define NUC123_DATAFLASH_ENABLED FALSE +#endif + +/** + * @brief Sets the data flash size. This is ignored if data flash is disabled. + */ +#if !defined(NUC123_DATAFLASH_SIZE) || defined(__DOXYGEN__) +#define NUC123_DATAFLASH_SIZE 4096 +#endif + /** @} */ /*===========================================================================*/ @@ -191,10 +223,39 @@ #elif (NUC123_HSECLK < NUC123_HSECLK_MIN) || (NUC123_HSECLK > NUC123_HSECLK_MAX) #error "NUC123_HSECLK outside acceptable range (NUC123_HSECLK_MIN...NUC123_HSECLK_MAX)" #endif +#define NUC123_CONFIG0_HSE_PINS 0 +#else +#define NUC123_CONFIG0_HSE_PINS NUC123_CONFIG0_CGPFMFP_Msk #endif #define NUC123_PLLCLK (NUC123_HCLK * 2) +/* +* Persistant configuration settings. +*/ +#if NUC123_DATAFLASH_ENABLE + +#if (NUC123_DATAFLASH_SIZE == 4096) +/* DFVSEN = 1, nothing else matters */ +#define NUC123_CONFIG0_DATAFLASH 0UL +/* NUC123_DFBADDR doesn't actually control anything here, but convenient for flash drivers +which need the starting address */ +#define NUC123_DFBADDR 0x1F000UL +#else +/* DFVSEN = 0, DFEN = 0 */ +#define NUC123_CONFIG0_DATAFLASH (NUC123_CONFIG0_DFVSEN_Msk | NUC123_CONFIG0_DFEN_Msk) +#define NUC123_DFBADDR ((0x11000UL - NUC123_DATAFLASH_SIZE) & ~(0xFFUL)) +#endif +#else +/* DFVSEN = 0, DFEN = 1 */ +#define NUC123_CONFIG0_DATAFLASH NUC123_CONFIG0_DFVSEN_Msk +#define NUC123_DFBADDR 0xFFFFFF00UL +#endif + +#define NUC123_CONFIG0 \ + 0xFFFFFFFFUL & (~NUC123_CONFIG0_DATAFLASH) & (~NUC123_CONFIG0_HSE_PINS) +#define NUC123_CONFIG1 NUC123_DFBADDR + /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ @@ -202,6 +263,7 @@ /*===========================================================================*/ /* Driver macros. */ /*===========================================================================*/ + /* Alias for compatibility */ #define SystemUnlockReg() UNLOCKREG() diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/Blinky/Makefile b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/Blinky/Makefile index 1b9b70fbe6..f61599c620 100644 --- a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/Blinky/Makefile +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/Blinky/Makefile @@ -196,4 +196,4 @@ connect: openocd -f ../scripts/interface/nulink.cfg -f ../scripts/target/numicroM0.cfg flash: $(BUILDDIR)/$(PROJECT).elf - openocd -f ../scripts/interface/nulink.cfg -f ../scripts/target/numicroM0.cfg -c "program $< verify reset exit" + openocd -f ../scripts/interface/nulink.cfg -f ../scripts/target/numicroM0.cfg -c "program $< reset exit" diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/PWM/Makefile b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/PWM/Makefile index 1854bc2dfd..275dc748da 100644 --- a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/PWM/Makefile +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/PWM/Makefile @@ -196,7 +196,7 @@ connect: openocd -f ../scripts/interface/nulink.cfg -f ../scripts/target/numicroM0.cfg flash: $(BUILDDIR)/$(PROJECT).elf - openocd -f ../scripts/interface/nulink.cfg -f ../scripts/target/numicroM0.cfg -c "program $< verify reset exit" + openocd -f ../scripts/interface/nulink.cfg -f ../scripts/target/numicroM0.cfg -c "program $< reset exit" # # Custom rules diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/Makefile b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/Makefile index 8124290805..95ea91455a 100644 --- a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/Makefile +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/SERIAL/Makefile @@ -193,4 +193,4 @@ connect: openocd -f ../scripts/interface/nulink.cfg -f ../scripts/target/numicroM0.cfg flash: $(BUILDDIR)/$(PROJECT).elf - openocd -f ../scripts/interface/nulink.cfg -f ../scripts/target/numicroM0.cfg -c "program $< verify reset exit" + openocd -f ../scripts/interface/nulink.cfg -f ../scripts/target/numicroM0.cfg -c "program $< reset exit" diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/USB_HID/Makefile b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/USB_HID/Makefile index be859ed7e5..7901063525 100644 --- a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/USB_HID/Makefile +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/USB_HID/Makefile @@ -197,7 +197,7 @@ connect: openocd -f ../scripts/interface/nulink.cfg -f ../scripts/target/numicroM0.cfg flash: $(BUILDDIR)/$(PROJECT).elf - openocd -f ../scripts/interface/nulink.cfg -f ../scripts/target/numicroM0.cfg -c "program $< verify reset exit" + openocd -f ../scripts/interface/nulink.cfg -f ../scripts/target/numicroM0.cfg -c "program $< reset exit" # From f4e3f874dc1d6a70605d9d8e0dc697efd2289477 Mon Sep 17 00:00:00 2001 From: Alex Lewontin Date: Sun, 10 Jan 2021 12:49:16 -0500 Subject: [PATCH 09/15] NUC123: EFL driver --- os/hal/ports/NUMICRO/LLD/FLASHv1/driver.mk | 9 + .../ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.c | 648 ++++++++++++++++++ .../ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.h | 167 +++++ os/hal/ports/NUMICRO/NUC123/hal_lld.h | 10 +- os/hal/ports/NUMICRO/NUC123/platform.mk | 1 + 5 files changed, 834 insertions(+), 1 deletion(-) create mode 100644 os/hal/ports/NUMICRO/LLD/FLASHv1/driver.mk create mode 100644 os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.c create mode 100644 os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.h diff --git a/os/hal/ports/NUMICRO/LLD/FLASHv1/driver.mk b/os/hal/ports/NUMICRO/LLD/FLASHv1/driver.mk new file mode 100644 index 0000000000..3fa4c9927b --- /dev/null +++ b/os/hal/ports/NUMICRO/LLD/FLASHv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_EFL TRUE,$(HALCONF)),) +PLATFORMSRC += $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.c +endif +else +PLATFORMSRC += $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.c +endif + +PLATFORMINC += $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/LLD/FLASHv1 diff --git a/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.c b/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.c new file mode 100644 index 0000000000..a2206e7503 --- /dev/null +++ b/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.c @@ -0,0 +1,648 @@ +/* + ChibiOS - Copyright (C) 2020 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file hal_efl_lld.c + * @brief NUC123 Embedded Flash subsystem low level driver source. + * + * @addtogroup HAL_EFL + * @{ + */ + +#include "hal.h" + +#if HAL_USE_EFL || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +#define NUC123_LFOM_UPPERBOUND 25000000UL +#define NUC123_MFOM_UPPERBOUND 50000000UL + +#define FMC_FATCON_LFOM_Pos FMC_FATCON_FOMSEL0_Pos +#define FMC_FATCON_LFOM_Msk FMC_FATCON_FOMSEL0_Msk +#define FMC_FATCON_MFOM_Pos FMC_FATCON_FOMSEL1_Pos +#define FMC_FATCON_MFOM_Msk FMC_FATCON_FOMSEL1_Msk + +#define NUC123_PAGE_SIZE 4UL +#define NUC123_SECTOR_SIZE 0x200UL + +#define NUC123_LDROM_SIZE 0x1000UL +#define NUC123_APROM_SIZE (NUC123_FLASH_SIZE - NUC123_DATAFLASH_SIZE) + +#define NUC123_EFL_CMD_ERASE 0x22UL +#define NUC123_EFL_CMD_PROG 0x21UL +#define NUC123_EFL_CMD_READ 0UL +#define NUC123_EFL_CMD_CHIPERASE 0x26UL /* Undocumented */ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief EFL1 driver identifier. + */ +#if (NUC123_EFL_USE_EFL1 == TRUE) || defined(__DOXYGEN__) +EFlashDriver EFLD1; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +static const flash_descriptor_t efl_lld_descriptors[] = { +#if (NUC123_EFL_ACCESS_APROM == TRUE) || defined(__DOXYGEN__) + {.attributes = FLASH_ATTR_ERASED_IS_ONE | FLASH_ATTR_MEMORY_MAPPED | + FLASH_ATTR_REWRITABLE, + .page_size = NUC123_PAGE_SIZE, + .sectors_count = NUC123_APROM_SIZE / NUC123_SECTOR_SIZE, + .sectors = NULL, + .sectors_size = NUC123_SECTOR_SIZE, + .address = (uint8_t *)0, + .size = NUC123_APROM_SIZE}, +#endif +#if (NUC123_EFL_ACCESS_DATAFLASH == TRUE) || defined(__DOXYGEN__) + {.attributes = FLASH_ATTR_ERASED_IS_ONE | FLASH_ATTR_MEMORY_MAPPED | + FLASH_ATTR_REWRITABLE, + .page_size = NUC123_PAGE_SIZE, + .sectors_count = NUC123_DATAFLASH_SIZE / NUC123_SECTOR_SIZE, + .sectors = NULL, + .sectors_size = NUC123_SECTOR_SIZE, + .address = (uint8_t *)NUC123_DFBADDR, + .size = NUC123_DATAFLASH_SIZE}, +#endif +#if (NUC123_EFL_ACCESS_LDROM == TRUE) || defined(__DOXYGEN__) + {.attributes = FLASH_ATTR_ERASED_IS_ONE | FLASH_ATTR_MEMORY_MAPPED | + FLASH_ATTR_REWRITABLE, + .page_size = NUC123_PAGE_SIZE, + .sectors_count = NUC123_LDROM_SIZE / NUC123_SECTOR_SIZE, + .sectors = NULL, + .sectors_size = NUC123_SECTOR_SIZE, + .address = (uint8_t *)0x100000, + .size = NUC123_LDROM_SIZE}, +#endif +#if (NUC123_EFL_ACCESS_CONFIG == TRUE) || defined(__DOXYGEN__) + {.attributes = FLASH_ATTR_ERASED_IS_ONE | FLASH_ATTR_MEMORY_MAPPED | + FLASH_ATTR_REWRITABLE, + .page_size = NUC123_PAGE_SIZE, + .sectors_count = 1, + .sectors = NULL, + .sectors_size = NUC123_SECTOR_SIZE, + .address = (uint8_t *)0x300000, + .size = 8}, +#endif +}; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/* Starts the ISP function, does not block */ +static inline void start_ISP(void) +{ + SystemUnlockReg(); + FMC->ISPTRG |= FMC_ISPTRG_ISPGO_Msk; + __ISB(); + LOCKREG(); +} + +/* Starts the ISP function and blocks til conclusion */ +static inline flash_error_t do_ISP(void) +{ + start_ISP(); + while (FMC->ISPTRG & FMC_ISPTRG_ISPGO_Msk) + ; + if (FMC->ISPCON & FMC_ISPCON_ISPFF_Msk) { + return FLASH_ERROR_HW_FAILURE; + } + + return FLASH_NO_ERROR; +} + +/** + * @brief Returns the minimum of two unsigned values. A safer implementation + * of the classic macro + * + * @param[in] x An unsigned value + * @param[in] y An unsigned value + * + * @return The smaller of x and y + * + * @notapi + */ +static inline unsigned min(unsigned x, unsigned y) +{ + return ((x > y) ? y : x); +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level Embedded Flash driver initialization. + * + * @notapi + */ +void efl_lld_init(void) +{ + +#if (NUC123_EFL_USE_EFL1 == TRUE) + eflObjectInit(&EFLD1); + EFLD1.bank = 0; +#endif + +} + +/** + * @brief Configures and activates the Embedded Flash peripheral. + * + * @param[in] eflp pointer to a @p EFlashDriver structure + * + * @notapi + */ +void efl_lld_start(EFlashDriver* eflp) +{ + uint32_t ispcon; + if (eflp->state == FLASH_STOP) { + SystemUnlockReg(); + ispcon = FMC->ISPCON; + + ispcon |= (FMC_ISPCON_ISPEN_Msk); + /* Enables the peripheral.*/ + CLK->APBCLK |= CLK_AHBCLK_ISP_EN_Msk; + +#if NUC123_HCLK < NUC123_LFOM_UPPERBOUND + FMC->FATCON |= FMC_FATCON_LFOM_Msk; +#elif NUC123_HCLK < NUC123_MFOM_UPPERBOUND + FMC->FATCON |= FMC_FATCON_MFOM_Msk; +#endif + +#if (NUC123_EFL_ACCESS_APROM == TRUE) || (NUC123_EFL_ACCESS_DATAFLASH == TRUE) + ispcon |= FMC_ISPCON_APUEN_Msk; +#endif + +#if (NUC123_EFL_ACCESS_LDROM == TRUE) + ispcon |= FMC_ISPCON_LDUEN_Msk; +#endif + +#if (NUC123_EFL_ACCESS_CONFIG == TRUE) + ispcon |= FMC_ISPCON_CFGUEN_Msk; +#endif + + FMC->ISPCON = ispcon; + LOCKREG(); + } +} + +/** + * @brief Deactivates the Embedded Flash peripheral. + * + * @param[in] eflp pointer to a @p EFlashDriver structure + * + * @notapi + */ +void efl_lld_stop(EFlashDriver* eflp) +{ + uint32_t ispcon; + if (eflp->state == FLASH_READY) { + SystemUnlockReg(); + ispcon = FMC->ISPCON; + + ispcon &= ~FMC_ISPCON_ISPEN_Msk; + /* Disables the peripheral.*/ + +#if (NUC123_EFL_ACCESS_APROM == TRUE) || (NUC123_EFL_ACCESS_DATAFLASH == TRUE) + ispcon &= ~FMC_ISPCON_APUEN_Msk; +#endif +#if (NUC123_EFL_ACCESS_LDROM == TRUE) + ispcon &= ~FMC_ISPCON_LDUEN_Msk; +#endif +#if (NUC123_EFL_ACCESS_CONFIG == TRUE) + ispcon &= ~FMC_ISPCON_CFGUEN_Msk; +#endif + + FMC->ISPCON = ispcon; + CLK->APBCLK &= ~CLK_AHBCLK_ISP_EN_Msk; + LOCKREG(); + } +} + +/** + * @brief Gets the flash descriptor structure. + * + * @param[in] instance pointer to a @p EFlashDriver instance + * @return A flash device descriptor. + * + * @notapi + */ +const flash_descriptor_t* efl_lld_get_descriptor(void* instance) +{ + return efl_lld_descriptors + ((EFlashDriver *)instance)->bank; +} + +/** + * @brief Read operation. + * + * @param[in] instance pointer to a @p EFlashDriver instance + * @param[in] offset flash offset + * @param[in] n number of bytes to be read + * @param[out] rp pointer to the data buffer + * @return An error code. + * @retval FLASH_NO_ERROR if there is no erase operation in progress. + * @retval FLASH_BUSY_ERASING if there is an erase operation in progress. + * @retval FLASH_ERROR_READ if the read operation failed. + * @retval FLASH_ERROR_HW_FAILURE if access to the memory failed. + * + * @notapi + */ +flash_error_t efl_lld_read(void* instance, flash_offset_t offset, size_t n, uint8_t* rp) +{ + EFlashDriver* devp = (EFlashDriver*)instance; + const flash_descriptor_t *desc = efl_lld_get_descriptor(instance); + flash_error_t err = FLASH_NO_ERROR; + uint32_t data; + + osalDbgCheck((instance != NULL) && (rp != NULL) && (n > 0U)); + osalDbgCheck(((size_t)offset + n) <= (size_t)desc->size); + osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE), + "invalid state"); + + /* No reading while erasing.*/ + if (devp->state == FLASH_ERASE) { + return FLASH_BUSY_ERASING; + } + + /* FLASH_READ state while the operation is performed.*/ + devp->state = FLASH_READ; + + FMC->ISPCMD = NUC123_EFL_CMD_READ; + + while (n) { + FMC->ISPADR = (uint32_t)desc->address + (offset & ~3); + err = do_ISP(); + if (err) { + break; + } + data = FMC->ISPDAT; + /* For most iterations, the switch doesn't do anything, but it doesn't + hurt, and it allows us to consolidate the leading partial word + with the rest, which compiles smaller. The compiler is pretty good + at pulling things out of the loop, if speed is more important. */ + switch (offset % 4) { + case 0: + *(rp++) = (uint8_t)((data >> 0) & 0xFF); + if (!(--n)) { break; } + /* fallthrough */ + case 1: + *(rp++) = (uint8_t)((data >> 8) & 0xFF); + if (!(--n)) { break; } + /* fallthrough */ + case 2: + *(rp++) = (uint8_t)((data >> 16) & 0xFF); + if (!(--n)) { break; } + /* fallthrough */ + case 3: + *(rp++) = (uint8_t)((data >> 24) & 0xFF); + if (!(--n)) { break; } + } + offset += (4 - (offset % 4)); + } + + /* Ready state again.*/ + devp->state = FLASH_READY; + + return err; +} + +/** + * @brief Program operation. + * + * @param[in] instance pointer to a @p EFlashDriver instance + * @param[in] offset flash offset + * @param[in] n number of bytes to be programmed + * @param[in] pp pointer to the data buffer + * @return An error code. + * @retval FLASH_NO_ERROR if there is no erase operation in progress. + * @retval FLASH_BUSY_ERASING if there is an erase operation in progress. + * @retval FLASH_ERROR_PROGRAM if the program operation failed. + * @retval FLASH_ERROR_HW_FAILURE if access to the memory failed. + * + * @notapi + */ +flash_error_t efl_lld_program(void* instance, flash_offset_t offset, + size_t n, const uint8_t* pp) +{ + EFlashDriver* devp = (EFlashDriver*)instance; + const flash_descriptor_t *desc = efl_lld_get_descriptor(instance); + flash_error_t err = FLASH_NO_ERROR; + uint32_t data; + + osalDbgCheck((instance != NULL) && (pp != NULL) && (n > 0U)); + osalDbgCheck(((size_t)offset + n) <= (size_t)desc->size); + + osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE), + "invalid state"); + + /* No programming while erasing.*/ + if (devp->state == FLASH_ERASE) { + return FLASH_BUSY_ERASING; + } + + /* FLASH_PGM state while the operation is performed.*/ + devp->state = FLASH_PGM; + + if (offset % 4) { + FMC->ISPCMD = NUC123_EFL_CMD_READ; + FMC->ISPADR = (uint32_t)desc->address + (offset & ~3); + err = do_ISP(); + if (err) { + /* Ready state again.*/ + devp->state = FLASH_READY; + return err; + } + data = FMC->ISPDAT; + switch (offset % 4) { + case 1: + data &= 0xFFFF00FF; + data |= (*(pp++) << 8); + if (!(--n)) { + break; + } + /* fallthrough */ + case 2: + data &= 0xFF00FFFF; + data |= (*(pp++) << 16); + if (!(--n)) { + break; + } + /* fallthrough */ + case 3: + data &= 0x00FFFFFF; + data |= (*(pp++) << 24); + if (!(--n)) { + break; + } + } + + FMC->ISPDAT = data; + FMC->ISPCMD = NUC123_EFL_CMD_PROG; + err = do_ISP(); + if (err) { + /* Ready state again.*/ + devp->state = FLASH_READY; + return err; + } + + offset += 4 - (offset % 4); + } + + FMC->ISPCMD = NUC123_EFL_CMD_PROG; + + while (n >= 4) { + FMC->ISPADR = (uint32_t)desc->address + offset; + FMC->ISPDAT = (*(pp + 0)) | (*(pp + 1) << 8) | + (*(pp + 2) << 16) | (*(pp + 3) << 24); + err = do_ISP(); + if (err) { + /* Ready state again.*/ + devp->state = FLASH_READY; + return err; + } + n -= 4; + pp += 4; + offset += 4; + } + + if (n) { + FMC->ISPCMD = NUC123_EFL_CMD_READ; + FMC->ISPADR = (uint32_t)desc->address + offset; + err = do_ISP(); + if (err) { + /* Ready state again.*/ + devp->state = FLASH_READY; + return err; + } + data = FMC->ISPDAT; + + switch (n) { + case 3: + data &= 0xFF00FFFF; + data |= (pp[2] << 16); + /* fallthrough */ + case 2: + data &= 0xFFFF00FF; + data |= (pp[1] << 8); + /* fallthrough */ + case 1: + data &= 0xFFFFFF00; + data |= (pp[0] << 0); + } + FMC->ISPDAT = data; + FMC->ISPCMD = NUC123_EFL_CMD_PROG; + err = do_ISP(); + } + + /* Ready state again.*/ + devp->state = FLASH_READY; + return err; +} + +/** + * @brief Starts a whole-device erase operation. + * @note This operation erases the entirety of the bank associated with + * the driver indicated by @p instance. Calling this function on + * the bank that contains the code that is currently executing + * will result in undefined behavior. + * @note This operation is not supported asynchronously, so this will + * not return until all erases have been completed. + * + * @param[in] instance pointer to a @p EFlashDriver instance + * @return An error code. + * @retval FLASH_NO_ERROR if there is no erase operation in progress. + * @retval FLASH_BUSY_ERASING if there is an erase operation in progress. + * @retval FLASH_ERROR_HW_FAILURE if access to the memory failed. + * + * @notapi + */ +flash_error_t efl_lld_start_erase_all(void* instance) +{ + EFlashDriver* devp = (EFlashDriver*)instance; + const flash_descriptor_t *desc = efl_lld_get_descriptor(instance); + flash_error_t err = FLASH_NO_ERROR; + + osalDbgCheck(instance != NULL); + osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE), + "invalid state"); + + /* No erasing while erasing.*/ + if (devp->state == FLASH_ERASE) { + return FLASH_BUSY_ERASING; + } + + /* FLASH_PGM state while the operation is performed.*/ + devp->state = FLASH_ERASE; + + FMC->ISPCMD = NUC123_EFL_CMD_ERASE; + + for (uint8_t i = 0; i < desc->sectors_count; ++i) + { + FMC->ISPADR = (uint32_t)((i * (desc->sectors_size)) + + desc->address); + err = do_ISP(); + if (err) { + break; + } + } + + devp->state = FLASH_READY; + return err; +} + +/** + * @brief Starts an sector erase operation. + * + * @param[in] instance pointer to a @p EFlashDriver instance + * @param[in] sector sector to be erased + * @return An error code. + * @retval FLASH_NO_ERROR if there is no erase operation in progress. + * @retval FLASH_BUSY_ERASING if there is an erase operation in progress. + * @retval FLASH_ERROR_HW_FAILURE if access to the memory failed. + * + * @notapi + */ +flash_error_t efl_lld_start_erase_sector(void* instance, + flash_sector_t sector) +{ + EFlashDriver* devp = (EFlashDriver*)instance; + const flash_descriptor_t *desc = efl_lld_get_descriptor(instance); + + osalDbgCheck(instance != NULL); + osalDbgCheck(sector < desc->sectors_count); + osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE), + "invalid state"); + + /* No erasing while erasing.*/ + if (devp->state == FLASH_ERASE) { + return FLASH_BUSY_ERASING; + } + + /* FLASH_ERASE state while the operation is performed.*/ + devp->state = FLASH_ERASE; + + FMC->ISPCMD = NUC123_EFL_CMD_ERASE; + FMC->ISPADR = (uint32_t)((sector * (desc->sectors_size)) + + desc->address); + start_ISP(); + + return FLASH_NO_ERROR; +} + +/** + * @brief Queries the driver for erase operation progress. + * + * @param[in] instance pointer to a @p EFlashDriver instance + * @param[out] msec recommended time, in milliseconds, that + * should be spent before calling this + * function again, can be @p NULL + * @return An error code. + * @retval FLASH_NO_ERROR if there is no erase operation in progress. + * @retval FLASH_BUSY_ERASING if there is an erase operation in progress. + * @retval FLASH_ERROR_ERASE if the erase operation failed. + * @retval FLASH_ERROR_HW_FAILURE if access to the memory failed. + * + * @api + */ +flash_error_t efl_lld_query_erase(void* instance, uint32_t* msec) +{ + EFlashDriver* devp = (EFlashDriver*)instance; + + /* TODO: figure out an actual amount of time */ + *msec = 0UL; + + /* If there is an erase in progress then the device must be checked.*/ + if (devp->state == FLASH_ERASE) { + if (FMC->ISPSTA & FMC_ISPSTA_ISPGO_Msk) { + return FLASH_BUSY_ERASING; + } + + if (FMC->ISPCON & FMC_ISPCON_ISPFF_Msk) { + return FLASH_ERROR_HW_FAILURE; + } + + devp->state = FLASH_READY; + } + + return FLASH_NO_ERROR; +} + +/** + * @brief Returns the erase state of a sector. + * + * @param[in] instance pointer to a @p EFlashDriver instance + * @param[in] sector sector to be verified + * @return An error code. + * @retval FLASH_NO_ERROR if the sector is erased. + * @retval FLASH_BUSY_ERASING if there is an erase operation in progress. + * @retval FLASH_ERROR_VERIFY if the verify operation failed. + * @retval FLASH_ERROR_HW_FAILURE if access to the memory failed. + * + * @notapi + */ +flash_error_t efl_lld_verify_erase(void* instance, flash_sector_t sector) +{ + EFlashDriver* devp = (EFlashDriver*)instance; + const flash_descriptor_t *desc = efl_lld_get_descriptor(instance); + flash_error_t err = FLASH_NO_ERROR; + + osalDbgCheck(instance != NULL); + osalDbgCheck(sector < desc->sectors_count); + osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE), + "invalid state"); + /* No verifying while erasing.*/ + if (devp->state == FLASH_ERASE) { + return FLASH_BUSY_ERASING; + } + + devp->state = FLASH_READ; + + FMC->ISPCMD = NUC123_EFL_CMD_READ; + + for (size_t i = 0; i < desc->sectors_size; i = i + 4) { + FMC->ISPADR = (uint32_t)desc->address + (desc->sectors_size * sector) + i; + err = do_ISP(); + if (err) { + break; + } + if (FMC->ISPDAT != 0xFFFFFFFF) { + err = FLASH_ERROR_VERIFY; + break; + } + } + + /* Ready state again.*/ + devp->state = FLASH_READY; + return err; +} + +#endif /* HAL_USE_EFL == TRUE */ + +/** @} */ diff --git a/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.h b/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.h new file mode 100644 index 0000000000..200955c207 --- /dev/null +++ b/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.h @@ -0,0 +1,167 @@ +/* + ChibiOS - Copyright (C) 2020 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file hal_efl_lld.h + * @brief NUC123 Embedded Flash subsystem low level driver header. + * @note This driver only supports management of APROM. LDROM, config + * registers, and data flash (not yet supported by the platform driver) + * are not supported. + * @addtogroup HAL_EFL + * @{ + */ + +#ifndef HAL_EFL_LLD_H +#define HAL_EFL_LLD_H + +#if HAL_USE_EFL || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name NUC123 configuration options + * @{ + */ +/** + * @brief EFL1 driver enable switch. + * @details If set to @p TRUE the support for EFL1 is included. + * + * @note The default is @p TRUE. + */ +#if !defined(NUC123_EFL_USE_EFL1) || defined(__DOXYGEN__) +#define NUC123_EFL_USE_EFL1 TRUE +#endif + +/** + * @brief APROM access enable switch. + * @details If set to @p TRUE the support for APROM access is included. + * + * @note The default is @p FALSE. + */ +#if !defined(NUC123_EFL_ACCESS_APROM) || defined(__DOXYGEN__) +#define NUC123_EFL_ACCESS_APROM FALSE +#endif + +/** + * @brief Data flash access enable switch. + * @details If set to @p TRUE the support for data flash access is included. + * + * @note The default is @p FALSE. + */ +#if !defined(NUC123_EFL_ACCESS_DATAFLASH) || defined(__DOXYGEN__) +#define NUC123_EFL_ACCESS_DATAFLASH FALSE +#endif + +/** + * @brief LDROM access enable switch. + * @details If set to @p FALSE the support for LDROM access is included. + * + * @note The default is @p FALSE. + */ +#if !defined(NUC123_EFL_ACCESS_LDROM) || defined(__DOXYGEN__) +#define NUC123_EFL_ACCESS_LDROM FALSE +#endif + +/** + * @brief CONFIG0/1 access enable switch. + * @details If set to @p FALSE the support for CONFIG0/1 access is included. + * + * @note The default is @p FALSE. + */ +#if !defined(NUC123_EFL_ACCESS_CONFIG) || defined(__DOXYGEN__) +#define NUC123_EFL_ACCESS_CONFIG FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +typedef enum { +#if (NUC123_EFL_ACCESS_APROM == TRUE) || defined(__DOXYGEN__) + NUC123_EFL_BANK_APROM, +#endif +#if (NUC123_EFL_ACCESS_DATAFLASH == TRUE) || defined(__DOXYGEN__) + NUC123_EFL_BANK_DATAFLASH, +#endif +#if (NUC123_EFL_ACCESS_LDROM == TRUE) || defined(__DOXYGEN__) + NUC123_EFL_BANK_LDROM, +#endif +#if (NUC123_EFL_ACCESS_CONFIG == TRUE) || defined(__DOXYGEN__) + NUC123_EFL_BANK_CONFIG, +#endif + NUC123_EFL_BANK_NONE +} nuc123_eflbank_t; +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @brief Low level fields of the embedded flash driver structure. + */ +#define efl_lld_driver_fields \ + /* The currently used bank.*/ \ + nuc123_eflbank_t bank + +/** + * @brief Low level fields of the embedded flash configuration structure. + */ +#define efl_lld_config_fields \ + /* Dummy configuration, it is not needed.*/ \ + uint32_t dummy + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if (NUC123_EFL_USE_EFL1 == TRUE) && !defined(__DOXYGEN__) + extern EFlashDriver EFLD1; +#endif + +#ifdef __cplusplus +extern "C" { +#endif +void efl_lld_init(void); +void efl_lld_start(EFlashDriver *eflp); +void efl_lld_stop(EFlashDriver *eflp); +const flash_descriptor_t *efl_lld_get_descriptor(void *instance); +flash_error_t efl_lld_read(void *instance, flash_offset_t offset, size_t n, + uint8_t *rp); +flash_error_t efl_lld_program(void *instance, flash_offset_t offset, + size_t n, const uint8_t *pp); +flash_error_t efl_lld_start_erase_all(void *instance); +flash_error_t efl_lld_start_erase_sector(void *instance, flash_sector_t sector); +flash_error_t efl_lld_query_erase(void *instance, uint32_t *msec); +flash_error_t efl_lld_verify_erase(void *instance, flash_sector_t sector); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_EFL == TRUE */ + +#endif /* HAL_EFL_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/NUMICRO/NUC123/hal_lld.h b/os/hal/ports/NUMICRO/NUC123/hal_lld.h index c351a8b424..f898bdae84 100644 --- a/os/hal/ports/NUMICRO/NUC123/hal_lld.h +++ b/os/hal/ports/NUMICRO/NUC123/hal_lld.h @@ -43,6 +43,7 @@ #define PLATFORM_NAME "NUC123SD4AN0 NUC123 Cortex M0 USB Micro" #define NUC123xxxANx #undef NUC123xxxAEx +#define NUC123_FLASH_SIZE 0x11000 #else #error "NUC123 device unsupported or not specified" #endif @@ -188,6 +189,13 @@ /** * @brief Enables or disables data flash + * @warning If data this is set to @p TRUE, the data flash + * is subtracted from the APROM. The linker script is not aware + * of this, so therefore it is the responsiblity of the user to ensure + * that the combination of the data flash & the text section still fit + * into ROM. + + * @note The default is @p FALSE. */ #if !defined(NUC123_DATAFLASH_ENABLED) || defined(__DOXYGEN__) #define NUC123_DATAFLASH_ENABLED FALSE @@ -233,7 +241,7 @@ /* * Persistant configuration settings. */ -#if NUC123_DATAFLASH_ENABLE +#if (NUC123_DATAFLASH_ENABLED == TRUE) #if (NUC123_DATAFLASH_SIZE == 4096) /* DFVSEN = 1, nothing else matters */ diff --git a/os/hal/ports/NUMICRO/NUC123/platform.mk b/os/hal/ports/NUMICRO/NUC123/platform.mk index 5fc04b1420..741d66c8f4 100644 --- a/os/hal/ports/NUMICRO/NUC123/platform.mk +++ b/os/hal/ports/NUMICRO/NUC123/platform.mk @@ -17,6 +17,7 @@ include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/LLD/TIMv1/driver.mk include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/LLD/USBv1/driver.mk include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/LLD/SERIALv1/driver.mk include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/LLD/I2Cv1/driver.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/LLD/FLASHv1/driver.mk # Shared variables ALLCSRC += $(PLATFORMSRC) From ddb953ff79d6946353cd5b5e7ab0586b3a76f026 Mon Sep 17 00:00:00 2001 From: Alex Lewontin Date: Tue, 9 Feb 2021 14:47:38 -0500 Subject: [PATCH 10/15] NUC123: EFL testhal --- .../NUTINY-SDK-NUC123-V2.0/EFL/Makefile | 203 +++++ .../NUTINY-SDK-NUC123-V2.0/EFL/cfg/chconf.h | 766 ++++++++++++++++++ .../NUTINY-SDK-NUC123-V2.0/EFL/cfg/halconf.h | 533 ++++++++++++ .../EFL/cfg/halconf_community.h | 180 ++++ .../NUTINY-SDK-NUC123-V2.0/EFL/cfg/mcuconf.h | 41 + .../NUTINY-SDK-NUC123-V2.0/EFL/cfg/osalconf.h | 15 + .../EFL/cfg/shellconf.h | 139 ++++ .../NUC123/NUTINY-SDK-NUC123-V2.0/EFL/main.c | 99 +++ .../NUTINY-SDK-NUC123-V2.0/EFL/readme.txt | 47 ++ .../NUC123/NUTINY-SDK-NUC123-V2.0/EFL/shcfg.c | 112 +++ .../NUC123/NUTINY-SDK-NUC123-V2.0/EFL/shcfg.h | 52 ++ 11 files changed, 2187 insertions(+) create mode 100644 testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/Makefile create mode 100644 testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/chconf.h create mode 100644 testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/halconf.h create mode 100644 testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/halconf_community.h create mode 100644 testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/mcuconf.h create mode 100644 testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/osalconf.h create mode 100644 testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/shellconf.h create mode 100644 testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/main.c create mode 100644 testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/readme.txt create mode 100644 testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/shcfg.c create mode 100644 testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/shcfg.h diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/Makefile b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/Makefile new file mode 100644 index 0000000000..e1841ed4f9 --- /dev/null +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/Makefile @@ -0,0 +1,203 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -Og -ggdb3 -g3 -gdwarf-3 -gstrict-dwarf -fomit-frame-pointer -falign-functions=16 -pedantic +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO). +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# FPU-related options. +ifeq ($(USE_FPU_OPT),) + USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16 +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, target, sources and paths +# + +# Define project name here +PROJECT = ch + +# Target settings. +MCU = cortex-m0 + +# Imported source files and paths. +BASE_PATH := $(shell pwd)/../../../../../../.. +CHIBIOS := $(BASE_PATH)/ChibiOS/ChibiOS +CHIBIOS_CONTRIB := $(BASE_PATH)/ChibiOS/ChibiOS-Contrib +CONFDIR := ./cfg +BUILDDIR := ./build +DEPDIR := ./.dep + +# Licensing files. +include $(CHIBIOS)/os/license/license.mk +# Startup files. +include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_NUC123.mk +# HAL-OSAL files (optional). +#include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/NUC123/platform.mk +include $(CHIBIOS_CONTRIB)/os/hal/boards/NUTINY-SDK-NUC123-V2.0/board.mk +include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/rt/rt.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk +#include $(CHIBIOS)/os/common/ports/ARMv6-M/compilers/GCC/mk/port.mk +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk +# Auto-build files in ./source recursively. +include $(CHIBIOS)/tools/mk/autobuild.mk +# Other files (optional). +include $(CHIBIOS)/os/hal/lib/streams/streams.mk +include $(CHIBIOS)/os/various/shell/shell.mk +include $(CHIBIOS)/os/hal/lib/complex/mfs/hal_mfs.mk + +# Define linker script file here +LDSCRIPT= $(STARTUPLD_CONTRIB)/NUC123xD4xx0.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ + shcfg.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = $(ALLCPPSRC) + +# List ASM source files here. +ASMSRC = $(ALLASMSRC) + +# List ASM with preprocessor source files here. +ASMXSRC = $(ALLXASMSRC) + +# Inclusion directories. +INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC) + +# Define C warning options here. +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes + +# Define C++ warning options here. +CPPWARN = -Wall -Wextra -Wundef + +# +# Project, target, sources and paths +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = -DSHELL_CONFIG_FILE + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user section +############################################################################## + +############################################################################## +# Common rules +# + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk +include $(RULESPATH)/arm-none-eabi.mk +include $(RULESPATH)/rules.mk + +# +# Common rules +############################################################################## + +############################################################################## +# Custom rules +# + +READLINK:=greadlink +OPENOCD:=$(shell $(READLINK) -f `which openocd`) +OPENOCDPATH:=$(shell dirname $(OPENOCD))/../share/openocd + +flash: $(BUILDDIR)/$(PROJECT).elf + openocd -f ../scripts/interface/nulink.cfg -f ../scripts/target/numicro.cfg -c "program $< reset exit" + +# +# Custom rules +############################################################################## diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/chconf.h b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/chconf.h new file mode 100644 index 0000000000..c0e5077922 --- /dev/null +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/chconf.h @@ -0,0 +1,766 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file rt/templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_6_1_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION 32 +#endif + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY 10000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA 0 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) +#define CH_CFG_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) +#define CH_CFG_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TM) +#define CH_CFG_USE_TM FALSE +#endif + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_REGISTRY) +#define CH_CFG_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES FALSE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES TRUE +#endif + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_CONDVARS) +#define CH_CFG_USE_CONDVARS FALSE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +#define CH_CFG_USE_CONDVARS_TIMEOUT FALSE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +#define CH_CFG_USE_EVENTS_TIMEOUT FALSE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES FALSE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name OSLIB options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES FALSE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE TRUE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE 0 +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP TRUE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS FALSE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS FALSE +#endif + +/** + * @brief Pipes APIs. + * @details If enabled then the pipes APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_PIPES) +#define CH_CFG_USE_PIPES FALSE +#endif + +/** + * @brief Objects Caches APIs. + * @details If enabled then the objects caches APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_CACHES) +#define CH_CFG_USE_OBJ_CACHES FALSE +#endif + +/** + * @brief Delegate threads APIs. + * @details If enabled then the delegate threads APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_DELEGATES) +#define CH_CFG_USE_DELEGATES FALSE +#endif + +/** + * @brief Jobs Queues APIs. + * @details If enabled then the jobs queues APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_JOBS) +#define CH_CFG_USE_JOBS FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY FALSE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY FALSE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS FALSE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES FALSE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES FALSE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS FALSE +#endif + +/** + * @brief Enables factory for Pipes. + */ +#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) +#define CH_CFG_FACTORY_PIPES FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS FALSE +#endif + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#if !defined(CH_DBG_THREADS_PROFILING) +#define CH_DBG_THREADS_PROFILING FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() \ + { \ + /* Add threads initialization code here.*/ \ + } + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) \ + { \ + /* Add threads initialization code here.*/ \ + } + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) \ + { \ + /* Add threads finalization code here.*/ \ + } + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) \ + { \ + /* Context switch code here.*/ \ + } + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() \ + { \ + /* IRQ prologue code here.*/ \ + } + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() \ + { \ + /* IRQ epilogue code here.*/ \ + } + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() \ + { \ + /* Idle-enter code here.*/ \ + } + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() \ + { \ + /* Idle-leave code here.*/ \ + } + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() \ + { \ + /* Idle loop code here.*/ \ + } + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() \ + { \ + /* System tick event code here.*/ \ + } + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) \ + { \ + /* System halt code here.*/ \ + } + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) \ + { \ + /* Trace code here.*/ \ + } + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/halconf.h b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/halconf.h new file mode 100644 index 0000000000..531d9c1fb7 --- /dev/null +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/halconf.h @@ -0,0 +1,533 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#define _CHIBIOS_HAL_CONF_ +#define _CHIBIOS_HAL_CONF_VER_7_1_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the EFlash subsystem. + */ +#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__) +#define HAL_USE_EFL TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SIO subsystem. + */ +#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) +#define HAL_USE_SIO FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the TRNG subsystem. + */ +#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) +#define HAL_USE_TRNG FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/** + * @brief Enables the WSPI subsystem. + */ +#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) +#define HAL_USE_WSPI FALSE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) +#define PAL_USE_CALLBACKS FALSE +#endif + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) +#define PAL_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/** + * @brief Enforces the driver to use direct callbacks rather than OSAL events. + */ +#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) +#define CAN_ENFORCE_USE_CALLBACKS FALSE +#endif + +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + +/*===========================================================================*/ +/* DAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) +#define DAC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define DAC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the zero-copy API. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/** + * @brief OCR initialization constant for V20 cards. + */ +#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) +#define SDC_INIT_OCR_V20 0x50FF8000U +#endif + +/** + * @brief OCR initialization constant for non-V20 cards. + */ +#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) +#define SDC_INIT_OCR 0x80100000U +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables circular transfers APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) +#define SPI_USE_CIRCULAR FALSE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/** + * @brief Handling method for SPI CS line. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) +#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* WSPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) +#define WSPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define WSPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#include "halconf_community.h" + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/halconf_community.h b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/halconf_community.h new file mode 100644 index 0000000000..8b650109d2 --- /dev/null +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/halconf_community.h @@ -0,0 +1,180 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/** + * @brief Enables the USB_HID subsystem. + */ +#if !defined(HAL_USE_USB_HID) || defined(__DOXYGEN__) +#define HAL_USE_USB_HID FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/mcuconf.h b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/mcuconf.h new file mode 100644 index 0000000000..b7e52f87ab --- /dev/null +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/mcuconf.h @@ -0,0 +1,41 @@ +/* + ChibiOS - Copyright (C) 2020 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef _MCUCONF_H_ +#define _MCUCONF_H_ + +/* + * Board setting + */ + +/* + * HAL driver system settings. + */ +#define NUC123_PLL_ENABLED TRUE +#define NUC123_PLLSRC NUC123_PLLSRC_HSE + +#define NUC123_SERIAL_CLKSRC NUC123_SERIAL_CLKSRC_HSI + +#define NUC123_DATAFLASH_ENABLED TRUE +#define NUC123_DATAFLASH_SIZE 4096 +#define NUC123_EFL_ACCESS_APROM TRUE +#define NUC123_EFL_ACCESS_DATAFLASH TRUE +#define NUC123_EFL_ACCESS_LDROM TRUE +#define NUC123_EFL_ACCESS_CONFIG TRUE + +#define NUC123_MCUCONF + +#endif /* _MCUCONF_H_ */ diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/osalconf.h b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/osalconf.h new file mode 100644 index 0000000000..0b67c88d15 --- /dev/null +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/osalconf.h @@ -0,0 +1,15 @@ +/* + ChibiOS - Copyright (C) 2020 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/shellconf.h b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/shellconf.h new file mode 100644 index 0000000000..e959993888 --- /dev/null +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/shellconf.h @@ -0,0 +1,139 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file shellconf.h + * @brief Simple CLI shell configuration header. + * + * @addtogroup SHELL + * @{ + */ + +#ifndef SHELLCONF_H +#define SHELLCONF_H + +/** + * @brief Shell maximum input line length. + */ +#if !defined(SHELL_MAX_LINE_LENGTH) || defined(__DOXYGEN__) +#define SHELL_MAX_LINE_LENGTH 64 +#endif + +/** + * @brief Shell maximum arguments per command. + */ +#if !defined(SHELL_MAX_ARGUMENTS) || defined(__DOXYGEN__) +#define SHELL_MAX_ARGUMENTS 4 +#endif + +/** + * @brief Shell maximum command history. + */ +#if !defined(SHELL_MAX_HIST_BUFF) || defined(__DOXYGEN__) +#define SHELL_MAX_HIST_BUFF 8 * SHELL_MAX_LINE_LENGTH +#endif + +/** + * @brief Enable shell command history + */ +#if !defined(SHELL_USE_HISTORY) || defined(__DOXYGEN__) +#define SHELL_USE_HISTORY FALSE +#endif + +/** + * @brief Enable shell command completion + */ +#if !defined(SHELL_USE_COMPLETION) || defined(__DOXYGEN__) +#define SHELL_USE_COMPLETION FALSE +#endif + +/** + * @brief Shell Maximum Completions (Set to max commands with common prefix) + */ +#if !defined(SHELL_MAX_COMPLETIONS) || defined(__DOXYGEN__) +#define SHELL_MAX_COMPLETIONS 8 +#endif + +/** + * @brief Enable shell escape sequence processing + */ +#if !defined(SHELL_USE_ESC_SEQ) || defined(__DOXYGEN__) +#define SHELL_USE_ESC_SEQ TRUE +#endif + +/*===========================================================================*/ +/* Shell command settings */ +/*===========================================================================*/ + +/** + * @brief Enable shell exit command + */ +#if !defined(SHELL_CMD_EXIT_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_EXIT_ENABLED TRUE +#endif + +/** + * @brief Enable shell info command + */ +#if !defined(SHELL_CMD_INFO_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_INFO_ENABLED TRUE +#endif + +/** + * @brief Enable shell echo command + */ +#if !defined(SHELL_CMD_ECHO_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_ECHO_ENABLED TRUE +#endif + +/** + * @brief Enable shell systime command + */ +#if !defined(SHELL_CMD_SYSTIME_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_SYSTIME_ENABLED TRUE +#endif + +/** + * @brief Enable shell mem command + */ +#if !defined(SHELL_CMD_MEM_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_MEM_ENABLED TRUE +#endif + +/** + * @brief Enable shell threads command + */ +#if !defined(SHELL_CMD_THREADS_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_THREADS_ENABLED TRUE +#endif + +/** + * @brief Enable shell test command + */ +#if !defined(SHELL_CMD_TEST_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_TEST_ENABLED FALSE +#endif + +/** + * @brief Define test thread working area + */ +#if !defined(SHELL_CMD_TEST_WA_SIZE) || defined(__DOXYGEN__) +#define SHELL_CMD_TEST_WA_SIZE THD_WORKING_AREA_SIZE(256) +#endif + +#endif /* SHELLCONF_H */ + +/** @} */ diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/main.c b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/main.c new file mode 100644 index 0000000000..93e86ecbf1 --- /dev/null +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/main.c @@ -0,0 +1,99 @@ +/* + Copyright (C) 2021 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "hal.h" +#include "shcfg.h" + + +const SerialConfig shell_serial_cfg = { + .speed = 57600, + .mode = NUC123_SERIAL_MODE_DEFAULT, + .data = NUC123_SERIAL_DATA_8BITS, + .parity = NUC123_SERIAL_PARITY_N, + .stop = NUC123_SERIAL_STOP_1}; + + +/* + * Onboard LED blinker thread, times are in milliseconds. + */ +static THD_WORKING_AREA(waBlinkThread, 128); +static THD_FUNCTION(BlinkThread, arg) +{ + (void)arg; + chRegSetThreadName("blinker"); + while (true) { + systime_t time = 500; + OnboardLED_Toggle(); + chThdSleepMilliseconds(time); + } +} + +/* + * Application entry point. + */ +int main(void) +{ + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + OnboardLED_Init(); + + /* + * Turn off the onboard LED. + */ + OnboardLED_Off(); + + chDbgSuspendTrace(CH_DBG_TRACE_MASK_SWITCH); + + /* + * Activates the serial driver. + */ + sdStart(&SHELL_SERIAL_DRIVER, &shell_serial_cfg); + + /* + * Shell manager initialization. + */ + shellInit(); + + + eflStart(&EFLD1, NULL); + EFLD1.bank = NUC123_EFL_BANK_DATAFLASH; + mfsObjectInit(&mfsd); + mfsStart(&mfsd, &mfsd_config); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic( + waBlinkThread, sizeof(waBlinkThread), NORMALPRIO, BlinkThread, NULL); + + while (true) { + thread_t *shelltp = chThdCreateFromHeap(NULL, + SHELL_WA_SIZE, + "shell", + NORMALPRIO + 1, + shellThread, + (void *)&shell_cfg); + chThdWait(shelltp); /* Waiting termination. */ + chThdSleepMilliseconds(1000); + } +} diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/readme.txt b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/readme.txt new file mode 100644 index 0000000000..4f69310233 --- /dev/null +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/readme.txt @@ -0,0 +1,47 @@ +***************************************************************************** +** ChibiOS/HAL - EFL driver demo for NUC123. ** +***************************************************************************** + +** TARGET ** + +The demo runs on a NUTINY-SDK-NUC123-V2.0 board with a NUC123SD4AN0 MCU. + +** The Demo ** + +The application demonstrates the use of the NUC123 EFL driver. The test exposes +shell access via the SD0 serial port (configured to 57600 8N1), +accessible through the corresponding pins or via the on-board NuLinkMe. +That shell allows for 3 non-default commands: + + - kvs_put key value : This command stores value associated with key. + value is a string, and key is a numeric value + [1, MFS_CFG_MAX_RECORDS] + - kvs_get key : This command retrieves the value associated with + key. + - kvs_erase {--all|key} : This command either erases the value associated + with key, or all key value pairs. + +The data store should persist, even when the board loses power. Try restarting +the board and make sure the state is as you left it. + +** Board Setup ** + +To use an external serial interface: +- Attach a serial bus to pins 21-24, and the GND: + 21 - NUC123 RX + 22 - NUC123 TX + 23 - NUC123 nRTS (optional) + 24 - NUC123 nCTS (optional) +- Ensure that the interface is set to the same configuration as the demo + (by default 57600 8N1) + +To use the ICE's on-board USB-serial interface: +- Set SW2 1-4 to ON +- Connect a USB cable from a workstation to J5 + +** Build Procedure ** + +The demo has been tested using gcc version 10.2.1 (GNU Arm Embedded Toolchain 10-2020-q4-major). +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/shcfg.c b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/shcfg.c new file mode 100644 index 0000000000..7a15090f0d --- /dev/null +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/shcfg.c @@ -0,0 +1,112 @@ +/* + Copyright (C) 2021 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file shcfg.c + * @brief Shell config. + * + * @addtogroup Shell + * @{ + */ +#include "hal.h" +#include "shcfg.h" +#include "chprintf.h" + +#include +#include + +MFSDriver mfsd; + +const MFSConfig mfsd_config = {.flashp = (BaseFlash *)&EFLD1, + .erased = 0xFFFFFFFF, + .bank0_sectors = 4, + .bank0_start = 0, + .bank1_sectors = 4, + .bank1_start = 4, + .bank_size = 2048}; + +void sh_kvs_put(BaseSequentialStream *chp, int argc, char *argv[]) { + if (argc < 2) { + chprintf(chp, "Format: kvs_put key [value]\nAt this time, key must be numeric.\n"); + return; + } + mfs_id_t rid = atoi(argv[0]); + if (rid < 1 || MFS_CFG_MAX_RECORDS < rid) { + chprintf(chp, "key must be [%d, %d].\n", 1, MFS_CFG_MAX_RECORDS); + return; + } + mfsWriteRecord(&mfsd, rid, strlen(argv[1]), (uint8_t *)argv[1]); +} + +void sh_kvs_get(BaseSequentialStream *chp, int argc, char *argv[]) { + if (argc < 1) { + chprintf(chp, + "Format: kvs_get key\nAt this time, key must be " + "numeric.\n"); + return; + } + mfs_id_t rid = atoi(argv[0]); + if (rid < 1 || MFS_CFG_MAX_RECORDS < rid) { + chprintf(chp, "key must be [%d, %d].\n", 1, MFS_CFG_MAX_RECORDS); + return; + } + + uint8_t buf[128]; + size_t n = 128; + mfs_error_t err = mfsReadRecord(&mfsd, rid, &n, buf); + switch (err) { + case MFS_WARN_GC: + case MFS_WARN_REPAIR: + case MFS_NO_ERROR: + chprintf(chp, "%.*s\n", n, buf); + break; + case MFS_ERR_NOT_FOUND: + chprintf(chp, "Record not found\n"); + break; + default: + chprintf(chp, "Unknown error reading record: %d\n", err); + } +} + +const char all_flag[] = "--all"; +void sh_kvs_erase(BaseSequentialStream *chp, int argc, char *argv[]) { + + if (argc < 1) { + chprintf(chp, + "Format: kvs_erase [%s] key\nAt this time, key must be" + "numeric.\n", all_flag); + return; + } + + if (strcmp(all_flag, argv[0]) == 0) { + mfsErase(&mfsd); + } else { + mfs_id_t rid = atoi(argv[0]); + if (rid < 1 || MFS_CFG_MAX_RECORDS < rid) { + chprintf(chp, "key must be [%d, %d].\n", 1, MFS_CFG_MAX_RECORDS); + return; + } + mfsEraseRecord(&mfsd, rid); + } + +} + +const ShellCommand commands[] = {{"kvs_put", sh_kvs_put}, + {"kvs_get", sh_kvs_get}, + {"kvs_erase", sh_kvs_erase}, + {NULL, NULL}}; + +const ShellConfig shell_cfg = {(BaseSequentialStream *)&SHELL_SERIAL_DRIVER, commands}; diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/shcfg.h b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/shcfg.h new file mode 100644 index 0000000000..ef7ba44e1d --- /dev/null +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/shcfg.h @@ -0,0 +1,52 @@ +/* + Copyright (C) 2021 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file shcfg.h + * @brief Shell config header. + * + * @addtogroup Shell + * @{ + */ + +#ifndef USBCFG_H +#define USBCFG_H + +#include "hal.h" +#include "hal_mfs.h" +#include "shell.h" + +#define SHELL_SERIAL_DRIVER SD0 + +#define SHELL_WA_SIZE THD_WORKING_AREA_SIZE(1024) + +#ifdef __cplusplus + extern "C" { +#endif + + extern const ShellConfig shell_cfg; + extern const ShellCommand commands[]; + + extern MFSDriver mfsd; + extern const MFSConfig mfsd_config; + +#ifdef __cplusplus +} +#endif + +#endif /* USBCFG_H */ + +/** @} */ From 8bd3bde0132ac96d614220999df1df8dbd2e7a47 Mon Sep 17 00:00:00 2001 From: Alex Lewontin Date: Mon, 15 Feb 2021 11:35:01 -0500 Subject: [PATCH 11/15] NUC123: Added CONFIG enabling switch --- .../ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.h | 4 ++++ os/hal/ports/NUMICRO/NUC123/hal_lld.c | 8 +++++-- os/hal/ports/NUMICRO/NUC123/hal_lld.h | 24 +++++++++++++++++-- .../NUTINY-SDK-NUC123-V2.0/EFL/cfg/mcuconf.h | 1 + 4 files changed, 33 insertions(+), 4 deletions(-) diff --git a/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.h b/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.h index 200955c207..c49c149902 100644 --- a/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.h +++ b/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.h @@ -96,6 +96,10 @@ /* Derived constants and error checks. */ /*===========================================================================*/ +#if (NUC123_EFL_ACCESS_DATAFLASH == TRUE) && (NUC123_CONFIG_ENABLED == FALSE) +#error "EFL driver data flash access requires NUC123_CONFIG_ENABLED to be set to TRUE" +#endif + /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ diff --git a/os/hal/ports/NUMICRO/NUC123/hal_lld.c b/os/hal/ports/NUMICRO/NUC123/hal_lld.c index fa99a59658..b7c342570f 100644 --- a/os/hal/ports/NUMICRO/NUC123/hal_lld.c +++ b/os/hal/ports/NUMICRO/NUC123/hal_lld.c @@ -50,8 +50,12 @@ uint32_t SystemCoreClock = __HSI; /* System Clock Frequency (Core Clock)*/ uint32_t CyclesPerUs = (__HSI / 1000000); /* Cycles per micro second */ uint32_t PllClock = __HSI; /*!< PLL Clock Frequency */ -volatile const uint32_t config0 __attribute__((used, unused, section(".nuc123_config0"))) = NUC123_CONFIG0; -volatile const uint32_t config1 __attribute__((used, unused, section(".nuc123_config1"))) = NUC123_CONFIG1; +#if (NUC123_CONFIG_ENABLED == TRUE) + +static volatile const uint32_t config0 __attribute__((used, unused, section(".nuc123_config0"))) = NUC123_CONFIG0; +static volatile const uint32_t config1 __attribute__((used, unused, section(".nuc123_config1"))) = NUC123_CONFIG1; + +#endif /*===========================================================================*/ /* Driver local functions. */ diff --git a/os/hal/ports/NUMICRO/NUC123/hal_lld.h b/os/hal/ports/NUMICRO/NUC123/hal_lld.h index f898bdae84..aa17d53207 100644 --- a/os/hal/ports/NUMICRO/NUC123/hal_lld.h +++ b/os/hal/ports/NUMICRO/NUC123/hal_lld.h @@ -187,6 +187,13 @@ #endif #endif +/** + * @brief Enables the use of the CONFIG0/1 registers + */ +#if !defined(NUC123_CONFIG_ENABLED) || defined(__DOXYGEN__) +#define NUC123_CONFIG_ENABLED FALSE +#endif + /** * @brief Enables or disables data flash * @warning If data this is set to @p TRUE, the data flash @@ -195,10 +202,10 @@ * that the combination of the data flash & the text section still fit * into ROM. - * @note The default is @p FALSE. + * @note The default is @p TRUE. */ #if !defined(NUC123_DATAFLASH_ENABLED) || defined(__DOXYGEN__) -#define NUC123_DATAFLASH_ENABLED FALSE +#define NUC123_DATAFLASH_ENABLED TRUE #endif /** @@ -241,6 +248,19 @@ /* * Persistant configuration settings. */ + +#if (NUC123_CONFIG_ENABLED == FALSE) + +#if (NUC123_DATAFLASH_ENABLED == FALSE) +#error "Setting NUC123_DATAFLASH_ENABLED to FALSE requires NUC123_CONFIG_ENABLED to be TRUE" +#endif + +#if (NUC123_DATAFLASH_SIZE != 4096) +#error "Setting NUC123_DATAFLASH_SIZE to a value other than 4096 requires NUC123_CONFIG_ENABLED to be TRUE" +#endif + +#endif + #if (NUC123_DATAFLASH_ENABLED == TRUE) #if (NUC123_DATAFLASH_SIZE == 4096) diff --git a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/mcuconf.h b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/mcuconf.h index b7e52f87ab..08642c6bf7 100644 --- a/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/mcuconf.h +++ b/testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/EFL/cfg/mcuconf.h @@ -29,6 +29,7 @@ #define NUC123_SERIAL_CLKSRC NUC123_SERIAL_CLKSRC_HSI +#define NUC123_CONFIG_ENABLED TRUE #define NUC123_DATAFLASH_ENABLED TRUE #define NUC123_DATAFLASH_SIZE 4096 #define NUC123_EFL_ACCESS_APROM TRUE From 1c7e06b378ec7d9b27bd88d857c757e908b7a0f2 Mon Sep 17 00:00:00 2001 From: Alex Lewontin Date: Tue, 16 Feb 2021 12:40:10 -0500 Subject: [PATCH 12/15] NUC123: Dynamic CONFIG value read --- .../ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.c | 146 +++++++++++------- .../ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.h | 4 - os/hal/ports/NUMICRO/NUC123/hal_lld.h | 55 ++++--- 3 files changed, 127 insertions(+), 78 deletions(-) diff --git a/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.c b/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.c index a2206e7503..fed4e16f84 100644 --- a/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.c +++ b/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.c @@ -42,13 +42,17 @@ #define NUC123_SECTOR_SIZE 0x200UL #define NUC123_LDROM_SIZE 0x1000UL -#define NUC123_APROM_SIZE (NUC123_FLASH_SIZE - NUC123_DATAFLASH_SIZE) #define NUC123_EFL_CMD_ERASE 0x22UL #define NUC123_EFL_CMD_PROG 0x21UL #define NUC123_EFL_CMD_READ 0UL #define NUC123_EFL_CMD_CHIPERASE 0x26UL /* Undocumented */ +#if ((NUC123_CONFIG_ENABLED == FALSE) || (NUC123_EFL_ACCESS_CONFIG == TRUE)) && \ + (NUC123_EFL_ACCESS_APROM == TRUE) && (NUC123_EFL_ACCESS_DATAFLASH == TRUE) +#define NUC123_EFL_DYNAMICALLY_CHECK_CONFIG TRUE +#endif + /*===========================================================================*/ /* Driver exported variables. */ /*===========================================================================*/ @@ -64,48 +68,7 @@ EFlashDriver EFLD1; /* Driver local variables and types. */ /*===========================================================================*/ -static const flash_descriptor_t efl_lld_descriptors[] = { -#if (NUC123_EFL_ACCESS_APROM == TRUE) || defined(__DOXYGEN__) - {.attributes = FLASH_ATTR_ERASED_IS_ONE | FLASH_ATTR_MEMORY_MAPPED | - FLASH_ATTR_REWRITABLE, - .page_size = NUC123_PAGE_SIZE, - .sectors_count = NUC123_APROM_SIZE / NUC123_SECTOR_SIZE, - .sectors = NULL, - .sectors_size = NUC123_SECTOR_SIZE, - .address = (uint8_t *)0, - .size = NUC123_APROM_SIZE}, -#endif -#if (NUC123_EFL_ACCESS_DATAFLASH == TRUE) || defined(__DOXYGEN__) - {.attributes = FLASH_ATTR_ERASED_IS_ONE | FLASH_ATTR_MEMORY_MAPPED | - FLASH_ATTR_REWRITABLE, - .page_size = NUC123_PAGE_SIZE, - .sectors_count = NUC123_DATAFLASH_SIZE / NUC123_SECTOR_SIZE, - .sectors = NULL, - .sectors_size = NUC123_SECTOR_SIZE, - .address = (uint8_t *)NUC123_DFBADDR, - .size = NUC123_DATAFLASH_SIZE}, -#endif -#if (NUC123_EFL_ACCESS_LDROM == TRUE) || defined(__DOXYGEN__) - {.attributes = FLASH_ATTR_ERASED_IS_ONE | FLASH_ATTR_MEMORY_MAPPED | - FLASH_ATTR_REWRITABLE, - .page_size = NUC123_PAGE_SIZE, - .sectors_count = NUC123_LDROM_SIZE / NUC123_SECTOR_SIZE, - .sectors = NULL, - .sectors_size = NUC123_SECTOR_SIZE, - .address = (uint8_t *)0x100000, - .size = NUC123_LDROM_SIZE}, -#endif -#if (NUC123_EFL_ACCESS_CONFIG == TRUE) || defined(__DOXYGEN__) - {.attributes = FLASH_ATTR_ERASED_IS_ONE | FLASH_ATTR_MEMORY_MAPPED | - FLASH_ATTR_REWRITABLE, - .page_size = NUC123_PAGE_SIZE, - .sectors_count = 1, - .sectors = NULL, - .sectors_size = NUC123_SECTOR_SIZE, - .address = (uint8_t *)0x300000, - .size = 8}, -#endif -}; +static flash_descriptor_t efl_lld_descriptor; /*===========================================================================*/ /* Driver local functions. */ @@ -164,6 +127,13 @@ static inline unsigned min(unsigned x, unsigned y) */ void efl_lld_init(void) { + efl_lld_descriptor = (flash_descriptor_t){ + .attributes = FLASH_ATTR_ERASED_IS_ONE | FLASH_ATTR_MEMORY_MAPPED | + FLASH_ATTR_REWRITABLE, + .page_size = NUC123_PAGE_SIZE, + .sectors = NULL, + .sectors_size = NUC123_SECTOR_SIZE, + }; #if (NUC123_EFL_USE_EFL1 == TRUE) eflObjectInit(&EFLD1); @@ -256,7 +226,79 @@ void efl_lld_stop(EFlashDriver* eflp) */ const flash_descriptor_t* efl_lld_get_descriptor(void* instance) { - return efl_lld_descriptors + ((EFlashDriver *)instance)->bank; + size_t dataflash_size; + void* dfbaddr; + +#if (NUC123_EFL_DYNAMICALLY_CHECK_CONFIG == TRUE) + + uint32_t ispcon = FMC->ISPCON; + + FMC->ISPCON = ispcon | FMC_ISPCON_CFGUEN_Msk; + FMC->ISPCMD = NUC123_EFL_CMD_READ; + + FMC->ISPADR = 0x300000UL; + do_ISP(); + dataflash_size = FMC->ISPDAT; + + if (dataflash_size & 4) { + /* DFVSEN = 1 */ + dataflash_size = 4096; + dfbaddr = (void *)0x1F000UL; + } else { + if (dataflash_size & 1) { + /* DFVSEN = 0 & DFEN = 1 */ + dataflash_size = 0; + dfbaddr = (void *)0xFFFFF000UL; + } else { + /* DFVSEN = 0 & DFEN = 0 */ + dfbaddr = (void *)FMC->DFBADR; + dataflash_size = NUC123_FLASH_SIZE - (uint32_t)dfbaddr; + } + } + + FMC->ISPCON = ispcon; + +#else + + dataflash_size = NUC123_CONFIG_DATAFLASH_SIZE; + dfbaddr = NUC123_DFBADDR; + +#endif + + switch (((EFlashDriver *)instance)->bank) { +#if (NUC123_EFL_ACCESS_APROM == TRUE) + case NUC123_EFL_BANK_APROM: + efl_lld_descriptor.address = (uint8_t *)0; + efl_lld_descriptor.sectors_count = (NUC123_FLASH_SIZE - dataflash_size) / NUC123_SECTOR_SIZE; + efl_lld_descriptor.size = (NUC123_FLASH_SIZE - dataflash_size); + break; +#endif +#if (NUC123_EFL_ACCESS_DATAFLASH == TRUE) + case NUC123_EFL_BANK_DATAFLASH: + efl_lld_descriptor.address = (uint8_t *)dfbaddr; + efl_lld_descriptor.sectors_count = dataflash_size / NUC123_SECTOR_SIZE; + efl_lld_descriptor.size = dataflash_size; + break; +#endif +#if (NUC123_EFL_ACCESS_LDROM == TRUE) + case NUC123_EFL_BANK_LDROM: + efl_lld_descriptor.address = (uint8_t *)0x100000; + efl_lld_descriptor.sectors_count = NUC123_LDROM_SIZE / NUC123_SECTOR_SIZE; + efl_lld_descriptor.size = NUC123_LDROM_SIZE; + break; +#endif +#if (NUC123_EFL_ACCESS_CONFIG == TRUE) + case NUC123_EFL_BANK_CONFIG: + efl_lld_descriptor.address = (uint8_t *)0x300000; + efl_lld_descriptor.sectors_count = 1; + efl_lld_descriptor.size = 8; + break; +#endif + case NUC123_EFL_BANK_NONE: + default: + return NULL; + } + return &efl_lld_descriptor; } /** @@ -274,16 +316,16 @@ const flash_descriptor_t* efl_lld_get_descriptor(void* instance) * * @notapi */ -flash_error_t efl_lld_read(void* instance, flash_offset_t offset, size_t n, uint8_t* rp) +flash_error_t efl_lld_read(void *instance, flash_offset_t offset, size_t n, uint8_t *rp) { - EFlashDriver* devp = (EFlashDriver*)instance; + EFlashDriver *devp = (EFlashDriver *)instance; const flash_descriptor_t *desc = efl_lld_get_descriptor(instance); - flash_error_t err = FLASH_NO_ERROR; - uint32_t data; + flash_error_t err = FLASH_NO_ERROR; + uint32_t data; osalDbgCheck((instance != NULL) && (rp != NULL) && (n > 0U)); osalDbgCheck(((size_t)offset + n) <= (size_t)desc->size); - osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE), + osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE), "invalid state"); /* No reading while erasing.*/ @@ -327,10 +369,10 @@ flash_error_t efl_lld_read(void* instance, flash_offset_t offset, size_t n, uint offset += (4 - (offset % 4)); } - /* Ready state again.*/ - devp->state = FLASH_READY; + /* Ready state again.*/ + devp->state = FLASH_READY; - return err; + return err; } /** diff --git a/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.h b/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.h index c49c149902..200955c207 100644 --- a/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.h +++ b/os/hal/ports/NUMICRO/LLD/FLASHv1/hal_efl_lld.h @@ -96,10 +96,6 @@ /* Derived constants and error checks. */ /*===========================================================================*/ -#if (NUC123_EFL_ACCESS_DATAFLASH == TRUE) && (NUC123_CONFIG_ENABLED == FALSE) -#error "EFL driver data flash access requires NUC123_CONFIG_ENABLED to be set to TRUE" -#endif - /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ diff --git a/os/hal/ports/NUMICRO/NUC123/hal_lld.h b/os/hal/ports/NUMICRO/NUC123/hal_lld.h index aa17d53207..e2e4c66756 100644 --- a/os/hal/ports/NUMICRO/NUC123/hal_lld.h +++ b/os/hal/ports/NUMICRO/NUC123/hal_lld.h @@ -194,6 +194,7 @@ #define NUC123_CONFIG_ENABLED FALSE #endif +#if (NUC123_CONFIG_ENABLED == TRUE) /** * @brief Enables or disables data flash * @warning If data this is set to @p TRUE, the data flash @@ -204,17 +205,19 @@ * @note The default is @p TRUE. */ -#if !defined(NUC123_DATAFLASH_ENABLED) || defined(__DOXYGEN__) -#define NUC123_DATAFLASH_ENABLED TRUE +#if !defined(NUC123_CONFIG_DATAFLASH_ENABLED) || defined(__DOXYGEN__) +#define NUC123_CONFIG_DATAFLASH_ENABLED TRUE #endif /** * @brief Sets the data flash size. This is ignored if data flash is disabled. */ -#if !defined(NUC123_DATAFLASH_SIZE) || defined(__DOXYGEN__) -#define NUC123_DATAFLASH_SIZE 4096 +#if !defined(NUC123_CONFIG_DATAFLASH_SIZE) || defined(__DOXYGEN__) +#define NUC123_CONFIG_DATAFLASH_SIZE 4096 #endif +#endif /* NUC123_CONFIG_ENABLED == TRUE */ + /** @} */ /*===========================================================================*/ @@ -249,41 +252,49 @@ * Persistant configuration settings. */ -#if (NUC123_CONFIG_ENABLED == FALSE) - -#if (NUC123_DATAFLASH_ENABLED == FALSE) -#error "Setting NUC123_DATAFLASH_ENABLED to FALSE requires NUC123_CONFIG_ENABLED to be TRUE" -#endif - -#if (NUC123_DATAFLASH_SIZE != 4096) -#error "Setting NUC123_DATAFLASH_SIZE to a value other than 4096 requires NUC123_CONFIG_ENABLED to be TRUE" -#endif - -#endif +#if (NUC123_CONFIG_ENABLED == TRUE) -#if (NUC123_DATAFLASH_ENABLED == TRUE) +#if (NUC123_CONFIG_DATAFLASH_ENABLED == TRUE) -#if (NUC123_DATAFLASH_SIZE == 4096) +#if (NUC123_CONFIG_DATAFLASH_SIZE == 4096) /* DFVSEN = 1, nothing else matters */ #define NUC123_CONFIG0_DATAFLASH 0UL /* NUC123_DFBADDR doesn't actually control anything here, but convenient for flash drivers which need the starting address */ #define NUC123_DFBADDR 0x1F000UL -#else +#else /* NUC123_CONFIG_DATAFLASH_SIZE != 4096 */ /* DFVSEN = 0, DFEN = 0 */ #define NUC123_CONFIG0_DATAFLASH (NUC123_CONFIG0_DFVSEN_Msk | NUC123_CONFIG0_DFEN_Msk) -#define NUC123_DFBADDR ((0x11000UL - NUC123_DATAFLASH_SIZE) & ~(0xFFUL)) -#endif -#else +#define NUC123_DFBADDR ((0x11000UL - NUC123_CONFIG_DATAFLASH_SIZE) & ~(0xFFUL)) +#endif /* NUC123_CONFIG_DATAFLASH_SIZE ?= 4096 */ +#else /* NUC123_CONFIG_DATAFLASH_ENABLED == TRUE/FALSE */ + +#undef NUC123_CONFIG_DATAFLASH_SIZE +#define NUC123_CONFIG_DATAFLASH_SIZE 0 /* DFVSEN = 0, DFEN = 1 */ #define NUC123_CONFIG0_DATAFLASH NUC123_CONFIG0_DFVSEN_Msk #define NUC123_DFBADDR 0xFFFFFF00UL -#endif + +#endif /* NUC123_CONFIG_DATAFLASH_ENABLED == TRUE/FALSE */ #define NUC123_CONFIG0 \ 0xFFFFFFFFUL & (~NUC123_CONFIG0_DATAFLASH) & (~NUC123_CONFIG0_HSE_PINS) #define NUC123_CONFIG1 NUC123_DFBADDR +#else /* NUC123_CONFIG_ENABLED == FALSE */ + +#if defined(NUC123_CONFIG_DATAFLASH_ENABLED) +#error \ + "Defining NUC123_CONFIG_DATAFLASH_ENABLED requires NUC123_CONFIG_ENABLED to be TRUE" +#endif + +#if defined(NUC123_CONFIG_DATAFLASH_SIZE) +#error \ + "Defining NUC123_CONFIG_DATAFLASH_SIZE requires NUC123_CONFIG_ENABLED to be TRUE" +#endif + +#endif /* NUC123_CONFIG_ENABLED == TRUE/FALSE */ + /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ From 5aa8e79ac71976178f833c58f7fab86969a26991 Mon Sep 17 00:00:00 2001 From: Ein Terakawa Date: Sat, 27 Feb 2021 22:58:02 +0900 Subject: [PATCH 13/15] Experimental NUC120 support --- .../ARMCMx/compilers/GCC/ld/NUC120xE3xx.ld | 102 +++ os/hal/ports/NUMICRO/LLD/TIMv1/hal_st_lld.h | 5 - os/hal/ports/NUMICRO/LLD/USBv1/hal_usb_lld.c | 4 + os/hal/ports/NUMICRO/NUC120/NUC120.h | 1 + os/hal/ports/NUMICRO/NUC120/hal_lld.c | 585 ++++++++++++++++++ os/hal/ports/NUMICRO/NUC120/hal_lld.h | 331 ++++++++++ os/hal/ports/NUMICRO/NUC120/nuc120_isr.h | 150 +++++ os/hal/ports/NUMICRO/NUC120/nuc120_registry.h | 244 ++++++++ os/hal/ports/NUMICRO/NUC120/platform.mk | 25 + 9 files changed, 1442 insertions(+), 5 deletions(-) create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/NUC120xE3xx.ld create mode 100644 os/hal/ports/NUMICRO/NUC120/NUC120.h create mode 100644 os/hal/ports/NUMICRO/NUC120/hal_lld.c create mode 100644 os/hal/ports/NUMICRO/NUC120/hal_lld.h create mode 100644 os/hal/ports/NUMICRO/NUC120/nuc120_isr.h create mode 100644 os/hal/ports/NUMICRO/NUC120/nuc120_registry.h create mode 100644 os/hal/ports/NUMICRO/NUC120/platform.mk diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/NUC120xE3xx.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/NUC120xE3xx.ld new file mode 100644 index 0000000000..0db41bee4b --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/NUC120xE3xx.ld @@ -0,0 +1,102 @@ +/* + Copyright (C) 2020 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * NUC123xD4xx0 memory setup. + * 64k ROM, 20k ram + */ +MEMORY +{ + flash0 (rx) : org = 0x00000000, len = 0x20000 /* APROM */ + flash1 (rx) : org = 0x00000000, len = 0 /* Data flash placeholder */ + flash2 (rx) : org = 0x00100000, len = 0x1000 /* LDROM */ + flash3 (rx) : org = 0x00300000, len = 4 /* Config0 */ + flash4 (rx) : org = 0x00300004, len = 4 /* Config1 */ + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 0x4000 + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +REGION_ALIAS("CONFIG0", flash3); +REGION_ALIAS("CONFIG1", flash4); + +SECTIONS +{ + .nuc123_config0 : ALIGN(4) + { + KEEP(*(.nuc123_config0)) + } > CONFIG0 + + .nuc123_config1 : ALIGN(4) + { + KEEP(*(.nuc123_config1)) + } > CONFIG1 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/os/hal/ports/NUMICRO/LLD/TIMv1/hal_st_lld.h b/os/hal/ports/NUMICRO/LLD/TIMv1/hal_st_lld.h index f9191fb4f0..f5d7924318 100644 --- a/os/hal/ports/NUMICRO/LLD/TIMv1/hal_st_lld.h +++ b/os/hal/ports/NUMICRO/LLD/TIMv1/hal_st_lld.h @@ -29,11 +29,6 @@ #include "mcuconf.h" -/* - * Registry definitions. - */ -#include "nuc123_registry.h" - /*===========================================================================*/ /* Driver constants. */ /*===========================================================================*/ diff --git a/os/hal/ports/NUMICRO/LLD/USBv1/hal_usb_lld.c b/os/hal/ports/NUMICRO/LLD/USBv1/hal_usb_lld.c index 3596cd9336..2cefe45e74 100644 --- a/os/hal/ports/NUMICRO/LLD/USBv1/hal_usb_lld.c +++ b/os/hal/ports/NUMICRO/LLD/USBv1/hal_usb_lld.c @@ -138,7 +138,11 @@ static uint32_t sram_free_dword_offset = 1UL; */ #define HW_OUT_EPN(lepn) (2 * (lepn)) #define HW_IN_EPN(lepn) (HW_OUT_EPN(lepn) + 1) +#if NUC123_USB_HW_ENDPOINTS <= 6 +#define HW_EP(hwepn) ((USBD_EP_T *)&(USBD->RESERVE0[1]) + (hwepn)) +#else #define HW_EP(hwepn) ((USBD->EP) + (hwepn)) +#endif #define HW_OUT_EP(lepn) (HW_EP(HW_OUT_EPN(lepn))) #define HW_IN_EP(lepn) (HW_EP(HW_IN_EPN(lepn))) #define LOGICAL_EPN(hwepn) ((hwepn) / 2) diff --git a/os/hal/ports/NUMICRO/NUC120/NUC120.h b/os/hal/ports/NUMICRO/NUC120/NUC120.h new file mode 100644 index 0000000000..aadc211eee --- /dev/null +++ b/os/hal/ports/NUMICRO/NUC120/NUC120.h @@ -0,0 +1 @@ +#include "NUC123.h" diff --git a/os/hal/ports/NUMICRO/NUC120/hal_lld.c b/os/hal/ports/NUMICRO/NUC120/hal_lld.c new file mode 100644 index 0000000000..e552ffb41e --- /dev/null +++ b/os/hal/ports/NUMICRO/NUC120/hal_lld.c @@ -0,0 +1,585 @@ +/* + Copyright (C) 2020 Alex Lewontin + Copyright (C) 2019 /u/KeepItUnder + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file hal_lld.c + * @brief NUC123 HAL subsystem low level driver source. + * + * @addtogroup HAL + * @{ + */ + +#include "hal.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ +#define FREQ_25MHZ 25000000 +#define FREQ_50MHZ 50000000 +#define FREQ_72MHZ 72000000 +#define FREQ_100MHZ 100000000 +#define FREQ_200MHZ 200000000 + +#define CLK_CLKDIV_HCLK(x) (((x)-1) << CLK_CLKDIV_HCLK_N_Pos) + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +_Bool clock_initialized = FALSE; + +uint32_t SystemCoreClock = __HSI; /* System Clock Frequency (Core Clock)*/ +uint32_t CyclesPerUs = (__HSI / 1000000); /* Cycles per micro second */ +uint32_t PllClock = __HSI; /*!< PLL Clock Frequency */ + +#if (NUC123_CONFIG_ENABLED == TRUE) +#if 0 +static volatile const uint32_t config0 __attribute__((used, unused, section(".nuc123_config0"))) = NUC123_CONFIG0; +static volatile const uint32_t config1 __attribute__((used, unused, section(".nuc123_config1"))) = NUC123_CONFIG1; +#endif +#endif + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +void SystemCoreClockUpdate(void) /* Get Core Clock Frequency */ +{ + /* ToDo: add code to calculate the system frequency based upon the current + register settings. + This function can be used to retrieve the system core clock frequeny + after user changed register sittings. */ + /* SystemCoreClock = SYSTEM_CLOCK; */ + + uint32_t clkFreq; + uint32_t PllReg; + + uint32_t pllFIN, pllNF, pllNR, pllNO; + + /* Update PLL Clock */ + /* PllClock = clks_lld_get_pll_clock_freq(); */ + PllReg = CLK->PLLCON; + + if (PllReg & (CLK_PLLCON_PD_Msk | CLK_PLLCON_OE_Msk)) { + PllClock = 0; /* PLL is off. */ + } else { + + if (PllReg & 0x00080000ul) { + pllFIN = __HIRC; /* Use HXT for PLL clock */ + } else { + pllFIN = NUC123_HSECLK; /* Use HXT for PLL clock */ + } + + if (PllReg & CLK_PLLCON_BP_Msk) { + PllClock = pllFIN; + } else { + switch (((PllReg & CLK_PLLCON_OUT_DV_Msk) >> CLK_PLLCON_OUT_DV_Pos)) { + case 0: /* OUT_DIV == 00 : NO = 1 */ + pllNO = 1; + break; + case 3: /* OUT_DIV == 11 : NO = 4 */ + pllNO = 4; + break; + default: /* OUT_DIV == 01 or 10 : NO = 2 */ + pllNO = 2; + break; + } + + pllNF = ((PllReg & CLK_PLLCON_FB_DV_Msk) >> CLK_PLLCON_FB_DV_Pos) + 2; + pllNR = ((PllReg & CLK_PLLCON_IN_DV_Msk) >> CLK_PLLCON_IN_DV_Pos) + 2; + + /* Shift right to avoid overflow condition */ + PllClock = (((pllFIN >> 2) * pllNF) / (pllNR * pllNO) << 2); + } + } + + /* Pick Clock Source */ + switch (CLK->CLKSEL0 & CLK_CLKSEL0_HCLK_S_Msk) { + case 0: /* External HF Xtal */ + clkFreq = NUC123_HSECLK; + break; + case 1: /* PLL clock / 2 */ + clkFreq = PllClock >> 1; + break; + case 3: /* Internal 10kHz */ + clkFreq = __LIRC; + break; + case 2: /* PLL clock */ + clkFreq = PllClock; + break; + case 7: /* Internal 22.184MHz */ + clkFreq = __HIRC; + break; + default: + clkFreq = 0; + break; + } + + SystemCoreClock = clkFreq / ((CLK->CLKDIV & CLK_CLKDIV_HCLK_N_Msk) + 1); + CyclesPerUs = SystemCoreClock / 1000000; +} + +/** + * @brief Get PLL clock frequency + * @param None + * @return PLL frequency + * @details This function get PLL frequency. The frequency unit is Hz. + */ +static inline uint32_t get_pll_clock_freq(void) +{ + uint32_t PllReg; + uint32_t pllFIN, pllNF, pllNR, pllNO; + + PllReg = CLK->PLLCON; + + if (PllReg & (CLK_PLLCON_PD_Msk | CLK_PLLCON_OE_Msk)) { + PllClock = 0; /* PLL is in power down mode or fix low */ + } else { + + if (PllReg & NUC123_PLLSRC_HSI) { + pllFIN = __HIRC; /* Use HXT for PLL clock */ + } else { + pllFIN = NUC123_HSECLK; /* Use HXT for PLL clock */ + } + + if (PllReg & CLK_PLLCON_BP_Msk) { + PllClock = pllFIN; + } else { + switch (((PllReg & CLK_PLLCON_OUT_DV_Msk) >> CLK_PLLCON_OUT_DV_Pos)) { + case 0: /* OUT_DIV == 00 : NO = 1 */ + pllNO = 1; + break; + case 3: /* OUT_DIV == 11 : NO = 4 */ + pllNO = 4; + break; + default: /* OUT_DIV == 01 or 10 : NO = 2 */ + pllNO = 2; + break; + } + + pllNF = ((PllReg & CLK_PLLCON_FB_DV_Msk) >> CLK_PLLCON_FB_DV_Pos) + 2; + pllNR = ((PllReg & CLK_PLLCON_IN_DV_Msk) >> CLK_PLLCON_IN_DV_Pos) + 2; + + /* Shift to avoid overflow condition */ + PllClock = (((pllFIN >> 2) * pllNF) / (pllNR * pllNO) << 2); + } + } + + return PllClock; +} + +/** + * @brief Wait for stable clock + * + * @description Always wait around 300ms for clock to be stable + * + */ +#if 0 +static uint32_t wait_for_clock_ready(uint32_t clkMask) +{ + int32_t timeout = 2180000; + + while (timeout-- > 0) { + if ((CLK->CLKSTATUS & clkMask) == clkMask) { + return 1; + } + } + + return 0; +} +#endif + +static uint32_t wait_for_clock_ready_2(uint32_t clkMask) +{ + // int32_t timeout = 2180000; + int32_t timeout = 221200; + + while (timeout-- > 0) { + if ((CLK->CLKSTATUS & clkMask) == clkMask) { + return 1; + } + } + + return 0; +} + +/** @brief Set system HCLK + * + * @description Setup HCLK source and divider + * + * Always switch to a known stable clock source before changing a + * system clock, to avoid issues related to the original clock's + * speed/settings. + * + */ +#if 0 +static void set_HCLK(uint32_t clkSource, uint32_t clkDivider) +{ + uint32_t stableHIRC; + + /* Read HIRC clock source stable flag */ + stableHIRC = CLK->CLKSTATUS & CLK_CLKSTATUS_OSC22M_STB_Msk; + + /* Setup __HIRC */ + CLK->PWRCON |= CLK_PWRCON_OSC22M_EN_Msk; + + wait_for_clock_ready(CLK_CLKSTATUS_OSC22M_STB_Msk); + + /* Use __HIRC as HCLK, temporarily */ + CLK->CLKSEL0 = + (CLK->CLKSEL0 & (~CLK_CLKSEL0_HCLK_S_Msk)) | NUC123_HCLKSRC_HSI; + + /* Set new clock divider */ + CLK->CLKDIV = (CLK->CLKDIV & (~CLK_CLKDIV_HCLK_N_Msk)) | clkDivider; + + /* Switch HCLK to new HCLK source */ + CLK->CLKSEL0 = (CLK->CLKSEL0 & (~CLK_CLKSEL0_HCLK_S_Msk)) | clkSource; + + /* Update System Core Clock */ + SystemCoreClockUpdate(); + + /* Disable HIRC if HIRC was disabled before we started */ + if (stableHIRC == 0) { + // CLK->PWRCON &= ~CLK_PWRCON_OSC22M_EN_Msk; + } +} +#endif + +static void set_HCLK_2(uint32_t clkSource, uint32_t clkDivider) +{ + /* Set new clock divider */ + CLK->CLKDIV = (CLK->CLKDIV & (~CLK_CLKDIV_HCLK_N_Msk)) | clkDivider; + + /* Switch HCLK to new HCLK source */ + CLK->CLKSEL0 = (CLK->CLKSEL0 & (~CLK_CLKSEL0_HCLK_S_Msk)) | clkSource; + + /* Update System Core Clock */ + SystemCoreClockUpdate(); +} + +#if NUC123_PLL_ENABLED +#if 0 +static uint32_t enable_pll(uint32_t pllSrc, uint32_t pllFreq) +{ + /* Disable PLL first to avoid unstable when setting PLL. */ + CLK->PLLCON = CLK_PLLCON_PD_Msk; + + /* Check and setup correct clock source */ + switch (pllSrc) { + case NUC123_PLLSRC_HSE: + /* Use HXT clock */ + CLK->PWRCON |= CLK_PWRCON_XTL12M_EN_Msk; + + /* Wait for stable HXT */ + wait_for_clock_ready(CLK_CLKSTATUS_XTL12M_STB_Msk); + + break; + case NUC123_PLLSRC_HSI: + /* Use HIRC clock */ + CLK->PWRCON |= CLK_PWRCON_OSC22M_EN_Msk; + + /* Wait for stable HIRC */ + wait_for_clock_ready(CLK_CLKSTATUS_OSC22M_STB_Msk); + + break; + } + + /** + * Calculate best PLL variables from requested frequency + * + * See NUC123 Technical Reference Manual 5.4.8 PLL Control Register Description, page 124 + * + * NF 1 + * FOUT = FIN x -- x -- + * NR NO + * + */ + + uint32_t NO = 0; + uint32_t NR = 0; + uint32_t clkCalc = 0; + + /* Set "NO" for requested frequency */ + /* We're using "NO" first to set the PLLCON - so make it "NO" - 1; */ + if (pllFreq >= FREQ_25MHZ && pllFreq <= FREQ_50MHZ) { + /* Low frequency - use full variable headroom */ + pllFreq <<= 2; + NO = 3; + } else if (pllFreq > FREQ_50MHZ && pllFreq <= FREQ_100MHZ) { + /* Medium frequency - use full variable headroom */ + pllFreq <<= 1; + NO = 1; + } else if (pllFreq > FREQ_100MHZ && pllFreq <= FREQ_200MHZ) { + /* High frequency - full variable headroom already used */ + NO = 0; + } else { + /* Frequency out of range - use default PLL settings + * + * See NUC123 Technical Reference Manual PLL COntrol Register Description, page 124 + * The default value: 0xC22E + * FIN = 12 MHz + * NR = (1+2) = 3 + * NF = (46+2) = 48 + * NO = 4 + * FOUT = 12/4 x 48 x 1/3 = 48 MHz + */ + if (pllSrc == NUC123_PLLSRC_HSE) { + CLK->PLLCON = 0xC22E; + } else { + CLK->PLLCON = 0xD66F; + } + + /* Wait for stable PLL clock */ + wait_for_clock_ready(CLK_CLKSTATUS_PLL_STB_Msk); + + return get_pll_clock_freq(); + } + + /* Setup "NR" and clkCalc */ + switch (pllSrc) { + case NUC123_PLLSRC_HSE: + NR = 2; + clkCalc = NUC123_HSECLK; + break; + case NUC123_PLLSRC_HSI: + NR = 4; + clkCalc = __HIRC; + break; + } + + /** + * Loop to calculate best/lowest NR (between 0 or 2 and 31) and best/lowest NF (between 0 and 511) + * + * Best results are off-by-2 until final equation calculation (to allow use in PLLCON) + * + */ + uint32_t bestNR = 0; + uint32_t bestNF = 0; + uint32_t minLimit = -1; + + while (NR <= 33) { + uint32_t tmpCalc1 = clkCalc / NR; + + if (tmpCalc1 > 1600000 && tmpCalc1 < 16000000) { + uint32_t NF = 2; + + while (NF <= 513) { + uint32_t tmpCalc2 = tmpCalc1 * NF; + + if (tmpCalc2 >= 100000000 && tmpCalc2 <= 200000000) { + uint32_t tmpCalc3; + + if (tmpCalc2 > pllFreq) { + tmpCalc3 = tmpCalc2 - pllFreq; + } else { + tmpCalc3 = pllFreq - tmpCalc2; + } + + if (tmpCalc3 < minLimit) { + minLimit = tmpCalc3; + bestNF = NF; + bestNR = NR; + + /* Stop NF calc loop when minLimit tends back to 0 */ + if (minLimit == 0) + break; + } + } + + NF++; + } + } + + NR++; + } + + /* Enable and apply new PLL setting. */ + CLK->PLLCON = pllSrc | (NO << 14) | ((bestNR - 2) << 9) | (bestNF - 2); + + /* Wait for stable PLL clock */ + wait_for_clock_ready(CLK_CLKSTATUS_PLL_STB_Msk); + + /* Return equation result */ + return (clkCalc / ((NO + 1) * bestNR) * bestNF); +} +#endif + +/** @brief Set Core Clock + * + * @description Set the core system clock some reference speed (Hz). + * This should be between 25MHz and 72MHz for the NUC123SD4AN0. + * + * Use either the HXT (exact) or HIRC (nearest using 22.1184MHz) + * as the clock source. + * + */ +#if 0 +static uint32_t set_core_clock(uint32_t clkCore) +{ + uint32_t stableHIRC; + + /* Read HIRC clock source stable flag */ + stableHIRC = CLK->CLKSTATUS & CLK_CLKSTATUS_OSC22M_STB_Msk; + + /* Setup __HIRC */ + CLK->PWRCON |= CLK_PWRCON_OSC22M_EN_Msk; + + wait_for_clock_ready(CLK_CLKSTATUS_OSC22M_STB_Msk); + + /* Use __HIRC as HCLK temporarily */ + CLK->CLKSEL0 |= CLK_CLKSEL0_HCLK_S_Msk; + CLK->CLKDIV &= (~CLK_CLKDIV_HCLK_N_Msk); + + /* Is HXT stable ? */ + if (CLK->CLKSTATUS & CLK_CLKSTATUS_XTL12M_STB_Msk) { + /* Use NUC123_HSECLK as PLL source */ + clkCore = enable_pll(NUC123_PLLSRC_HSE, (2 * clkCore)); + } else { + /* Use __HIRC as PLL source */ + clkCore = enable_pll(NUC123_PLLSRC_HSI, (2 * clkCore)); + + /* Read HIRC clock source stable flag again (since we're using it now) */ + stableHIRC = CLK->CLKSTATUS & CLK_CLKSTATUS_OSC22M_STB_Msk; + } + + /* Set HCLK clock source to PLL */ + set_HCLK(NUC123_HCLKSRC_PLL_2, CLK_CLKDIV_HCLK(1)); + + /* Disable HIRC if HIRC was disabled before we started */ + if (stableHIRC == 0) { + CLK->PWRCON &= ~CLK_PWRCON_OSC22M_EN_Msk; + } + + /* Return actual HCLK frequency is PLL frequency divide 2 */ + return (clkCore >> 1); +} +#endif + +static uint32_t set_core_clock_2(uint32_t clkCore) +{ + /* Use __HIRC as HCLK temporarily */ + CLK->CLKSEL0 |= CLK_CLKSEL0_HCLK_S_Msk; + CLK->CLKDIV &= (~CLK_CLKDIV_HCLK_N_Msk); + + /* Disable PLL first to avoid unstable when setting PLL. */ + CLK->PLLCON = CLK_PLLCON_PD_Msk; + +#if NUC123_HSE_ENABLED + /* Use NUC123_HSECLK as PLL source */ + // clkCore = enable_pll(NUC123_PLLSRC_HSE, (4 * clkCore)); + /* + * The default value: 0xC22E + * FIN = 12 MHz + * NR = (1+2) = 3 + * NF = (46+2) = 48 + * NO = 4 + * FOUT = 12/4 x 48 x 1/3 = 48 MHz + */ + CLK->PLLCON = 0xC22E; + clkCore = 48000000; +#else + /* Use __HIRC as PLL source */ + // clkCore = enable_pll(NUC123_PLLSRC_HSI, (4 * clkCore)); + /* + * The default value: 0xD66F + * FIN = 22.1184 MHz + * NR = (11+2) = 13 + * NF = (111+2) = 113 + * NO = 4 + * FOUT = 192.26... MHz x 1/4 = 48.0... MHz + */ + CLK->PLLCON = NUC123_PLLSRC_HSI | 0xD66F; + clkCore = 48064985; +#endif + + wait_for_clock_ready_2(CLK_CLKSTATUS_PLL_STB_Msk); + + /* Set HCLK clock source to PLL */ + set_HCLK_2(NUC123_HCLKSRC_PLL, CLK_CLKDIV_HCLK(1)); + + /* Return actual HCLK frequency is PLL frequency divide 2 */ + return clkCore; +} +#endif + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level HAL driver initialization. + * + * @notapi + */ +void hal_lld_init(void) +{ + // PA->PMD = (PA->PMD & 0xFFCFFFFF) | 0x00100000; + // PA->DOUT = (PA->DOUT & 0xFFFFFBFF); + if (!clock_initialized) { + NUC123_clock_init(); + } +} + +void NUC123_clock_init(void) +{ + clock_initialized = TRUE; + UNLOCKREG(); + + // if (((*(volatile uint32_t *)0x5000020C) & 16) == 0){ + // if (((*(volatile uint32_t *)0x50000210) & 7) == 7){ + + + /* Always initialize HSI and go from there, things can change later */ + /* TODO: Technically this could also be the crystal, figure out how to allow + * config in linker? */ + /* Enable HSI */ + // CLK->PWRCON |= CLK_PWRCON_OSC22M_EN_Msk; + + // uint32_t t = wait_for_clock_ready_2(CLK_CLKSTATUS_OSC22M_STB_Msk); + + // set_HCLK(NUC123_HCLKSRC_HSI, CLK_CLKDIV_HCLK(1)); + +#if NUC123_HSE_ENABLED + /* SYS->GPF_MFP |= (SYS_GPF_MFP_PF0_XT1_OUT | SYS_GPF_MFP_PF1_XT1_IN); */ + // SYS->GPF_MFP |= (SYS_GPF_MFP_GPF_MFP0_Msk | SYS_GPF_MFP_GPF_MFP1_Msk); + + CLK->PWRCON |= CLK_PWRCON_XTL12M_EN_Msk; + wait_for_clock_ready_2(CLK_CLKSTATUS_XTL12M_STB_Msk); + set_HCLK_2(NUC123_HCLKSRC_HSE, CLK_CLKDIV_HCLK(1)); +#endif /* NUC123_HSE_ENABLED */ + +#if NUC123_LSI_ENABLED + CLK->PWRCON |= CLK_PWRCON_IRC10K_EN_Msk; + wait_for_clock_ready(CLK_CLKSTATUS_IRC10K_STB_Msk); +#endif /* NUC123_LSI_ENABLED */ + +#if NUC123_PLL_ENABLED + set_core_clock_2(NUC123_HCLK); +#endif /* NUC123_PLL_ENABLED */ + + LOCKREG(); +} + +/** @} */ diff --git a/os/hal/ports/NUMICRO/NUC120/hal_lld.h b/os/hal/ports/NUMICRO/NUC120/hal_lld.h new file mode 100644 index 0000000000..61b9a0ca65 --- /dev/null +++ b/os/hal/ports/NUMICRO/NUC120/hal_lld.h @@ -0,0 +1,331 @@ +/* + Copyright (C) 2020 Alex Lewontin + Copyright (C) 2019 /u/KeepItUnder + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file NUC123/hal_lld.h + * @brief NUC123 HAL subsystem low level driver header. + * @pre This module requires the following macros to be defined in the + * @p board.h file: + * - NUC123_HSECLK. + * - NUC123_HSE_BYPASS (optionally). + * . + * + * @addtogroup HAL + * @{ + */ + +#ifndef HAL_LLD_H +#define HAL_LLD_H + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/** + * @name Platform identification macros + * @{ + */ +#if defined(NUC120LE3AN) || defined(__DOXYGEN__) +#define PLATFORM_NAME "NUC120LE3AN NUC120 Cortex M0 USB Micro" +#define NUC120xxxAN +#define NUC123xxxANx +#undef NUC123xxxAEx +#define NUC123_FLASH_SIZE 0x20000 +#else +#error "NUC120 device unsupported or not specified" +#endif + +/* TODO: Add other NUC123xxxxxx versions */ + +/** @} */ + +/** + * @name Absolute Maximum Ratings + * @{ + */ + +/** + * @brief Maximum HSE clock frequency. + */ +#define NUC123_HSECLK_MAX 24000000 + +/** + * @brief Minimum HSE clock frequency. + */ +#define NUC123_HSECLK_MIN 4000000 + +/** + * @brief Minimum PLL frequency. + */ +#define NUC123_PLLCLK_MIN 25000000UL + +/** + * @brief Maximum PLL frequency. + */ +#define NUC123_PLLCLK_MAX 144000000UL + +/** + * @brief Minimum HCLK divider value. + */ +#define NUC123_HCLKDIV_MIN 1 + +/** + * @brief Maximum HCLK divider value. + */ +#define NUC123_HCLKDIV_MAX 16 +/** @} */ + +/** + * @name Internal clock sources + * @{ + */ +#define NUC123_HSICLK __HIRC /**< High speed internal clock. */ +#define NUC123_LSICLK __LIRC /**< Low speed internal clock. */ +/** @} */ + +/** + * @name HCLK_S bit definitions + * @{ + */ +#define NUC123_HCLKSRC_HSE (0 << CLK_CLKSEL0_HCLK_S_Pos) /**< HCLK source is HSE. */ +#define NUC123_HCLKSRC_PLL_2 (1 << CLK_CLKSEL0_HCLK_S_Pos) /**< HCLK source is PLL/2. */ +#define NUC123_HCLKSRC_PLL (2 << CLK_CLKSEL0_HCLK_S_Pos) /**< HCLK source is PLL. */ +#define NUC123_HCLKSRC_LSI (3 << CLK_CLKSEL0_HCLK_S_Pos) /**< HCLK source is LSI. */ +#define NUC123_HCLKSRC_HSI (7 << CLK_CLKSEL0_HCLK_S_Pos) /**< HCLK source is HSI. */ +/** @} */ + +/** + * @name PLL_SRC bit definitions + * @{ + */ +#define NUC123_PLLSRC_HSE (0 << CLK_PLLCON_PLL_SRC_Pos) /**< PLL source is HSE. */ +#define NUC123_PLLSRC_HSI (1 << CLK_PLLCON_PLL_SRC_Pos) /**< PLL source is HSI. */ +/** @} */ + +/** + * @name User config bit definitions + * @{ + */ +#define NUC123_CONFIG0_DFEN_Pos 0 +#define NUC123_CONFIG0_DFEN_Msk (1 << NUC123_CONFIG0_DFEN_Pos) + +#define NUC123_CONFIG0_LOCK_Pos 1 +#define NUC123_CONFIG0_LOCK_Msk (1 << NUC123_CONFIG0_LOCK_Pos) + +#define NUC123_CONFIG0_DFVSEN_Pos 2 +#define NUC123_CONFIG0_DFVSEN_Msk (1 << NUC123_CONFIG0_DFVSEN_Pos) + +#define NUC123_CONFIG0_CGPFMFP_Pos 27 +#define NUC123_CONFIG0_CGPFMFP_Msk (1 << NUC123_CONFIG0_CGPFMFP_Pos) +/** @} */ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name NUMICRO configuration options + * @{ + */ + +/** + * @brief Disables the PWR/RCC initialization in the HAL. + */ +#if !defined(NUC123_NO_INIT) || defined(__DOXYGEN__) +#define NUC123_NO_INIT FALSE +#endif + +/** + * @brief Enables or disables the HSI clock source. + */ +#if !defined(NUC123_HSI_ENABLED) || defined(__DOXYGEN__) +#define NUC123_HSI_ENABLED TRUE +#endif + +/** + * @brief Enables or disables the LSI clock source. + */ +#if !defined(NUC123_LSI_ENABLED) || defined(__DOXYGEN__) +#define NUC123_LSI_ENABLED FALSE +#endif + +/** + * @brief Enables or disables the HSE clock source. + */ +#if !defined(NUC123_HSE_ENABLED) || defined(__DOXYGEN__) +#define NUC123_HSE_ENABLED TRUE +#endif + +/** + * @brief Enables or disables PLL + */ +#if !defined(NUC123_PLL_ENABLED) || defined(__DOXYGEN__) +#define NUC123_PLL_ENABLED TRUE +#endif + +/** + * @brief Core clock speed. + */ +#if !defined(NUC123_HCLK) || defined(__DOXYGEN__) +#if NUC123_PLL_ENABLED +#define NUC123_HCLK 48000000UL +#else +#define NUC123_HCLK __HIRC +#endif +#endif + +/** + * @brief Enables the use of the CONFIG0/1 registers + */ +#if !defined(NUC123_CONFIG_ENABLED) || defined(__DOXYGEN__) +#define NUC123_CONFIG_ENABLED FALSE +#endif + +#if (NUC123_CONFIG_ENABLED == TRUE) +/** + * @brief Enables or disables data flash + * @warning If data this is set to @p TRUE, the data flash + * is subtracted from the APROM. The linker script is not aware + * of this, so therefore it is the responsiblity of the user to ensure + * that the combination of the data flash & the text section still fit + * into ROM. + + * @note The default is @p TRUE. + */ +#if !defined(NUC123_CONFIG_DATAFLASH_ENABLED) || defined(__DOXYGEN__) +#define NUC123_CONFIG_DATAFLASH_ENABLED TRUE +#endif + +/** + * @brief Sets the data flash size. This is ignored if data flash is disabled. + */ +#if !defined(NUC123_CONFIG_DATAFLASH_SIZE) || defined(__DOXYGEN__) +#define NUC123_CONFIG_DATAFLASH_SIZE 4096 +#endif + +#endif /* NUC123_CONFIG_ENABLED == TRUE */ + +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/* + * Configuration-related checks. + */ +#if !defined(NUC123_MCUCONF) +#error "Using a wrong mcuconf.h file, NUC123_MCUCONF not defined" +#endif + +/* + * HSE checks. + */ +#if NUC123_HSE_ENABLED + +#if !defined(NUC123_HSECLK) +#error "HSE frequency not defined" +#elif (NUC123_HSECLK < NUC123_HSECLK_MIN) || (NUC123_HSECLK > NUC123_HSECLK_MAX) +#error "NUC123_HSECLK outside acceptable range (NUC123_HSECLK_MIN...NUC123_HSECLK_MAX)" +#endif +#define NUC123_CONFIG0_HSE_PINS 0 +#else +#define NUC123_CONFIG0_HSE_PINS NUC123_CONFIG0_CGPFMFP_Msk +#endif + +#define NUC123_PLLCLK NUC123_HCLK + +/* +* Persistant configuration settings. +*/ + +#if (NUC123_CONFIG_ENABLED == TRUE) + +#if (NUC123_CONFIG_DATAFLASH_ENABLED == TRUE) + +#if (NUC123_CONFIG_DATAFLASH_SIZE == 4096) +/* DFVSEN = 1, nothing else matters */ +#define NUC123_CONFIG0_DATAFLASH 0UL +/* NUC123_DFBADDR doesn't actually control anything here, but convenient for flash drivers +which need the starting address */ +#define NUC123_DFBADDR 0x1F000UL +#else /* NUC123_CONFIG_DATAFLASH_SIZE != 4096 */ +/* DFVSEN = 0, DFEN = 0 */ +#define NUC123_CONFIG0_DATAFLASH (NUC123_CONFIG0_DFVSEN_Msk | NUC123_CONFIG0_DFEN_Msk) +#define NUC123_DFBADDR ((0x11000UL - NUC123_CONFIG_DATAFLASH_SIZE) & ~(0xFFUL)) +#endif /* NUC123_CONFIG_DATAFLASH_SIZE ?= 4096 */ +#else /* NUC123_CONFIG_DATAFLASH_ENABLED == TRUE/FALSE */ + +#undef NUC123_CONFIG_DATAFLASH_SIZE +#define NUC123_CONFIG_DATAFLASH_SIZE 0 +/* DFVSEN = 0, DFEN = 1 */ +#define NUC123_CONFIG0_DATAFLASH NUC123_CONFIG0_DFVSEN_Msk +#define NUC123_DFBADDR 0xFFFFFF00UL + +#endif /* NUC123_CONFIG_DATAFLASH_ENABLED == TRUE/FALSE */ + +#define NUC123_CONFIG0 \ + 0xFFFFFFFFUL & (~NUC123_CONFIG0_DATAFLASH) & (~NUC123_CONFIG0_HSE_PINS) +#define NUC123_CONFIG1 NUC123_DFBADDR + +#else /* NUC123_CONFIG_ENABLED == FALSE */ + +#if defined(NUC123_CONFIG_DATAFLASH_ENABLED) +#error \ + "Defining NUC123_CONFIG_DATAFLASH_ENABLED requires NUC123_CONFIG_ENABLED to be TRUE" +#endif + +#if defined(NUC123_CONFIG_DATAFLASH_SIZE) +#error \ + "Defining NUC123_CONFIG_DATAFLASH_SIZE requires NUC123_CONFIG_ENABLED to be TRUE" +#endif + +#endif /* NUC123_CONFIG_ENABLED == TRUE/FALSE */ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/* Alias for compatibility */ +#define SystemUnlockReg() UNLOCKREG() + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +/* Various helpers */ +#include "NUC120.h" +#include "nuc120_isr.h" +#include "nuc120_registry.h" +#include "nvic.h" + +#ifdef __cplusplus +extern "C" { +#endif + void hal_lld_init(void); + void NUC123_clock_init(void); +#ifdef __cplusplus +} +#endif + +#endif /* _HAL_LLD_H_ */ + +/** @} */ diff --git a/os/hal/ports/NUMICRO/NUC120/nuc120_isr.h b/os/hal/ports/NUMICRO/NUC120/nuc120_isr.h new file mode 100644 index 0000000000..784b1ca395 --- /dev/null +++ b/os/hal/ports/NUMICRO/NUC120/nuc120_isr.h @@ -0,0 +1,150 @@ +/* + Copyright (C) 2019 /u/KeepItUnder + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file NUMICRO/nuc123_isr.h + * @brief ISR remapper driver header. + * + * @addtogroup NUC123_ISR + * @{ + */ + +#ifndef NUC120_ISR_H +#define NUC120_ISR_H + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/** + * @name ISR names and numbers remapping + * @{ + */ + +/* + * GPIO units. + */ +#define NUC123_GPIOAB_HANDLER Vector50 +#define NUC123_GPIOCDF_HANDLER Vector54 + +#define NUC123_GPIOAB_NUMBER GPAB_IRQn +#define NUC123_GPIOCDF_NUMBER GPCDF_IRQn + +/* + * Special ST unit + */ +#define NUC123_ST_HANDLER Vector3C +#define NUC123_ST_NUMBER SysTick_IRQn + +/* + * DMA units. + */ +#define NUC123_PDMA_HANDLER VectorA8 +#define NUC123_PDMA_NUMBER PDMA_IRQn + +/* + * ADC units. + */ +#define NUC123_ADC_HANDLER VectorB0 +#define NUC123_ADC_NUMBER ADC_IRQn + +/* + * PWM units. + */ +#define NUC123_PWMA_HANDLER Vector58 +#define NUC123_PWMA_NUMBER PWMA_IRQn + +/* + * SPI units. + */ +#define NUC123_SPI0_HANDLER Vector78 +#define NUC123_SPI1_HANDLER Vector7C +#define NUC123_SPI2_HANDLER Vector80 + +#define NUC123_SPI0_NUMBER SPI0_IRQn +#define NUC123_SPI1_NUMBER SPI1_IRQn +#define NUC123_SPI2_NUMBER SPI2_IRQn + +/* + * I2S units. + */ +#define NUC123_I2S_HANDLER VectorB8 +#define NUC123_I2S_NUMBER I2S_IRQn + +/* + * I2C units. + */ +#define NUC123_I2C0_HANDLER Vector88 +#define NUC123_I2C0_NUMBER I2C0_IRQn + +#define NUC123_I2C1_HANDLER Vector8C +#define NUC123_I2C1_NUMBER I2C1_IRQn + +/* + * TIM units. + */ +#define NUC123_TIM1_HANDLER Vector60 +#define NUC123_TIM2_HANDLER Vector64 +#define NUC123_TIM3_HANDLER Vector68 +#define NUC123_TIM4_HANDLER Vector6C + +#define NUC123_TIM1_NUMBER TMR0_IRQn +#define NUC123_TIM2_NUMBER TMR1_IRQn +#define NUC123_TIM3_NUMBER TMR2_IRQn +#define NUC123_TIM4_NUMBER TMR3_IRQn + +/* + * UART units. + */ +#define NUC123_UART0_HANDLER Vector70 +#define NUC123_UART1_HANDLER Vector74 + +#define NUC123_UART0_NUMBER UART0_IRQn +#define NUC123_UART1_NUMBER UART1_IRQn + +/* + * USB units. + */ +#define NUC123_USB1_HANDLER Vector9C +#define NUC123_USB1_NUMBER USBD_IRQn + +#define USBD_INTSTS_EPEVT_Pos USBD_INTSTS_EPEVT0_Pos +#define USBD_INTSTS_EPEVT_Msk (0xFFul << USBD_INTSTS_EPEVT_Pos) +/** @} */ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#endif /* NUC120_ISR_H */ + +/** @} */ diff --git a/os/hal/ports/NUMICRO/NUC120/nuc120_registry.h b/os/hal/ports/NUMICRO/NUC120/nuc120_registry.h new file mode 100644 index 0000000000..6a0e9a2cb6 --- /dev/null +++ b/os/hal/ports/NUMICRO/NUC120/nuc120_registry.h @@ -0,0 +1,244 @@ +/* + Copyright (C) 2019 /u/KeepItUnder + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file NUC123/nuc123_registry.h + * @brief NUC123 capabilities registry. + * + * @addtogroup HAL + * @{ + */ + +#ifndef NUC120_REGISTRY_H +#define NUC120_REGISTRY_H + +/*===========================================================================*/ +/* Platform capabilities. */ +/*===========================================================================*/ + +/** + * @name NUC123 capabilities + * @{ + */ + +/* RCC attributes. */ +#define NUC123_HAS_HSI48 FALSE +#define NUC123_HAS_HSI_PREDIV FALSE +#define NUC123_HAS_MCO_PREDIV TRUE + +/* ADC attributes.*/ +#define NUC123_HAS_ADC1 TRUE +#define NUC123_ADC_SUPPORTS_PRESCALER FALSE +#define NUC123_ADC_SUPPORTS_OVERSAMPLING FALSE +#define NUC123_ADC1_IRQ_SHARED_WITH_EXTI FALSE +#define NUC123_ADC1_HANDLER Vector70 +#define NUC123_ADC1_NUMBER Vector70_IRQn +#define NUC123_ADC1_DMA_MSK (NUC123_DMA_STREAM_ID_MSK(1, 1) |\ + NUC123_DMA_STREAM_ID_MSK(1, 2)) +#define NUC123_ADC1_DMA_CHN 0x00000011 + +#define NUC123_HAS_ADC2 FALSE +#define NUC123_HAS_ADC3 FALSE +#define NUC123_HAS_ADC4 FALSE + +/* CAN attributes.*/ +#define NUC123_HAS_CAN1 FALSE +#define NUC123_HAS_CAN2 FALSE +#define NUC123_HAS_CAN3 FALSE + +/* DAC attributes.*/ +#define NUC123_HAS_DAC1_CH1 FALSE +#define NUC123_HAS_DAC1_CH2 FALSE +#define NUC123_HAS_DAC2_CH1 FALSE +#define NUC123_HAS_DAC2_CH2 FALSE + +/* DMA attributes.*/ +#define NUC123_ADVANCED_DMA FALSE +#define NUC123_DMA_SUPPORTS_CSELR FALSE +#define NUC123_DMA1_NUM_CHANNELS 6 +#define NUC123_DMA2_NUM_CHANNELS 0 +#define NUC123_DMA1_CH1_HANDLER Vector64 +#define NUC123_DMA1_CH23_HANDLER Vector68 +#define NUC123_DMA1_CH4567_HANDLER Vector6C +#define NUC123_DMA1_CH1_NUMBER Vector64_IRQn +#define NUC123_DMA1_CH23_NUMBER Vector68_IRQn +#define NUC123_DMA1_CH4567_NUMBER Vector6C_IRQn + +#define NUC123_DMA1_CH2_NUMBER NUC123_DMA1_CH23_NUMBER +#define NUC123_DMA1_CH3_NUMBER NUC123_DMA1_CH23_NUMBER +#define DMA1_CH2_CMASK 0x00000006U +#define DMA1_CH3_CMASK 0x00000006U + +#define NUC123_DMA1_CH4_NUMBER NUC123_DMA1_CH4567_NUMBER +#define NUC123_DMA1_CH5_NUMBER NUC123_DMA1_CH4567_NUMBER +#define NUC123_DMA1_CH6_NUMBER NUC123_DMA1_CH4567_NUMBER +#define NUC123_DMA1_CH7_NUMBER NUC123_DMA1_CH4567_NUMBER +#define DMA1_CH4_CMASK 0x00000078U +#define DMA1_CH5_CMASK 0x00000078U +#define DMA1_CH6_CMASK 0x00000078U +#define DMA1_CH7_CMASK 0x00000078U + +/* ETH attributes.*/ +#define NUC123_HAS_ETH FALSE + +/* EXTI attributes.*/ +/* #define NUC123_EXTI_NUM_LINES 20 */ +/* #define NUC123_EXTI_IMR_MASK 0xFFF50000U */ + +/* GPIO attributes.*/ +#define NUC123_HAS_GPIOA TRUE +#define NUC123_HAS_GPIOB TRUE +#define NUC123_HAS_GPIOC TRUE +#define NUC123_HAS_GPIOD TRUE +#define NUC123_HAS_GPIOE FALSE +#define NUC123_HAS_GPIOF TRUE +#define NUC123_HAS_GPIOG FALSE +#define NUC123_HAS_GPIOH FALSE +#define NUC123_HAS_GPIOI FALSE +#define NUC123_HAS_GPIOJ FALSE +#define NUC123_HAS_GPIOK FALSE + +/* I2C attributes.*/ +#define NUC123_HAS_I2C0 TRUE +#define NUC123_HAS_I2C1 TRUE + +/* QUADSPI attributes.*/ +#define NUC123_HAS_QUADSPI1 FALSE + +/* RTC attributes.*/ +#define NUC123_HAS_RTC FALSE +#define NUC123_RTC_HAS_SUBSECONDS FALSE +#define NUC123_RTC_HAS_PERIODIC_WAKEUPS FALSE +#define NUC123_RTC_NUM_ALARMS 0 +#define NUC123_RTC_HAS_INTERRUPTS FALSE + +/* SDIO attributes.*/ +#define NUC123_HAS_SDIO FALSE + +/* SPI attributes.*/ +#define NUC123_HAS_SPI1 TRUE +#define NUC123_SPI1_SUPPORTS_I2S FALSE +#define NUC123_SPI1_RX_DMA_MSK NUC123_DMA_STREAM_ID_MSK(1, 2) +#define NUC123_SPI1_RX_DMA_CHN 0x00000030 +#define NUC123_SPI1_TX_DMA_MSK NUC123_DMA_STREAM_ID_MSK(1, 3) +#define NUC123_SPI1_TX_DMA_CHN 0x00000300 + +#define NUC123_HAS_SPI2 TRUE +#define NUC123_SPI2_SUPPORTS_I2S FALSE +#define NUC123_SPI2_RX_DMA_MSK NUC123_DMA_STREAM_ID_MSK(1, 4) +#define NUC123_SPI2_RX_DMA_CHN 0x00003000 +#define NUC123_SPI2_TX_DMA_MSK NUC123_DMA_STREAM_ID_MSK(1, 5) +#define NUC123_SPI2_TX_DMA_CHN 0x00030000 + +#define NUC123_HAS_SPI3 FALSE +#define NUC123_HAS_SPI4 FALSE +#define NUC123_HAS_SPI5 FALSE +#define NUC123_HAS_SPI6 FALSE + +/* TIM attributes.*/ +#define NUC123_TIM_MAX_CHANNELS 4 + +#define NUC123_HAS_TIM1 TRUE +#define NUC123_TIM1_IS_32BITS TRUE +#define NUC123_TIM1_CHANNELS 1 + +#define NUC123_HAS_TIM2 TRUE +#define NUC123_TIM2_IS_32BITS TRUE +#define NUC123_TIM2_CHANNELS 1 + +#define NUC123_HAS_TIM3 TRUE +#define NUC123_TIM3_IS_32BITS TRUE +#define NUC123_TIM3_CHANNELS 1 + +#define NUC123_HAS_TIM4 TRUE +#define NUC123_TIM14_IS_32BITS TRUE +#define NUC123_TIM14_CHANNELS 1 + +#define NUC123_HAS_TIM5 FALSE +#define NUC123_HAS_TIM6 FALSE +#define NUC123_HAS_TIM7 FALSE +#define NUC123_HAS_TIM8 FALSE +#define NUC123_HAS_TIM9 FALSE +#define NUC123_HAS_TIM10 FALSE +#define NUC123_HAS_TIM11 FALSE +#define NUC123_HAS_TIM12 FALSE +#define NUC123_HAS_TIM13 FALSE +#define NUC123_HAS_TIM14 FALSE +#define NUC123_HAS_TIM15 FALSE +#define NUC123_HAS_TIM16 FALSE +#define NUC123_HAS_TIM17 FALSE +#define NUC123_HAS_TIM18 FALSE +#define NUC123_HAS_TIM19 FALSE +#define NUC123_HAS_TIM20 FALSE +#define NUC123_HAS_TIM21 FALSE +#define NUC123_HAS_TIM22 FALSE + +/* USART attributes.*/ +/* #define NUC123_HAS_USART1 TRUE +#define NUC123_USART1_RX_DMA_MSK (NUC123_DMA_STREAM_ID_MSK(1, 1) |\ + NUC123_DMA_STREAM_ID_MSK(1, 3) |\ + NUC123_DMA_STREAM_ID_MSK(1, 5)) +#define NUC123_USART1_RX_DMA_CHN 0x00080808 +#define NUC123_USART1_TX_DMA_MSK (NUC123_DMA_STREAM_ID_MSK(1, 2) |\ + NUC123_DMA_STREAM_ID_MSK(1, 4)) +#define NUC123_USART1_TX_DMA_CHN 0x00008080 + +#define NUC123_HAS_USART2 TRUE +#define NUC123_USART2_RX_DMA_MSK (NUC123_DMA_STREAM_ID_MSK(1, 1) |\ + NUC123_DMA_STREAM_ID_MSK(1, 3) |\ + NUC123_DMA_STREAM_ID_MSK(1, 5)) +#define NUC123_USART2_RX_DMA_CHN 0x00090909 +#define NUC123_USART2_TX_DMA_MSK (NUC123_DMA_STREAM_ID_MSK(1, 2) |\ + NUC123_DMA_STREAM_ID_MSK(1, 4)) +#define NUC123_USART2_TX_DMA_CHN 0x00009090 */ + +#define NUC123_HAS_USART1 FALSE +#define NUC123_HAS_USART2 FALSE +#define NUC123_HAS_USART3 FALSE +#define NUC123_HAS_UART4 FALSE +#define NUC123_HAS_UART5 FALSE +#define NUC123_HAS_USART6 FALSE +#define NUC123_HAS_UART7 FALSE +#define NUC123_HAS_UART8 FALSE +#define NUC123_HAS_LPUART1 FALSE + +/* USB attributes.*/ +#define NUC123_HAS_USB TRUE +#define NUC123_HAS_OTG1 FALSE +#define NUC123_HAS_OTG2 FALSE + +/* IWDG attributes.*/ +#define NUC123_HAS_IWDG TRUE +#define NUC123_IWDG_IS_WINDOWED TRUE + +/* LTDC attributes.*/ +#define NUC123_HAS_LTDC FALSE + +/* DMA2D attributes.*/ +#define NUC123_HAS_DMA2D FALSE + +/* FSMC attributes.*/ +#define NUC123_HAS_FSMC FALSE + +/* CRC attributes.*/ +#define NUC123_HAS_CRC TRUE +#define NUC123_CRC_PROGRAMMABLE FALSE + +/** @} */ + +#endif /* NUC120_REGISTRY_H */ + +/** @} */ diff --git a/os/hal/ports/NUMICRO/NUC120/platform.mk b/os/hal/ports/NUMICRO/NUC120/platform.mk new file mode 100644 index 0000000000..437388d931 --- /dev/null +++ b/os/hal/ports/NUMICRO/NUC120/platform.mk @@ -0,0 +1,25 @@ +PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \ + $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/NUC120/hal_lld.c + +# Required include directories. +PLATFORMINC := $(CHIBIOS)/os/hal/ports/common/ARMCMx \ + $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/NUC120 \ + $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/LLD + +# Optional platform files. +ifeq ($(USE_SMART_BUILD),yes) +HALCONF := $(strip $(shell cat $(CONFDIR)/halconf.h $(CONFDIR)/halconf_community.h | egrep -e "\#define")) +endif + +# Drivers compatible with the platform. +include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/LLD/GPIOv1/driver.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/LLD/TIMv1/driver.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/LLD/USBv1/driver.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/LLD/SERIALv1/driver.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/LLD/I2Cv1/driver.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/LLD/FLASHv1/driver.mk + +# Shared variables +ALLCSRC += $(PLATFORMSRC) +ALLXASMSRC += $(PLATFORMASM) +ALLINC += $(PLATFORMINC) From eb93a4694690dd03b3682c950587b0b78786cf2f Mon Sep 17 00:00:00 2001 From: Ein Terakawa Date: Sat, 27 Feb 2021 22:59:04 +0900 Subject: [PATCH 14/15] NuTiny-SDK-NUC120 --- os/hal/boards/NUTINY-SDK-NUC120-V1.0/board.c | 36 +++++++++++ os/hal/boards/NUTINY-SDK-NUC120-V1.0/board.h | 60 +++++++++++++++++++ os/hal/boards/NUTINY-SDK-NUC120-V1.0/board.mk | 10 ++++ 3 files changed, 106 insertions(+) create mode 100644 os/hal/boards/NUTINY-SDK-NUC120-V1.0/board.c create mode 100644 os/hal/boards/NUTINY-SDK-NUC120-V1.0/board.h create mode 100644 os/hal/boards/NUTINY-SDK-NUC120-V1.0/board.mk diff --git a/os/hal/boards/NUTINY-SDK-NUC120-V1.0/board.c b/os/hal/boards/NUTINY-SDK-NUC120-V1.0/board.c new file mode 100644 index 0000000000..dae09e770b --- /dev/null +++ b/os/hal/boards/NUTINY-SDK-NUC120-V1.0/board.c @@ -0,0 +1,36 @@ +/* + ChibiOS - Copyright (C) 2020 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "hal.h" + +/** + * @brief Board-specific initialization code. + */ +void boardInit(void) +{ +#if HAL_USE_PAL + OnboardLED_Init(); +#endif +} + +/** + * @brief Early initialization code. + * @details This initialization is performed just after reset before BSS and + * DATA segments initialization. + */ +void __early_init(void) +{ +} diff --git a/os/hal/boards/NUTINY-SDK-NUC120-V1.0/board.h b/os/hal/boards/NUTINY-SDK-NUC120-V1.0/board.h new file mode 100644 index 0000000000..4ce5b73589 --- /dev/null +++ b/os/hal/boards/NUTINY-SDK-NUC120-V1.0/board.h @@ -0,0 +1,60 @@ +/* + ChibiOS - Copyright (C) 2020 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef BOARD_H +#define BOARD_H + +/* + * Setup for a generic board. + */ + +/* + * Board identifier. + */ +#define NUC123SD4AN0 +#define NUC120LE3AN +#define BOARD_NAME "NUTINY SDK NUC120 V1.0" + +/* + * Board specific settings. + */ +/* + * External XTAL speed. + */ +#define NUC123_HSECLK 12000000UL + +/* + * LED macros. + */ +#define ONBOARD_LED_LINE PAL_LINE(GPIOB, 0) + +#define OnboardLED_Init() \ + palSetGroupMode(GPIOB, 1, 0, PAL_MODE_OUTPUT_OPENDRAIN) +#define OnboardLED_On() palClearLine(ONBOARD_LED_LINE) +#define OnboardLED_Off() palSetLine(ONBOARD_LED_LINE) +#define OnboardLED_Toggle() palToggleLine(ONBOARD_LED_LINE) + +#if !defined(_FROM_ASM_) +#ifdef __cplusplus +extern "C" { +#endif +void boardInit(void); +#ifdef __cplusplus +} +#endif +#endif /* _FROM_ASM_ */ + +#endif /* BOARD_H */ diff --git a/os/hal/boards/NUTINY-SDK-NUC120-V1.0/board.mk b/os/hal/boards/NUTINY-SDK-NUC120-V1.0/board.mk new file mode 100644 index 0000000000..7ca88185a5 --- /dev/null +++ b/os/hal/boards/NUTINY-SDK-NUC120-V1.0/board.mk @@ -0,0 +1,10 @@ +# List of all the board related files. +BOARDSRC = $(CHIBIOS_CONTRIB)/os/hal/boards/NUTINY-SDK-NUC120-V1.0/board.c + +# Required include directories +BOARDINC = $(CHIBIOS_CONTRIB)/os/hal/boards/NUTINY-SDK-NUC120-V1.0 + +LDSCRIPT= $(STARTUPLD_CONTRIB)/NUC120xE3xx.ld + +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) From 31f4ed59e3dc37ecf8b120f8c2a9c561e70b14c6 Mon Sep 17 00:00:00 2001 From: Ein Terakawa Date: Sat, 27 Feb 2021 23:01:56 +0900 Subject: [PATCH 15/15] NUC120 Examples --- .../NUTINY-SDK-NUC120-V1.0/EFL/Makefile | 203 +++++ .../NUTINY-SDK-NUC120-V1.0/EFL/cfg/chconf.h | 766 ++++++++++++++++++ .../NUTINY-SDK-NUC120-V1.0/EFL/cfg/halconf.h | 533 ++++++++++++ .../EFL/cfg/halconf_community.h | 180 ++++ .../NUTINY-SDK-NUC120-V1.0/EFL/cfg/mcuconf.h | 54 ++ .../NUTINY-SDK-NUC120-V1.0/EFL/cfg/osalconf.h | 15 + .../EFL/cfg/shellconf.h | 139 ++++ .../NUC120/NUTINY-SDK-NUC120-V1.0/EFL/main.c | 99 +++ .../NUTINY-SDK-NUC120-V1.0/EFL/readme.txt | 47 ++ .../NUC120/NUTINY-SDK-NUC120-V1.0/EFL/shcfg.c | 112 +++ .../NUC120/NUTINY-SDK-NUC120-V1.0/EFL/shcfg.h | 52 ++ .../NUTINY-SDK-NUC120-V1.0/I2C/Makefile | 213 +++++ .../NUTINY-SDK-NUC120-V1.0/I2C/cfg/chconf.h | 766 ++++++++++++++++++ .../NUTINY-SDK-NUC120-V1.0/I2C/cfg/halconf.h | 533 ++++++++++++ .../I2C/cfg/halconf_community.h | 180 ++++ .../NUTINY-SDK-NUC120-V1.0/I2C/cfg/mcuconf.h | 40 + .../NUTINY-SDK-NUC120-V1.0/I2C/cfg/osalconf.h | 67 ++ .../I2C/cfg/shellconf.h | 139 ++++ .../NUC120/NUTINY-SDK-NUC120-V1.0/I2C/main.c | 241 ++++++ .../NUTINY-SDK-NUC120-V1.0/I2C/readme.txt | 26 + .../NUTINY-SDK-NUC120-V1.0/I2C/ssd1306.c | 193 +++++ .../NUTINY-SDK-NUC120-V1.0/I2C/ssd1306.h | 90 ++ .../NUTINY-SDK-NUC120-V1.0/USB_HID/Makefile | 205 +++++ .../USB_HID/cfg/chconf.h | 766 ++++++++++++++++++ .../USB_HID/cfg/halconf.h | 533 ++++++++++++ .../USB_HID/cfg/halconf_community.h | 180 ++++ .../USB_HID/cfg/mcuconf.h | 44 + .../USB_HID/cfg/osalconf.h | 67 ++ .../USB_HID/cfg/shellconf.h | 139 ++++ .../NUTINY-SDK-NUC120-V1.0/USB_HID/main.c | 96 +++ .../NUTINY-SDK-NUC120-V1.0/USB_HID/readme.txt | 36 + .../NUTINY-SDK-NUC120-V1.0/USB_HID/usbcfg.c | 393 +++++++++ .../NUTINY-SDK-NUC120-V1.0/USB_HID/usbcfg.h | 52 ++ 33 files changed, 7199 insertions(+) create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/Makefile create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/chconf.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/halconf.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/halconf_community.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/mcuconf.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/osalconf.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/shellconf.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/main.c create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/readme.txt create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/shcfg.c create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/shcfg.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/Makefile create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/chconf.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/halconf.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/halconf_community.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/mcuconf.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/osalconf.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/shellconf.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/main.c create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/readme.txt create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/ssd1306.c create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/ssd1306.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/Makefile create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/chconf.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/halconf.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/halconf_community.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/mcuconf.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/osalconf.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/shellconf.h create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/main.c create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/readme.txt create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/usbcfg.c create mode 100644 testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/usbcfg.h diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/Makefile b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/Makefile new file mode 100644 index 0000000000..10c1bd30b3 --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/Makefile @@ -0,0 +1,203 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -Og -ggdb3 -g3 -gdwarf-3 -gstrict-dwarf -fomit-frame-pointer -falign-functions=16 -pedantic +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO). +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# FPU-related options. +ifeq ($(USE_FPU_OPT),) + USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16 +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, target, sources and paths +# + +# Define project name here +PROJECT = ch + +# Target settings. +MCU = cortex-m0 + +# Imported source files and paths. +BASE_PATH := $(shell pwd)/../../../../../../.. +CHIBIOS := $(BASE_PATH)/ChibiOS/ChibiOS +CHIBIOS_CONTRIB := $(BASE_PATH)/ChibiOS/ChibiOS-Contrib +CONFDIR := ./cfg +BUILDDIR := ./build +DEPDIR := ./.dep + +# Licensing files. +include $(CHIBIOS)/os/license/license.mk +# Startup files. +include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_NUC123.mk +# HAL-OSAL files (optional). +#include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/NUC120/platform.mk +include $(CHIBIOS_CONTRIB)/os/hal/boards/NUTINY-SDK-NUC120-V1.0/board.mk +include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/rt/rt.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk +#include $(CHIBIOS)/os/common/ports/ARMv6-M/compilers/GCC/mk/port.mk +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk +# Auto-build files in ./source recursively. +include $(CHIBIOS)/tools/mk/autobuild.mk +# Other files (optional). +include $(CHIBIOS)/os/hal/lib/streams/streams.mk +include $(CHIBIOS)/os/various/shell/shell.mk +include $(CHIBIOS)/os/hal/lib/complex/mfs/hal_mfs.mk + +# Define linker script file here +LDSCRIPT= $(STARTUPLD_CONTRIB)/NUC120xE3xx.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ + shcfg.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = $(ALLCPPSRC) + +# List ASM source files here. +ASMSRC = $(ALLASMSRC) + +# List ASM with preprocessor source files here. +ASMXSRC = $(ALLXASMSRC) + +# Inclusion directories. +INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC) + +# Define C warning options here. +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes + +# Define C++ warning options here. +CPPWARN = -Wall -Wextra -Wundef + +# +# Project, target, sources and paths +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = -DSHELL_CONFIG_FILE + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user section +############################################################################## + +############################################################################## +# Common rules +# + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk +include $(RULESPATH)/arm-none-eabi.mk +include $(RULESPATH)/rules.mk + +# +# Common rules +############################################################################## + +############################################################################## +# Custom rules +# + +READLINK:=greadlink +OPENOCD:=$(shell $(READLINK) -f `which openocd`) +OPENOCDPATH:=$(shell dirname $(OPENOCD))/../share/openocd + +flash: $(BUILDDIR)/$(PROJECT).elf + openocd -f ../scripts/interface/nulink.cfg -f ../scripts/target/numicro.cfg -c "program $< reset exit" + +# +# Custom rules +############################################################################## diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/chconf.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/chconf.h new file mode 100644 index 0000000000..c0e5077922 --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/chconf.h @@ -0,0 +1,766 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file rt/templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_6_1_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION 32 +#endif + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY 10000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA 0 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) +#define CH_CFG_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) +#define CH_CFG_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TM) +#define CH_CFG_USE_TM FALSE +#endif + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_REGISTRY) +#define CH_CFG_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES FALSE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES TRUE +#endif + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_CONDVARS) +#define CH_CFG_USE_CONDVARS FALSE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +#define CH_CFG_USE_CONDVARS_TIMEOUT FALSE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +#define CH_CFG_USE_EVENTS_TIMEOUT FALSE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES FALSE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name OSLIB options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES FALSE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE TRUE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE 0 +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP TRUE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS FALSE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS FALSE +#endif + +/** + * @brief Pipes APIs. + * @details If enabled then the pipes APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_PIPES) +#define CH_CFG_USE_PIPES FALSE +#endif + +/** + * @brief Objects Caches APIs. + * @details If enabled then the objects caches APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_CACHES) +#define CH_CFG_USE_OBJ_CACHES FALSE +#endif + +/** + * @brief Delegate threads APIs. + * @details If enabled then the delegate threads APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_DELEGATES) +#define CH_CFG_USE_DELEGATES FALSE +#endif + +/** + * @brief Jobs Queues APIs. + * @details If enabled then the jobs queues APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_JOBS) +#define CH_CFG_USE_JOBS FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY FALSE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY FALSE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS FALSE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES FALSE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES FALSE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS FALSE +#endif + +/** + * @brief Enables factory for Pipes. + */ +#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) +#define CH_CFG_FACTORY_PIPES FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS FALSE +#endif + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#if !defined(CH_DBG_THREADS_PROFILING) +#define CH_DBG_THREADS_PROFILING FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() \ + { \ + /* Add threads initialization code here.*/ \ + } + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) \ + { \ + /* Add threads initialization code here.*/ \ + } + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) \ + { \ + /* Add threads finalization code here.*/ \ + } + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) \ + { \ + /* Context switch code here.*/ \ + } + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() \ + { \ + /* IRQ prologue code here.*/ \ + } + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() \ + { \ + /* IRQ epilogue code here.*/ \ + } + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() \ + { \ + /* Idle-enter code here.*/ \ + } + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() \ + { \ + /* Idle-leave code here.*/ \ + } + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() \ + { \ + /* Idle loop code here.*/ \ + } + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() \ + { \ + /* System tick event code here.*/ \ + } + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) \ + { \ + /* System halt code here.*/ \ + } + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) \ + { \ + /* Trace code here.*/ \ + } + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/halconf.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/halconf.h new file mode 100644 index 0000000000..531d9c1fb7 --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/halconf.h @@ -0,0 +1,533 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#define _CHIBIOS_HAL_CONF_ +#define _CHIBIOS_HAL_CONF_VER_7_1_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the EFlash subsystem. + */ +#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__) +#define HAL_USE_EFL TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SIO subsystem. + */ +#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) +#define HAL_USE_SIO FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the TRNG subsystem. + */ +#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) +#define HAL_USE_TRNG FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/** + * @brief Enables the WSPI subsystem. + */ +#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) +#define HAL_USE_WSPI FALSE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) +#define PAL_USE_CALLBACKS FALSE +#endif + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) +#define PAL_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/** + * @brief Enforces the driver to use direct callbacks rather than OSAL events. + */ +#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) +#define CAN_ENFORCE_USE_CALLBACKS FALSE +#endif + +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + +/*===========================================================================*/ +/* DAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) +#define DAC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define DAC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the zero-copy API. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/** + * @brief OCR initialization constant for V20 cards. + */ +#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) +#define SDC_INIT_OCR_V20 0x50FF8000U +#endif + +/** + * @brief OCR initialization constant for non-V20 cards. + */ +#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) +#define SDC_INIT_OCR 0x80100000U +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables circular transfers APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) +#define SPI_USE_CIRCULAR FALSE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/** + * @brief Handling method for SPI CS line. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) +#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* WSPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) +#define WSPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define WSPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#include "halconf_community.h" + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/halconf_community.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/halconf_community.h new file mode 100644 index 0000000000..8b650109d2 --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/halconf_community.h @@ -0,0 +1,180 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/** + * @brief Enables the USB_HID subsystem. + */ +#if !defined(HAL_USE_USB_HID) || defined(__DOXYGEN__) +#define HAL_USE_USB_HID FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/mcuconf.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/mcuconf.h new file mode 100644 index 0000000000..f881a742ee --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/mcuconf.h @@ -0,0 +1,54 @@ +/* + ChibiOS - Copyright (C) 2020 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef _MCUCONF_H_ +#define _MCUCONF_H_ + +/* + * Board setting + */ + +/* + * HAL driver system settings. + */ +#define NUC123_HSE_ENABLED TRUE +#define NUC123_PLL_ENABLED TRUE +#define NUC123_PLLSRC NUC123_PLLSRC_HSI + +// #define NUC123_SERIAL_CLKSRC NUC123_SERIAL_CLKSRC_PLL +// #define NUC123_SERIAL_CLKSRC NUC123_SERIAL_CLKSRC_HSE +#define NUC123_SERIAL_CLKSRC NUC123_SERIAL_CLKSRC_HSI +#define NUC123_SERIAL_USE_UART0 FALSE +#define NUC123_SERIAL_USE_UART1 TRUE + +#define NUC123_CONFIG_ENABLED TRUE +// #define NUC123_CONFIG_DATAFLASH_SIZE 20480 +// #define NUC123_CONFIG_DATAFLASH_SIZE (NUC123_FLASH_SIZE - FMC->DFBADR) +// #define NUC123_DFBADDR 0xC000 +// #define NUC123_DFBADDR ((void *)(FMC->DFBADR)) +// #define NUC123_DFBADDR ((0x11000UL - NUC123_CONFIG_DATAFLASH_SIZE) & ~(0x1FFUL)) +// #define NUC123_DATAFLASH_ENABLED TRUE +// #define NUC123_DATAFLASH_SIZE 4096 +// #define NUC123_EFL_ACCESS_APROM TRUE +#define NUC123_EFL_ACCESS_APROM FALSE +#define NUC123_EFL_ACCESS_DATAFLASH TRUE +// #define NUC123_EFL_ACCESS_LDROM TRUE +// #define NUC123_EFL_ACCESS_CONFIG TRUE +// #define NUC123_EFL_DYNAMICALLY_CHECK_CONFIG FALSE + +#define NUC123_MCUCONF + +#endif /* _MCUCONF_H_ */ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/osalconf.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/osalconf.h new file mode 100644 index 0000000000..0b67c88d15 --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/osalconf.h @@ -0,0 +1,15 @@ +/* + ChibiOS - Copyright (C) 2020 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/shellconf.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/shellconf.h new file mode 100644 index 0000000000..e959993888 --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/cfg/shellconf.h @@ -0,0 +1,139 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file shellconf.h + * @brief Simple CLI shell configuration header. + * + * @addtogroup SHELL + * @{ + */ + +#ifndef SHELLCONF_H +#define SHELLCONF_H + +/** + * @brief Shell maximum input line length. + */ +#if !defined(SHELL_MAX_LINE_LENGTH) || defined(__DOXYGEN__) +#define SHELL_MAX_LINE_LENGTH 64 +#endif + +/** + * @brief Shell maximum arguments per command. + */ +#if !defined(SHELL_MAX_ARGUMENTS) || defined(__DOXYGEN__) +#define SHELL_MAX_ARGUMENTS 4 +#endif + +/** + * @brief Shell maximum command history. + */ +#if !defined(SHELL_MAX_HIST_BUFF) || defined(__DOXYGEN__) +#define SHELL_MAX_HIST_BUFF 8 * SHELL_MAX_LINE_LENGTH +#endif + +/** + * @brief Enable shell command history + */ +#if !defined(SHELL_USE_HISTORY) || defined(__DOXYGEN__) +#define SHELL_USE_HISTORY FALSE +#endif + +/** + * @brief Enable shell command completion + */ +#if !defined(SHELL_USE_COMPLETION) || defined(__DOXYGEN__) +#define SHELL_USE_COMPLETION FALSE +#endif + +/** + * @brief Shell Maximum Completions (Set to max commands with common prefix) + */ +#if !defined(SHELL_MAX_COMPLETIONS) || defined(__DOXYGEN__) +#define SHELL_MAX_COMPLETIONS 8 +#endif + +/** + * @brief Enable shell escape sequence processing + */ +#if !defined(SHELL_USE_ESC_SEQ) || defined(__DOXYGEN__) +#define SHELL_USE_ESC_SEQ TRUE +#endif + +/*===========================================================================*/ +/* Shell command settings */ +/*===========================================================================*/ + +/** + * @brief Enable shell exit command + */ +#if !defined(SHELL_CMD_EXIT_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_EXIT_ENABLED TRUE +#endif + +/** + * @brief Enable shell info command + */ +#if !defined(SHELL_CMD_INFO_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_INFO_ENABLED TRUE +#endif + +/** + * @brief Enable shell echo command + */ +#if !defined(SHELL_CMD_ECHO_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_ECHO_ENABLED TRUE +#endif + +/** + * @brief Enable shell systime command + */ +#if !defined(SHELL_CMD_SYSTIME_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_SYSTIME_ENABLED TRUE +#endif + +/** + * @brief Enable shell mem command + */ +#if !defined(SHELL_CMD_MEM_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_MEM_ENABLED TRUE +#endif + +/** + * @brief Enable shell threads command + */ +#if !defined(SHELL_CMD_THREADS_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_THREADS_ENABLED TRUE +#endif + +/** + * @brief Enable shell test command + */ +#if !defined(SHELL_CMD_TEST_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_TEST_ENABLED FALSE +#endif + +/** + * @brief Define test thread working area + */ +#if !defined(SHELL_CMD_TEST_WA_SIZE) || defined(__DOXYGEN__) +#define SHELL_CMD_TEST_WA_SIZE THD_WORKING_AREA_SIZE(256) +#endif + +#endif /* SHELLCONF_H */ + +/** @} */ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/main.c b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/main.c new file mode 100644 index 0000000000..93e86ecbf1 --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/main.c @@ -0,0 +1,99 @@ +/* + Copyright (C) 2021 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "hal.h" +#include "shcfg.h" + + +const SerialConfig shell_serial_cfg = { + .speed = 57600, + .mode = NUC123_SERIAL_MODE_DEFAULT, + .data = NUC123_SERIAL_DATA_8BITS, + .parity = NUC123_SERIAL_PARITY_N, + .stop = NUC123_SERIAL_STOP_1}; + + +/* + * Onboard LED blinker thread, times are in milliseconds. + */ +static THD_WORKING_AREA(waBlinkThread, 128); +static THD_FUNCTION(BlinkThread, arg) +{ + (void)arg; + chRegSetThreadName("blinker"); + while (true) { + systime_t time = 500; + OnboardLED_Toggle(); + chThdSleepMilliseconds(time); + } +} + +/* + * Application entry point. + */ +int main(void) +{ + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + OnboardLED_Init(); + + /* + * Turn off the onboard LED. + */ + OnboardLED_Off(); + + chDbgSuspendTrace(CH_DBG_TRACE_MASK_SWITCH); + + /* + * Activates the serial driver. + */ + sdStart(&SHELL_SERIAL_DRIVER, &shell_serial_cfg); + + /* + * Shell manager initialization. + */ + shellInit(); + + + eflStart(&EFLD1, NULL); + EFLD1.bank = NUC123_EFL_BANK_DATAFLASH; + mfsObjectInit(&mfsd); + mfsStart(&mfsd, &mfsd_config); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic( + waBlinkThread, sizeof(waBlinkThread), NORMALPRIO, BlinkThread, NULL); + + while (true) { + thread_t *shelltp = chThdCreateFromHeap(NULL, + SHELL_WA_SIZE, + "shell", + NORMALPRIO + 1, + shellThread, + (void *)&shell_cfg); + chThdWait(shelltp); /* Waiting termination. */ + chThdSleepMilliseconds(1000); + } +} diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/readme.txt b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/readme.txt new file mode 100644 index 0000000000..4f69310233 --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/readme.txt @@ -0,0 +1,47 @@ +***************************************************************************** +** ChibiOS/HAL - EFL driver demo for NUC123. ** +***************************************************************************** + +** TARGET ** + +The demo runs on a NUTINY-SDK-NUC123-V2.0 board with a NUC123SD4AN0 MCU. + +** The Demo ** + +The application demonstrates the use of the NUC123 EFL driver. The test exposes +shell access via the SD0 serial port (configured to 57600 8N1), +accessible through the corresponding pins or via the on-board NuLinkMe. +That shell allows for 3 non-default commands: + + - kvs_put key value : This command stores value associated with key. + value is a string, and key is a numeric value + [1, MFS_CFG_MAX_RECORDS] + - kvs_get key : This command retrieves the value associated with + key. + - kvs_erase {--all|key} : This command either erases the value associated + with key, or all key value pairs. + +The data store should persist, even when the board loses power. Try restarting +the board and make sure the state is as you left it. + +** Board Setup ** + +To use an external serial interface: +- Attach a serial bus to pins 21-24, and the GND: + 21 - NUC123 RX + 22 - NUC123 TX + 23 - NUC123 nRTS (optional) + 24 - NUC123 nCTS (optional) +- Ensure that the interface is set to the same configuration as the demo + (by default 57600 8N1) + +To use the ICE's on-board USB-serial interface: +- Set SW2 1-4 to ON +- Connect a USB cable from a workstation to J5 + +** Build Procedure ** + +The demo has been tested using gcc version 10.2.1 (GNU Arm Embedded Toolchain 10-2020-q4-major). +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/shcfg.c b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/shcfg.c new file mode 100644 index 0000000000..7a15090f0d --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/shcfg.c @@ -0,0 +1,112 @@ +/* + Copyright (C) 2021 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file shcfg.c + * @brief Shell config. + * + * @addtogroup Shell + * @{ + */ +#include "hal.h" +#include "shcfg.h" +#include "chprintf.h" + +#include +#include + +MFSDriver mfsd; + +const MFSConfig mfsd_config = {.flashp = (BaseFlash *)&EFLD1, + .erased = 0xFFFFFFFF, + .bank0_sectors = 4, + .bank0_start = 0, + .bank1_sectors = 4, + .bank1_start = 4, + .bank_size = 2048}; + +void sh_kvs_put(BaseSequentialStream *chp, int argc, char *argv[]) { + if (argc < 2) { + chprintf(chp, "Format: kvs_put key [value]\nAt this time, key must be numeric.\n"); + return; + } + mfs_id_t rid = atoi(argv[0]); + if (rid < 1 || MFS_CFG_MAX_RECORDS < rid) { + chprintf(chp, "key must be [%d, %d].\n", 1, MFS_CFG_MAX_RECORDS); + return; + } + mfsWriteRecord(&mfsd, rid, strlen(argv[1]), (uint8_t *)argv[1]); +} + +void sh_kvs_get(BaseSequentialStream *chp, int argc, char *argv[]) { + if (argc < 1) { + chprintf(chp, + "Format: kvs_get key\nAt this time, key must be " + "numeric.\n"); + return; + } + mfs_id_t rid = atoi(argv[0]); + if (rid < 1 || MFS_CFG_MAX_RECORDS < rid) { + chprintf(chp, "key must be [%d, %d].\n", 1, MFS_CFG_MAX_RECORDS); + return; + } + + uint8_t buf[128]; + size_t n = 128; + mfs_error_t err = mfsReadRecord(&mfsd, rid, &n, buf); + switch (err) { + case MFS_WARN_GC: + case MFS_WARN_REPAIR: + case MFS_NO_ERROR: + chprintf(chp, "%.*s\n", n, buf); + break; + case MFS_ERR_NOT_FOUND: + chprintf(chp, "Record not found\n"); + break; + default: + chprintf(chp, "Unknown error reading record: %d\n", err); + } +} + +const char all_flag[] = "--all"; +void sh_kvs_erase(BaseSequentialStream *chp, int argc, char *argv[]) { + + if (argc < 1) { + chprintf(chp, + "Format: kvs_erase [%s] key\nAt this time, key must be" + "numeric.\n", all_flag); + return; + } + + if (strcmp(all_flag, argv[0]) == 0) { + mfsErase(&mfsd); + } else { + mfs_id_t rid = atoi(argv[0]); + if (rid < 1 || MFS_CFG_MAX_RECORDS < rid) { + chprintf(chp, "key must be [%d, %d].\n", 1, MFS_CFG_MAX_RECORDS); + return; + } + mfsEraseRecord(&mfsd, rid); + } + +} + +const ShellCommand commands[] = {{"kvs_put", sh_kvs_put}, + {"kvs_get", sh_kvs_get}, + {"kvs_erase", sh_kvs_erase}, + {NULL, NULL}}; + +const ShellConfig shell_cfg = {(BaseSequentialStream *)&SHELL_SERIAL_DRIVER, commands}; diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/shcfg.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/shcfg.h new file mode 100644 index 0000000000..e636cc44ee --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/EFL/shcfg.h @@ -0,0 +1,52 @@ +/* + Copyright (C) 2021 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file shcfg.h + * @brief Shell config header. + * + * @addtogroup Shell + * @{ + */ + +#ifndef USBCFG_H +#define USBCFG_H + +#include "hal.h" +#include "hal_mfs.h" +#include "shell.h" + +#define SHELL_SERIAL_DRIVER SD1 + +#define SHELL_WA_SIZE THD_WORKING_AREA_SIZE(1024) + +#ifdef __cplusplus + extern "C" { +#endif + + extern const ShellConfig shell_cfg; + extern const ShellCommand commands[]; + + extern MFSDriver mfsd; + extern const MFSConfig mfsd_config; + +#ifdef __cplusplus +} +#endif + +#endif /* USBCFG_H */ + +/** @} */ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/Makefile b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/Makefile new file mode 100644 index 0000000000..d3c7bb7520 --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/Makefile @@ -0,0 +1,213 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -ggdb -g3 -gdwarf-3 -gstrict-dwarf -fomit-frame-pointer -falign-functions=16 -O +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO). +ifeq ($(USE_LTO),) + USE_LTO = no +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# FPU-related options. +ifeq ($(USE_FPU_OPT),) + USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16 +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, target, sources and paths +# + +# Define project name here +PROJECT = ch + +# Target settings. +MCU = cortex-m0 + +# Imported source files and paths. +BASE_PATH := ../../../../../../.. +CHIBIOS := $(BASE_PATH)/ChibiOS/ChibiOS +CHIBIOS_CONTRIB := $(BASE_PATH)/ChibiOS/ChibiOS-Contrib +CONFDIR := ./cfg +BUILDDIR := ./build +DEPDIR := ./.dep + +# Licensing files. +include $(CHIBIOS)/os/license/license.mk +# Startup files. +include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_NUC123.mk +# HAL-OSAL files (optional). +# include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/NUC120/platform.mk +include $(CHIBIOS_CONTRIB)/os/hal/boards/NUTINY-SDK-NUC120-V1.0/board.mk +#include $(CHIBIOS)/os/hal/osal/os-less/ARMCMx/osal.mk +include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk +# RTOS files (optional). +#include $(CHIBIOS)/os/nil/nil.mk +include $(CHIBIOS)/os/rt/rt.mk +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk +#include $(CHIBIOS)/os/common/ports/ARMv7-M/compilers/GCC/mk/port.mk +# Auto-build files in ./source recursively. +include $(CHIBIOS)/tools/mk/autobuild.mk +# Other files (optional). +#include $(CHIBIOS)/test/lib/test.mk +#include $(CHIBIOS)/test/rt/rt_test.mk +#include $(CHIBIOS)/test/oslib/oslib_test.mk + +# Define linker script file here +#LDSCRIPT= $(STARTUPLD_CONTRIB)/NUC120xE3xx.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ + main.c \ + ssd1306.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = $(ALLCPPSRC) + +# List ASM source files here. +ASMSRC = $(ALLASMSRC) + +# List ASM with preprocessor source files here. +ASMXSRC = $(ALLXASMSRC) + +# Inclusion directories. +INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC) + +# Define C warning options here. +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes + +# Define C++ warning options here. +CPPWARN = -Wall -Wextra -Wundef + +# +# Project, target, sources and paths +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user section +############################################################################## + +############################################################################## +# Common rules +# + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk +include $(RULESPATH)/arm-none-eabi.mk +include $(RULESPATH)/rules.mk + +# +# Common rules +############################################################################## + +############################################################################## +# Custom rules +# + + +OPENOCD:=$(shell readlink -f `which openocd`) +OPENOCDPATH:=$(shell dirname $(OPENOCD))/../share/openocd + +install-openocd-config: + rm $(OPENOCDPATH)/scripts/target/numicroM0.cfg && cp $(CHIBIOS_CONTRIB)/ext/numicroM0.cfg $(OPENOCDPATH)/scripts/target/ + +connect: + openocd -f ../scripts/interface/nulink.cfg -f ../scripts/target/numicroM0.cfg + +flash: $(BUILDDIR)/$(PROJECT).elf + openocd -f ../scripts/interface/nulink.cfg -f ../scripts/target/numicroM0.cfg -c "program $< verify reset exit" + + + + +# +# Custom rules +############################################################################## + diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/chconf.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/chconf.h new file mode 100644 index 0000000000..78af86d623 --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/chconf.h @@ -0,0 +1,766 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file rt/templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_6_1_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION 32 +#endif + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY 10000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA 0 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) +#define CH_CFG_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) +#define CH_CFG_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TM) +#define CH_CFG_USE_TM FALSE +#endif + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_REGISTRY) +#define CH_CFG_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES FALSE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES TRUE +#endif + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_CONDVARS) +#define CH_CFG_USE_CONDVARS FALSE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +#define CH_CFG_USE_CONDVARS_TIMEOUT FALSE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +#define CH_CFG_USE_EVENTS_TIMEOUT FALSE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES FALSE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name OSLIB options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES FALSE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE TRUE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE 0 +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP TRUE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS FALSE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS FALSE +#endif + +/** + * @brief Pipes APIs. + * @details If enabled then the pipes APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_PIPES) +#define CH_CFG_USE_PIPES FALSE +#endif + +/** + * @brief Objects Caches APIs. + * @details If enabled then the objects caches APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_CACHES) +#define CH_CFG_USE_OBJ_CACHES FALSE +#endif + +/** + * @brief Delegate threads APIs. + * @details If enabled then the delegate threads APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_DELEGATES) +#define CH_CFG_USE_DELEGATES FALSE +#endif + +/** + * @brief Jobs Queues APIs. + * @details If enabled then the jobs queues APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_JOBS) +#define CH_CFG_USE_JOBS FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY FALSE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY FALSE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS FALSE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES FALSE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES FALSE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS FALSE +#endif + +/** + * @brief Enables factory for Pipes. + */ +#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) +#define CH_CFG_FACTORY_PIPES FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS FALSE +#endif + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#if !defined(CH_DBG_THREADS_PROFILING) +#define CH_DBG_THREADS_PROFILING FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() \ + { \ + /* Add threads initialization code here.*/ \ + } + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) \ + { \ + /* Add threads initialization code here.*/ \ + } + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) \ + { \ + /* Add threads finalization code here.*/ \ + } + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) \ + { \ + /* Context switch code here.*/ \ + } + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() \ + { \ + /* IRQ prologue code here.*/ \ + } + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() \ + { \ + /* IRQ epilogue code here.*/ \ + } + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() \ + { \ + /* Idle-enter code here.*/ \ + } + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() \ + { \ + /* Idle-leave code here.*/ \ + } + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() \ + { \ + /* Idle loop code here.*/ \ + } + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() \ + { \ + /* System tick event code here.*/ \ + } + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) \ + { \ + /* System halt code here.*/ \ + } + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) \ + { \ + /* Trace code here.*/ \ + } + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/halconf.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/halconf.h new file mode 100644 index 0000000000..c73767e6ab --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/halconf.h @@ -0,0 +1,533 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#define _CHIBIOS_HAL_CONF_ +#define _CHIBIOS_HAL_CONF_VER_7_1_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the EFlash subsystem. + */ +#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__) +#define HAL_USE_EFL FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C TRUE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SIO subsystem. + */ +#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) +#define HAL_USE_SIO FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the TRNG subsystem. + */ +#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) +#define HAL_USE_TRNG FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/** + * @brief Enables the WSPI subsystem. + */ +#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) +#define HAL_USE_WSPI FALSE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) +#define PAL_USE_CALLBACKS FALSE +#endif + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) +#define PAL_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/** + * @brief Enforces the driver to use direct callbacks rather than OSAL events. + */ +#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) +#define CAN_ENFORCE_USE_CALLBACKS FALSE +#endif + +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + +/*===========================================================================*/ +/* DAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) +#define DAC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define DAC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the zero-copy API. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/** + * @brief OCR initialization constant for V20 cards. + */ +#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) +#define SDC_INIT_OCR_V20 0x50FF8000U +#endif + +/** + * @brief OCR initialization constant for non-V20 cards. + */ +#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) +#define SDC_INIT_OCR 0x80100000U +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables circular transfers APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) +#define SPI_USE_CIRCULAR FALSE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/** + * @brief Handling method for SPI CS line. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) +#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* WSPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) +#define WSPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define WSPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#include "halconf_community.h" + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/halconf_community.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/halconf_community.h new file mode 100644 index 0000000000..8b650109d2 --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/halconf_community.h @@ -0,0 +1,180 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/** + * @brief Enables the USB_HID subsystem. + */ +#if !defined(HAL_USE_USB_HID) || defined(__DOXYGEN__) +#define HAL_USE_USB_HID FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/mcuconf.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/mcuconf.h new file mode 100644 index 0000000000..a5b28f5896 --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/mcuconf.h @@ -0,0 +1,40 @@ +/* + ChibiOS - Copyright (C) 2020 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef _MCUCONF_H_ +#define _MCUCONF_H_ + +/* + * Board setting + */ + +/* + * HAL driver system settings. + */ +#define NUC123_HSE_ENABLED TRUE +#define NUC123_PLL_ENABLED TRUE +#define NUC123_PLLSRC NUC123_PLLSRC_HSE + +#define NUC123_SERIAL_CLKSRC NUC123_SERIAL_CLKSRC_HSI +#define NUC123_SERIAL_USE_UART0 FALSE +#define NUC123_SERIAL_USE_UART1 TRUE + +#define NUC123_I2C_USE_I2C0 FALSE +#define NUC123_I2C_USE_I2C1 TRUE + +#define NUC123_MCUCONF + +#endif /* _MCUCONF_H_ */ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/osalconf.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/osalconf.h new file mode 100644 index 0000000000..666d0c375b --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/osalconf.h @@ -0,0 +1,67 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief Bare-metal OSAL configuration header. + * + * @addtogroup OSAL_CONF + * @{ + */ + +#ifndef OSALCONF_H +#define OSALCONF_H + +/** + * @brief Frequency in Hertz of the system tick. + */ +#if !defined(OSAL_ST_FREQUENCY) || defined(__DOXYGEN__) +#define OSAL_ST_FREQUENCY 10000 +#endif + +/** + * @brief Enables OSAL assertions. + */ +#if !defined(OSAL_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define OSAL_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Enables OSAL functions parameters checks. + */ +#if !defined(OSAL_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define OSAL_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief OSAL initialization hook. + */ +#if !defined(OSAL_INIT_HOOK) || defined(__DOXYGEN__) +#define OSAL_INIT_HOOK() { \ +} +#endif + +/** + * @brief Idle loop hook macro. + */ +#if !defined(OSAL_IDLE_HOOK) || defined(__DOXYGEN__) +#define OSAL_IDLE_HOOK() { \ +} +#endif + +#endif /* OSALCONF_H */ + +/** @} */ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/shellconf.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/shellconf.h new file mode 100644 index 0000000000..e959993888 --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/cfg/shellconf.h @@ -0,0 +1,139 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file shellconf.h + * @brief Simple CLI shell configuration header. + * + * @addtogroup SHELL + * @{ + */ + +#ifndef SHELLCONF_H +#define SHELLCONF_H + +/** + * @brief Shell maximum input line length. + */ +#if !defined(SHELL_MAX_LINE_LENGTH) || defined(__DOXYGEN__) +#define SHELL_MAX_LINE_LENGTH 64 +#endif + +/** + * @brief Shell maximum arguments per command. + */ +#if !defined(SHELL_MAX_ARGUMENTS) || defined(__DOXYGEN__) +#define SHELL_MAX_ARGUMENTS 4 +#endif + +/** + * @brief Shell maximum command history. + */ +#if !defined(SHELL_MAX_HIST_BUFF) || defined(__DOXYGEN__) +#define SHELL_MAX_HIST_BUFF 8 * SHELL_MAX_LINE_LENGTH +#endif + +/** + * @brief Enable shell command history + */ +#if !defined(SHELL_USE_HISTORY) || defined(__DOXYGEN__) +#define SHELL_USE_HISTORY FALSE +#endif + +/** + * @brief Enable shell command completion + */ +#if !defined(SHELL_USE_COMPLETION) || defined(__DOXYGEN__) +#define SHELL_USE_COMPLETION FALSE +#endif + +/** + * @brief Shell Maximum Completions (Set to max commands with common prefix) + */ +#if !defined(SHELL_MAX_COMPLETIONS) || defined(__DOXYGEN__) +#define SHELL_MAX_COMPLETIONS 8 +#endif + +/** + * @brief Enable shell escape sequence processing + */ +#if !defined(SHELL_USE_ESC_SEQ) || defined(__DOXYGEN__) +#define SHELL_USE_ESC_SEQ TRUE +#endif + +/*===========================================================================*/ +/* Shell command settings */ +/*===========================================================================*/ + +/** + * @brief Enable shell exit command + */ +#if !defined(SHELL_CMD_EXIT_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_EXIT_ENABLED TRUE +#endif + +/** + * @brief Enable shell info command + */ +#if !defined(SHELL_CMD_INFO_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_INFO_ENABLED TRUE +#endif + +/** + * @brief Enable shell echo command + */ +#if !defined(SHELL_CMD_ECHO_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_ECHO_ENABLED TRUE +#endif + +/** + * @brief Enable shell systime command + */ +#if !defined(SHELL_CMD_SYSTIME_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_SYSTIME_ENABLED TRUE +#endif + +/** + * @brief Enable shell mem command + */ +#if !defined(SHELL_CMD_MEM_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_MEM_ENABLED TRUE +#endif + +/** + * @brief Enable shell threads command + */ +#if !defined(SHELL_CMD_THREADS_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_THREADS_ENABLED TRUE +#endif + +/** + * @brief Enable shell test command + */ +#if !defined(SHELL_CMD_TEST_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_TEST_ENABLED FALSE +#endif + +/** + * @brief Define test thread working area + */ +#if !defined(SHELL_CMD_TEST_WA_SIZE) || defined(__DOXYGEN__) +#define SHELL_CMD_TEST_WA_SIZE THD_WORKING_AREA_SIZE(256) +#endif + +#endif /* SHELLCONF_H */ + +/** @} */ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/main.c b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/main.c new file mode 100644 index 0000000000..933d9c09ab --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/main.c @@ -0,0 +1,241 @@ + +/* + Copyright (C) 2020 Ein Terakawa + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "hal.h" +#include "ssd1306.h" + +static const uint8_t logo_bits[] = { + 0x00, 0x00, 0x00, 0x80, 0xF0, 0xF8, 0xFC, 0xFC, + 0xFE, 0x3E, 0x1E, 0x1E, 0x7E, 0x7C, 0x7C, 0x78, + 0x70, 0x40, 0x00, 0x00, 0xFE, 0xFE, 0xFE, 0xFE, + 0xFE, 0xE0, 0xE0, 0xE0, 0xE0, 0xE0, 0xC0, 0x00, + 0x00, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x00, 0x00, + 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xC0, 0xE0, 0xE0, + 0xE0, 0xC0, 0x00, 0x00, 0xEE, 0xEE, 0xEE, 0xEE, + 0xEE, 0x00, 0x80, 0xF0, 0xF8, 0xFC, 0xFC, 0xFE, + 0x1E, 0x1E, 0x1E, 0xFE, 0xFC, 0xFC, 0xF8, 0xF0, + 0x80, 0x60, 0xF8, 0xFC, 0xFC, 0xFE, 0xFE, 0xDE, + 0x9E, 0xBE, 0xBC, 0xBC, 0x38, 0x20, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x01, 0x0F, 0x1F, 0x3F, 0x3F, + 0x7F, 0x7C, 0x78, 0x78, 0x7E, 0x3E, 0x3E, 0x3E, + 0x0E, 0x02, 0x00, 0x00, 0x7F, 0x7F, 0x7F, 0x7F, + 0x7F, 0x00, 0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x00, + 0x00, 0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x00, 0x00, + 0x7F, 0x7F, 0x7F, 0x7F, 0x1F, 0x79, 0x7F, 0x7F, + 0x7F, 0x3F, 0x0F, 0x00, 0x7F, 0x7F, 0x7F, 0x7F, + 0x7F, 0x00, 0x01, 0x0F, 0x1F, 0x3F, 0x3F, 0x7F, + 0x78, 0x78, 0x78, 0x7F, 0x3F, 0x3F, 0x1F, 0x0F, + 0x01, 0x04, 0x1C, 0x3D, 0x3D, 0x7D, 0x79, 0x7B, + 0x7B, 0x7F, 0x7F, 0x3F, 0x1F, 0x0C, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xFE, 0xFE, 0xFE, 0xFE, + 0xFE, 0xFE, 0xF8, 0xC0, 0xFE, 0xFE, 0xFE, 0xFE, + 0xFE, 0x00, 0x00, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, + 0xFE, 0x00, 0x00, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, + 0xFE, 0x00, 0x80, 0xF0, 0xF8, 0xFC, 0xFC, 0xFE, + 0x3E, 0x1E, 0x1E, 0x7E, 0x7C, 0x7C, 0x78, 0x70, + 0x40, 0x00, 0x38, 0x38, 0x38, 0xFE, 0xFE, 0xFE, + 0xFE, 0xFE, 0xFE, 0x00, 0x00, 0x20, 0x38, 0x3C, + 0x3C, 0x3E, 0x9E, 0x9E, 0xFE, 0xFE, 0xFC, 0xF8, + 0x70, 0x00, 0x20, 0x38, 0x3C, 0xFC, 0xFE, 0xDE, + 0xDE, 0xFE, 0xFE, 0x7C, 0x78, 0x20, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x7F, 0x7F, 0x7F, 0x7F, + 0x7F, 0x01, 0x07, 0x1F, 0x7F, 0x7F, 0x7F, 0x7F, + 0x7F, 0x00, 0x00, 0x03, 0x0F, 0x1F, 0x3F, 0x7F, + 0x7F, 0x7C, 0x7C, 0x7F, 0x7F, 0x3F, 0x3F, 0x1F, + 0x03, 0x00, 0x01, 0x0F, 0x1F, 0x3F, 0x3F, 0x7F, + 0x7C, 0x78, 0x78, 0x7E, 0x3E, 0x3E, 0x3E, 0x0E, + 0x02, 0x00, 0x00, 0x00, 0x00, 0x7F, 0x7F, 0x7F, + 0x7F, 0x7F, 0x7F, 0x00, 0x00, 0x70, 0x7C, 0x7E, + 0x7F, 0x7F, 0x7F, 0x7F, 0x7B, 0x7B, 0x79, 0x79, + 0x78, 0x00, 0x04, 0x1C, 0x3C, 0x7D, 0x79, 0x79, + 0x79, 0x7F, 0x7F, 0x3F, 0x3F, 0x0E, 0x00, 0x00, +}; + +static void draw_logo(SSD1306_DRIVER *ssd1306, bool invert, char xx) { + uint8_t width = ssd1306->width; + uint8_t height = ssd1306->height; + uint8_t num_pages = height / 8; + uint8_t invert_bits = invert ? 0xff : 0x00; + uint8_t *buf = SSD1306_GET_FRAMEBUFFER(ssd1306); + + for (uint8_t row = 0; row < num_pages; ++row) { + for (uint8_t x = 0; x < width; ++x) { + uint8_t dat = logo_bits[(128 - xx + x) % 128 + (row % 4) * width]; + if (row / 2 % 2 == 0) { + dat ^= 0xff; + } + dat ^= invert_bits; /* Invert Imeage Bits */ + if (true) { + /* Horizontal Addressing Mode */ + buf[row * width + x] = dat; + } else { + /* Vertical Addressing Mode */ + buf[x * num_pages + row] = dat; + } + } + } +} + +#define I2C_CLK_FREQ 800000 +static const I2CConfig i2ccfg = { I2C_CLK_FREQ }; +#if NUC123_I2C_USE_I2C0 +DEFINE_SSD1306_DRIVER(ssd1306_128x64, &I2CD0, SSD1306_ADDRESS, 128, 64, false); +#endif +#if NUC123_I2C_USE_I2C1 +DEFINE_SSD1306_DRIVER(ssd1306_128x32, &I2CD1, SSD1306_ADDRESS, 128, 32, true); +#endif + +#if I2C_USE_MUTUAL_EXCLUSION +#define ACQUIRE_BUS(oled_driver) i2cAcquireBus((oled_driver)->i2cd) +#define RELEASE_BUS(oled_driver) i2cReleaseBus((oled_driver)->i2cd) +#else +#define ACQUIRE_BUS(oled_driver) +#define RELEASE_BUS(oled_driver) +#endif + +thread_reference_t thread1_ref = NULL; + +static THD_WORKING_AREA(waThread1, 128); +static THD_FUNCTION(Thread1, arg) { + chRegSetThreadName("blinker"); + + // OnboardLED_Off(); + + (void)arg; + while (true) { + if(osalThreadSuspendS(&thread1_ref) == MSG_OK) { + OnboardLED_On(); + }else{ + OnboardLED_Off(); + } + } +} + +#define I2C_THREAD_STACK_SIZE 256 +#if NUC123_I2C_USE_I2C0 +static THD_WORKING_AREA(waThread2, I2C_THREAD_STACK_SIZE); +static THD_FUNCTION(Thread2, arg) { + chRegSetThreadName("oled1"); + + SSD1306_DRIVER *ssd1306 = (SSD1306_DRIVER *)arg; + ssd1306->i2ccfg = &i2ccfg; + ACQUIRE_BUS(ssd1306); + ssd1306_init(ssd1306); + RELEASE_BUS(ssd1306); + char x = 0; + while (true) { + osalThreadSleepMilliseconds(127); + bool invert = false; + draw_logo(ssd1306, invert, x); + ACQUIRE_BUS(ssd1306); + ssd1306_data(ssd1306); + /* RELEASE_BUS(ssd1306); */ + /* ACQUIRE_BUS(ssd1306); */ + if (x % 16 == 12) { + ssd1306_display_off(ssd1306); + } else if (x % 16 == 0) { + ssd1306_display_on(ssd1306); + } + RELEASE_BUS(ssd1306); + x = (x + 1) % 128; + } +} +#endif + +#if NUC123_I2C_USE_I2C1 +static THD_WORKING_AREA(waThread3, I2C_THREAD_STACK_SIZE); +static THD_FUNCTION(Thread3, arg) { + chRegSetThreadName("oled2"); + + SSD1306_DRIVER *ssd1306 = (SSD1306_DRIVER *)arg; + ssd1306->i2ccfg = &i2ccfg; + ACQUIRE_BUS(ssd1306); +#if true + /* Workaround for some 128x32 OLED modules typically with black PCB. */ + while (!ssd1306_init(ssd1306)) { + RELEASE_BUS(ssd1306); + osalThreadSleepMilliseconds(100); + ACQUIRE_BUS(ssd1306); + } +#endif + ssd1306_init(ssd1306); + RELEASE_BUS(ssd1306); + char x = 0; + while (true) { + osalThreadSleepMilliseconds(131); + bool invert = true; + draw_logo(ssd1306, invert, x); + ACQUIRE_BUS(ssd1306); + ssd1306_data(ssd1306); + RELEASE_BUS(ssd1306); + x = (x + 127) % 128; + } +} +#endif + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + */ + halInit(); + + /* + * chSysInit() will also enable interrupts. + */ + chSysInit(); + + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO + 2, Thread1, NULL); +#if NUC123_I2C_USE_I2C0 + chThdCreateStatic(waThread2, sizeof(waThread2), NORMALPRIO + 1, Thread2, &ssd1306_128x64); +#endif +#if NUC123_I2C_USE_I2C1 + chThdCreateStatic(waThread3, sizeof(waThread3), NORMALPRIO + 1, Thread3, &ssd1306_128x32); +#endif + + while (true) { + osalThreadResumeS(&thread1_ref, MSG_OK); + osalThreadSleepMilliseconds(100); + osalThreadResumeS(&thread1_ref, MSG_RESET); + osalThreadSleepMilliseconds(400); + } +} diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/readme.txt b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/readme.txt new file mode 100644 index 0000000000..0ef953c3c0 --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/HAL - I2C driver demo for NUC123. ** +***************************************************************************** + +** TARGET ** + +The demo runs on a NUTINY-SDK-NUC123-V2.0 board with a NUC123SD4AN0 MCU. + +** The Demo ** + +The application demonstrates the use of the NUC123 platform driver, and a little +bit of the PAL. A successful run of the test involves the on-board LED blinking at 2 Hz +(on for 100 ms, then off for 400 ms). + + +** Board Setup ** + +- Connect 128x32 OLED module to PA.10=I2C1_SDA and PA.11=I2C1_SCL . +- Connect 128x64 OLED module to PF.2=I2C0_SDA and PF.3=I2C0_SCL . +- If any of the OLED modules are absent, pull-up resistors are required instead. + +** Build Procedure ** + +The demo has been tested using gcc version 9.3.1 (GNU Arm Embedded Toolchain 9-2020-q2-update). +Just add overriding setting for TRGT in the command line in order to use specific version of GCC. +for example: make -j TRGT=/opt/ARM/gcc-arm-none-eabi-9-2020-q2-update/bin/arm-none-eabi- diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/ssd1306.c b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/ssd1306.c new file mode 100644 index 0000000000..f4b37c195b --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/ssd1306.c @@ -0,0 +1,193 @@ +/* + Copyright (C) 2020 Ein Terakawa + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "hal.h" +#include "ssd1306.h" +#include "string.h" + +/* timeout value must be increased for i2cclk less than its default, 100kHz. */ +#define CMD_TRANSMIT_TIMEOUT TIME_MS2I(10) +#define DATA_TRANSMIT_TIMEOUT TIME_MS2I(100) + +#define CTRL_CMD_STREAM 0x00 +#define CTRL_DATA_STREAM 0x40 +#define CTRL_CMD_SINGLE 0x80 + +#define I2CD ((ssd1306)->i2cd) +#define ADDR ((ssd1306)->i2caddr) + +#define send_cmd(ssd1306, ...) \ + do { \ + uint8_t buf[] = { CTRL_CMD_STREAM, __VA_ARGS__ }; \ + bool _success = _send_cmd(I2CD, ADDR, buf, sizeof(buf)); \ + if (!_success) goto done; \ + } while(0) + +#define send_cmd_static(ssd1306, ...) \ + do{ \ + static const uint8_t buf[] = { CTRL_CMD_STREAM, __VA_ARGS__ }; \ + bool _success = _send_cmd(I2CD, ADDR, buf, sizeof(buf)); \ + if (!_success) goto done; \ + } while(0) + +#define CMD1(c) c +#define CMD2(c, d) c, d +#define CMD3(c, d, e) c, d, e + +static bool _send_cmd(I2CDriver *i2cd, uint8_t addr, const uint8_t *buf, int len) { + + msg_t status = i2cMasterTransmitTimeout(i2cd, addr, + buf, len, NULL, 0, CMD_TRANSMIT_TIMEOUT); + + if (MSG_OK != status) { + /* i2cflags_t error_code = i2cGetErrors(i2cd); */ + return false; + } + + return true; +} + +#define send_data(ssd1306, buf, len) \ + do { \ + bool _success = _send_data(I2CD, ADDR, buf, len); \ + if (!_success) goto done; \ + } while(0) + +static bool _send_data(I2CDriver *i2cd, uint8_t addr, const uint8_t *buf, int len) { + bool success = false; + + msg_t status = i2cMasterTransmitTimeout(i2cd, addr, + buf, len, NULL, 0, DATA_TRANSMIT_TIMEOUT); + + if (MSG_OK != status) { + /* i2cflags_t error_code = i2cGetErrors(I2CD); */ + goto done; + } + + success = true; + +done: + return success; +} + +bool ssd1306_init(SSD1306_DRIVER *ssd1306) { + bool success = false; + uint8_t width = ssd1306->width; + uint8_t height = ssd1306->height; + uint8_t num_pages = height / 8; + + i2cStart(I2CD, ssd1306->i2ccfg); + + send_cmd_static(ssd1306, + CMD1(SetDisplayOff), + CMD1(DeactivateScroll), + CMD1(DisableEntireDisplayOn), + CMD2(SetOscFreqAndClkDiv, 0x80), + CMD2(SetDisplayOffset, 0x00), + CMD1(SetDisplayStartLine | 0x00), + CMD2(SetMemoryAddressMode, 0x00)); /* Horizontal Addressing Mode */ + + send_cmd(ssd1306, CMD2(SetMultiplexRatio, height - 1)); + + if (ssd1306->rotate180) { + /* rotate 180 degrees == upside down */ + send_cmd_static(ssd1306, + CMD1(SetSegmentRemapReverse), + CMD1(SetComScanOrderReverse)); + } else { + /* no rotation */ + send_cmd_static(ssd1306, + CMD1(SetSegmentRemapNormal), + CMD1(SetComScanOrderNormal)); + } + + if (height == 32) { + /* 128x32 module uses SequentialComMode */ + send_cmd_static(ssd1306, CMD2(SetComPins, 0x02)); + } else { + /* 128x64 module uses AlternativeComMode */ + send_cmd_static(ssd1306, CMD2(SetComPins, 0x12)); + } + + /* Clear Graphic Display Data RAM */ + send_cmd(ssd1306, + CMD3(SetPageAddress, 0, num_pages - 1), + CMD3(SetColumnAddress, 0, width - 1)); + + uint8_t *buf = ssd1306->buf; + size_t len = SSD1306_PREAMBLE_LENGTH + num_pages * width; + memset(buf, 0, len); + buf[0] = CTRL_DATA_STREAM; /* need this byte proceeding the actual data */ + send_data(ssd1306, buf, len); + + send_cmd_static(ssd1306, + CMD2(SetPreChargePeriod, 0xC4), + CMD2(SetVcomhLevel, 0x20), + CMD1(SetNormalDisplay), + CMD2(SetContrastControl, 0x3F), + CMD2(ChargePumpSetting, 0x14), + CMD1(SetDisplayOn)); + + success = true; + +done: + i2cStop(I2CD); + return success; +} + +bool ssd1306_data(SSD1306_DRIVER *ssd1306) { + bool success = false; + uint8_t width = ssd1306->width; + uint8_t height = ssd1306->height; + uint8_t num_pages = height / 8; + + i2cStart(I2CD, ssd1306->i2ccfg); + + /* Transfer to Graphic Display Data RAM */ + send_cmd(ssd1306, + CMD3(SetPageAddress, 0, num_pages - 1), + CMD3(SetColumnAddress, 0, width - 1)); + + uint8_t *buf = ssd1306->buf; + size_t len = SSD1306_PREAMBLE_LENGTH + num_pages * width; + send_data(ssd1306, buf, len); + + success = true; + +done: + i2cStop(I2CD); + return success; +} + +bool ssd1306_display_on(SSD1306_DRIVER *ssd1306) { + bool success = false; + i2cStart(I2CD, ssd1306->i2ccfg); + send_cmd_static(ssd1306, CMD1(SetDisplayOn)); + success = true; +done: + i2cStop(I2CD); + return success; +} + +bool ssd1306_display_off(SSD1306_DRIVER *ssd1306) { + bool success = false; + i2cStart(I2CD, ssd1306->i2ccfg); + send_cmd_static(ssd1306, CMD1(SetDisplayOff)); + success = true; +done: + i2cStop(I2CD); + return success; +} diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/ssd1306.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/ssd1306.h new file mode 100644 index 0000000000..2ee7471a5c --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/I2C/ssd1306.h @@ -0,0 +1,90 @@ +#ifndef SSD1306_H +#define SSD1306_H + +#include + +enum ssd1306_cmds { + + /* Fundamental Command */ + SetContrastControl = 0x81, + DisableEntireDisplayOn = 0xA4, + EnableEntireDisplayOn = 0xA5, + SetNormalDisplay = 0xA6, + SetInvertDisplay = 0xA7, + SetDisplayOff = 0xAE, + SetDisplayOn = 0xAF, + + /* Charge Pump Command */ + ChargePumpSetting = 0x8D, + + /* Timing & Driving Scheme Setting Command */ + SetOscFreqAndClkDiv = 0xD5, + SetPreChargePeriod = 0xD9, + SetVcomhLevel = 0xDB, + + /* Addressing Setting Command */ + SetMemoryAddressMode = 0x20, + SetColumnAddress = 0x21, + SetPageAddress = 0x22, + // SetLowColumn = 0x00, /* 0x00 - 0x0F */ + // SetHighColumn = 0x10, /* 0x10 - 0x1F */ + // SetPageStartAddress = 0xB0, /* 0xB0 - 0xB7 */ + + /* Hardware Configuration Command */ + SetDisplayStartLine = 0x40, /* 0x40 - 0x7F */ + SetSegmentRemapNormal = 0xA0, + SetSegmentRemapReverse = 0xA1, + SetMultiplexRatio = 0xA8, + SetComScanOrderNormal = 0xC0, + SetComScanOrderReverse = 0xC8, + SetDisplayOffset = 0xD3, + SetComPins = 0xDA, + + /* Scrolling Command */ + RightHorizontalScroll = 0x26, + LeftHorizontalScroll = 0x27, + VerticalAndRightHorizontalScroll = 0x29, + VerticalAndLeftHorizontalScroll = 0x2A, + DeactivateScroll = 0x2E, + ActivateScroll = 0x2F, + SetVerticalScrollArea = 0xA3, + + /* Other Command */ + NoOperation = 0xE3, +}; + +#ifndef SSD1306_ADDRESS +/* for your reference (0x3C << 1) == 0x78 , (0x3D << 1) == 0x7A . */ +#define SSD1306_ADDRESS 0x3C +#endif + +typedef struct I2CDriver I2CDriver; +typedef struct I2CConfig I2CConfig; +typedef struct SSD1306_DRIVER { + I2CDriver *i2cd; + I2CConfig const *i2ccfg; + uint8_t i2caddr; + uint8_t width; + uint8_t height; + bool rotate180; + uint8_t *buf; +} SSD1306_DRIVER; + +#define SSD1306_PREAMBLE_LENGTH 1 +#define DEFINE_SSD1306_DRIVER(name, i2cd, addr, width, height, rotate180) \ + _Static_assert(width == 128, "Only support width of 128 for simplicity."); \ + _Static_assert(height == 32 || height == 64, "Only support height of 32 or 64 for simplicity."); \ + uint8_t name##_buf[SSD1306_PREAMBLE_LENGTH + width * height / 8]; \ + struct SSD1306_DRIVER name = { \ + i2cd, NULL, addr, width, height, rotate180, name##_buf \ + } + +#define SSD1306_GET_FRAMEBUFFER(ssd1306) \ + (&((ssd1306)->buf[SSD1306_PREAMBLE_LENGTH])) + +bool ssd1306_init(SSD1306_DRIVER *ssd1306); +bool ssd1306_data(SSD1306_DRIVER *ssd1306); +bool ssd1306_display_on(SSD1306_DRIVER *ssd1306); +bool ssd1306_display_off(SSD1306_DRIVER *ssd1306); + +#endif diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/Makefile b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/Makefile new file mode 100644 index 0000000000..5b85522dd9 --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/Makefile @@ -0,0 +1,205 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -ggdb3 -g3 -gdwarf-3 -gstrict-dwarf -fomit-frame-pointer -falign-functions=16 -pedantic -Wextra -Wall +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO). +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# FPU-related options. +ifeq ($(USE_FPU_OPT),) + USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16 +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, target, sources and paths +# + +# Define project name here +PROJECT = ch + +# Target settings. +MCU = cortex-m0 + +# Imported source files and paths. +BASE_PATH := ../../../../../../.. +CHIBIOS := $(BASE_PATH)/ChibiOS/ChibiOS +CHIBIOS_CONTRIB := $(BASE_PATH)/ChibiOS/ChibiOS-Contrib +CONFDIR := ./cfg +BUILDDIR := ./build +DEPDIR := ./.dep + +# Licensing files. +include $(CHIBIOS)/os/license/license.mk +# Startup files. +include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_NUC123.mk +# HAL-OSAL files (optional). +#include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/NUC120/platform.mk +include $(CHIBIOS_CONTRIB)/os/hal/boards/NUTINY-SDK-NUC120-V1.0/board.mk +include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/rt/rt.mk +#include $(CHIBIOS)/os/common/ports/ARMv6-M/compilers/GCC/mk/port.mk +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk +# Auto-build files in ./source recursively. +include $(CHIBIOS)/tools/mk/autobuild.mk +# Other files (optional). +#include $(CHIBIOS)/os/hal/lib/streams/streams.mk + +# Define linker script file here +LDSCRIPT= $(STARTUPLD_CONTRIB)/NUC120xE3xx.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ + usbcfg.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = $(ALLCPPSRC) + +# List ASM source files here. +ASMSRC = $(ALLASMSRC) + +# List ASM with preprocessor source files here. +ASMXSRC = $(ALLXASMSRC) + +# Inclusion directories. +INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC) + +# Define C warning options here. +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes + +# Define C++ warning options here. +CPPWARN = -Wall -Wextra -Wundef + +# +# Project, target, sources and paths +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user section +############################################################################## + +############################################################################## +# Common rules +# + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk +include $(RULESPATH)/arm-none-eabi.mk +include $(RULESPATH)/rules.mk + +# +# Common rules +############################################################################## + +############################################################################## +# Custom rules +# + +READLINK:=greadlink +OPENOCD:=$(shell $(READLINK) -f `which openocd`) +OPENOCDPATH:=$(shell dirname $(OPENOCD))/../share/openocd + +install-openocd-config: + rm $(OPENOCDPATH)/scripts/target/numicroM0.cfg && cp numicroM0.cfg $(OPENOCDPATH)/scripts/target/ + +connect: + openocd -f ../scripts/interface/nulink.cfg -f ../scripts/target/numicroM0.cfg + +flash: $(BUILDDIR)/$(PROJECT).elf + openocd -f ../scripts/interface/nulink.cfg -f ../scripts/target/numicroM0.cfg -c "program $< reset exit" + + +# +# Custom rules +############################################################################## diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/chconf.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/chconf.h new file mode 100644 index 0000000000..78af86d623 --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/chconf.h @@ -0,0 +1,766 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file rt/templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_6_1_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION 32 +#endif + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY 10000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA 0 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) +#define CH_CFG_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) +#define CH_CFG_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TM) +#define CH_CFG_USE_TM FALSE +#endif + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_REGISTRY) +#define CH_CFG_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES FALSE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES TRUE +#endif + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_CONDVARS) +#define CH_CFG_USE_CONDVARS FALSE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +#define CH_CFG_USE_CONDVARS_TIMEOUT FALSE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +#define CH_CFG_USE_EVENTS_TIMEOUT FALSE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES FALSE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name OSLIB options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES FALSE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE TRUE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE 0 +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP TRUE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS FALSE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS FALSE +#endif + +/** + * @brief Pipes APIs. + * @details If enabled then the pipes APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_PIPES) +#define CH_CFG_USE_PIPES FALSE +#endif + +/** + * @brief Objects Caches APIs. + * @details If enabled then the objects caches APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_CACHES) +#define CH_CFG_USE_OBJ_CACHES FALSE +#endif + +/** + * @brief Delegate threads APIs. + * @details If enabled then the delegate threads APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_DELEGATES) +#define CH_CFG_USE_DELEGATES FALSE +#endif + +/** + * @brief Jobs Queues APIs. + * @details If enabled then the jobs queues APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_JOBS) +#define CH_CFG_USE_JOBS FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY FALSE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY FALSE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS FALSE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES FALSE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES FALSE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS FALSE +#endif + +/** + * @brief Enables factory for Pipes. + */ +#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) +#define CH_CFG_FACTORY_PIPES FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS FALSE +#endif + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#if !defined(CH_DBG_THREADS_PROFILING) +#define CH_DBG_THREADS_PROFILING FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() \ + { \ + /* Add threads initialization code here.*/ \ + } + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) \ + { \ + /* Add threads initialization code here.*/ \ + } + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) \ + { \ + /* Add threads finalization code here.*/ \ + } + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) \ + { \ + /* Context switch code here.*/ \ + } + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() \ + { \ + /* IRQ prologue code here.*/ \ + } + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() \ + { \ + /* IRQ epilogue code here.*/ \ + } + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() \ + { \ + /* Idle-enter code here.*/ \ + } + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() \ + { \ + /* Idle-leave code here.*/ \ + } + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() \ + { \ + /* Idle loop code here.*/ \ + } + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() \ + { \ + /* System tick event code here.*/ \ + } + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) \ + { \ + /* System halt code here.*/ \ + } + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) \ + { \ + /* Trace code here.*/ \ + } + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/halconf.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/halconf.h new file mode 100644 index 0000000000..6d92fbcf8b --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/halconf.h @@ -0,0 +1,533 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#define _CHIBIOS_HAL_CONF_ +#define _CHIBIOS_HAL_CONF_VER_7_1_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the EFlash subsystem. + */ +#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__) +#define HAL_USE_EFL FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SIO subsystem. + */ +#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) +#define HAL_USE_SIO FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the TRNG subsystem. + */ +#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) +#define HAL_USE_TRNG FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB TRUE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/** + * @brief Enables the WSPI subsystem. + */ +#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) +#define HAL_USE_WSPI FALSE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) +#define PAL_USE_CALLBACKS FALSE +#endif + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) +#define PAL_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/** + * @brief Enforces the driver to use direct callbacks rather than OSAL events. + */ +#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) +#define CAN_ENFORCE_USE_CALLBACKS FALSE +#endif + +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + +/*===========================================================================*/ +/* DAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) +#define DAC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define DAC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the zero-copy API. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/** + * @brief OCR initialization constant for V20 cards. + */ +#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) +#define SDC_INIT_OCR_V20 0x50FF8000U +#endif + +/** + * @brief OCR initialization constant for non-V20 cards. + */ +#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) +#define SDC_INIT_OCR 0x80100000U +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables circular transfers APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) +#define SPI_USE_CIRCULAR FALSE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/** + * @brief Handling method for SPI CS line. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) +#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* WSPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) +#define WSPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define WSPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#include "halconf_community.h" + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/halconf_community.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/halconf_community.h new file mode 100644 index 0000000000..fb7ebf6bc5 --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/halconf_community.h @@ -0,0 +1,180 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/** + * @brief Enables the USB_HID subsystem. + */ +#if !defined(HAL_USE_USB_HID) || defined(__DOXYGEN__) +#define HAL_USE_USB_HID TRUE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/mcuconf.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/mcuconf.h new file mode 100644 index 0000000000..c2c4d3ec1c --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/mcuconf.h @@ -0,0 +1,44 @@ +/* + ChibiOS - Copyright (C) 2020 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef _MCUCONF_H_ +#define _MCUCONF_H_ + +/* + * Board setting + */ + +/* + * HAL driver system settings. + */ +#define NUC123_HSE_ENABLED TRUE +#define NUC123_PLL_ENABLED TRUE +#define NUC123_PLLSRC NUC123_PLLSRC_HSE + +// #define NUC123_SERIAL_CLKSRC NUC123_SERIAL_CLKSRC_PLL +// #define NUC123_SERIAL_CLKSRC NUC123_SERIAL_CLKSRC_HSE +#define NUC123_SERIAL_CLKSRC NUC123_SERIAL_CLKSRC_HSI +#define NUC123_SERIAL_USE_UART0 FALSE +#define NUC123_SERIAL_USE_UART1 TRUE + +#define NUC123_I2C_USE_I2C0 FALSE +#define NUC123_I2C_USE_I2C1 FALSE + +#define NUC123_USB_USE_USB1 TRUE + +#define NUC123_MCUCONF + +#endif /* _MCUCONF_H_ */ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/osalconf.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/osalconf.h new file mode 100644 index 0000000000..666d0c375b --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/osalconf.h @@ -0,0 +1,67 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief Bare-metal OSAL configuration header. + * + * @addtogroup OSAL_CONF + * @{ + */ + +#ifndef OSALCONF_H +#define OSALCONF_H + +/** + * @brief Frequency in Hertz of the system tick. + */ +#if !defined(OSAL_ST_FREQUENCY) || defined(__DOXYGEN__) +#define OSAL_ST_FREQUENCY 10000 +#endif + +/** + * @brief Enables OSAL assertions. + */ +#if !defined(OSAL_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define OSAL_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Enables OSAL functions parameters checks. + */ +#if !defined(OSAL_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define OSAL_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief OSAL initialization hook. + */ +#if !defined(OSAL_INIT_HOOK) || defined(__DOXYGEN__) +#define OSAL_INIT_HOOK() { \ +} +#endif + +/** + * @brief Idle loop hook macro. + */ +#if !defined(OSAL_IDLE_HOOK) || defined(__DOXYGEN__) +#define OSAL_IDLE_HOOK() { \ +} +#endif + +#endif /* OSALCONF_H */ + +/** @} */ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/shellconf.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/shellconf.h new file mode 100644 index 0000000000..e959993888 --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/cfg/shellconf.h @@ -0,0 +1,139 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file shellconf.h + * @brief Simple CLI shell configuration header. + * + * @addtogroup SHELL + * @{ + */ + +#ifndef SHELLCONF_H +#define SHELLCONF_H + +/** + * @brief Shell maximum input line length. + */ +#if !defined(SHELL_MAX_LINE_LENGTH) || defined(__DOXYGEN__) +#define SHELL_MAX_LINE_LENGTH 64 +#endif + +/** + * @brief Shell maximum arguments per command. + */ +#if !defined(SHELL_MAX_ARGUMENTS) || defined(__DOXYGEN__) +#define SHELL_MAX_ARGUMENTS 4 +#endif + +/** + * @brief Shell maximum command history. + */ +#if !defined(SHELL_MAX_HIST_BUFF) || defined(__DOXYGEN__) +#define SHELL_MAX_HIST_BUFF 8 * SHELL_MAX_LINE_LENGTH +#endif + +/** + * @brief Enable shell command history + */ +#if !defined(SHELL_USE_HISTORY) || defined(__DOXYGEN__) +#define SHELL_USE_HISTORY FALSE +#endif + +/** + * @brief Enable shell command completion + */ +#if !defined(SHELL_USE_COMPLETION) || defined(__DOXYGEN__) +#define SHELL_USE_COMPLETION FALSE +#endif + +/** + * @brief Shell Maximum Completions (Set to max commands with common prefix) + */ +#if !defined(SHELL_MAX_COMPLETIONS) || defined(__DOXYGEN__) +#define SHELL_MAX_COMPLETIONS 8 +#endif + +/** + * @brief Enable shell escape sequence processing + */ +#if !defined(SHELL_USE_ESC_SEQ) || defined(__DOXYGEN__) +#define SHELL_USE_ESC_SEQ TRUE +#endif + +/*===========================================================================*/ +/* Shell command settings */ +/*===========================================================================*/ + +/** + * @brief Enable shell exit command + */ +#if !defined(SHELL_CMD_EXIT_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_EXIT_ENABLED TRUE +#endif + +/** + * @brief Enable shell info command + */ +#if !defined(SHELL_CMD_INFO_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_INFO_ENABLED TRUE +#endif + +/** + * @brief Enable shell echo command + */ +#if !defined(SHELL_CMD_ECHO_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_ECHO_ENABLED TRUE +#endif + +/** + * @brief Enable shell systime command + */ +#if !defined(SHELL_CMD_SYSTIME_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_SYSTIME_ENABLED TRUE +#endif + +/** + * @brief Enable shell mem command + */ +#if !defined(SHELL_CMD_MEM_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_MEM_ENABLED TRUE +#endif + +/** + * @brief Enable shell threads command + */ +#if !defined(SHELL_CMD_THREADS_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_THREADS_ENABLED TRUE +#endif + +/** + * @brief Enable shell test command + */ +#if !defined(SHELL_CMD_TEST_ENABLED) || defined(__DOXYGEN__) +#define SHELL_CMD_TEST_ENABLED FALSE +#endif + +/** + * @brief Define test thread working area + */ +#if !defined(SHELL_CMD_TEST_WA_SIZE) || defined(__DOXYGEN__) +#define SHELL_CMD_TEST_WA_SIZE THD_WORKING_AREA_SIZE(256) +#endif + +#endif /* SHELLCONF_H */ + +/** @} */ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/main.c b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/main.c new file mode 100644 index 0000000000..7079138449 --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/main.c @@ -0,0 +1,96 @@ +/* + Copyright (C) 2016 Jonathan Struebel + Modifications copyright (C) 2020 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ +#include "hal.h" + +#include "usbcfg.h" + +/* + * Onboard LED blinker thread, times are in milliseconds. + */ +static THD_WORKING_AREA(waBlinkThread, 128); +static THD_FUNCTION(BlinkThread, arg) +{ + + (void)arg; + + chRegSetThreadName("blinker"); + while (true) { + systime_t time = USBD1.state == USB_ACTIVE ? 250 : 500; + OnboardLED_Toggle(); + chThdSleepMilliseconds(time); + } +} + +/* + * Application entry point. + */ +int main(void) +{ + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + OnboardLED_Init(); + + /* + * Turn off the onboard LED. + */ + OnboardLED_Off(); + + chDbgSuspendTrace(CH_DBG_TRACE_MASK_SWITCH); + /* + * Initializes a USB HID driver. + */ + hidObjectInit(&UHD1); + hidStart(&UHD1, &usbhidcfg); + + /* + * Activates the USB driver and then the USB bus pull-up on D+. + * Note, a delay is inserted in order to not have to disconnect the cable + * after a reset. + */ + + usbDisconnectBus(usbhidcfg.usbp); + chThdSleepMilliseconds(1000); + usbStart(usbhidcfg.usbp, &usbcfg); + chThdSleepMilliseconds(1000); + usbConnectBus(usbhidcfg.usbp); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic( + waBlinkThread, sizeof(waBlinkThread), NORMALPRIO, BlinkThread, NULL); + + while (true) { + if (usbhidcfg.usbp->state == USB_ACTIVE) { + uint8_t report; + size_t n = hidGetReport(0, &report, sizeof(report)); + hidWriteReport(&UHD1, &report, n); + n = hidReadReportt(&UHD1, &report, sizeof(report), TIME_IMMEDIATE); + if (n > 0) + hidSetReport(0, &report, n); + } + + chThdSleepMilliseconds(1000); + } +} diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/readme.txt b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/readme.txt new file mode 100644 index 0000000000..af865c29df --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/readme.txt @@ -0,0 +1,36 @@ +***************************************************************************** +** ChibiOS/HAL - USB driver demo for NUC123. ** +***************************************************************************** + +** TARGET ** + +The demo runs on a NUTINY-SDK-NUC123-V2.0 board with a NUC123SD4AN0 MCU. + +** The Demo ** + +The application demonstrates the use of the NUC123 USB driver. A successful run of the test +should begin with the on-board LED blinking slowly, then faster when the USB driver initializes. +The host should recognize the board as a USB HID, and when run with the appropriate VID/PID, the +supplied client application should communicate with the board. + +** Board Setup ** + +- None + +** Build Procedure ** + +The demo has been tested using gcc version 9.3.1 (GNU Arm Embedded Toolchain 9-2020-q2-update). +Just modify the TRGT line in the makefile in order to use different GCC ports. + +Two versions of the client code are provided. The Linux version uses the kernel's native hidraw API. +The Darwin version uses the hidapi from libusb (https://github.com/libusb/hidapi) + +The Darwin client has only been tested using Apple clang version 12.0.0 (clang-1200.0.32.2), on +macOS Catalina 10.15.7. However, it should be easily portable to any platform supported by hidapi. + +To build, adjust HIDAPI_HEADER_PATH in Client/darwin/Makefile to the appropriate location. + +** Notes ** + +This test was adapted from Jonathan Struebel's USB_HID test for the KINETIS FRDM-KL25Z. All files +are copyright their original authors, as indicated in the headers. diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/usbcfg.c b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/usbcfg.c new file mode 100644 index 0000000000..0c322ddf8e --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/usbcfg.c @@ -0,0 +1,393 @@ +/* + Copyright (C) 2016 Jonathan Struebel + Modifications copyright (C) 2020 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file usbcfg.c + * @brief USB driver config. + * + * @addtogroup USB + * @{ + */ +#include "hal.h" +#include "usbcfg.h" + +#define VID 0x1209 +#define PID 0x0003 +/* + * Endpoints to be used for USBD1. + */ +#define USBD1_DATA_REQUEST_EP 1 +#define USBD1_DATA_AVAILABLE_EP 1 + +/* + * USB HID Driver structure. + */ +USBHIDDriver UHD1; + +/* + * Data used for feedback + */ +uint8_t increment_var = 0; + +/* + * USB Device Descriptor. + */ +static const uint8_t hid_device_descriptor_data[] = { + USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ + 0x00, /* bDeviceClass. */ + 0x00, /* bDeviceSubClass. */ + 0x00, /* bDeviceProtocol. */ + 0x40, /* bMaxPacketSize. */ + VID, /* idVendor. */ + PID, /* idProduct. */ + 0x000, /* bcdDevice. */ + 1, /* iManufacturer. */ + 2, /* iProduct. */ + 3, /* iSerialNumber. */ + 1) /* bNumConfigurations. */ +}; + +/* + * Device Descriptor wrapper. + */ +static const USBDescriptor hid_device_descriptor = { + sizeof hid_device_descriptor_data, + hid_device_descriptor_data +}; + +/* + * Configuration Descriptor tree for a HID device + * + * The HID Specifications version 1.11 require the following order: + * - Configuration Descriptor + * - Interface Descriptor + * - HID Descriptor + * - Endpoints Descriptors + */ +#define HID_DESCRIPTOR_OFFSET 18 +#define HID_DESCRIPTOR_SIZE USB_DESC_HID_SIZE + +static const uint8_t hid_configuration_descriptor_data[] = { + /* Configuration Descriptor.*/ + USB_DESC_CONFIGURATION(41, /* wTotalLength. */ + 0x01, /* bNumInterfaces. */ + 0x01, /* bConfigurationValue. */ + 0, /* iConfiguration. */ + 0xC0, /* bmAttributes (self powered). */ + 50), /* bMaxPower (100mA). */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x02, /* bNumEndpoints. */ + 0x03, /* bInterfaceClass (HID Interface + Class). */ + 0x00, /* bInterfaceSubClass (None). */ + 0x00, /* bInterfaceProtocol (None). */ + 0), /* iInterface. */ + /* HID Descriptor.*/ + USB_DESC_HID (0x0110, /* bcdHID. */ + 0x00, /* bCountryCode. */ + 0x01, /* bNumDescriptors. */ + 0x22, /* bDescriptorType (Report + Descriptor). */ + 34), /* wDescriptorLength. */ + /* Endpoint 1 Descriptor.*/ + USB_DESC_ENDPOINT (USBD1_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ + 0x03, /* bmAttributes (Interrupt). */ + 0x0040, /* wMaxPacketSize. */ + 0x0A), /* bInterval (10ms). */ + /* Endpoint 1 Descriptor.*/ + USB_DESC_ENDPOINT (USBD1_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ + 0x03, /* bmAttributes (Interrupt). */ + 0x0040, /* wMaxPacketSize. */ + 0x0A) /* bInterval (10ms). */ +}; + +/* + * Configuration Descriptor wrapper. + */ +static const USBDescriptor hid_configuration_descriptor = { + sizeof hid_configuration_descriptor_data, + hid_configuration_descriptor_data +}; + +/* + * HID Descriptor wrapper. + */ +static const USBDescriptor hid_descriptor = { + HID_DESCRIPTOR_SIZE, + &hid_configuration_descriptor_data[HID_DESCRIPTOR_OFFSET] +}; + +/* + * HID Report Descriptor + * + * This is the description of the format and the content of the + * different IN or/and OUT reports that your application can + * receive/send + * + * See "Device Class Definition for Human Interface Devices (HID)" + * (http://www.usb.org/developers/hidpage/HID1_11.pdf) for the + * detailed description of all the fields + */ +static const uint8_t hid_report_descriptor_data[] = { + USB_DESC_BYTE (0x06), /* Usage Page - */ + USB_DESC_WORD (0xFF00), /* Vendor Defined. */ + USB_DESC_BYTE (0x09), /* Usage - */ + USB_DESC_BYTE (0x01), /* Vendor Defined. */ + USB_DESC_BYTE (0xA1), /* Collection - */ + USB_DESC_BYTE (0x01), /* Application. */ + + USB_DESC_BYTE (0x09), /* Usage - */ + USB_DESC_BYTE (0x01), /* Vendor Defined. */ + USB_DESC_BYTE (0x15), /* Logical Minimum - */ + USB_DESC_BYTE (0x00), /* 0. */ + USB_DESC_BYTE (0x26), /* Logical Maximum - */ + USB_DESC_WORD (0x00FF), /* 255. */ + USB_DESC_BYTE (0x75), /* Report size - */ + USB_DESC_BYTE (0x08), /* 8 bits. */ + USB_DESC_BYTE (0x95), /* Report count - */ + USB_DESC_BYTE (0x01), /* 1. */ + USB_DESC_BYTE (0x81), /* Input - */ + USB_DESC_BYTE (0x02), /* Data, Variable, Absolute. */ + + USB_DESC_BYTE (0x09), /* Usage - */ + USB_DESC_BYTE (0x01), /* Vendor Defined. */ + USB_DESC_BYTE (0x15), /* Logical Minimum - */ + USB_DESC_BYTE (0x00), /* 0. */ + USB_DESC_BYTE (0x26), /* Logical Maximum - */ + USB_DESC_WORD (0x00FF), /* 255. */ + USB_DESC_BYTE (0x75), /* Report Size - */ + USB_DESC_BYTE (0x08), /* 8 bits. */ + USB_DESC_BYTE (0x95), /* Report Count - */ + USB_DESC_BYTE (0x01), /* 1. */ + USB_DESC_BYTE (0x91), /* Output - */ + USB_DESC_BYTE (0x02), /* Data, Variable, Absolute. */ + + USB_DESC_BYTE (0xC0) /* End Collection. */ +}; + +/* + * HID Report Descriptor wrapper + */ +static const USBDescriptor hid_report_descriptor = { + sizeof hid_report_descriptor_data, + hid_report_descriptor_data +}; + +/* + * U.S. English language identifier. + */ +static const uint8_t usb_string_langid[] = + USB_DESC_STRING(USB_DESC_WORD(0x0409)); /* wLANGID (U.S. English) */ + +/* + * Vendor string. + */ +static const uint8_t usb_string_vendor[] = + USB_DESC_STRING('N', 0, 'u', 0, 'v', 0, 'o', 0, 't', 0, 'o', 0, 'n', 0); + +/* + * Serial Number string. + */ +static const uint8_t usb_string_serial[] = + USB_DESC_STRING('0', 0, 'x', 0, 'D', 0, 'E', 0, 'A', 0, 'D', 0, 'B', 0, 'E', 0, 'E', 0, 'F', 0); + +/* + * Device Description string. + */ +static const uint8_t usb_string_description[] = + USB_DESC_STRING('C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, 'H', 0, 'A', 0, + 'L', 0, ' ', 0, 'U', 0, 'S', 0, 'B', 0, ' ', 0, 'D', 0, 'e', 0, 'm', 0, 'o', 0); +/* + * Strings wrappers array. + */ +static const USBDescriptor hid_strings[] = { + {sizeof usb_string_langid, usb_string_langid}, + {sizeof usb_string_vendor, usb_string_vendor}, + {sizeof usb_string_description, usb_string_description}, + {sizeof usb_string_serial, usb_string_serial} +}; + +/* + * Handles the GET_DESCRIPTOR callback. All required descriptors must be + * handled here. + */ +static const USBDescriptor *get_descriptor(USBDriver *usbp, + uint8_t dtype, + uint8_t dindex, + uint16_t lang) { + (void)usbp; + (void)lang; + switch (dtype) { + case USB_DESCRIPTOR_DEVICE: + return &hid_device_descriptor; + case USB_DESCRIPTOR_CONFIGURATION: + return &hid_configuration_descriptor; + case USB_DESCRIPTOR_STRING: + if (dindex < 4) + return &hid_strings[dindex]; + case USB_DESCRIPTOR_INTERFACE: + break; + case USB_DESCRIPTOR_ENDPOINT: + break; + case USB_DESCRIPTOR_HID: + return &hid_descriptor; + case HID_REPORT: + return &hid_report_descriptor; + default: + break; + } + return NULL; +} + +/** + * @brief IN EP1 state. + */ +static USBInEndpointState ep1instate; + +/** + * @brief OUT EP1 state. + */ +static USBOutEndpointState ep1outstate; + +/** + * @brief EP1 initialization structure (both IN and OUT). + */ +static const USBEndpointConfig ep1config = { + USB_EP_MODE_TYPE_INTR, + NULL, + hidDataTransmitted, + hidDataReceived, + 0x0040, + 0x0040, + &ep1instate, + &ep1outstate, + 0, + NULL +}; + +/* + * Handles the USB driver global events. + */ +static void usb_event(USBDriver *usbp, usbevent_t event) { + switch (event) { + case USB_EVENT_RESET: + return; + case USB_EVENT_ADDRESS: + return; + case USB_EVENT_CONFIGURED: + osalSysLockFromISR(); + + /* Enables the endpoints specified into the configuration. + Note, this callback is invoked from an ISR so I-Class functions + must be used.*/ + usbInitEndpointI(usbp, USBD1_DATA_REQUEST_EP, &ep1config); + + /* Resetting the state of the CDC subsystem.*/ + hidConfigureHookI(&UHD1); + + osalSysUnlockFromISR(); + return; + case USB_EVENT_UNCONFIGURED: + return; + case USB_EVENT_SUSPEND: + return; + case USB_EVENT_WAKEUP: + return; + case USB_EVENT_STALLED: + return; + } + return; +} + +static bool req_handler(USBDriver *usbp) { + size_t n; + + if ((usbp->setup[0] & USB_RTYPE_TYPE_MASK) == USB_RTYPE_TYPE_CLASS) { + switch (usbp->setup[1]) { + case HID_GET_REPORT: + n = hidGetReport(0, &increment_var, sizeof(increment_var)); + usbSetupTransfer(usbp, &increment_var, n, NULL); + return true; + default: + return hidRequestsHook(usbp); + } + } + return hidRequestsHook(usbp); +} + +/** + * @brief Generate HID Report + * @details This function generates the data for an HID report so + * that it can be transferred to the host. + * + * @param[in] id report ID + * @param[out] bp data buffer pointer + * @param[in] n the maximum number of bytes for data buffer + * @return number of bytes of report in data buffer + */ +size_t hidGetReport(uint8_t id, uint8_t *bp, size_t n) { + + (void) id; + (void) n; + + increment_var++; + *bp = increment_var; + return sizeof(increment_var); +} + +/** + * @brief Set HID Report + * @details This function sets the data for an HID report + * that was transferred from the host. + * + * @param[in] id report ID + * @param[in] bp data buffer pointer + * @param[in] n the number of bytes in data buffer + * @return The operation status. + * @retval MSG_OK if the report was set. + */ +msg_t hidSetReport(uint8_t id, uint8_t *bp, size_t n) { + + (void) id; + (void) n; + + increment_var = *bp; + return MSG_OK; +} + +/* + * USB driver configuration. + */ +const USBConfig usbcfg = { + usb_event, + get_descriptor, + req_handler, + NULL +}; + +/* + * USB HID driver configuration. + */ +const USBHIDConfig usbhidcfg = { + &USBD1, + USBD1_DATA_REQUEST_EP, + USBD1_DATA_AVAILABLE_EP +}; + +/** @} */ diff --git a/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/usbcfg.h b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/usbcfg.h new file mode 100644 index 0000000000..f6728822ed --- /dev/null +++ b/testhal/NUMICRO/NUC120/NUTINY-SDK-NUC120-V1.0/USB_HID/usbcfg.h @@ -0,0 +1,52 @@ +/* + Copyright (C) 2016 Jonathan Struebel + Modifications copyright (C) 2020 Alex Lewontin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file usbcfg.h + * @brief USB driver config header. + * + * @addtogroup USB + * @{ + */ + +#ifndef USBCFG_H +#define USBCFG_H + +#include "hal_usb_lld.h" + +extern const USBConfig usbcfg; +extern const USBHIDConfig usbhidcfg; +extern USBHIDDriver UHD1; + +#define USB_DESC_STRING(...) \ + { \ + USB_DESC_BYTE((sizeof((int[]){__VA_ARGS__}) / sizeof(int)) + 2), \ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), __VA_ARGS__ \ + } + +#ifdef __cplusplus +extern "C" { +#endif + size_t hidGetReport(uint8_t id, uint8_t *bp, size_t n); + msg_t hidSetReport(uint8_t id, uint8_t *bp, size_t n); +#ifdef __cplusplus +} +#endif + +#endif /* USBCFG_H */ + +/** @} */