From 4fb6c3700fd83fdf8b0eed49c490b83c4e596ac7 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 18 Feb 2021 16:47:35 +0000 Subject: [PATCH] tcg: Do not elide memory barriers for !CF_PARALLEL in system mode MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The virtio devices require proper memory ordering between the vcpus and the iothreads. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson (cherry picked from commit c914d46d0a645e7c633292146f4e38c945d4f847) --- tcg/tcg-op.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index b886686c03..dce1b3d7d6 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -101,7 +101,19 @@ void tcg_gen_op6(TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3, void tcg_gen_mb(TCGBar mb_type) { - if (tcg_ctx->tb_cflags & CF_PARALLEL) { +#ifdef CONFIG_USER_ONLY + bool parallel = tcg_ctx->tb_cflags & CF_PARALLEL; +#else + /* + * It is tempting to elide the barrier in a uniprocessor context. + * However, even with a single cpu we have i/o threads running in + * parallel, and lack of memory order can result in e.g. virtio + * queue entries being read incorrectly. + */ + bool parallel = true; +#endif + + if (parallel) { tcg_gen_op1(INDEX_op_mb, mb_type); } }