-
Notifications
You must be signed in to change notification settings - Fork 3
/
streamtrace.hh
636 lines (623 loc) · 16.8 KB
/
streamtrace.hh
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
/*-
* Copyright (c) 2017 Alfredo Mazzinghi
* Copyright (c) 2015 David T. Chisnall
*
* All rights reserved.
*
* This software was developed by SRI International and the University of
* Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
* ("CTSRD"), as part of the DARPA CRASH research programme.
*
* This software was developed by SRI International and the University of
* Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-11-C-0249
* ("MRC2"), as part of the DARPA MRC research programme.
*
* @BERI_LICENSE_HEADER_START@
*
* Licensed to BERI Open Systems C.I.C. (BERI) under one or more contributor
* license agreements. See the NOTICE file distributed with this work for
* additional information regarding copyright ownership. BERI licenses this
* file to you under the BERI Hardware-Software License, Version 1.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
*
* http://www.beri-open-systems.org/legal/license-1-0.txt
*
* Unless required by applicable law or agreed to in writing, Work distributed
* under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
* CONDITIONS OF ANY KIND, either express or implied. See the License for the
* specific language governing permissions and limitations under the License.
*
* @BERI_LICENSE_HEADER_END@
*/
#include "cheri.hh"
#include <vector>
#include <memory>
#include <array>
#include <bitset>
#include <functional>
#include <fstream>
namespace cheri
{
namespace disassembler
{
class disassembler;
}
namespace streamtrace
{
/**
* Format for on-disk trace entries. These are all stored in CHERI native
* endian (big endian).
*/
struct debug_trace_entry_disk
{
/**
* The version of the trace entry. This is more accurately a type.
*/
uint8_t version;
/**
* The exception that fired during this instruction (0 for no exception).
*/
uint8_t exception;
/**
* The value of the cycle counter (a 10-bit counter that wraps on
* overflow).
*/
uint16_t cycles;
/**
* The instruction being executed.
*/
uint32_t inst;
/**
* The program counter value for the current point in the trace.
*/
uint64_t pc;
/**
* A version-specific value associated with the trace entry.
*/
uint64_t val1;
/**
* A second version-specific value associated with the trace entry.
*/
uint64_t val2;
/**
* The thread identifier for the hardware context that generated this trace
* event.
*/
uint8_t thread;
/**
* The address space identifier for the trace entry. This can be used to
* extract traces for individual applications.
*/
uint8_t asid;
} __attribute__((packed));
/**
* Format for Qemu on-disk trace entries. These are all stored in big
* endian.
*/
struct debug_trace_entry_disk_v3
{
/**
* The version of the trace entry. This is more accurately a type.
*/
uint8_t version;
/**
* The exception that fired during this instruction (0 for no exception).
*/
uint8_t exception;
/**
* The value of the cycle counter (a 10-bit counter that wraps on
* overflow).
*/
uint16_t cycles;
/**
* The instruction being executed.
*/
uint32_t inst;
/**
* The program counter value for the current point in the trace.
*/
uint64_t pc;
/**
* A version-specific value associated with the trace entry.
*/
uint64_t val1;
/**
* A second version-specific value associated with the trace entry.
*/
uint64_t val2;
/**
* A 3rd version-specific value associated with the trace entry.
*/
uint64_t val3;
/**
* A 4th version-specific value associated with the trace entry.
*/
uint64_t val4;
/**
* A 5th version-specific value associated with the trace entry.
*/
uint64_t val5;
/**
* The thread identifier for the hardware context that generated this trace
* event.
*/
uint8_t thread;
/**
* The address space identifier for the trace entry. This can be used to
* extract traces for individual applications.
*/
uint8_t asid;
} __attribute__((packed));
static_assert(sizeof(debug_trace_entry_disk_v3) == 58,
"Debug trace record v3 is wrong!");
/**
* Format for on-disk trace entries from older versions of berictl. These are
* all stored in CHERI native endian (big endian).
*/
struct debug_trace_entry_disk_v1
{
/**
* The version of the trace entry. This is more accurately a type.
*/
uint8_t version;
/**
* The exception that fired during this instruction (0 for no exception).
*/
uint8_t exception;
/**
* The value of the cycle counter (a 10-bit counter that wraps on
* overflow).
*/
uint16_t cycles;
/**
* The instruction being executed.
*/
uint32_t inst;
/**
* The program counter value for the current point in the trace.
*/
uint64_t pc;
/**
* A version-specific value associated with the trace entry.
*/
uint64_t val1;
/**
* A second version-specific value associated with the trace entry.
*/
uint64_t val2;
} __attribute__((packed));
static_assert(sizeof(debug_trace_entry_disk_v1) == 32,
"Debug trace record size is wrong!");
/**
* The values of a capability register.
*/
struct capability_register
{
/**
* The base address.
*/
uint64_t base;
/**
* The length of the capability.
*/
uint64_t length;
/**
* The offset from the base of the capability.
*/
uint64_t offset;
/**
* The type of the capability (only applies to sealed capabilities).
*/
uint32_t type;
/**
* A bitfield representing the capability.
*/
uint16_t permissions;
/**
* Is the capability valid?
*/
bool valid:1;
/**
* Is the capability unsealed?
*/
bool unsealed:1;
};
static_assert(sizeof(capability_register) <= 32,
"Capability register structure has grown far too big!");
/**
* The in-memory version of the debug trace entry. Fields in this structure
* are ordered by size so that they can be naturally aligned and have minimal
* padding.
*/
struct debug_trace_entry
{
/**
* The program counter value for the current point in the trace.
*/
uint64_t pc;
/**
* The number of cycles since the start of the streamtrace.
*/
uint64_t cycles;
/**
* The value of the register that is defined by this trace entry. This is
* usually the destination register, but is the source register for loads.
*/
union
{
/**
* The capability register value, if this trace entry contains a
* capability register.
*/
capability_register cap;
/**
* The general-purpose register value, if this trace entry contains a
* general-purpose register.
*/
uint64_t gp;
} reg_value;
/**
* The address used for load or store instructions.
*/
uint64_t memory_address;
/**
* The instruction being executed.
*/
uint32_t inst;
/**
* The number of cycles between this instruction and the last.
*/
uint16_t dead_cycles;
/**
* The thread identifier for the hardware context that generated this trace
* event.
*/
uint8_t thread;
/**
* The address space identifier for the trace entry. This can be used to
* extract traces for individual applications.
*/
uint8_t asid;
/**
* The exception that fired during this instruction (0 for no exception).
*/
uint8_t exception;
/**
* Is this a load instruction? If so, the `address` field indicates the
* source address.
*/
bool is_load:1;
/**
* Is this a store instruction? If so, the `address` field indicates the
* destination.
*/
bool is_store:1;
/**
* The register number for the register. GPRs are numbered 0-31, floating
* point registers from 32-63, capability registers from 64-95.
*/
uint8_t reg_num:8;
int register_number() const
{
if ((reg_num < 0) || (reg_num > 96))
{
return -1;
}
return reg_num;
}
/**
* Returns the GPR number for the value stored in `reg_value`. If this
* instruction does not relate to a GPR, returns -1.
*/
int gpr_number() const
{
if (reg_num < 32)
{
return reg_num;
}
return -1;
}
/**
* Returns the FPR number for the value stored in `reg_value`. If this
* instruction does not relate to a FPR, returns -1.
*/
int fpr_number() const
{
if ((reg_num > 31) && (reg_num < 64))
{
return reg_num - 32;
}
return -1;
}
/**
* Returns the capability register number for the value stored in
* `reg_value`. If this instruction does not relate to a capability
* register, returns -1.
*/
int capreg_number() const
{
if ((reg_num > 63) && (reg_num < 96))
{
return reg_num - 64;
}
return -1;
}
/**
* Returns the hardware capability register number for the value stored in
* `reg_value`. If this instruction does not relate to an hardware capability
* register, returns -1.
*/
int caphwreg_number() const
{
if ((reg_num > 95) && (reg_num < 128))
{
return reg_num - 96;
}
return -1;
}
/**
* Retrun the value of the register related to this instruction as
* a capability register.
*/
const capability_register& reg_value_cap() const
{
return reg_value.cap;
}
/**
* Return the value of the register related to this instruction as
* a general purpose register.
*/
uint64_t reg_value_gp() const
{
return reg_value.gp;
}
/**
* Set the value of the register updated by the instruction as
* a capability register
*/
void reg_value_set(const capability_register &cap)
{
reg_value.cap = cap;
}
/**
* Set the value of the register updated by the instruction as
* a general-purpose register
*/
void reg_value_set(uint64_t gp)
{
reg_value.gp = gp;
}
/**
* Returns true if the program counter is in the range reserved for the
* kernel.
*/
bool is_kernel() const { return pc >= 0xFFFFFFFF0000000; }
/**
* Returns true if the program counter is in the range reserved for the
* userspace programs.
*/
bool is_userspace() const { return !is_kernel(); }
/**
* Constructs an in-memory trace entry from the v2 on-disk format.
*/
debug_trace_entry(const debug_trace_entry_disk &d, disassembler::disassembler &dis);
/**
* Constructs an in-memory trace entry from the v3 on-disk format.
*/
debug_trace_entry(const debug_trace_entry_disk_v3 &d, disassembler::disassembler &dis);
/**
* Constructs an in-memory trace entry from the v1 on-disk format.
*/
debug_trace_entry(const debug_trace_entry_disk_v1 &d, disassembler::disassembler &dis);
/**
* Constructs an in-memory trace entry
*/
debug_trace_entry();
};
/**
* A snapshot of the CHERI register set at a specific point.
*/
struct register_set
{
/**
* General purpose registers, represented as 64-bit integers. Note that
* this numbers from 1: there is no point in storing the value of $0, as
* it always contains zero.
*/
std::array<uint64_t, 31> gpr = { { 0 } };
/**
* Indicates whether registers have known values at this point in the
* trace.
*/
std::bitset<31> valid_gprs = 0;
/**
* Capability registers.
*/
std::array<capability_register, 32> cap_reg;
/**
* Bitfield indicating whether the capability registers contain a known
* value. Note that this is distinct from the `valid` field in the
* `capability_register` structure, which indicates whether a known value
* is a valid capability.
*/
std::bitset<32> valid_caps = 0;
/**
* Hardware capability registers
*/
std::array<capability_register, 32> cap_hwreg;
/**
* Bitfield indicating whether the capability registers contain a known value.
* Same as valid_caps.
*/
std::bitset<32> valid_hwcaps = 0;
};
struct trace_view;
/**
* Abstract (public) superclass for a streamtrace.
*/
struct trace
{
/**
* Bitmask values for defining scan options.
*/
enum scan_options
{
/**
* Iterate forwards.
*/
forewards = 0,
/**
* Iterate backwards. The end value will still be interpreted as the
* beginning point for iteration.
*/
backwards = 1
};
/**
* Callback that is invoked while the streamtrace is being loaded. The
* parameters are a pointer to the trace that is being loaded, the number
* of trace entries loaded so far, and whether the stream has finished
* loading. The return value should be false if the traces should continue
* loading, true otherwise.
*/
typedef std::function<bool(std::shared_ptr<trace>, uint64_t, bool)> notifier;
/**
* Callback for scanning the streamtrace. The first argument is the trace
* entry, the second the index in the trace. The function should return
* true to abort scanning, false otherwise.
*
* Note that, whether this is invoked on a trace or a view of a trace, the
* index is always the index into the underlying trace. The scanner is
* always invoked in sequential order, so may keep track of the index into
* the trace view by using a variable bound to the closure.
*/
typedef std::function<bool(debug_trace_entry, uint64_t)> scanner;
/**
* Variant of the streamtrace scanner that sees the register set as well as
* the trace entry.
*/
typedef std::function<bool(const debug_trace_entry&, const register_set &,
uint64_t)> detailed_scanner;
/**
* Predicate used for constructing trace filters. Should return true if
* the trace entry is intended to be included in the trace, false
* otherwise.
*/
typedef std::function<bool(const debug_trace_entry&)> filter_predicate;
/**
* Returns the number of entries in the trace.
*/
virtual uint64_t size() = 0;
/**
* Seek to a specific point in the streamtrace.
*/
virtual bool seek_to(uint64_t offset) = 0;
/**
* Returns the instruction number for the specified index. In a normal
* trace, the return value will be the same as the argument. In a trace
* view, it will be the index within the original trace.
*/
virtual uint64_t instruction_number_for_index(uint64_t) = 0;
/**
* Returns the current trace entry. It is undefined behaviour to call this
* method before calling `seek_to()`.
*/
virtual debug_trace_entry get_entry() = 0;
/**
* Returns the contents of the register set at the current trace entry. It
* is undefined behaviour to call this method before calling `seek_to()`.
*/
virtual register_set get_regs() = 0;
/**
* Iterate over the stream trace, calling the argument function once for
* each trace element, continuing until either the callback returns `true`
* or the stream end is reached.
*/
virtual void scan(scanner) = 0;
/**
* Iterate over a range within the trace, invoking the callback as in the
* single-argument version of this function. The final argument is a set
* of flags formed by oring together values from the `scan_options`
* enumeration.
*/
virtual void scan(scanner, uint64_t start, uint64_t end, int opts=0) = 0;
/**
* Scan over the trace providing full detail (including accurate cycle
* counts and the register set) to the scanner.
*/
virtual void scan(detailed_scanner, uint64_t, uint64_t, int opts=0) = 0;
/**
* Filter this trace and return a view that only contains instructions that
* match the underlying predicate.
*/
virtual std::shared_ptr<trace_view> filter(filter_predicate) = 0;
/**
* Save the keyframes to the given file.
* This should only be called when keyframe preloading have finished, if
* the preloader is still running nothing will be saved.
*/
virtual void save_keyframes(const std::string &file) = 0;
/**
* Destructor.
*/
virtual ~trace();
/**
* Constructs a new streamtrace from the specified file.
*/
static std::shared_ptr<trace> open(const std::string &file);
/**
* Constructs a new streamtrace from the specified file and call the
* specified notifier as it loads. Note that the notifier will be called
* from a separate thread - the user is responsible for ensuring that any
* required synchronisation is performed.
*/
static std::shared_ptr<trace> open(const std::string &file, notifier notify);
/**
* Constructs a new streamtrace and load the keyframes from the given file,
* if the keyframes loading fails no trace is created and nullptr is returned.
*/
static std::shared_ptr<trace> open(const std::string &file, const std::string &keyframes_file);
};
/**
* A view on a streamtrace.
*/
struct trace_view : public trace
{
/**
* Returns a new trace view that includes all of the entries in the
* underlying trace (not any intermediate trace views) that are not present
* in this trace.
*/
virtual std::shared_ptr<trace_view> inverted_view() = 0;
};
/**
n * Trace writer
* For now only support append on v3 plain traces.
*/
class trace_writer : public std::enable_shared_from_this<trace_writer>
{
protected:
/**
* Trace file (plain)
*/
std::ofstream tracefile;
/**
* cycle count from the start of the trace
*/
uint64_t cycles;
/**
* Constructor from file path
*/
trace_writer(const std::string &file);
public:
/**
* Append entry to the end of the trace file
*/
bool append(const debug_trace_entry &entry);
/**
* Construct a trace writer from a file
*/
static std::shared_ptr<trace_writer> open(const std::string &file);
};
}
} // namespace cheri