SpkingNN-on-Chip

This is a collection of papers I read on SNN accelerators.

I recently focus on SNN accelerators(Multi-core and NoC), so I follow the style of Neural-Networks-on-Silicon to build this repo wihch record my reading.

Paper

Review

• Opportunities for neuromorphic computing algorithms and applications(Oak Ridge National Lab, USA)
• Spiking Neural Network Integrated Circuits: A Review of Trends and Future Directions(CityU, HK, CN)

Single-Core

• THOR - A Neuromorphic Processor with 7.29G TSOP2/mm2Js Energy-Throughput Efficiency(TU/e, NL)
• SPOON: A 28-nm Convolutional Neuromorphic Processor Enabling Online Learning with Spike-Based Retinas(UCLouvain, BE)
• ODIN: A 0.086-mm2 12.7-pJ/SOP 64k-Synapse 256-Neuron Online-Learning Digital Spiking Neuromorphic Processor in 28nm CMOS(UCLouvain, BE)
• ReckOn: A 28nm Sub-mm2 Task-Agnostic Spiking Recurrent Neural Network Processor Enabling On-Chip Learning over Second-Long Timescales(ETHz, CH)

Multi-core

• MorphIC: A 65-nm 738k-Synapse/mm2 Quad-Core Binary-Weight Digital Neuromorphic Processor With Stochastic Spike-Driven Online Learning(UCLouvain, BE)
• Loihi: A Neuromorphic Manycore Processor with On-Chip Learning(Intel, US)
• IBM NorthPole Neural Inference Machine(IBM, CA)
• SENeCA: Scalable Energy-efficient Neuromorphic Computer Architecture(IMEC, NL)
• Spinnaker: A 1-w 18-core system-on-chip for massively-parallel neural network simulation(UManchester, UK)
• The SpiNNaker 2 Processing Element Architecture for Hybrid Digital Neuromorphic Computing(TU Dresden, GE)
• Tianjic: A Unified and Scalable Chip Bridging Spike-Based and Continuous Neural Computation(Tsinghua, CN)
• A 2048-Neuron Spiking Neural Network Accelerator with Neuro-Inspired Pruning and Asynchronous Network on Chip in 40nm CMOS(UMichigan, Ann Arbor)

Neuromorphic NoC

• Neu-NoC: A High-efficient Interconnection Network for Accelerated Neuromorphic Systems(Duke, US)
• Understanding the Interconnection Network of SpiNNaker(Spain)
• A GALS Infrastructure for a Massively Parallel Multiprocessor(UManchester, UK)
• A Programmable Adaptive Router for a GALS Parallel System(UManchester, UK)