From 28d9443fe239425afdd95bc29bc7a9a4f16dedec Mon Sep 17 00:00:00 2001 From: beaengine Date: Mon, 24 Jun 2019 11:53:17 +0200 Subject: [PATCH] update headers --- headers/BeaEngine.h | 6 +++--- headers/BeaEngineDelphi32.pas | 29 +++++++++++++++-------------- headers/BeaEngineDelphi64.pas | 31 +++++++++++++++---------------- headers/BeaEngineFasm32.inc | 23 +++++++++++------------ headers/BeaEngineFasm64.inc | 22 +++++++++++----------- headers/BeaEngineGoAsm32.inc | 25 +++++++++++-------------- headers/BeaEngineGoAsm64.inc | 27 ++++++++++++--------------- headers/BeaEngineMasm32.inc | 26 ++++++++++++-------------- headers/BeaEngineMasm64.inc | 26 ++++++++++++-------------- headers/BeaEngineNasm32.inc | 22 +++++++++++----------- headers/BeaEngineNasm64.inc | 22 +++++++++++----------- headers/BeaEnginePureBasic32.pb | 31 ++++++++++++++++--------------- headers/BeaEnginePureBasic64.pb | 32 ++++++++++++++++---------------- headers/BeaEnginePython.py | 10 +++++----- 14 files changed, 161 insertions(+), 171 deletions(-) diff --git a/headers/BeaEngine.h b/headers/BeaEngine.h index 2aadde9..4b4f7cd 100644 --- a/headers/BeaEngine.h +++ b/headers/BeaEngine.h @@ -80,7 +80,7 @@ typedef struct { #pragma pack(1) typedef struct { Int32 Category; - Int32 Opcode; + Int32 Opcode; char Mnemonic[24]; Int32 BranchType; EFLStruct Flags; @@ -118,7 +118,7 @@ typedef struct _Disasm { ARGTYPE Argument3; ARGTYPE Argument4; PREFIXINFO Prefix; - UInt32 Reserved_[44]; + UInt32 Reserved_[48]; } DISASM, *PDISASM, *LPDISASM; #pragma pack() @@ -159,7 +159,7 @@ enum INSTRUCTION_TYPE AVX_INSTRUCTION = (int)0x100000000, AVX2_INSTRUCTION = (int)0x200000000, MPX_INSTRUCTION = (int)0x400000000, - + AVX512_INSTRUCTION = (int)0x800000000, DATA_TRANSFER = 0x1, ARITHMETIC_INSTRUCTION, LOGICAL_INSTRUCTION, diff --git a/headers/BeaEngineDelphi32.pas b/headers/BeaEngineDelphi32.pas index 7db46a5..48b66d1 100644 --- a/headers/BeaEngineDelphi32.pas +++ b/headers/BeaEngineDelphi32.pas @@ -25,7 +25,7 @@ // it under the terms of the GNU Lesser General Public License as published by // the Free Software Foundation, either version 3 of the License, or // (at your option) any later version. -// +// // BeaEngine is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the @@ -140,24 +140,24 @@ interface Argument3 : TARGTYPE; Argument4 : TARGTYPE; Prefix : TPREFIXINFO; - Reserved_ : array[0..43] of longint; + Reserved_ : array[0..48] of longint; end; TDISASM = _Disasm; PDISASM = ^_Disasm; LPDISASM = ^_Disasm; const - ESReg = 1; - DSReg = 2; - FSReg = 3; - GSReg = 4; - CSReg = 5; - SSReg = 6; - InvalidPrefix = 4; - SuperfluousPrefix = 2; - NotUsedPrefix = 0; - MandatoryPrefix = 8; - InUsePrefix = 1; + ESReg = 1; + DSReg = 2; + FSReg = 3; + GSReg = 4; + CSReg = 5; + SSReg = 6; + InvalidPrefix = 4; + SuperfluousPrefix = 2; + NotUsedPrefix = 0; + MandatoryPrefix = 8; + InUsePrefix = 1; type @@ -182,6 +182,7 @@ interface AVX_INSTRUCTION =$100000000; AVX2_INSTRUCTION =$200000000; MPX_INSTRUCTION =$400000000; + AVX512_INSTRUCTION =$800000000; DATA_TRANSFER = $1; ARITHMETIC_INSTRUCTION = 2; LOGICAL_INSTRUCTION = 3; @@ -334,7 +335,7 @@ interface function Disasm(var aDisAsm:TDISASM):longint;stdcall; function BeaEngineVersion:longint;stdcall; function BeaEngineRevision:longint;stdcall; - + implementation {$IFNDEF USEDLL} {$L BeaEngineLib.obj} diff --git a/headers/BeaEngineDelphi64.pas b/headers/BeaEngineDelphi64.pas index 693f07e..ab5e919 100644 --- a/headers/BeaEngineDelphi64.pas +++ b/headers/BeaEngineDelphi64.pas @@ -24,7 +24,7 @@ // it under the terms of the GNU Lesser General Public License as published by // the Free Software Foundation, either version 3 of the License, or // (at your option) any later version. -// +// // BeaEngine is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the @@ -38,7 +38,7 @@ interface uses Windows,SysUtils; const - INSTRUCT_LENGTH = 64; + INSTRUCT_LENGTH = 64; type @@ -139,24 +139,24 @@ interface Argument3 : TARGTYPE; Argument4 : TARGTYPE; Prefix : TPREFIXINFO; - Reserved_ : array[0..43] of longint; + Reserved_ : array[0..48] of longint; end; TDISASM = _Disasm; PDISASM = ^_Disasm; LPDISASM = ^_Disasm; const - ESReg = 1; - DSReg = 2; - FSReg = 3; - GSReg = 4; - CSReg = 5; - SSReg = 6; - InvalidPrefix = 4; - SuperfluousPrefix = 2; - NotUsedPrefix = 0; - MandatoryPrefix = 8; - InUsePrefix = 1; + ESReg = 1; + DSReg = 2; + FSReg = 3; + GSReg = 4; + CSReg = 5; + SSReg = 6; + InvalidPrefix = 4; + SuperfluousPrefix = 2; + NotUsedPrefix = 0; + MandatoryPrefix = 8; + InUsePrefix = 1; type @@ -181,7 +181,7 @@ interface AVX_INSTRUCTION =$100000000; AVX2_INSTRUCTION =$200000000; MPX_INSTRUCTION =$400000000; - + AVX512_INSTRUCTION =$800000000; DATA_TRANSFER = $1; ARITHMETIC_INSTRUCTION = 2; LOGICAL_INSTRUCTION = 3; @@ -380,4 +380,3 @@ function BeaEngineRevision:longint;stdcall; {$ENDIF} end. - diff --git a/headers/BeaEngineFasm32.inc b/headers/BeaEngineFasm32.inc index 5df25d4..3dc7de6 100644 --- a/headers/BeaEngineFasm32.inc +++ b/headers/BeaEngineFasm32.inc @@ -59,7 +59,7 @@ struct MEMORYTYPE BaseRegister dd 0 IndexRegister dd 0 Scale dd 0 - Displacement dq 0 + Displacement dq 0 ends @@ -100,7 +100,7 @@ struct _Disasm Argument3 ARGTYPE Argument4 ARGTYPE Prefix PREFIXINFO - Reserved_ dd 44 dup(0) + Reserved_ dd 48 dup(0) ends LowPosition equ 0 @@ -123,7 +123,7 @@ ends MandatoryPrefix equ 8 ; ********** EFLAGS states - + TE_ equ 1 ; test MO_ equ 2 ; modify RE_ equ 4 ; reset @@ -156,7 +156,7 @@ ends AVX_INSTRUCTION equ 100000000h AVX2_INSTRUCTION equ 200000000h MPX_INSTRUCTION equ 400000000h - + AVX512_INSTRUCTION equ 800000000h DATA_TRANSFER equ 1 ARITHMETIC_INSTRUCTION equ 2 LOGICAL_INSTRUCTION equ 3 @@ -174,7 +174,7 @@ ends LOGARITHMIC_INSTRUCTION equ 14 TRIGONOMETRIC_INSTRUCTION equ 15 UNSUPPORTED_INSTRUCTION equ 16 - + LOAD_CONSTANTS equ 17 FPUCONTROL equ 18 STATE_MANAGEMENT equ 19 @@ -186,21 +186,21 @@ ends SIMD128bits equ 23 SIMD64bits equ 24 CACHEABILITY_CONTROL equ 25 - - FP_INTEGER_CONVERSION equ 26 + + FP_INTEGER_CONVERSION equ 26 SPECIALIZED_128bits equ 27 SIMD_FP_PACKED equ 28 - SIMD_FP_HORIZONTAL equ 29 + SIMD_FP_HORIZONTAL equ 29 AGENT_SYNCHRONISATION equ 30 - PACKED_ALIGN_RIGHT equ 31 + PACKED_ALIGN_RIGHT equ 31 PACKED_SIGN equ 32 ; ****************************************** SSE4 - + PACKED_BLENDING_INSTRUCTION equ 33 PACKED_TEST equ 34 - + ; CONVERSION_INSTRUCTION -> Packed Integer Format Conversions et Dword Packing With Unsigned Saturation ; COMPARISON -> Packed Comparison SIMD Integer Instruction ; ARITHMETIC_INSTRUCTION -> Dword Multiply Instruction @@ -305,4 +305,3 @@ ends PrefixedNumeral equ 10000h SuffixedNumeral equ 0 ShowSegmentRegs equ 01000000h - diff --git a/headers/BeaEngineFasm64.inc b/headers/BeaEngineFasm64.inc index e8a7fc7..cc3e274 100644 --- a/headers/BeaEngineFasm64.inc +++ b/headers/BeaEngineFasm64.inc @@ -59,7 +59,7 @@ struct MEMORYTYPE BaseRegister dd 0 IndexRegister dd 0 Scale dd 0 - Displacement dq 0 + Displacement dq 0 ends @@ -100,7 +100,7 @@ struct _Disasm Argument3 ARGTYPE Argument4 ARGTYPE Prefix PREFIXINFO - Reserved_ dd 44 dup(0) + Reserved_ dd 48 dup(0) ends LowPosition equ 0 @@ -123,7 +123,7 @@ ends MandatoryPrefix equ 8 ; ********** EFLAGS states - + TE_ equ 1 ; test MO_ equ 2 ; modify RE_ equ 4 ; reset @@ -156,7 +156,7 @@ ends AVX_INSTRUCTION equ 100000000h AVX2_INSTRUCTION equ 200000000h MPX_INSTRUCTION equ 400000000h - + AVX512_INSTRUCTION equ 800000000h DATA_TRANSFER equ 1 ARITHMETIC_INSTRUCTION equ 2 LOGICAL_INSTRUCTION equ 3 @@ -174,7 +174,7 @@ ends LOGARITHMIC_INSTRUCTION equ 14 TRIGONOMETRIC_INSTRUCTION equ 15 UNSUPPORTED_INSTRUCTION equ 16 - + LOAD_CONSTANTS equ 17 FPUCONTROL equ 18 STATE_MANAGEMENT equ 19 @@ -186,21 +186,21 @@ ends SIMD128bits equ 23 SIMD64bits equ 24 CACHEABILITY_CONTROL equ 25 - - FP_INTEGER_CONVERSION equ 26 + + FP_INTEGER_CONVERSION equ 26 SPECIALIZED_128bits equ 27 SIMD_FP_PACKED equ 28 - SIMD_FP_HORIZONTAL equ 29 + SIMD_FP_HORIZONTAL equ 29 AGENT_SYNCHRONISATION equ 30 - PACKED_ALIGN_RIGHT equ 31 + PACKED_ALIGN_RIGHT equ 31 PACKED_SIGN equ 32 ; ****************************************** SSE4 - + PACKED_BLENDING_INSTRUCTION equ 33 PACKED_TEST equ 34 - + ; CONVERSION_INSTRUCTION -> Packed Integer Format Conversions et Dword Packing With Unsigned Saturation ; COMPARISON -> Packed Comparison SIMD Integer Instruction ; ARITHMETIC_INSTRUCTION -> Dword Multiply Instruction diff --git a/headers/BeaEngineGoAsm32.inc b/headers/BeaEngineGoAsm32.inc index c1ad713..e6571be 100644 --- a/headers/BeaEngineGoAsm32.inc +++ b/headers/BeaEngineGoAsm32.inc @@ -50,7 +50,7 @@ EFLStruct STRUCT NT_ db 0 ;(bit 14) RF_ db 0 ;(bit 16) db 0 ; alignment -EFLStruct ENDS +EFLStruct ENDS MEMORYTYPE STRUCT BaseRegister dd 0 @@ -94,7 +94,7 @@ _Disasm STRUCT Argument3 ARGTYPE <> Argument4 ARGTYPE <> Prefix PREFIXINFO <> - Reserved_ dd 44 dup 0 + Reserved_ dd 48 dup 0 _Disasm ENDS @@ -121,7 +121,7 @@ _Disasm ENDS MandatoryPrefix equ 8 ; ********** EFLAGS states - + TE_ equ 1 ; test MO_ equ 2 ; modify RE_ equ 4 ; reset @@ -154,7 +154,7 @@ _Disasm ENDS AVX_INSTRUCTION equ 100000000h AVX2_INSTRUCTION equ 200000000h MPX_INSTRUCTION equ 400000000h - + AVX512_INSTRUCTION equ 800000000h DATA_TRANSFER equ 1 ARITHMETIC_INSTRUCTION equ 2 LOGICAL_INSTRUCTION equ 3 @@ -172,7 +172,7 @@ _Disasm ENDS LOGARITHMIC_INSTRUCTION equ 14 TRIGONOMETRIC_INSTRUCTION equ 15 UNSUPPORTED_INSTRUCTION equ 16 - + LOAD_CONSTANTS equ 17 FPUCONTROL equ 18 STATE_MANAGEMENT equ 19 @@ -184,21 +184,21 @@ _Disasm ENDS SIMD128bits equ 23 SIMD64bits equ 24 CACHEABILITY_CONTROL equ 25 - - FP_INTEGER_CONVERSION equ 26 + + FP_INTEGER_CONVERSION equ 26 SPECIALIZED_128bits equ 27 SIMD_FP_PACKED equ 28 - SIMD_FP_HORIZONTAL equ 29 + SIMD_FP_HORIZONTAL equ 29 AGENT_SYNCHRONISATION equ 30 - PACKED_ALIGN_RIGHT equ 31 + PACKED_ALIGN_RIGHT equ 31 PACKED_SIGN equ 32 ; ****************************************** SSE4 - + PACKED_BLENDING_INSTRUCTION equ 33 PACKED_TEST equ 34 - + ; CONVERSION_INSTRUCTION -> Packed Integer Format Conversions et Dword Packing With Unsigned Saturation ; COMPARISON -> Packed Comparison SIMD Integer Instruction ; ARITHMETIC_INSTRUCTION -> Dword Multiply Instruction @@ -302,6 +302,3 @@ _Disasm ENDS PrefixedNumeral equ 10000h SuffixedNumeral equ 0 ShowSegmentRegs equ 01000000h - - - diff --git a/headers/BeaEngineGoAsm64.inc b/headers/BeaEngineGoAsm64.inc index fa4f6ff..65f3f81 100644 --- a/headers/BeaEngineGoAsm64.inc +++ b/headers/BeaEngineGoAsm64.inc @@ -50,8 +50,8 @@ EFLStruct STRUCT NT_ db 0 ;(bit 14) RF_ db 0 ;(bit 16) db 0 ; alignment -EFLStruct ENDS - +EFLStruct ENDS + MEMORYTYPE STRUCT BaseRegister dd 0 IndexRegister dd 0 @@ -94,7 +94,7 @@ _Disasm STRUCT Argument3 ARGTYPE <> Argument4 ARGTYPE <> Prefix PREFIXINFO <> - Reserved_ dd 44 dup 0 + Reserved_ dd 48 dup 0 _Disasm ENDS @@ -120,7 +120,7 @@ _Disasm ENDS MandatoryPrefix equ 8 ; ********** EFLAGS states - + TE_ equ 1 ; test MO_ equ 2 ; modify RE_ equ 4 ; reset @@ -153,7 +153,7 @@ _Disasm ENDS AVX_INSTRUCTION equ 100000000h AVX2_INSTRUCTION equ 200000000h MPX_INSTRUCTION equ 400000000h - + AVX512_INSTRUCTION equ 800000000h DATA_TRANSFER equ 1 ARITHMETIC_INSTRUCTION equ 2 LOGICAL_INSTRUCTION equ 3 @@ -171,7 +171,7 @@ _Disasm ENDS LOGARITHMIC_INSTRUCTION equ 14 TRIGONOMETRIC_INSTRUCTION equ 15 UNSUPPORTED_INSTRUCTION equ 16 - + LOAD_CONSTANTS equ 17 FPUCONTROL equ 18 STATE_MANAGEMENT equ 19 @@ -183,21 +183,21 @@ _Disasm ENDS SIMD128bits equ 23 SIMD64bits equ 24 CACHEABILITY_CONTROL equ 25 - - FP_INTEGER_CONVERSION equ 26 + + FP_INTEGER_CONVERSION equ 26 SPECIALIZED_128bits equ 27 SIMD_FP_PACKED equ 28 - SIMD_FP_HORIZONTAL equ 29 + SIMD_FP_HORIZONTAL equ 29 AGENT_SYNCHRONISATION equ 30 - PACKED_ALIGN_RIGHT equ 31 + PACKED_ALIGN_RIGHT equ 31 PACKED_SIGN equ 32 ; ****************************************** SSE4 - + PACKED_BLENDING_INSTRUCTION equ 33 PACKED_TEST equ 34 - + ; CONVERSION_INSTRUCTION -> Packed Integer Format Conversions et Dword Packing With Unsigned Saturation ; COMPARISON -> Packed Comparison SIMD Integer Instruction ; ARITHMETIC_INSTRUCTION -> Dword Multiply Instruction @@ -301,6 +301,3 @@ _Disasm ENDS PrefixedNumeral equ 10000h SuffixedNumeral equ 0 ShowSegmentRegs equ 01000000h - - - diff --git a/headers/BeaEngineMasm32.inc b/headers/BeaEngineMasm32.inc index 3a6d089..ef27810 100644 --- a/headers/BeaEngineMasm32.inc +++ b/headers/BeaEngineMasm32.inc @@ -46,10 +46,10 @@ EFLStruct STRUCT TF_ BYTE 0 ;(bit 8) IF_ BYTE 0 ;(bit 9) DF_ BYTE 0 ;(bit 10) - NT_ BYTE 0 ;(bit 14) + NT_ BYTE 0 ;(bit 14) RF_ BYTE 0 ;(bit 16) BYTE 0 ; alignment -EFLStruct ENDS +EFLStruct ENDS MEMORYTYPE STRUCT BaseRegister DWORD 0 @@ -93,7 +93,7 @@ _Disasm STRUCT Argument3 ARGTYPE <> Argument4 ARGTYPE <> Prefix PREFIXINFO <> - Reserved_ DWORD 44 dup(0) + Reserved_ DWORD 48 dup(0) _Disasm ENDS Disasm PROTO :DWORD @@ -120,7 +120,7 @@ Disasm PROTO :DWORD MandatoryPrefix equ 8 ; ********** EFLAGS states - + TE_ equ 1 ; test MO_ equ 2 ; modify RE_ equ 4 ; reset @@ -152,7 +152,7 @@ Disasm PROTO :DWORD AVX_INSTRUCTION equ 100000000h AVX2_INSTRUCTION equ 200000000h MPX_INSTRUCTION equ 400000000h - + AVX512_INSTRUCTION equ 800000000h DATA_TRANSFER equ 1 ARITHMETIC_INSTRUCTION equ 2 LOGICAL_INSTRUCTION equ 3 @@ -170,7 +170,7 @@ Disasm PROTO :DWORD LOGARITHMIC_INSTRUCTION equ 14 TRIGONOMETRIC_INSTRUCTION equ 15 UNSUPPORTED_INSTRUCTION equ 16 - + LOAD_CONSTANTS equ 17 FPUCONTROL equ 18 STATE_MANAGEMENT equ 19 @@ -182,21 +182,21 @@ Disasm PROTO :DWORD SIMD128bits equ 23 SIMD64bits equ 24 CACHEABILITY_CONTROL equ 25 - - FP_INTEGER_CONVERSION equ 26 + + FP_INTEGER_CONVERSION equ 26 SPECIALIZED_128bits equ 27 SIMD_FP_PACKED equ 28 - SIMD_FP_HORIZONTAL equ 29 + SIMD_FP_HORIZONTAL equ 29 AGENT_SYNCHRONISATION equ 30 - PACKED_ALIGN_RIGHT equ 31 + PACKED_ALIGN_RIGHT equ 31 PACKED_SIGN equ 32 ; ****************************************** SSE4 - + PACKED_BLENDING_INSTRUCTION equ 33 PACKED_TEST equ 34 - + ; CONVERSION_INSTRUCTION -> Packed Integer Format Conversions et Dword Packing With Unsigned Saturation ; COMPARISON -> Packed Comparison SIMD Integer Instruction ; ARITHMETIC_INSTRUCTION -> Dword Multiply Instruction @@ -300,5 +300,3 @@ Disasm PROTO :DWORD PrefixedNumeral equ 10000h SuffixedNumeral equ 0 ShowSegmentRegs equ 01000000h - - diff --git a/headers/BeaEngineMasm64.inc b/headers/BeaEngineMasm64.inc index 993578c..90e902a 100644 --- a/headers/BeaEngineMasm64.inc +++ b/headers/BeaEngineMasm64.inc @@ -47,9 +47,9 @@ EFLStruct STRUCT IF_ BYTE 0 ;(bit 9) DF_ BYTE 0 ;(bit 10) NT_ BYTE 0 ;(bit 14) - RF_ BYTE 0 ;(bit 16) + RF_ BYTE 0 ;(bit 16) BYTE 0 ; alignment -EFLStruct ENDS +EFLStruct ENDS MEMORYTYPE STRUCT BaseRegister DWORD 0 @@ -93,7 +93,7 @@ _Disasm STRUCT Argument3 ARGTYPE <> Argument4 ARGTYPE <> Prefix PREFIXINFO <> - Reserved_ DWORD 44 dup(0) + Reserved_ DWORD 48 dup(0) _Disasm ENDS Disasm PROTO :DWORD @@ -120,7 +120,7 @@ Disasm PROTO :DWORD MandatoryPrefix equ 8 ; ********** EFLAGS states - + TE_ equ 1 ; test MO_ equ 2 ; modify RE_ equ 4 ; reset @@ -152,7 +152,7 @@ Disasm PROTO :DWORD AVX_INSTRUCTION equ 100000000h AVX2_INSTRUCTION equ 200000000h MPX_INSTRUCTION equ 400000000h - + AVX512_INSTRUCTION equ 800000000h DATA_TRANSFER equ 1 ARITHMETIC_INSTRUCTION equ 2 LOGICAL_INSTRUCTION equ 3 @@ -170,7 +170,7 @@ Disasm PROTO :DWORD LOGARITHMIC_INSTRUCTION equ 14 TRIGONOMETRIC_INSTRUCTION equ 15 UNSUPPORTED_INSTRUCTION equ 16 - + LOAD_CONSTANTS equ 17 FPUCONTROL equ 18 STATE_MANAGEMENT equ 19 @@ -182,21 +182,21 @@ Disasm PROTO :DWORD SIMD128bits equ 23 SIMD64bits equ 24 CACHEABILITY_CONTROL equ 25 - - FP_INTEGER_CONVERSION equ 26 + + FP_INTEGER_CONVERSION equ 26 SPECIALIZED_128bits equ 27 SIMD_FP_PACKED equ 28 - SIMD_FP_HORIZONTAL equ 29 + SIMD_FP_HORIZONTAL equ 29 AGENT_SYNCHRONISATION equ 30 - PACKED_ALIGN_RIGHT equ 31 + PACKED_ALIGN_RIGHT equ 31 PACKED_SIGN equ 32 ; ****************************************** SSE4 - + PACKED_BLENDING_INSTRUCTION equ 33 PACKED_TEST equ 34 - + ; CONVERSION_INSTRUCTION -> Packed Integer Format Conversions et Dword Packing With Unsigned Saturation ; COMPARISON -> Packed Comparison SIMD Integer Instruction ; ARITHMETIC_INSTRUCTION -> Dword Multiply Instruction @@ -300,5 +300,3 @@ Disasm PROTO :DWORD PrefixedNumeral equ 10000h SuffixedNumeral equ 0 ShowSegmentRegs equ 01000000h - - diff --git a/headers/BeaEngineNasm32.inc b/headers/BeaEngineNasm32.inc index ab09e04..e82b327 100644 --- a/headers/BeaEngineNasm32.inc +++ b/headers/BeaEngineNasm32.inc @@ -66,7 +66,7 @@ ENDSTRUC STRUC INSTRTYPE Category: resd 1 Opcode: resd 1 - Mnemonic: resb 24 + Mnemonic: resb 24 BranchType: resd 1 Flags: resb EFLStruct_size AddrValue: resq 1 @@ -99,7 +99,7 @@ STRUC _Disasm Argument3: resb ARGTYPE_size Argument4: resb ARGTYPE_size Prefix: resb PREFIXINFO_size - Reserved_: resd 44 + Reserved_: resd 48 ENDSTRUC LowPosition equ 0 @@ -122,7 +122,7 @@ ENDSTRUC MandatoryPrefix equ 8 ; ********** EFLAGS states - + TE_ equ 1 ; test MO_ equ 2 ; modify RE_ equ 4 ; reset @@ -155,7 +155,7 @@ ENDSTRUC AVX_INSTRUCTION equ 100000000h AVX2_INSTRUCTION equ 200000000h MPX_INSTRUCTION equ 400000000h - + AVX512_INSTRUCTION equ 800000000h DATA_TRANSFER equ 1 ARITHMETIC_INSTRUCTION equ 2 LOGICAL_INSTRUCTION equ 3 @@ -173,7 +173,7 @@ ENDSTRUC LOGARITHMIC_INSTRUCTION equ 14 TRIGONOMETRIC_INSTRUCTION equ 15 UNSUPPORTED_INSTRUCTION equ 16 - + LOAD_CONSTANTS equ 17 FPUCONTROL equ 18 STATE_MANAGEMENT equ 19 @@ -185,21 +185,21 @@ ENDSTRUC SIMD128bits equ 23 SIMD64bits equ 24 CACHEABILITY_CONTROL equ 25 - - FP_INTEGER_CONVERSION equ 26 + + FP_INTEGER_CONVERSION equ 26 SPECIALIZED_128bits equ 27 SIMD_FP_PACKED equ 28 - SIMD_FP_HORIZONTAL equ 29 + SIMD_FP_HORIZONTAL equ 29 AGENT_SYNCHRONISATION equ 30 - PACKED_ALIGN_RIGHT equ 31 + PACKED_ALIGN_RIGHT equ 31 PACKED_SIGN equ 32 ; ****************************************** SSE4 - + PACKED_BLENDING_INSTRUCTION equ 33 PACKED_TEST equ 34 - + ; CONVERSION_INSTRUCTION -> Packed Integer Format Conversions et Dword Packing With Unsigned Saturation ; COMPARISON -> Packed Comparison SIMD Integer Instruction ; ARITHMETIC_INSTRUCTION -> Dword Multiply Instruction diff --git a/headers/BeaEngineNasm64.inc b/headers/BeaEngineNasm64.inc index 8123132..8ddf997 100644 --- a/headers/BeaEngineNasm64.inc +++ b/headers/BeaEngineNasm64.inc @@ -53,7 +53,7 @@ STRUC EFLStruct RF_: resb 1 ;(bit 16) resb 1 ; alignment ENDSTRUC - + STRUC MEMORYTYPE BaseRegister: resd 1 @@ -99,7 +99,7 @@ STRUC _Disasm Argument3: resb ARGTYPE_size Argument4: resb ARGTYPE_size Prefix: resb PREFIXINFO_size - Reserved_ resd 44 + Reserved_ resd 48 ENDSTRUC LowPosition equ 0 @@ -121,7 +121,7 @@ ENDSTRUC MandatoryPrefix equ 8 ; ********** EFLAGS states - + TE_ equ 1 ; test MO_ equ 2 ; modify RE_ equ 4 ; reset @@ -154,7 +154,7 @@ ENDSTRUC AVX_INSTRUCTION equ 100000000h AVX2_INSTRUCTION equ 200000000h MPX_INSTRUCTION equ 400000000h - + AVX512_INSTRUCTION equ 800000000h DATA_TRANSFER equ 1 ARITHMETIC_INSTRUCTION equ 2 LOGICAL_INSTRUCTION equ 3 @@ -172,7 +172,7 @@ ENDSTRUC LOGARITHMIC_INSTRUCTION equ 14 TRIGONOMETRIC_INSTRUCTION equ 15 UNSUPPORTED_INSTRUCTION equ 16 - + LOAD_CONSTANTS equ 17 FPUCONTROL equ 18 STATE_MANAGEMENT equ 19 @@ -184,21 +184,21 @@ ENDSTRUC SIMD128bits equ 23 SIMD64bits equ 24 CACHEABILITY_CONTROL equ 25 - - FP_INTEGER_CONVERSION equ 26 + + FP_INTEGER_CONVERSION equ 26 SPECIALIZED_128bits equ 27 SIMD_FP_PACKED equ 28 - SIMD_FP_HORIZONTAL equ 29 + SIMD_FP_HORIZONTAL equ 29 AGENT_SYNCHRONISATION equ 30 - PACKED_ALIGN_RIGHT equ 31 + PACKED_ALIGN_RIGHT equ 31 PACKED_SIGN equ 32 ; ****************************************** SSE4 - + PACKED_BLENDING_INSTRUCTION equ 33 PACKED_TEST equ 34 - + ; CONVERSION_INSTRUCTION -> Packed Integer Format Conversions et Dword Packing With Unsigned Saturation ; COMPARISON -> Packed Comparison SIMD Integer Instruction ; ARITHMETIC_INSTRUCTION -> Dword Multiply Instruction diff --git a/headers/BeaEnginePureBasic32.pb b/headers/BeaEnginePureBasic32.pb index 14519b8..b1982ed 100644 --- a/headers/BeaEnginePureBasic32.pb +++ b/headers/BeaEnginePureBasic32.pb @@ -76,7 +76,7 @@ Structure ARGTYPE ArgSize.l ArgPosition.l AccessMode.l - Memory.MEMORYTYPE + Memory.MEMORYTYPE SegmentReg.l EndStructure Global Argtype.ARGTYPE @@ -94,7 +94,7 @@ Structure _Disasm Argument3.ARGTYPE Argument4.ARGTYPE Prefix.PREFIXINFO - Reserved_.l[44] + Reserved_.l[48] EndStructure Global MyDisasm._Disasm @@ -139,14 +139,15 @@ Global MyDisasm._Disasm #SSE42_INSTRUCTION = $01000000 #SYSTEM_INSTRUCTION = $02000000 #VM_INSTRUCTION = $04000000 -UNDOCUMENTED_INSTRUCTION = $08000000 -AMD_INSTRUCTION = $10000000 -ILLEGAL_INSTRUCTION = $20000000 -AES_INSTRUCTION = $40000000 -CLMUL_INSTRUCTION = $80000000 -AVX_INSTRUCTION = $100000000 -AVX2_INSTRUCTION = $200000000 -MPX_INSTRUCTION = $400000000 +#UNDOCUMENTED_INSTRUCTION = $08000000 +#AMD_INSTRUCTION = $10000000 +#ILLEGAL_INSTRUCTION = $20000000 +#AES_INSTRUCTION = $40000000 +#CLMUL_INSTRUCTION = $80000000 +#AVX_INSTRUCTION = $100000000 +#AVX2_INSTRUCTION = $200000000 +#MPX_INSTRUCTION = $400000000 +#AVX512_INSTRUCTION = $800000000 #DATA_TRANSFER = 1 #ARITHMETIC_INSTRUCTION = 2 @@ -165,7 +166,7 @@ MPX_INSTRUCTION = $400000000 #LOGARITHMIC_INSTRUCTION = 14 #TRIGONOMETRIC_INSTRUCTION = 15 #UNSUPPORTED_INSTRUCTION = 16 - + #LOAD_CONSTANTS = 17 #FPUCONTROL = 18 #STATE_MANAGEMENT = 19 @@ -177,21 +178,21 @@ MPX_INSTRUCTION = $400000000 #SIMD128bits = 23 #SIMD64bits = 24 #CACHEABILITY_CONTROL = 25 - + #FP_INTEGER_CONVERSION = 26 #SPECIALIZED_128bits = 27 #SIMD_FP_PACKED = 28 #SIMD_FP_HORIZONTAL = 29 #AGENT_SYNCHRONISATION = 30 -#PACKED_ALIGN_RIGHT = 31 +#PACKED_ALIGN_RIGHT = 31 #PACKED_SIGN = 32 ; ****************************************** SSE4 - + #PACKED_BLENDING_INSTRUCTION = 33 #PACKED_TEST = 34 - + ; CONVERSION_INSTRUCTION -> Packed Integer Format Conversions et Dword Packing With Unsigned Saturation ; COMPARISON -> Packed Comparison SIMD Integer Instruction ; ARITHMETIC_INSTRUCTION -> Dword Multiply Instruction diff --git a/headers/BeaEnginePureBasic64.pb b/headers/BeaEnginePureBasic64.pb index bd0fd7d..4f703fe 100644 --- a/headers/BeaEnginePureBasic64.pb +++ b/headers/BeaEnginePureBasic64.pb @@ -77,7 +77,7 @@ Structure ARGTYPE ArgPosition.l AccessMode.l Memory.MEMORYTYPE - SegmentReg.l + SegmentReg.l EndStructure Global Argtype.ARGTYPE @@ -94,7 +94,7 @@ Structure _Disasm Argument3.ARGTYPE Argument4.ARGTYPE Prefix.PREFIXINFO - Reserved_.l[44] + Reserved_.l[48] EndStructure Global MyDisasm._Disasm @@ -139,15 +139,15 @@ Global MyDisasm._Disasm #SSE42_INSTRUCTION = $01000000 #SYSTEM_INSTRUCTION = $02000000 #VM_INSTRUCTION = $04000000 -UNDOCUMENTED_INSTRUCTION = $08000000 -AMD_INSTRUCTION = $10000000 -ILLEGAL_INSTRUCTION = $20000000 -AES_INSTRUCTION = $40000000 -CLMUL_INSTRUCTION = $80000000 -AVX_INSTRUCTION = $100000000 -AVX2_INSTRUCTION = $200000000 -MPX_INSTRUCTION = $400000000 - +#UNDOCUMENTED_INSTRUCTION = $08000000 +#AMD_INSTRUCTION = $10000000 +#ILLEGAL_INSTRUCTION = $20000000 +#AES_INSTRUCTION = $40000000 +#CLMUL_INSTRUCTION = $80000000 +#AVX_INSTRUCTION = $100000000 +#AVX2_INSTRUCTION = $200000000 +#MPX_INSTRUCTION = $400000000 +#AVX512_INSTRUCTION = $800000000 #DATA_TRANSFER = 1 #ARITHMETIC_INSTRUCTION = 2 #LOGICAL_INSTRUCTION = 3 @@ -165,7 +165,7 @@ MPX_INSTRUCTION = $400000000 #LOGARITHMIC_INSTRUCTION = 14 #TRIGONOMETRIC_INSTRUCTION = 15 #UNSUPPORTED_INSTRUCTION = 16 - + #LOAD_CONSTANTS = 17 #FPUCONTROL = 18 #STATE_MANAGEMENT = 19 @@ -177,21 +177,21 @@ MPX_INSTRUCTION = $400000000 #SIMD128bits = 23 #SIMD64bits = 24 #CACHEABILITY_CONTROL = 25 - + #FP_INTEGER_CONVERSION = 26 #SPECIALIZED_128bits = 27 #SIMD_FP_PACKED = 28 #SIMD_FP_HORIZONTAL = 29 #AGENT_SYNCHRONISATION = 30 -#PACKED_ALIGN_RIGHT = 31 +#PACKED_ALIGN_RIGHT = 31 #PACKED_SIGN = 32 ; ****************************************** SSE4 - + #PACKED_BLENDING_INSTRUCTION = 33 #PACKED_TEST = 34 - + ; CONVERSION_INSTRUCTION -> Packed Integer Format Conversions et Dword Packing With Unsigned Saturation ; COMPARISON -> Packed Comparison SIMD Integer Instruction ; ARITHMETIC_INSTRUCTION -> Dword Multiply Instruction diff --git a/headers/BeaEnginePython.py b/headers/BeaEnginePython.py index 4f96e18..498a8c9 100644 --- a/headers/BeaEnginePython.py +++ b/headers/BeaEnginePython.py @@ -498,7 +498,7 @@ def __init__(self, buffer, offset=0, virtualAddr=0): Init Disasm object Example : # instantiate BeaEngine on buffer - buffer = '\x90\x90\x6a\x00\xe8\xa5\xc7\x02\x00' + buffer = b'\x90\x90\x6a\x00\xe8\xa5\xc7\x02\x00' disasm = Disasm(buffer) """ self.buffer = buffer @@ -528,7 +528,7 @@ def getBytes(self): """ getter to get bytes sequence of disassembled instruction Example: - print(" ".join("%02x" % ord(b) for b in disasm.bytes)) + print(" ".join("{:02x}".format(b if type(b) == int else ord(b)) for b in self.bytes)) """ offset = self.instr.offset - addressof(self.target) if self.length == -1: @@ -552,7 +552,7 @@ def read(self): """ Disassembler routine Example: - buffer = '\x90\x90\x6a\x00\xe8\xa5\xc7\x02\x00' + buffer = b'\x90\x90\x6a\x00\xe8\xa5\xc7\x02\x00' disasm = Disasm(buffer2) for i in range(4): disasm.read() @@ -567,7 +567,7 @@ def repr(self): """ Complete instruction representation for quick analysis Example: - buffer = '\x90\x90\x6a\x00\xe8\xa5\xc7\x02\x00' + buffer = b'\x90\x90\x6a\x00\xe8\xa5\xc7\x02\x00' disasm = Disasm(buffer2) for i in range(4): disasm.read() @@ -576,5 +576,5 @@ def repr(self): return "{} {:<30} {}".format( "0x%08x" %(self.seek()), " ".join("{:02x}".format(b if type(b) == int else ord(b)) for b in self.bytes), - self.instr.repr + self.instr.repr.decode("utf-8") )