From 2864e4b05dbd523e52f3e061d5c887a8b2f6b970 Mon Sep 17 00:00:00 2001 From: Yuguo Zou Date: Thu, 29 Jun 2017 15:36:32 +0800 Subject: [PATCH 01/15] enable sdram usage of REALTEK_RTL8195AM Signed-off-by: Tony Wu --- .../device/TOOLCHAIN_ARM_STD/rtl8195a.sct | 3 +- .../rlx8195A-symbol-v02-img2.ld | 10 ++- .../device/TOOLCHAIN_IAR/rtl8195a.icf | 5 +- tools/targets/REALTEK_RTL8195AM.py | 85 ++++++++++++++----- 4 files changed, 77 insertions(+), 26 deletions(-) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct index 90b5a52b03a..72a3a64321b 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct @@ -47,5 +47,6 @@ LR_RAM 0x10006000 0x6FFFF { LR_DRAM 0x30000000 0x1FFFFF{ _DRAM_CODE 0x30000000 0x1FFFFF{ + *.o(.text*) } -} \ No newline at end of file +} diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rlx8195A-symbol-v02-img2.ld b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rlx8195A-symbol-v02-img2.ld index 512f4460fe7..90ed1d79996 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rlx8195A-symbol-v02-img2.ld +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rlx8195A-symbol-v02-img2.ld @@ -731,7 +731,6 @@ SECTIONS *(.hal.flash.text*) *(.hal.sdrc.text*) *(.hal.gpio.text*) - *(.text*) KEEP(*(.init)) KEEP(*(.fini)) @@ -840,6 +839,15 @@ SECTIONS *(.stack) } > BD_RAM + .sdr_all : + { + __sdram_data_start__ = .; + *(.text*) + __sdram_data_end__ = .; + __sdram_bss_start__ = .; + __sdram_bss_end__ = .; + } > SD_RAM + /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(BD_RAM) + LENGTH(BD_RAM); diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_IAR/rtl8195a.icf b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_IAR/rtl8195a.icf index 071b052d6f9..b15a9c7e276 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_IAR/rtl8195a.icf +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_IAR/rtl8195a.icf @@ -142,7 +142,6 @@ define block .ram_image2.text with fixed order{ section .infra.ram.start*, section .hal.flash.text*, section .hal.gpio.text*, section .text* object main.o, - section .text*, section .wlan.text, section .wps.text, section CODE, @@ -189,7 +188,9 @@ place at end of BD_RAM_region { block HEAP, }; -define block SDRAM with fixed order{ section .sdram.text*, +define block SDRAM with fixed order{ + section .text*, + section .sdram.text*, section .sdram.data*, section .mdns.text*, section .mdns.data*, diff --git a/tools/targets/REALTEK_RTL8195AM.py b/tools/targets/REALTEK_RTL8195AM.py index 74fb1b2089f..3ff9c7db196 100644 --- a/tools/targets/REALTEK_RTL8195AM.py +++ b/tools/targets/REALTEK_RTL8195AM.py @@ -25,6 +25,8 @@ # Constant Variables RAM2_RSVD = 0x3131373835393138 +RAM3_RSVD = 0xFFFFFFFFFFFFFFFF +IMG2_OFFSET = 0x10006000 #default def write_fixed_width_string(value, width, output): # cut string to list & reverse @@ -44,22 +46,39 @@ def write_fixed_width_value(value, width, output): output.write("".join([chr(long(b, 16)) for b in line])) def append_image_file(image, output): - input = open(image, "rb") - output.write(input.read()) + try: + input = open(image, "rb") + output.write(input.read()) + except Exception: + return input.close() def prepend(image, image_prepend, toolchain, info): + if info['size'] == 0: + return output = open(image_prepend, "wb") write_fixed_width_value(info['size'], 8, output) write_fixed_width_value(info['addr'], 8, output) - write_fixed_width_value(RAM2_RSVD, 16, output) - with open(image, "rb") as input: - if toolchain == "IAR": - input.seek(info['addr']) - output.write(input.read(info['size'])) + if info['img'] == 2 : + write_fixed_width_value(RAM2_RSVD, 16, output) + elif info['img'] == 3 : + write_fixed_width_value(RAM3_RSVD, 16, output) + if os.path.isfile(image): + with open(image, "rb") as input: + if toolchain == "IAR": + input.seek(info['addr']) + elif info['img'] == 3: #toolchain is not IAR + input.seek(info['addr']-IMG2_OFFSET) + output.write(input.read(info['size'])) + else: + image = os.path.join(image, info['name']) + with open(image, "rb") as input: + output.write(input.read(info['size'])) + output.close() + -def parse_section(toolchain, elf, section): +def _parse_section(toolchain, elf, section): info = {'addr':None, 'size':0}; if toolchain not in ["GCC_ARM", "ARM_STD", "ARM", "ARM_MICRO", "IAR"]: print "[ERROR] unsupported toolchain " + toolchain @@ -104,38 +123,60 @@ def parse_section(toolchain, elf, section): print "[ERROR] cannot find the address of section " + section return info +def parse_section(toolchain, elf, sections, img): + img_info = {'name':"", 'addr':None, 'size':0, 'img':img} + for section in sections: + section_info = _parse_section(toolchain, elf, section) + if img_info['addr'] is None or img_info['addr'] > section_info['addr']: + img_info['addr'] = section_info['addr'] + img_info['name'] = section + img_info['size'] = img_info['size'] + section_info['size'] + return img_info + # ---------------------------- # main function # ---------------------------- def rtl8195a_elf2bin(toolchain, image_elf, image_bin): if toolchain == "GCC_ARM": img2_sections = [".image2.table", ".text", ".data"] + img3_sections = [".sdr_all"] elif toolchain in ["ARM_STD", "ARM", "ARM_MICRO"]: img2_sections = [".image2.table", ".text", ".data"] + img3_sections = ["_DRAM_CODE"] elif toolchain == "IAR": - # actually it's block img2_sections = ["IMAGE2"] + img3_sections = ["SDRAM"] else: print("[error] unsupported toolchain") + toolchain return - ram2_info = {'addr':None, 'size':0} + image2_info = {'addr':None, 'size':0, 'img':2} + image3_info = {'addr':None, 'size':0, 'img':3} image_name = os.path.splitext(image_elf)[0] - ram1_prepend_bin = os.path.join(TOOLS_BOOTLOADERS, "REALTEK_RTL8195AM", "ram_1_prepend.bin") - ram2_prepend_bin = image_name + '-ram_2_prepend.bin' + img1_prepend_bin = os.path.join(TOOLS_BOOTLOADERS, "REALTEK_RTL8195AM", "ram_1_prepend.bin") + img2_prepend_bin = image_name + '-ram_2_prepend.bin' + img3_prepend_bin = image_name + '-ram_3_prepend.bin' + + old_bin = image_name + '.bin' + + img_info = parse_section(toolchain, image_elf, img2_sections, 2) + prepend(old_bin, img2_prepend_bin, toolchain, img_info) + img_info = parse_section(toolchain, image_elf, img3_sections, 3) + prepend(old_bin, img3_prepend_bin, toolchain, img_info) - old_bin = image_name + '.bin' - for section in img2_sections: - section_info = parse_section(toolchain, image_elf, section) - if ram2_info['addr'] is None or ram2_info['addr'] > section_info['addr']: - ram2_info['addr'] = section_info['addr'] - ram2_info['size'] = ram2_info['size'] + section_info['size'] - - prepend(old_bin, ram2_prepend_bin, toolchain, ram2_info) + #delete original binary + if os.path.isfile(image_bin): + os.remove(image_bin) + else: + for i in os.listdir(image_bin): + os.remove(os.path.join(image_bin, i)) + os.removedirs(image_bin) + # write output file output = open(image_bin, "wb") - append_image_file(ram1_prepend_bin, output) - append_image_file(ram2_prepend_bin, output) + append_image_file(img1_prepend_bin, output) + append_image_file(img2_prepend_bin, output) + append_image_file(img3_prepend_bin, output) output.close() # post built done From 37739937ca3ade7811d28bba9f33ad352563f7ef Mon Sep 17 00:00:00 2001 From: Tony Wu Date: Thu, 27 Jul 2017 13:40:31 +0800 Subject: [PATCH 02/15] rtl8195am - rename GCC_ARM linker script Signed-off-by: Tony Wu --- .../{rlx8195A-symbol-v02-img2.ld => rtl8195a.ld} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/{rlx8195A-symbol-v02-img2.ld => rtl8195a.ld} (100%) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rlx8195A-symbol-v02-img2.ld b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld similarity index 100% rename from targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rlx8195A-symbol-v02-img2.ld rename to targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld From c9ecb2749d2f3ccabba7f00147a315e480a29710 Mon Sep 17 00:00:00 2001 From: Tony Wu Date: Thu, 27 Jul 2017 13:24:51 +0800 Subject: [PATCH 03/15] rtl8195am - adjust memory layout and enable fota support 1. Rearrange SDRAM and SRAM layout. Move timing critical code to SRAM, and the rest to SDRAM. 2. Add bootloader that's capable of FOTA over mbed cloud. Signed-off-by: Tony Wu --- .../device/TOOLCHAIN_GCC_ARM/rtl8195a.ld | 764 ++---------------- .../device/TOOLCHAIN_GCC_ARM/rtl8195a_rom.h | 759 +++++++++++++++++ .../TARGET_RTL8195A/device/rtl8195a_init.c | 220 +++-- targets/TARGET_Realtek/TARGET_AMEBA/ota_api.c | 154 ++++ targets/TARGET_Realtek/TARGET_AMEBA/ota_api.h | 18 + .../{ram_1_prepend.bin => ram_1.bin} | Bin 45056 -> 45056 bytes tools/targets/REALTEK_RTL8195AM.py | 375 +++++---- tools/targets/__init__.py | 2 +- 8 files changed, 1322 insertions(+), 970 deletions(-) create mode 100644 targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a_rom.h create mode 100644 targets/TARGET_Realtek/TARGET_AMEBA/ota_api.c create mode 100644 targets/TARGET_Realtek/TARGET_AMEBA/ota_api.h rename tools/bootloaders/REALTEK_RTL8195AM/{ram_1_prepend.bin => ram_1.bin} (79%) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld index 90ed1d79996..d731f9c076a 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld @@ -14,667 +14,20 @@ * limitations under the License. */ - -ENTRY(Reset_Handler) - -/*INCLUDE "mbed-os/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/export-rom_v02.txt"*/ -SECTIONS -{ - __vectors_table = 0x0; - Reset_Handler = 0x101; - NMI_Handler = 0x109; - HardFault_Handler = 0x10d; - MemManage_Handler = 0x121; - BusFault_Handler = 0x125; - UsageFault_Handler = 0x129; - HalLogUartInit = 0x201; - HalSerialGetcRtl8195a = 0x309; - HalSerialGetIsrEnRegRtl8195a = 0x329; - HalSerialSetIrqEnRegRtl8195a = 0x335; - HalCpuClkConfig = 0x341; - HalGetCpuClk = 0x355; - HalRomInfo = 0x39d; - HalGetRomInfo = 0x3b5; - HalResetVsr = 0x3c5; - HalDelayUs = 0x899; - HalNMIHandler = 0x8e1; - HalHardFaultHandler = 0x911; - HalMemManageHandler = 0xc09; - HalBusFaultHandler = 0xc39; - HalUsageFaultHandler = 0xc69; - HalUart0PinCtrlRtl8195A = 0xcfd; - HalUart1PinCtrlRtl8195A = 0xdc9; - HalUart2PinCtrlRtl8195A = 0xe9d; - HalSPI0PinCtrlRtl8195A = 0xf75; - HalSPI1PinCtrlRtl8195A = 0x1015; - HalSPI2PinCtrlRtl8195A = 0x10e5; - HalSPI0MCSPinCtrlRtl8195A = 0x11b5; - HalI2C0PinCtrlRtl8195A = 0x1275; - HalI2C1PinCtrlRtl8195A = 0x1381; - HalI2C2PinCtrlRtl8195A = 0x1459; - HalI2C3PinCtrlRtl8195A = 0x1529; - HalI2S0PinCtrlRtl8195A = 0x1639; - HalI2S1PinCtrlRtl8195A = 0x176d; - HalPCM0PinCtrlRtl8195A = 0x1845; - HalPCM1PinCtrlRtl8195A = 0x1949; - HalSDIODPinCtrlRtl8195A = 0x1a1d; - HalSDIOHPinCtrlRtl8195A = 0x1a6d; - HalMIIPinCtrlRtl8195A = 0x1ab9; - HalWLLEDPinCtrlRtl8195A = 0x1b51; - HalWLANT0PinCtrlRtl8195A = 0x1c0d; - HalWLANT1PinCtrlRtl8195A = 0x1c61; - HalWLBTCOEXPinCtrlRtl8195A = 0x1cb5; - HalWLBTCMDPinCtrlRtl8195A = 0x1d05; - HalNFCPinCtrlRtl8195A = 0x1d59; - HalPWM0PinCtrlRtl8195A = 0x1da9; - HalPWM1PinCtrlRtl8195A = 0x1ead; - HalPWM2PinCtrlRtl8195A = 0x1fb5; - HalPWM3PinCtrlRtl8195A = 0x20b1; - HalETE0PinCtrlRtl8195A = 0x21b9; - HalETE1PinCtrlRtl8195A = 0x22c1; - HalETE2PinCtrlRtl8195A = 0x23c9; - HalETE3PinCtrlRtl8195A = 0x24d1; - HalEGTIMPinCtrlRtl8195A = 0x25d9; - HalSPIFlashPinCtrlRtl8195A = 0x2679; - HalSDRPinCtrlRtl8195A = 0x2725; - HalJTAGPinCtrlRtl8195A = 0x280d; - HalTRACEPinCtrlRtl8195A = 0x2861; - HalLOGUartPinCtrlRtl8195A = 0x28b9; - HalLOGUartIRPinCtrlRtl8195A = 0x291d; - HalSICPinCtrlRtl8195A = 0x2981; - HalEEPROMPinCtrlRtl8195A = 0x29d9; - HalDEBUGPinCtrlRtl8195A = 0x2a31; - HalPinCtrlRtl8195A = 0x2b39; - SpicRxCmdRtl8195A = 0x2e5d; - SpicWaitBusyDoneRtl8195A = 0x2ea5; - SpicGetFlashStatusRtl8195A = 0x2eb5; - SpicWaitWipDoneRtl8195A = 0x2f55; - SpicTxCmdRtl8195A = 0x2f6d; - SpicSetFlashStatusRtl8195A = 0x2fc1; - SpicCmpDataForCalibrationRtl8195A = 0x3049; - SpicLoadInitParaFromClockRtl8195A = 0x3081; - SpicInitRtl8195A = 0x30e5; - SpicEraseFlashRtl8195A = 0x31bd; - SpiFlashApp = 0x3279; - HalPeripheralIntrHandle = 0x33b5; - HalSysOnIntrHandle = 0x3439; - HalWdgIntrHandle = 0x3485; - HalTimer0IntrHandle = 0x34d5; - HalTimer1IntrHandle = 0x3525; - HalI2C3IntrHandle = 0x3575; - HalTimer2To7IntrHandle = 0x35c5; - HalSpi0IntrHandle = 0x3615; - HalGpioIntrHandle = 0x3665; - HalUart0IntrHandle = 0x36b5; - HalSpiFlashIntrHandle = 0x3705; - HalUsbOtgIntrHandle = 0x3755; - HalSdioHostIntrHandle = 0x37a5; - HalI2s0OrPcm0IntrHandle = 0x37f5; - HalI2s1OrPcm1IntrHandle = 0x3845; - HalWlDmaIntrHandle = 0x3895; - HalWlProtocolIntrHandle = 0x38e5; - HalCryptoIntrHandle = 0x3935; - HalGmacIntrHandle = 0x3985; - HalGdma0Ch0IntrHandle = 0x39d5; - HalGdma0Ch1IntrHandle = 0x3a25; - HalGdma0Ch2IntrHandle = 0x3a75; - HalGdma0Ch3IntrHandle = 0x3ac5; - HalGdma0Ch4IntrHandle = 0x3b15; - HalGdma0Ch5IntrHandle = 0x3b65; - HalGdma1Ch0IntrHandle = 0x3bb5; - HalGdma1Ch1IntrHandle = 0x3c05; - HalGdma1Ch2IntrHandle = 0x3c55; - HalGdma1Ch3IntrHandle = 0x3ca5; - HalGdma1Ch4IntrHandle = 0x3cf5; - HalGdma1Ch5IntrHandle = 0x3d45; - HalSdioDeviceIntrHandle = 0x3d95; - VectorTableInitRtl8195A = 0x3de5; - VectorTableInitForOSRtl8195A = 0x4019; - VectorIrqRegisterRtl8195A = 0x4029; - VectorIrqUnRegisterRtl8195A = 0x4091; - VectorIrqEnRtl8195A = 0x40f1; - VectorIrqDisRtl8195A = 0x418d; - _UartRxDmaIrqHandle = 0x422d; - HalRuartPutCRtl8195a = 0x4281; - HalRuartGetCRtl8195a = 0x429d; - HalRuartRTSCtrlRtl8195a = 0x42bd; - HalRuartGetDebugValueRtl8195a = 0x42e1; - HalRuartGetIMRRtl8195a = 0x43e1; - HalRuartSetIMRRtl8195a = 0x442d; - _UartIrqHandle = 0x4465; - HalRuartDmaInitRtl8195a = 0x4681; - HalRuartIntDisableRtl8195a = 0x4845; - HalRuartDeInitRtl8195a = 0x4855; - HalRuartIntEnableRtl8195a = 0x4985; - _UartTxDmaIrqHandle = 0x4995; - HalRuartRegIrqRtl8195a = 0x49d1; - HalRuartAdapterLoadDefRtl8195a = 0x4a4d; - HalRuartTxGdmaLoadDefRtl8195a = 0x4add; - HalRuartRxGdmaLoadDefRtl8195a = 0x4bc9; - RuartLock = 0x4cc9; - RuartUnLock = 0x4ced; - HalRuartIntSendRtl8195a = 0x4d09; - HalRuartDmaSendRtl8195a = 0x4e35; - HalRuartStopSendRtl8195a = 0x4f89; - HalRuartIntRecvRtl8195a = 0x504d; - HalRuartDmaRecvRtl8195a = 0x51ad; - HalRuartStopRecvRtl8195a = 0x52cd; - RuartIsTimeout = 0x5385; - HalRuartSendRtl8195a = 0x53b1; - HalRuartRecvRtl8195a = 0x5599; - RuartResetRxFifoRtl8195a = 0x5751; - HalRuartResetRxFifoRtl8195a = 0x5775; - HalRuartInitRtl8195a = 0x5829; - HalGdmaOnOffRtl8195a = 0x5df1; - HalGdmaChIsrEnAndDisRtl8195a = 0x5e0d; - HalGdmaChEnRtl8195a = 0x5e51; - HalGdmaChDisRtl8195a = 0x5e6d; - HalGdamChInitRtl8195a = 0x5e91; - HalGdmaChSetingRtl8195a = 0x5ebd; - HalGdmaChBlockSetingRtl8195a = 0x000060dd; - HalGdmaChIsrCleanRtl8195a = 0x6419; - HalGdmaChCleanAutoSrcRtl8195a = 0x64a1; - HalGdmaChCleanAutoDstRtl8195a = 0x6501; - HalEFUSEPowerSwitch8195AROM = 0x6561; - HALEFUSEOneByteReadROM = 0x65f9; - HALEFUSEOneByteWriteROM = 0x6699; - __rtl_memcmpb_v1_00 = 0x681d; - __rtl_random_v1_00 = 0x6861; - __rtl_align_to_be32_v1_00 = 0x6881; - __rtl_memsetw_v1_00 = 0x6899; - __rtl_memsetb_v1_00 = 0x68ad; - __rtl_memcpyw_v1_00 = 0x68bd; - __rtl_memcpyb_v1_00 = 0x68dd; - __rtl_memDump_v1_00 = 0x68f5; - __rtl_AES_set_encrypt_key = 0x6901; - __rtl_cryptoEngine_AES_set_decrypt_key = 0x6c11; - __rtl_cryptoEngine_set_security_mode_v1_00 = 0x6c95; - __rtl_cryptoEngine_init_v1_00 = 0x6ea9; - __rtl_cryptoEngine_exit_v1_00 = 0x7055; - __rtl_cryptoEngine_reset_v1_00 = 0x70b1; - __rtl_cryptoEngine_v1_00 = 0x70ed; - __rtl_crypto_cipher_init_v1_00 = 0x7c69; - __rtl_crypto_cipher_encrypt_v1_00 = 0x7c89; - __rtl_crypto_cipher_decrypt_v1_00 = 0x7cad; - HalSsiPinmuxEnableRtl8195a = 0x7cd5; - HalSsiEnableRtl8195a = 0x7e45; - HalSsiDisableRtl8195a = 0x7ef9; - HalSsiLoadSettingRtl8195a = 0x7fad; - HalSsiSetInterruptMaskRtl8195a = 0x8521; - HalSsiGetInterruptMaskRtl8195a = 0x85c9; - HalSsiSetSclkPolarityRtl8195a = 0x863d; - HalSsiSetSclkPhaseRtl8195a = 0x8715; - HalSsiWriteRtl8195a = 0x87e9; - HalSsiSetDeviceRoleRtl8195a = 0x8861; - HalSsiSetRxFifoThresholdLevelRtl8195a = 0x88c9; - HalSsiSetTxFifoThresholdLevelRtl8195a = 0x8941; - HalSsiReadRtl8195a = 0x89b9; - HalSsiGetRxFifoLevelRtl8195a = 0x8a2d; - HalSsiGetTxFifoLevelRtl8195a = 0x8aa5; - HalSsiGetStatusRtl8195a = 0x8b1d; - HalSsiWriteableRtl8195a = 0x8b91; - HalSsiReadableRtl8195a = 0x8c09; - HalSsiBusyRtl8195a = 0x8c81; - HalSsiReadInterruptRtl8195a = 0x8cf9; - HalSsiWriteInterruptRtl8195a = 0x8efd; - HalSsiSetSlaveEnableRegisterRtl8195a = 0x9009; - HalSsiGetInterruptStatusRtl8195a = 0x90d9; - HalSsiInterruptEnableRtl8195a = 0x914d; - HalSsiInterruptDisableRtl8195a = 0x9299; - HalSsiGetRawInterruptStatusRtl8195a = 0x93e9; - HalSsiGetSlaveEnableRegisterRtl8195a = 0x945d; - HalSsiInitRtl8195a = 0x94d1; - _SsiReadInterrupt = 0x9ba5; - _SsiWriteInterrupt = 0x9db1; - _SsiIrqHandle = 0x9eb1; - HalI2CWrite32 = 0xa061; - HalI2CRead32 = 0xa09d; - HalI2CDeInit8195a = 0xa0dd; - HalI2CSendRtl8195a = 0xa1f1; - HalI2CReceiveRtl8195a = 0xa25d; - HalI2CEnableRtl8195a = 0xa271; - HalI2CIntrCtrl8195a = 0xa389; - HalI2CReadRegRtl8195a = 0xa3a1; - HalI2CWriteRegRtl8195a = 0xa3b1; - HalI2CSetCLKRtl8195a = 0xa3c5; - HalI2CMassSendRtl8195a = 0xa6e9; - HalI2CClrIntrRtl8195a = 0xa749; - HalI2CClrAllIntrRtl8195a = 0xa761; - HalI2CInit8195a = 0xa775; - HalI2CDMACtrl8195a = 0xaa31; - RtkI2CIoCtrl = 0xaa61; - RtkI2CPowerCtrl = 0xaa65; - HalI2COpInit = 0xaa69; - I2CIsTimeout = 0xac65; - I2CTXGDMAISRHandle = 0xb435; - I2CRXGDMAISRHandle = 0xb4c1; - RtkI2CIrqInit = 0xb54d; - RtkI2CIrqDeInit = 0xb611; - RtkI2CPinMuxInit = 0xb675; - RtkI2CPinMuxDeInit = 0xb7c9; - RtkI2CDMAInit = 0xb955; - RtkI2CInit = 0xbc95; - RtkI2CDMADeInit = 0xbdad; - RtkI2CDeInit = 0xbe4d; - RtkI2CSendUserAddr = 0xbee5; - RtkI2CSend = 0xc07d; - RtkI2CLoadDefault = 0xce51; - RtkSalI2COpInit = 0xcf21; - HalI2SWrite32 = 0xcf65; - HalI2SRead32 = 0xcf85; - HalI2SDeInitRtl8195a = 0xcfa9; - HalI2STxRtl8195a = 0xcfc9; - HalI2SRxRtl8195a = 0xd011; - HalI2SEnableRtl8195a = 0xd05d; - HalI2SIntrCtrlRtl8195a = 0xd0b1; - HalI2SReadRegRtl8195a = 0xd0d1; - HalI2SClrIntrRtl8195a = 0xd0dd; - HalI2SClrAllIntrRtl8195a = 0xd0fd; - HalI2SInitRtl8195a = 0xd11d; - GPIO_GetIPPinName_8195a = 0xd2e5; - GPIO_GetChipPinName_8195a = 0xd331; - GPIO_PullCtrl_8195a = 0xd39d; - GPIO_FuncOn_8195a = 0xd421; - GPIO_FuncOff_8195a = 0xd481; - GPIO_Int_Mask_8195a = 0xd4e9; - GPIO_Int_SetType_8195a = 0xd511; - HAL_GPIO_IrqHandler_8195a = 0xd5fd; - HAL_GPIO_MbedIrqHandler_8195a = 0xd645; - HAL_GPIO_UserIrqHandler_8195a = 0xd6a1; - HAL_GPIO_IntCtrl_8195a = 0xd6cd; - HAL_GPIO_Init_8195a = 0xd805; - HAL_GPIO_DeInit_8195a = 0xdac1; - HAL_GPIO_ReadPin_8195a = 0xdbd1; - HAL_GPIO_WritePin_8195a = 0xdc91; - HAL_GPIO_RegIrq_8195a = 0xddad; - HAL_GPIO_UnRegIrq_8195a = 0xddf5; - HAL_GPIO_UserRegIrq_8195a = 0xde15; - HAL_GPIO_UserUnRegIrq_8195a = 0xdef9; - HAL_GPIO_MaskIrq_8195a = 0xdfc1; - HAL_GPIO_UnMaskIrq_8195a = 0xe061; - HAL_GPIO_IntDebounce_8195a = 0xe101; - HAL_GPIO_GetIPPinName_8195a = 0xe1c1; - HAL_GPIO_PullCtrl_8195a = 0xe1c9; - DumpForOneBytes = 0xe259; - CmdRomHelp = 0xe419; - CmdWriteWord = 0xe491; - CmdDumpHelfWord = 0xe505; - CmdDumpWord = 0xe5f1; - CmdDumpByte = 0xe6f5; - CmdSpiFlashTool = 0xe751; - GetRomCmdNum = 0xe7a9; - CmdWriteByte = 0xe7ad; - Isspace = 0xe7ed; - Strtoul = 0xe801; - ArrayInitialize = 0xe8b1; - GetArgc = 0xe8c9; - GetArgv = 0xe8f9; - UartLogCmdExecute = 0xe95d; - UartLogShowBackSpace = 0xe9fd; - UartLogRecallOldCmd = 0xea39; - UartLogHistoryCmd = 0xea71; - UartLogCmdChk = 0xeadd; - UartLogIrqHandle = 0xebf5; - RtlConsolInit = 0xecc5; - RtlConsolTaskRom = 0xed49; - RtlExitConsol = 0xed79; - RtlConsolRom = 0xedcd; - HalTimerOpInit = 0xee0d; - HalTimerIrq2To7Handle = 0xee59; - HalGetTimerIdRtl8195a = 0xef09; - HalTimerInitRtl8195a = 0xef3d; - HalTimerDisRtl8195a = 0xf069; - HalTimerEnRtl8195a = 0xf089; - HalTimerReadCountRtl8195a = 0xf0a9; - HalTimerIrqClearRtl8195a = 0xf0bd; - HalTimerDumpRegRtl8195a = 0xf0d1; - VSprintf = 0xf129; - DiagPrintf = 0xf39d; - DiagSPrintf = 0xf3b9; - DiagSnPrintf = 0xf3d1; - prvDiagPrintf = 0xf3ed; - prvDiagSPrintf = 0xf40d; - _memcmp = 0xf429; - _memcpy = 0xf465; - _memset = 0xf511; - Rand = 0xf585; - _strncpy = 0xf60d; - _strcpy = 0xf629; - prvStrCpy = 0xf639; - _strlen = 0xf651; - _strnlen = 0xf669; - prvStrLen = 0xf699; - _strcmp = 0xf6b1; - _strncmp = 0xf6d1; - prvStrCmp = 0xf719; - StrUpr = 0xf749; - prvAtoi = 0xf769; - prvStrStr = 0xf7bd; - _strsep = 0xf7d5; - skip_spaces = 0xf815; - skip_atoi = 0xf831; - _parse_integer_fixup_radix = 0xf869; - _parse_integer = 0xf8bd; - simple_strtoull = 0xf915; - simple_strtoll = 0xf945; - simple_strtoul = 0xf965; - simple_strtol = 0xf96d; - _vsscanf = 0xf985; - _sscanf = 0xff71; - div_u64 = 0xff91; - div_s64 = 0xff99; - div_u64_rem = 0xffa1; - div_s64_rem = 0xffb1; - _strpbrk = 0xffc1; - _strchr = 0xffed; - aes_set_key = 0x10005; - aes_encrypt = 0x103d1; - aes_decrypt = 0x114a5; - AES_WRAP = 0x125c9; - AES_UnWRAP = 0x12701; - crc32_get = 0x12861; - arc4_byte = 0x12895; - rt_arc4_init = 0x128bd; - rt_arc4_crypt = 0x12901; - rt_md5_init = 0x131c1; - rt_md5_append = 0x131f5; - rt_md5_final = 0x1327d; - rt_md5_hmac = 0x132d5; - rtw_get_bit_value_from_ieee_value = 0x13449; - rtw_is_cckrates_included = 0x13475; - rtw_is_cckratesonly_included = 0x134b5; - rtw_check_network_type = 0x134dd; - rtw_set_fixed_ie = 0x1350d; - rtw_set_ie = 0x1352d; - rtw_get_ie = 0x1355d; - rtw_set_supported_rate = 0x13591; - rtw_get_rateset_len = 0x13611; - rtw_get_wpa_ie = 0x1362d; - rtw_get_wpa2_ie = 0x136c9; - rtw_get_wpa_cipher_suite = 0x13701; - rtw_get_wpa2_cipher_suite = 0x13769; - rtw_parse_wpa_ie = 0x137d1; - rtw_parse_wpa2_ie = 0x138ad; - rtw_get_sec_ie = 0x13965; - rtw_get_wps_ie = 0x13a15; - rtw_get_wps_attr = 0x13a99; - rtw_get_wps_attr_content = 0x13b49; - rtw_ieee802_11_parse_elems = 0x13b91; - str_2char2num = 0x13d9d; - key_2char2num = 0x13db9; - convert_ip_addr = 0x13dd1; - rom_psk_PasswordHash = 0x13e9d; - rom_psk_CalcGTK = 0x13ed5; - rom_psk_CalcPTK = 0x13f69; - wep_80211_encrypt = 0x14295; - wep_80211_decrypt = 0x142f5; - tkip_micappendbyte = 0x14389; - rtw_secmicsetkey = 0x143d9; - rtw_secmicappend = 0x14419; - rtw_secgetmic = 0x14435; - rtw_seccalctkipmic = 0x1449d; - tkip_phase1 = 0x145a5; - tkip_phase2 = 0x14725; - tkip_80211_encrypt = 0x14941; - tkip_80211_decrypt = 0x149d5; - aes1_encrypt = 0x14a8d; - aesccmp_construct_mic_iv = 0x14c65; - aesccmp_construct_mic_header1 = 0x14ccd; - aesccmp_construct_mic_header2 = 0x14d21; - aesccmp_construct_ctr_preload = 0x14db5; - aes_80211_encrypt = 0x14e29; - aes_80211_decrypt = 0x151ad; - _sha1_process_message_block = 0x155b9; - _sha1_pad_message = 0x15749; - rt_sha1_init = 0x157e5; - rt_sha1_update = 0x15831; - rt_sha1_finish = 0x158a9; - rt_hmac_sha1 = 0x15909; - rom_aes_128_cbc_encrypt = 0x15a65; - rom_aes_128_cbc_decrypt = 0x15ae1; - rom_rijndaelKeySetupEnc = 0x15b5d; - rom_aes_decrypt_init = 0x15c39; - rom_aes_internal_decrypt = 0x15d15; - rom_aes_decrypt_deinit = 0x16071; - rom_aes_encrypt_init = 0x16085; - rom_aes_internal_encrypt = 0x1609d; - rom_aes_encrypt_deinit = 0x16451; - bignum_init = 0x17b35; - bignum_deinit = 0x17b61; - bignum_get_unsigned_bin_len = 0x17b81; - bignum_get_unsigned_bin = 0x17b85; - bignum_set_unsigned_bin = 0x17c21; - bignum_cmp = 0x17cd1; - bignum_cmp_d = 0x17cd5; - bignum_add = 0x17cfd; - bignum_sub = 0x17d0d; - bignum_mul = 0x17d1d; - bignum_exptmod = 0x17d2d; - WPS_realloc = 0x17d51; - os_zalloc = 0x17d99; - rom_hmac_sha256_vector = 0x17dc1; - rom_hmac_sha256 = 0x17ebd; - rom_sha256_vector = 0x18009; - phy_CalculateBitShift = 0x18221; - PHY_SetBBReg_8195A = 0x18239; - PHY_QueryBBReg_8195A = 0x18279; - ROM_odm_QueryRxPwrPercentage = 0x1829d; - ROM_odm_EVMdbToPercentage = 0x182bd; - ROM_odm_SignalScaleMapping_8195A = 0x182e5; - ROM_odm_FalseAlarmCounterStatistics = 0x183cd; - ROM_odm_SetEDCCAThreshold = 0x18721; - ROM_odm_SetTRxMux = 0x18749; - ROM_odm_SetCrystalCap = 0x18771; - ROM_odm_GetDefaultCrytaltalCap = 0x187d5; - ROM_ODM_CfoTrackingReset = 0x187e9; - ROM_odm_CfoTrackingFlow = 0x18811; - curve25519_donna = 0x1965d; - aes_test_alignment_detection = 0x1a391; - aes_mode_reset = 0x1a3ed; - aes_ecb_encrypt = 0x1a3f9; - aes_ecb_decrypt = 0x1a431; - aes_cbc_encrypt = 0x1a469; - aes_cbc_decrypt = 0x1a579; - aes_cfb_encrypt = 0x1a701; - aes_cfb_decrypt = 0x1a9e5; - aes_ofb_crypt = 0x1acc9; - aes_ctr_crypt = 0x1af7d; - aes_encrypt_key128 = 0x1b289; - aes_encrypt_key192 = 0x1b2a5; - aes_encrypt_key256 = 0x1b2c1; - aes_encrypt_key = 0x1b2e1; - aes_decrypt_key128 = 0x1b351; - aes_decrypt_key192 = 0x1b36d; - aes_decrypt_key256 = 0x1b389; - aes_decrypt_key = 0x1b3a9; - aes_init = 0x1b419; - CRYPTO_chacha_20 = 0x1b41d; - CRYPTO_poly1305_init = 0x1bc25; - CRYPTO_poly1305_update = 0x1bd09; - CRYPTO_poly1305_finish = 0x1bd8d; - rom_sha512_starts = 0x1ceb5; - rom_sha512_update = 0x1d009; - rom_sha512_finish = 0x1d011; - rom_sha512 = 0x1d261; - rom_sha512_hmac_starts = 0x1d299; - rom_sha512_hmac_update = 0x1d35d; - rom_sha512_hmac_finish = 0x1d365; - rom_sha512_hmac_reset = 0x1d3b5; - rom_sha512_hmac = 0x1d3d1; - rom_sha512_hkdf = 0x1d40d; - rom_ed25519_gen_keypair = 0x1d501; - rom_ed25519_gen_signature = 0x1d505; - rom_ed25519_verify_signature = 0x1d51d; - rom_ed25519_crypto_sign_seed_keypair = 0x1d521; - rom_ed25519_crypto_sign_detached = 0x1d579; - rom_ed25519_crypto_sign_verify_detached = 0x1d655; - rom_ed25519_ge_double_scalarmult_vartime = 0x1f86d; - rom_ed25519_ge_frombytes_negate_vartime = 0x1fc35; - rom_ed25519_ge_p3_tobytes = 0x207d5; - rom_ed25519_ge_scalarmult_base = 0x20821; - rom_ed25519_ge_tobytes = 0x209e1; - rom_ed25519_sc_muladd = 0x20a2d; - rom_ed25519_sc_reduce = 0x2603d; - __rtl_memchr_v1_00 = 0x28a4d; - __rtl_memcmp_v1_00 = 0x28ae1; - __rtl_memcpy_v1_00 = 0x28b49; - __rtl_memmove_v1_00 = 0x28bed; - __rtl_memset_v1_00 = 0x28cb5; - __rtl_strcat_v1_00 = 0x28d49; - __rtl_strchr_v1_00 = 0x28d91; - __rtl_strcmp_v1_00 = 0x28e55; - __rtl_strcpy_v1_00 = 0x28ec9; - __rtl_strlen_v1_00 = 0x28f15; - __rtl_strncat_v1_00 = 0x28f69; - __rtl_strncmp_v1_00 = 0x28fc5; - __rtl_strncpy_v1_00 = 0x2907d; - __rtl_strstr_v1_00 = 0x293cd; - __rtl_strsep_v1_00 = 0x2960d; - __rtl_strtok_v1_00 = 0x29619; - __rtl__strtok_r_v1_00 = 0x2962d; - __rtl_strtok_r_v1_00 = 0x29691; - __rtl_close_v1_00 = 0x29699; - __rtl_fstat_v1_00 = 0x296ad; - __rtl_isatty_v1_00 = 0x296c1; - __rtl_lseek_v1_00 = 0x296d5; - __rtl_open_v1_00 = 0x296e9; - __rtl_read_v1_00 = 0x296fd; - __rtl_write_v1_00 = 0x29711; - __rtl_sbrk_v1_00 = 0x29725; - __rtl_ltoa_v1_00 = 0x297bd; - __rtl_ultoa_v1_00 = 0x29855; - __rtl_dtoi_v1_00 = 0x298c5; - __rtl_dtoi64_v1_00 = 0x29945; - __rtl_dtoui_v1_00 = 0x299dd; - __rtl_ftol_v1_00 = 0x299e5; - __rtl_itof_v1_00 = 0x29a51; - __rtl_itod_v1_00 = 0x29ae9; - __rtl_i64tod_v1_00 = 0x29b79; - __rtl_uitod_v1_00 = 0x29c55; - __rtl_ftod_v1_00 = 0x29d2d; - __rtl_dtof_v1_00 = 0x29de9; - __rtl_uitof_v1_00 = 0x29e89; - __rtl_fadd_v1_00 = 0x29f65; - __rtl_fsub_v1_00 = 0x2a261; - __rtl_fmul_v1_00 = 0x2a559; - __rtl_fdiv_v1_00 = 0x2a695; - __rtl_dadd_v1_00 = 0x2a825; - __rtl_dsub_v1_00 = 0x2aed9; - __rtl_dmul_v1_00 = 0x2b555; - __rtl_ddiv_v1_00 = 0x2b8ad; - __rtl_dcmpeq_v1_00 = 0x2be4d; - __rtl_dcmplt_v1_00 = 0x2bebd; - __rtl_dcmpgt_v1_00 = 0x2bf51; - __rtl_dcmple_v1_00 = 0x2c049; - __rtl_fcmplt_v1_00 = 0x2c139; - __rtl_fcmpgt_v1_00 = 0x2c195; - __rtl_cos_f32_v1_00 = 0x2c229; - __rtl_sin_f32_v1_00 = 0x2c435; - __rtl_fabs_v1_00 = 0x2c639; - __rtl_fabsf_v1_00 = 0x2c641; - __rtl_dtoa_r_v1_00 = 0x2c77d; - __rom_mallocr_init_v1_00 = 0x2d7d1; - __rtl_free_r_v1_00 = 0x2d841; - __rtl_malloc_r_v1_00 = 0x2da31; - __rtl_realloc_r_v1_00 = 0x2df55; - __rtl_memalign_r_v1_00 = 0x2e331; - __rtl_valloc_r_v1_00 = 0x2e421; - __rtl_pvalloc_r_v1_00 = 0x2e42d; - __rtl_calloc_r_v1_00 = 0x2e441; - __rtl_cfree_r_v1_00 = 0x2e4a9; - __rtl_Balloc_v1_00 = 0x2e515; - __rtl_Bfree_v1_00 = 0x2e571; - __rtl_i2b_v1_00 = 0x2e585; - __rtl_multadd_v1_00 = 0x2e599; - __rtl_mult_v1_00 = 0x2e629; - __rtl_pow5mult_v1_00 = 0x2e769; - __rtl_hi0bits_v1_00 = 0x2e809; - __rtl_d2b_v1_00 = 0x2e845; - __rtl_lshift_v1_00 = 0x2e901; - __rtl_cmp_v1_00 = 0x2e9bd; - __rtl_diff_v1_00 = 0x2ea01; - __rtl_sread_v1_00 = 0x2eae9; - __rtl_seofread_v1_00 = 0x2eb39; - __rtl_swrite_v1_00 = 0x2eb3d; - __rtl_sseek_v1_00 = 0x2ebc1; - __rtl_sclose_v1_00 = 0x2ec11; - __rtl_sbrk_r_v1_00 = 0x2ec41; - __rtl_fflush_r_v1_00 = 0x2ef8d; - __rtl_vfprintf_r_v1_00 = 0x2f661; - __rtl_fpclassifyd = 0x30c15; - CpkClkTbl = 0x30c68; - ROM_IMG1_VALID_PATTEN = 0x30c80; - SpicCalibrationPattern = 0x30c88; - SpicInitCPUCLK = 0x30c98; - BAUDRATE = 0x30ca8; - OVSR = 0x30d1c; - DIV = 0x30d90; - OVSR_ADJ = 0x30e04; - __AES_rcon = 0x30e78; - __AES_Te4 = 0x30ea0; - I2CDmaChNo = 0x312a0; - UartLogRomCmdTable = 0x316a0; - _HalRuartOp = 0x31700; - _HalGdmaOp = 0x31760; - RTW_WPA_OUI_TYPE = 0x3540c; - WPA_CIPHER_SUITE_NONE = 0x35410; - WPA_CIPHER_SUITE_WEP40 = 0x35414; - WPA_CIPHER_SUITE_TKIP = 0x35418; - WPA_CIPHER_SUITE_CCMP = 0x3541c; - WPA_CIPHER_SUITE_WEP104 = 0x35420; - RSN_CIPHER_SUITE_NONE = 0x35424; - RSN_CIPHER_SUITE_WEP40 = 0x35428; - RSN_CIPHER_SUITE_TKIP = 0x3542c; - RSN_CIPHER_SUITE_CCMP = 0x35430; - RSN_CIPHER_SUITE_WEP104 = 0x35434; - RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X = 0x35444; - RSN_AUTH_KEY_MGMT_UNSPEC_802_1X = 0x35448; - RSN_VERSION_BSD = 0x3544c; - rom_wps_Te0 = 0x35988; - rom_wps_rcons = 0x35d88; - rom_wps_Td4s = 0x35d94; - rom_wps_Td0 = 0x35e94; - NewVectorTable = 0x10000000; - UserIrqFunTable = 0x10000100; - UserIrqDataTable = 0x10000200; - __rom_bss_start__ = 0x10000300; - CfgSysDebugWarn = 0x10000300; - CfgSysDebugInfo = 0x10000304; - CfgSysDebugErr = 0x10000308; - ConfigDebugWarn = 0x1000030c; - ConfigDebugInfo = 0x10000310; - ConfigDebugErr = 0x10000314; - HalTimerOp = 0x10000318; - GPIOState = 0x10000334; - gTimerRecord = 0x1000034c; - SSI_DBG_CONFIG = 0x10000350; - _pHAL_Gpio_Adapter = 0x10000354; - Timer2To7VectorTable = 0x10000358; - pUartLogCtl = 0x10000384; - UartLogBuf = 0x10000388; - UartLogCtl = 0x10000408; - UartLogHistoryBuf = 0x10000430; - ArgvArray = 0x100006ac; - rom_wlan_ram_map = 0x100006d4; - FalseAlmCnt = 0x100006e0; - ROMInfo = 0x10000720; - DM_CfoTrack = 0x10000738; - rom_libgloss_ram_map = 0x10000760; - __rtl_errno = 0x10000bc4; - _rtl_impure_ptr = 0x10001c60; -} - +INCLUDE "mbed-os/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a_rom.h" /* DATA_RAM: We cannot put Code(.text) in DATA_RAM, this region is reserved for Image1(boot loader). But we can put .data/.bss of Image2 in this region */ MEMORY { TCM (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 0x00010000 - ROM_USED_RAM (rwx) : ORIGIN = 0x10000bc8, LENGTH = 0x10006000-0x10000bc8 - DATA_RAM (rwx) : ORIGIN = 0x10002100, LENGTH = 0x10006000 - 0x10002100 - BD_RAM (rwx) : ORIGIN = 0x10006000, LENGTH = 0x10070000 - 0x10006000 - SD_RAM (rwx) : ORIGIN = 0x30000000, LENGTH = 2M + DATA_RAM (rwx) : ORIGIN = 0x10002100, LENGTH = 0x10007000 - 0x10002100 + SRAM1 (rwx) : ORIGIN = 0x10007000, LENGTH = 0x10070000 - 0x10007000 + SRAM2 (rwx) : ORIGIN = 0x30000000, LENGTH = 2M } +/* Stack sizes: */ +StackSize = 0x1000; + /* Linker script to place sections and symbol values. Should be used together * with other linker script that defines memory regions FLASH and RAM. * It references following symbols, which must be defined in code: @@ -705,32 +58,28 @@ ENTRY(Reset_Handler) SECTIONS { - __rom_bss_start__ = 0x10000300; - __rom_bss_end__ = 0x10000bc8; - __ram_table_start__ = 0x10000bc8; -/* - .ram.start.table : - { - - } > ROM_USED_RAM -*/ .image2.table : { - __image2_start__ = .; - __image2_entry_func__ = .; KEEP(*(SORT(.image2.ram.data*))) - __image2_validate_code__ = .; KEEP(*(.image2.validate.rodata*)) - } > BD_RAM + } > SRAM2 + + .text.sram1 : + { + . = ALIGN(4); + *rtl8195a_crypto.o (.text* .rodata*) + *mbedtls*.o (.text* .rodata*) + *libc.a: (.text* .rodata*) + } > SRAM1 - .text : + .text.sram2 : { . = ALIGN(4); - *(.infra.ram.start*) *(.mon.ram.text*) *(.hal.flash.text*) *(.hal.sdrc.text*) *(.hal.gpio.text*) + *(.text*) KEEP(*(.init)) KEEP(*(.fini)) @@ -748,14 +97,26 @@ SECTIONS *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) *(SORT(.dtors.*)) *(.dtors) - *(.rodata*) + + *(.rodata*) + KEEP(*(.eh_frame*)) - } > BD_RAM + } > SRAM2 __etext = .; - __data_start__ = .; - .data : + + .data.sram1 : + { + . = ALIGN(4); + __sdram_data_start__ = .; + *rtl8195a_crypto*.o (.data*) + *mbedtls*.o (.data*) + *(.sdram.data*) + __sdram_data_end__ = .; + } > SRAM1 + + .data.sram2 : { *(vtable) *(.data*) @@ -783,79 +144,74 @@ SECTIONS . = ALIGN(4); /* All data end */ - } > BD_RAM + } > SRAM2 __data_end__ = .; __image2_end__ = .; .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) - } > BD_RAM + } > SRAM2 __exidx_start = .; .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > BD_RAM + } > SRAM2 __exidx_end = .; - .bss : + .bss.sram1 (NOLOAD) : + { + __bss_sram1_start__ = .; + *rtl8195a_crypto.o (.bss* COMMON) + *mbedtls*.o (.bss* COMMON) + *(.bss.thread_stack_main) + __bss_sram1_end__ = .; + } > SRAM1 + + .bss.sram2 (NOLOAD) : { __bss_start__ = .; + __bss_sram2_start__ = .; *(.bss*) - *(.bdsram.data*) *(COMMON) + *(.bdsram.data*) + __bss_sram2_end__ = .; __bss_end__ = .; - } > BD_RAM - + } > SRAM2 .bf_data : { __buffer_data_start__ = .; *(.bfsram.data*) __buffer_data_end__ = .; - } > BD_RAM + } > SRAM2 - .heap : + .heap (NOLOAD): { __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(SRAM1) + LENGTH(SRAM1) - StackSize; __HeapLimit = .; - } > BD_RAM + } > SRAM1 - .TCM_overlay : - { - *lwip_mem.o (.bss*) - *lwip_memp.o (.bss*) - *(.tcm.heap*) - } > TCM - /* .stack_dummy section doesn't contains any symbols. It is only * used for linker to calculate size of stack sections, and assign * values to stack symbols later */ - .stack_dummy : + .stack_dummy (NOLOAD): { + __StackLimit = .; *(.stack) - } > BD_RAM - - .sdr_all : - { - __sdram_data_start__ = .; - *(.text*) - __sdram_data_end__ = .; - __sdram_bss_start__ = .; - __sdram_bss_end__ = .; - } > SD_RAM + . += StackSize - (. - __StackLimit); + } > SRAM1 /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ - __StackTop = ORIGIN(BD_RAM) + LENGTH(BD_RAM); + __StackTop = ORIGIN(SRAM1) + LENGTH(SRAM1); __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ ASSERT(__StackLimit >= __HeapLimit, "region RAM exceeds ram limit") - } - diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a_rom.h b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a_rom.h new file mode 100644 index 00000000000..e9a2754ff8e --- /dev/null +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a_rom.h @@ -0,0 +1,759 @@ +/* + * Copyright (c) 2013-2016 Realtek Semiconductor Corp. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +SECTIONS +{ + __vectors_table = 0x0; + Reset_Handler = 0x101; + NMI_Handler = 0x109; + HardFault_Handler = 0x10d; + MemManage_Handler = 0x121; + BusFault_Handler = 0x125; + UsageFault_Handler = 0x129; + HalLogUartInit = 0x201; + HalSerialPutcRtl8195a = 0x2d9; + HalSerialGetcRtl8195a = 0x309; + HalSerialGetIsrEnRegRtl8195a = 0x329; + HalSerialSetIrqEnRegRtl8195a = 0x335; + HalCpuClkConfig = 0x341; + HalGetCpuClk = 0x355; + HalRomInfo = 0x39d; + HalGetRomInfo = 0x3b5; + HalResetVsr = 0x3c5; + HalDelayUs = 0x899; + HalNMIHandler = 0x8e1; + HalHardFaultHandler = 0x911; + HalMemManageHandler = 0xc09; + HalBusFaultHandler = 0xc39; + HalUsageFaultHandler = 0xc69; + HalUart0PinCtrlRtl8195A = 0xcfd; + HalUart1PinCtrlRtl8195A = 0xdc9; + HalUart2PinCtrlRtl8195A = 0xe9d; + HalSPI0PinCtrlRtl8195A = 0xf75; + HalSPI1PinCtrlRtl8195A = 0x1015; + HalSPI2PinCtrlRtl8195A = 0x10e5; + HalSPI0MCSPinCtrlRtl8195A = 0x11b5; + HalI2C0PinCtrlRtl8195A = 0x1275; + HalI2C1PinCtrlRtl8195A = 0x1381; + HalI2C2PinCtrlRtl8195A = 0x1459; + HalI2C3PinCtrlRtl8195A = 0x1529; + HalI2S0PinCtrlRtl8195A = 0x1639; + HalI2S1PinCtrlRtl8195A = 0x176d; + HalPCM0PinCtrlRtl8195A = 0x1845; + HalPCM1PinCtrlRtl8195A = 0x1949; + HalSDIODPinCtrlRtl8195A = 0x1a1d; + HalSDIOHPinCtrlRtl8195A = 0x1a6d; + HalMIIPinCtrlRtl8195A = 0x1ab9; + HalWLLEDPinCtrlRtl8195A = 0x1b51; + HalWLANT0PinCtrlRtl8195A = 0x1c0d; + HalWLANT1PinCtrlRtl8195A = 0x1c61; + HalWLBTCOEXPinCtrlRtl8195A = 0x1cb5; + HalWLBTCMDPinCtrlRtl8195A = 0x1d05; + HalNFCPinCtrlRtl8195A = 0x1d59; + HalPWM0PinCtrlRtl8195A = 0x1da9; + HalPWM1PinCtrlRtl8195A = 0x1ead; + HalPWM2PinCtrlRtl8195A = 0x1fb5; + HalPWM3PinCtrlRtl8195A = 0x20b1; + HalETE0PinCtrlRtl8195A = 0x21b9; + HalETE1PinCtrlRtl8195A = 0x22c1; + HalETE2PinCtrlRtl8195A = 0x23c9; + HalETE3PinCtrlRtl8195A = 0x24d1; + HalEGTIMPinCtrlRtl8195A = 0x25d9; + HalSPIFlashPinCtrlRtl8195A = 0x2679; + HalSDRPinCtrlRtl8195A = 0x2725; + HalJTAGPinCtrlRtl8195A = 0x280d; + HalTRACEPinCtrlRtl8195A = 0x2861; + HalLOGUartPinCtrlRtl8195A = 0x28b9; + HalLOGUartIRPinCtrlRtl8195A = 0x291d; + HalSICPinCtrlRtl8195A = 0x2981; + HalEEPROMPinCtrlRtl8195A = 0x29d9; + HalDEBUGPinCtrlRtl8195A = 0x2a31; + HalPinCtrlRtl8195A = 0x2b39; + SpicRxCmdRtl8195A = 0x2e5d; + SpicWaitBusyDoneRtl8195A = 0x2ea5; + SpicGetFlashStatusRtl8195A = 0x2eb5; + SpicWaitWipDoneRtl8195A = 0x2f55; + SpicTxCmdRtl8195A = 0x2f6d; + SpicSetFlashStatusRtl8195A = 0x2fc1; + SpicCmpDataForCalibrationRtl8195A = 0x3049; + SpicLoadInitParaFromClockRtl8195A = 0x3081; + SpicInitRtl8195A = 0x30e5; + SpicEraseFlashRtl8195A = 0x31bd; + SpiFlashApp = 0x3279; + HalPeripheralIntrHandle = 0x33b5; + HalSysOnIntrHandle = 0x3439; + HalWdgIntrHandle = 0x3485; + HalTimer0IntrHandle = 0x34d5; + HalTimer1IntrHandle = 0x3525; + HalI2C3IntrHandle = 0x3575; + HalTimer2To7IntrHandle = 0x35c5; + HalSpi0IntrHandle = 0x3615; + HalGpioIntrHandle = 0x3665; + HalUart0IntrHandle = 0x36b5; + HalSpiFlashIntrHandle = 0x3705; + HalUsbOtgIntrHandle = 0x3755; + HalSdioHostIntrHandle = 0x37a5; + HalI2s0OrPcm0IntrHandle = 0x37f5; + HalI2s1OrPcm1IntrHandle = 0x3845; + HalWlDmaIntrHandle = 0x3895; + HalWlProtocolIntrHandle = 0x38e5; + HalCryptoIntrHandle = 0x3935; + HalGmacIntrHandle = 0x3985; + HalGdma0Ch0IntrHandle = 0x39d5; + HalGdma0Ch1IntrHandle = 0x3a25; + HalGdma0Ch2IntrHandle = 0x3a75; + HalGdma0Ch3IntrHandle = 0x3ac5; + HalGdma0Ch4IntrHandle = 0x3b15; + HalGdma0Ch5IntrHandle = 0x3b65; + HalGdma1Ch0IntrHandle = 0x3bb5; + HalGdma1Ch1IntrHandle = 0x3c05; + HalGdma1Ch2IntrHandle = 0x3c55; + HalGdma1Ch3IntrHandle = 0x3ca5; + HalGdma1Ch4IntrHandle = 0x3cf5; + HalGdma1Ch5IntrHandle = 0x3d45; + HalSdioDeviceIntrHandle = 0x3d95; + VectorTableInitRtl8195A = 0x3de5; + VectorTableInitForOSRtl8195A = 0x4019; + VectorIrqRegisterRtl8195A = 0x4029; + VectorIrqUnRegisterRtl8195A = 0x4091; + VectorIrqEnRtl8195A = 0x40f1; + VectorIrqDisRtl8195A = 0x418d; + _UartRxDmaIrqHandle = 0x422d; + HalRuartPutCRtl8195a = 0x4281; + HalRuartGetCRtl8195a = 0x429d; + HalRuartRTSCtrlRtl8195a = 0x42bd; + HalRuartGetDebugValueRtl8195a = 0x42e1; + HalRuartGetIMRRtl8195a = 0x43e1; + HalRuartSetIMRRtl8195a = 0x442d; + _UartIrqHandle = 0x4465; + HalRuartDmaInitRtl8195a = 0x4681; + HalRuartIntDisableRtl8195a = 0x4845; + HalRuartDeInitRtl8195a = 0x4855; + HalRuartIntEnableRtl8195a = 0x4985; + _UartTxDmaIrqHandle = 0x4995; + HalRuartRegIrqRtl8195a = 0x49d1; + HalRuartAdapterLoadDefRtl8195a = 0x4a4d; + HalRuartTxGdmaLoadDefRtl8195a = 0x4add; + HalRuartRxGdmaLoadDefRtl8195a = 0x4bc9; + RuartLock = 0x4cc9; + RuartUnLock = 0x4ced; + HalRuartIntSendRtl8195a = 0x4d09; + HalRuartDmaSendRtl8195a = 0x4e35; + HalRuartStopSendRtl8195a = 0x4f89; + HalRuartIntRecvRtl8195a = 0x504d; + HalRuartDmaRecvRtl8195a = 0x51ad; + HalRuartStopRecvRtl8195a = 0x52cd; + RuartIsTimeout = 0x5385; + HalRuartSendRtl8195a = 0x53b1; + HalRuartRecvRtl8195a = 0x5599; + RuartResetRxFifoRtl8195a = 0x5751; + HalRuartResetRxFifoRtl8195a = 0x5775; + HalRuartInitRtl8195a = 0x5829; + HalGdmaOnOffRtl8195a = 0x5df1; + HalGdmaChIsrEnAndDisRtl8195a = 0x5e0d; + HalGdmaChEnRtl8195a = 0x5e51; + HalGdmaChDisRtl8195a = 0x5e6d; + HalGdamChInitRtl8195a = 0x5e91; + HalGdmaChSetingRtl8195a = 0x5ebd; + HalGdmaChBlockSetingRtl8195a = 0x60dd; + HalGdmaChIsrCleanRtl8195a = 0x6419; + HalGdmaChCleanAutoSrcRtl8195a = 0x64a1; + HalGdmaChCleanAutoDstRtl8195a = 0x6501; + HalEFUSEPowerSwitch8195AROM = 0x6561; + HALEFUSEOneByteReadROM = 0x65f9; + HALEFUSEOneByteWriteROM = 0x6699; + __rtl_memcmpb_v1_00 = 0x681d; + __rtl_random_v1_00 = 0x6861; + __rtl_align_to_be32_v1_00 = 0x6881; + __rtl_memsetw_v1_00 = 0x6899; + __rtl_memsetb_v1_00 = 0x68ad; + __rtl_memcpyw_v1_00 = 0x68bd; + __rtl_memcpyb_v1_00 = 0x68dd; + __rtl_memDump_v1_00 = 0x68f5; + __rtl_AES_set_encrypt_key = 0x6901; + __rtl_cryptoEngine_AES_set_decrypt_key = 0x6c11; + __rtl_cryptoEngine_set_security_mode_v1_00 = 0x6c95; + __rtl_cryptoEngine_init_v1_00 = 0x6ea9; + __rtl_cryptoEngine_exit_v1_00 = 0x7055; + __rtl_cryptoEngine_reset_v1_00 = 0x70b1; + __rtl_cryptoEngine_v1_00 = 0x70ed; + __rtl_crypto_cipher_init_v1_00 = 0x7c69; + __rtl_crypto_cipher_encrypt_v1_00 = 0x7c89; + __rtl_crypto_cipher_decrypt_v1_00 = 0x7cad; + HalSsiPinmuxEnableRtl8195a = 0x7cd5; + HalSsiEnableRtl8195a = 0x7e45; + HalSsiDisableRtl8195a = 0x7ef9; + HalSsiLoadSettingRtl8195a = 0x7fad; + HalSsiSetInterruptMaskRtl8195a = 0x8521; + HalSsiGetInterruptMaskRtl8195a = 0x85c9; + HalSsiSetSclkPolarityRtl8195a = 0x863d; + HalSsiSetSclkPhaseRtl8195a = 0x8715; + HalSsiWriteRtl8195a = 0x87e9; + HalSsiSetDeviceRoleRtl8195a = 0x8861; + HalSsiSetRxFifoThresholdLevelRtl8195a = 0x88c9; + HalSsiSetTxFifoThresholdLevelRtl8195a = 0x8941; + HalSsiReadRtl8195a = 0x89b9; + HalSsiGetRxFifoLevelRtl8195a = 0x8a2d; + HalSsiGetTxFifoLevelRtl8195a = 0x8aa5; + HalSsiGetStatusRtl8195a = 0x8b1d; + HalSsiWriteableRtl8195a = 0x8b91; + HalSsiReadableRtl8195a = 0x8c09; + HalSsiBusyRtl8195a = 0x8c81; + HalSsiReadInterruptRtl8195a = 0x8cf9; + HalSsiWriteInterruptRtl8195a = 0x8efd; + HalSsiSetSlaveEnableRegisterRtl8195a = 0x9009; + HalSsiGetInterruptStatusRtl8195a = 0x90d9; + HalSsiInterruptEnableRtl8195a = 0x914d; + HalSsiInterruptDisableRtl8195a = 0x9299; + HalSsiGetRawInterruptStatusRtl8195a = 0x93e9; + HalSsiGetSlaveEnableRegisterRtl8195a = 0x945d; + HalSsiInitRtl8195a = 0x94d1; + _SsiReadInterrupt = 0x9ba5; + _SsiWriteInterrupt = 0x9db1; + _SsiIrqHandle = 0x9eb1; + HalI2CWrite32 = 0xa061; + HalI2CRead32 = 0xa09d; + HalI2CDeInit8195a = 0xa0dd; + HalI2CSendRtl8195a = 0xa1f1; + HalI2CReceiveRtl8195a = 0xa25d; + HalI2CEnableRtl8195a = 0xa271; + HalI2CIntrCtrl8195a = 0xa389; + HalI2CReadRegRtl8195a = 0xa3a1; + HalI2CWriteRegRtl8195a = 0xa3b1; + HalI2CSetCLKRtl8195a = 0xa3c5; + HalI2CMassSendRtl8195a = 0xa6e9; + HalI2CClrIntrRtl8195a = 0xa749; + HalI2CClrAllIntrRtl8195a = 0xa761; + HalI2CInit8195a = 0xa775; + HalI2CDMACtrl8195a = 0xaa31; + RtkI2CIoCtrl = 0xaa61; + RtkI2CPowerCtrl = 0xaa65; + HalI2COpInit = 0xaa69; + I2CIsTimeout = 0xac65; + I2CTXGDMAISRHandle = 0xb435; + I2CRXGDMAISRHandle = 0xb4c1; + RtkI2CIrqInit = 0xb54d; + RtkI2CIrqDeInit = 0xb611; + RtkI2CPinMuxInit = 0xb675; + RtkI2CPinMuxDeInit = 0xb7c9; + RtkI2CDMAInit = 0xb955; + RtkI2CInit = 0xbc95; + RtkI2CDMADeInit = 0xbdad; + RtkI2CDeInit = 0xbe4d; + RtkI2CSendUserAddr = 0xbee5; + RtkI2CSend = 0xc07d; + RtkI2CLoadDefault = 0xce51; + RtkSalI2COpInit = 0xcf21; + HalI2SWrite32 = 0xcf65; + HalI2SRead32 = 0xcf85; + HalI2SDeInitRtl8195a = 0xcfa9; + HalI2STxRtl8195a = 0xcfc9; + HalI2SRxRtl8195a = 0xd011; + HalI2SEnableRtl8195a = 0xd05d; + HalI2SIntrCtrlRtl8195a = 0xd0b1; + HalI2SReadRegRtl8195a = 0xd0d1; + HalI2SClrIntrRtl8195a = 0xd0dd; + HalI2SClrAllIntrRtl8195a = 0xd0fd; + HalI2SInitRtl8195a = 0xd11d; + GPIO_GetIPPinName_8195a = 0xd2e5; + GPIO_GetChipPinName_8195a = 0xd331; + GPIO_PullCtrl_8195a = 0xd39d; + GPIO_FuncOn_8195a = 0xd421; + GPIO_FuncOff_8195a = 0xd481; + GPIO_Int_Mask_8195a = 0xd4e9; + GPIO_Int_SetType_8195a = 0xd511; + HAL_GPIO_IrqHandler_8195a = 0xd5fd; + HAL_GPIO_MbedIrqHandler_8195a = 0xd645; + HAL_GPIO_UserIrqHandler_8195a = 0xd6a1; + HAL_GPIO_IntCtrl_8195a = 0xd6cd; + HAL_GPIO_Init_8195a = 0xd805; + HAL_GPIO_DeInit_8195a = 0xdac1; + HAL_GPIO_ReadPin_8195a = 0xdbd1; + HAL_GPIO_WritePin_8195a = 0xdc91; + HAL_GPIO_RegIrq_8195a = 0xddad; + HAL_GPIO_UnRegIrq_8195a = 0xddf5; + HAL_GPIO_UserRegIrq_8195a = 0xde15; + HAL_GPIO_UserUnRegIrq_8195a = 0xdef9; + HAL_GPIO_MaskIrq_8195a = 0xdfc1; + HAL_GPIO_UnMaskIrq_8195a = 0xe061; + HAL_GPIO_IntDebounce_8195a = 0xe101; + HAL_GPIO_GetIPPinName_8195a = 0xe1c1; + HAL_GPIO_PullCtrl_8195a = 0xe1c9; + DumpForOneBytes = 0xe259; + CmdRomHelp = 0xe419; + CmdWriteWord = 0xe491; + CmdDumpHelfWord = 0xe505; + CmdDumpWord = 0xe5f1; + CmdDumpByte = 0xe6f5; + CmdSpiFlashTool = 0xe751; + GetRomCmdNum = 0xe7a9; + CmdWriteByte = 0xe7ad; + Isspace = 0xe7ed; + Strtoul = 0xe801; + ArrayInitialize = 0xe8b1; + GetArgc = 0xe8c9; + GetArgv = 0xe8f9; + UartLogCmdExecute = 0xe95d; + UartLogShowBackSpace = 0xe9fd; + UartLogRecallOldCmd = 0xea39; + UartLogHistoryCmd = 0xea71; + UartLogCmdChk = 0xeadd; + UartLogIrqHandle = 0xebf5; + RtlConsolInit = 0xecc5; + RtlConsolTaskRom = 0xed49; + RtlExitConsol = 0xed79; + RtlConsolRom = 0xedcd; + HalTimerOpInit = 0xee0d; + HalTimerIrq2To7Handle = 0xee59; + HalGetTimerIdRtl8195a = 0xef09; + HalTimerInitRtl8195a = 0xef3d; + HalTimerDisRtl8195a = 0xf069; + HalTimerEnRtl8195a = 0xf089; + HalTimerReadCountRtl8195a = 0xf0a9; + HalTimerIrqClearRtl8195a = 0xf0bd; + HalTimerDumpRegRtl8195a = 0xf0d1; + VSprintf = 0xf129; + DiagPrintf = 0xf39d; + DiagSPrintf = 0xf3b9; + DiagSnPrintf = 0xf3d1; + prvDiagPrintf = 0xf3ed; + prvDiagSPrintf = 0xf40d; + _memcmp = 0xf429; + _memcpy = 0xf465; + _memset = 0xf511; + __memcmp = 0xf429; + __memcpy = 0xf465; + __memset = 0xf511; + Rand = 0xf585; + _strncpy = 0xf60d; + _strcpy = 0xf629; + __strncpy = 0xf60d; + __strcpy = 0xf629; + prvStrCpy = 0xf639; + _strlen = 0xf651; + _strnlen = 0xf669; + __strlen = 0xf651; + __strnlen = 0xf669; + prvStrLen = 0xf699; + _strcmp = 0xf6b1; + _strncmp = 0xf6d1; + __strcmp = 0xf6b1; + __strncmp = 0xf6d1; + prvStrCmp = 0xf719; + StrUpr = 0xf749; + prvAtoi = 0xf769; + prvStrStr = 0xf7bd; + _strsep = 0xf7d5; + __strsep = 0xf7d5; + skip_spaces = 0xf815; + skip_atoi = 0xf831; + _parse_integer_fixup_radix = 0xf869; + _parse_integer = 0xf8bd; + simple_strtoull = 0xf915; + simple_strtoll = 0xf945; + simple_strtoul = 0xf965; + simple_strtol = 0xf96d; + _vsscanf = 0xf985; + _sscanf = 0xff71; + div_u64 = 0xff91; + div_s64 = 0xff99; + div_u64_rem = 0xffa1; + div_s64_rem = 0xffb1; + __strpbrk = 0xffc1; + __strchr = 0xffed; + aes_set_key = 0x10005; + aes_encrypt = 0x103d1; + aes_decrypt = 0x114a5; + AES_WRAP = 0x125c9; + AES_UnWRAP = 0x12701; + crc32_get = 0x12861; + arc4_byte = 0x12895; + rt_arc4_init = 0x128bd; + rt_arc4_crypt = 0x12901; + rt_md5_init = 0x131c1; + rt_md5_append = 0x131f5; + rt_md5_final = 0x1327d; + rt_md5_hmac = 0x132d5; + rtw_get_bit_value_from_ieee_value = 0x13449; + rtw_is_cckrates_included = 0x13475; + rtw_is_cckratesonly_included = 0x134b5; + rtw_check_network_type = 0x134dd; + rtw_set_fixed_ie = 0x1350d; + rtw_set_ie = 0x1352d; + rtw_get_ie = 0x1355d; + rtw_set_supported_rate = 0x13591; + rtw_get_rateset_len = 0x13611; + rtw_get_wpa_ie = 0x1362d; + rtw_get_wpa2_ie = 0x136c9; + rtw_get_wpa_cipher_suite = 0x13701; + rtw_get_wpa2_cipher_suite = 0x13769; + rtw_parse_wpa_ie = 0x137d1; + rtw_parse_wpa2_ie = 0x138ad; + rtw_get_sec_ie = 0x13965; + rtw_get_wps_ie = 0x13a15; + rtw_get_wps_attr = 0x13a99; + rtw_get_wps_attr_content = 0x13b49; + rtw_ieee802_11_parse_elems = 0x13b91; + str_2char2num = 0x13d9d; + key_2char2num = 0x13db9; + convert_ip_addr = 0x13dd1; + rom_psk_PasswordHash = 0x13e9d; + rom_psk_CalcGTK = 0x13ed5; + rom_psk_CalcPTK = 0x13f69; + wep_80211_encrypt = 0x14295; + wep_80211_decrypt = 0x142f5; + tkip_micappendbyte = 0x14389; + rtw_secmicsetkey = 0x143d9; + rtw_secmicappend = 0x14419; + rtw_secgetmic = 0x14435; + rtw_seccalctkipmic = 0x1449d; + tkip_phase1 = 0x145a5; + tkip_phase2 = 0x14725; + tkip_80211_encrypt = 0x14941; + tkip_80211_decrypt = 0x149d5; + aes1_encrypt = 0x14a8d; + aesccmp_construct_mic_iv = 0x14c65; + aesccmp_construct_mic_header1 = 0x14ccd; + aesccmp_construct_mic_header2 = 0x14d21; + aesccmp_construct_ctr_preload = 0x14db5; + aes_80211_encrypt = 0x14e29; + aes_80211_decrypt = 0x151ad; + _sha1_process_message_block = 0x155b9; + _sha1_pad_message = 0x15749; + rt_sha1_init = 0x157e5; + rt_sha1_update = 0x15831; + rt_sha1_finish = 0x158a9; + rt_hmac_sha1 = 0x15909; + rom_aes_128_cbc_encrypt = 0x15a65; + rom_aes_128_cbc_decrypt = 0x15ae1; + rom_rijndaelKeySetupEnc = 0x15b5d; + rom_aes_decrypt_init = 0x15c39; + rom_aes_internal_decrypt = 0x15d15; + rom_aes_decrypt_deinit = 0x16071; + rom_aes_encrypt_init = 0x16085; + rom_aes_internal_encrypt = 0x1609d; + rom_aes_encrypt_deinit = 0x16451; + bignum_init = 0x17b35; + bignum_deinit = 0x17b61; + bignum_get_unsigned_bin_len = 0x17b81; + bignum_get_unsigned_bin = 0x17b85; + bignum_set_unsigned_bin = 0x17c21; + bignum_cmp = 0x17cd1; + bignum_cmp_d = 0x17cd5; + bignum_add = 0x17cfd; + bignum_sub = 0x17d0d; + bignum_mul = 0x17d1d; + bignum_exptmod = 0x17d2d; + WPS_realloc = 0x17d51; + os_zalloc = 0x17d99; + rom_hmac_sha256_vector = 0x17dc1; + rom_hmac_sha256 = 0x17ebd; + rom_sha256_vector = 0x18009; + phy_CalculateBitShift = 0x18221; + PHY_SetBBReg_8195A = 0x18239; + PHY_QueryBBReg_8195A = 0x18279; + ROM_odm_QueryRxPwrPercentage = 0x1829d; + ROM_odm_EVMdbToPercentage = 0x182bd; + ROM_odm_SignalScaleMapping_8195A = 0x182e5; + ROM_odm_FalseAlarmCounterStatistics = 0x183cd; + ROM_odm_SetEDCCAThreshold = 0x18721; + ROM_odm_SetTRxMux = 0x18749; + ROM_odm_SetCrystalCap = 0x18771; + ROM_odm_GetDefaultCrytaltalCap = 0x187d5; + ROM_ODM_CfoTrackingReset = 0x187e9; + ROM_odm_CfoTrackingFlow = 0x18811; + curve25519_donna = 0x1965d; + aes_test_alignment_detection = 0x1a391; + aes_mode_reset = 0x1a3ed; + aes_ecb_encrypt = 0x1a3f9; + aes_ecb_decrypt = 0x1a431; + aes_cbc_encrypt = 0x1a469; + aes_cbc_decrypt = 0x1a579; + aes_cfb_encrypt = 0x1a701; + aes_cfb_decrypt = 0x1a9e5; + aes_ofb_crypt = 0x1acc9; + aes_ctr_crypt = 0x1af7d; + aes_encrypt_key128 = 0x1b289; + aes_encrypt_key192 = 0x1b2a5; + aes_encrypt_key256 = 0x1b2c1; + aes_encrypt_key = 0x1b2e1; + aes_decrypt_key128 = 0x1b351; + aes_decrypt_key192 = 0x1b36d; + aes_decrypt_key256 = 0x1b389; + aes_decrypt_key = 0x1b3a9; + aes_init = 0x1b419; + CRYPTO_chacha_20 = 0x1b41d; + CRYPTO_poly1305_init = 0x1bc25; + CRYPTO_poly1305_update = 0x1bd09; + CRYPTO_poly1305_finish = 0x1bd8d; + rom_sha512_starts = 0x1ceb5; + rom_sha512_update = 0x1d009; + rom_sha512_finish = 0x1d011; + rom_sha512 = 0x1d261; + rom_sha512_hmac_starts = 0x1d299; + rom_sha512_hmac_update = 0x1d35d; + rom_sha512_hmac_finish = 0x1d365; + rom_sha512_hmac_reset = 0x1d3b5; + rom_sha512_hmac = 0x1d3d1; + rom_sha512_hkdf = 0x1d40d; + rom_ed25519_gen_keypair = 0x1d501; + rom_ed25519_gen_signature = 0x1d505; + rom_ed25519_verify_signature = 0x1d51d; + rom_ed25519_crypto_sign_seed_keypair = 0x1d521; + rom_ed25519_crypto_sign_detached = 0x1d579; + rom_ed25519_crypto_sign_verify_detached = 0x1d655; + rom_ed25519_ge_double_scalarmult_vartime = 0x1f86d; + rom_ed25519_ge_frombytes_negate_vartime = 0x1fc35; + rom_ed25519_ge_p3_tobytes = 0x207d5; + rom_ed25519_ge_scalarmult_base = 0x20821; + rom_ed25519_ge_tobytes = 0x209e1; + rom_ed25519_sc_muladd = 0x20a2d; + rom_ed25519_sc_reduce = 0x2603d; + __rtl_memchr_v1_00 = 0x28a4d; + __rtl_memcmp_v1_00 = 0x28ae1; + __rtl_memcpy_v1_00 = 0x28b49; + __rtl_memmove_v1_00 = 0x28bed; + __rtl_memset_v1_00 = 0x28cb5; + __rtl_strcat_v1_00 = 0x28d49; + __rtl_strchr_v1_00 = 0x28d91; + __rtl_strcmp_v1_00 = 0x28e55; + __rtl_strcpy_v1_00 = 0x28ec9; + __rtl_strlen_v1_00 = 0x28f15; + __rtl_strncat_v1_00 = 0x28f69; + __rtl_strncmp_v1_00 = 0x28fc5; + __rtl_strncpy_v1_00 = 0x2907d; + __rtl_strstr_v1_00 = 0x293cd; + __rtl_strsep_v1_00 = 0x2960d; + __rtl_strtok_v1_00 = 0x29619; + __rtl__strtok_r_v1_00 = 0x2962d; + __rtl_strtok_r_v1_00 = 0x29691; + __rtl_close_v1_00 = 0x29699; + __rtl_fstat_v1_00 = 0x296ad; + __rtl_isatty_v1_00 = 0x296c1; + __rtl_lseek_v1_00 = 0x296d5; + __rtl_open_v1_00 = 0x296e9; + __rtl_read_v1_00 = 0x296fd; + __rtl_write_v1_00 = 0x29711; + __rtl_sbrk_v1_00 = 0x29725; + __rtl_ltoa_v1_00 = 0x297bd; + __rtl_ultoa_v1_00 = 0x29855; + __rtl_dtoi_v1_00 = 0x298c5; + __rtl_dtoi64_v1_00 = 0x29945; + __rtl_dtoui_v1_00 = 0x299dd; + __rtl_ftol_v1_00 = 0x299e5; + __rtl_itof_v1_00 = 0x29a51; + __rtl_itod_v1_00 = 0x29ae9; + __rtl_i64tod_v1_00 = 0x29b79; + __rtl_uitod_v1_00 = 0x29c55; + __rtl_ftod_v1_00 = 0x29d2d; + __rtl_dtof_v1_00 = 0x29de9; + __rtl_uitof_v1_00 = 0x29e89; + __rtl_fadd_v1_00 = 0x29f65; + __rtl_fsub_v1_00 = 0x2a261; + __rtl_fmul_v1_00 = 0x2a559; + __rtl_fdiv_v1_00 = 0x2a695; + __rtl_dadd_v1_00 = 0x2a825; + __rtl_dsub_v1_00 = 0x2aed9; + __rtl_dmul_v1_00 = 0x2b555; + __rtl_ddiv_v1_00 = 0x2b8ad; + __rtl_dcmpeq_v1_00 = 0x2be4d; + __rtl_dcmplt_v1_00 = 0x2bebd; + __rtl_dcmpgt_v1_00 = 0x2bf51; + __rtl_dcmple_v1_00 = 0x2c049; + __rtl_fcmplt_v1_00 = 0x2c139; + __rtl_fcmpgt_v1_00 = 0x2c195; + __rtl_cos_f32_v1_00 = 0x2c229; + __rtl_sin_f32_v1_00 = 0x2c435; + __rtl_fabs_v1_00 = 0x2c639; + __rtl_fabsf_v1_00 = 0x2c641; + __rtl_dtoa_r_v1_00 = 0x2c77d; + __rom_mallocr_init_v1_00 = 0x2d7d1; + __rtl_free_r_v1_00 = 0x2d841; + __rtl_malloc_r_v1_00 = 0x2da31; + __rtl_realloc_r_v1_00 = 0x2df55; + __rtl_memalign_r_v1_00 = 0x2e331; + __rtl_valloc_r_v1_00 = 0x2e421; + __rtl_pvalloc_r_v1_00 = 0x2e42d; + __rtl_calloc_r_v1_00 = 0x2e441; + __rtl_cfree_r_v1_00 = 0x2e4a9; + __rtl_Balloc_v1_00 = 0x2e515; + __rtl_Bfree_v1_00 = 0x2e571; + __rtl_i2b_v1_00 = 0x2e585; + __rtl_multadd_v1_00 = 0x2e599; + __rtl_mult_v1_00 = 0x2e629; + __rtl_pow5mult_v1_00 = 0x2e769; + __rtl_hi0bits_v1_00 = 0x2e809; + __rtl_d2b_v1_00 = 0x2e845; + __rtl_lshift_v1_00 = 0x2e901; + __rtl_cmp_v1_00 = 0x2e9bd; + __rtl_diff_v1_00 = 0x2ea01; + __rtl_sread_v1_00 = 0x2eae9; + __rtl_seofread_v1_00 = 0x2eb39; + __rtl_swrite_v1_00 = 0x2eb3d; + __rtl_sseek_v1_00 = 0x2ebc1; + __rtl_sclose_v1_00 = 0x2ec11; + __rtl_sbrk_r_v1_00 = 0x2ec41; + __rtl_fflush_r_v1_00 = 0x2ef8d; + __rtl_vfprintf_r_v1_00 = 0x2f661; + __rtl_fpclassifyd = 0x30c15; + CpkClkTbl = 0x30c68; + ROM_IMG1_VALID_PATTEN = 0x30c80; + SpicCalibrationPattern = 0x30c88; + SpicInitCPUCLK = 0x30c98; + BAUDRATE = 0x30ca8; + OVSR = 0x30d1c; + DIV = 0x30d90; + OVSR_ADJ = 0x30e04; + __AES_rcon = 0x30e78; + __AES_Te4 = 0x30ea0; + I2CDmaChNo = 0x312a0; + _GPIO_PinMap_Chip2IP_8195a = 0x312b4; + _GPIO_PinMap_PullCtrl_8195a = 0x3136c; + _GPIO_SWPORT_DDR_TBL = 0x31594; + _GPIO_EXT_PORT_TBL = 0x31598; + _GPIO_SWPORT_DR_TBL = 0x3159c; + UartLogRomCmdTable = 0x316a0; + _HalRuartOp = 0x31700; + _HalGdmaOp = 0x31760; + RTW_WPA_OUI_TYPE = 0x3540c; + WPA_CIPHER_SUITE_NONE = 0x35410; + WPA_CIPHER_SUITE_WEP40 = 0x35414; + WPA_CIPHER_SUITE_TKIP = 0x35418; + WPA_CIPHER_SUITE_CCMP = 0x3541c; + WPA_CIPHER_SUITE_WEP104 = 0x35420; + RSN_CIPHER_SUITE_NONE = 0x35424; + RSN_CIPHER_SUITE_WEP40 = 0x35428; + RSN_CIPHER_SUITE_TKIP = 0x3542c; + RSN_CIPHER_SUITE_CCMP = 0x35430; + RSN_CIPHER_SUITE_WEP104 = 0x35434; + RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X = 0x35444; + RSN_AUTH_KEY_MGMT_UNSPEC_802_1X = 0x35448; + RSN_VERSION_BSD = 0x3544c; + rom_wps_Te0 = 0x35988; + rom_wps_rcons = 0x35d88; + rom_wps_Td4s = 0x35d94; + rom_wps_Td0 = 0x35e94; + __rom_b_cut_end__ = 0x4467c; + __rom_c_cut_text_start__ = 0x4467c; + HalInitPlatformLogUartV02 = 0x4467d; + HalReInitPlatformLogUartV02 = 0x4471d; + HalInitPlatformTimerV02 = 0x44755; + HalShowBuildInfoV02 = 0x447cd; + SpicReleaseDeepPowerDownFlashRtl8195A = 0x44831; + HalSpiInitV02 = 0x4488d; + HalBootFlowV02 = 0x44a29; + HalInitialROMCodeGlobalVarV02 = 0x44ae5; + HalResetVsrV02 = 0x44b41; + HalI2CSendRtl8195aV02 = 0x44ce1; + HalI2CSetCLKRtl8195aV02 = 0x44d59; + RtkI2CSendV02 = 0x4508d; + RtkI2CReceiveV02 = 0x459a1; + HalI2COpInitV02 = 0x461ed; + I2CISRHandleV02 = 0x463e9; + RtkSalI2COpInitV02 = 0x46be1; + SpicLoadInitParaFromClockRtl8195AV02 = 0x46c25; + SpiFlashAppV02 = 0x46c85; + SpicInitRtl8195AV02 = 0x46dc5; + SpicEraseFlashRtl8195AV02 = 0x46ea1; + HalTimerIrq2To7HandleV02 = 0x46f5d; + HalTimerIrqRegisterRtl8195aV02 = 0x46fe1; + HalTimerInitRtl8195aV02 = 0x4706d; + HalTimerReadCountRtl8195aV02 = 0x471b5; + HalTimerReLoadRtl8195aV02 = 0x471d1; + HalTimerIrqUnRegisterRtl8195aV02 = 0x4722d; + HalTimerDeInitRtl8195aV02 = 0x472c1; + HalTimerOpInitV02 = 0x472f9; + GPIO_LockV02 = 0x47345; + GPIO_UnLockV02 = 0x47379; + GPIO_Int_Clear_8195aV02 = 0x473a5; + HAL_GPIO_IntCtrl_8195aV02 = 0x473b5; + FindElementIndexV02 = 0x47541; + HalRuartInitRtl8195aV02 = 0x4756d; + DramInit_rom = 0x47619; + ChangeRandSeed_rom = 0x47979; + Sdr_Rand2_rom = 0x47985; + MemTest_rom = 0x479dd; + SdrCalibration_rom = 0x47a45; + SdrControllerInit_rom = 0x47d99; + SDIO_EnterCritical = 0x47e39; + SDIO_ExitCritical = 0x47e85; + SDIO_IRQ_Handler_Rom = 0x47ec5; + SDIO_Interrupt_Init_Rom = 0x47f31; + SDIO_Device_Init_Rom = 0x47f81; + SDIO_Interrupt_DeInit_Rom = 0x48215; + SDIO_Device_DeInit_Rom = 0x48255; + SDIO_Enable_Interrupt_Rom = 0x48281; + SDIO_Disable_Interrupt_Rom = 0x482a1; + SDIO_Clear_ISR_Rom = 0x482c1; + SDIO_Alloc_Rx_Pkt_Rom = 0x482d9; + SDIO_Free_Rx_Pkt_Rom = 0x48331; + SDIO_Recycle_Rx_BD_Rom = 0x48355; + SDIO_RX_IRQ_Handler_BH_Rom = 0x484f1; + SDIO_RxTask_Rom = 0x4851d; + SDIO_Process_H2C_IOMsg_Rom = 0x4856d; + SDIO_Send_C2H_IOMsg_Rom = 0x4859d; + SDIO_Process_RPWM_Rom = 0x485b5; + SDIO_Reset_Cmd_Rom = 0x485e9; + SDIO_Rx_Data_Transaction_Rom = 0x48611; + SDIO_Send_C2H_PktMsg_Rom = 0x48829; + SDIO_Register_Tx_Callback_Rom = 0x488f5; + SDIO_ReadMem_Rom = 0x488fd; + SDIO_WriteMem_Rom = 0x489a9; + SDIO_SetMem_Rom = 0x48a69; + SDIO_TX_Pkt_Handle_Rom = 0x48b29; + SDIO_TX_FIFO_DataReady_Rom = 0x48c69; + SDIO_IRQ_Handler_BH_Rom = 0x48d95; + SDIO_TxTask_Rom = 0x48e9d; + SDIO_TaskUp_Rom = 0x48eed; + SDIO_Boot_Up = 0x48f55; + __rom_c_cut_text_end__ = 0x49070; + __rom_c_cut_rodata_start__ = 0x49070; + BAUDRATE_v02 = 0x49070; + OVSR_v02 = 0x490fc; + DIV_v02 = 0x49188; + OVSR_ADJ_v02 = 0x49214; + SdrDramInfo_rom = 0x492a0; + SdrDramTiming_rom = 0x492b4; + SdrDramModeReg_rom = 0x492e8; + SdrDramDev_rom = 0x49304; + __rom_c_cut_rodata_end__ = 0x49314; + NewVectorTable = 0x10000000; + UserIrqFunTable = 0x10000100; + UserIrqDataTable = 0x10000200; + __rom_bss_start__ = 0x10000300; + CfgSysDebugWarn = 0x10000300; + CfgSysDebugInfo = 0x10000304; + CfgSysDebugErr = 0x10000308; + ConfigDebugWarn = 0x1000030c; + ConfigDebugInfo = 0x10000310; + ConfigDebugErr = 0x10000314; + HalTimerOp = 0x10000318; + GPIOState = 0x10000334; + gTimerRecord = 0x1000034c; + SSI_DBG_CONFIG = 0x10000350; + _pHAL_Gpio_Adapter = 0x10000354; + Timer2To7VectorTable = 0x10000358; + pUartLogCtl = 0x10000384; + UartLogBuf = 0x10000388; + UartLogCtl = 0x10000408; + UartLogHistoryBuf = 0x10000430; + ArgvArray = 0x100006ac; + rom_wlan_ram_map = 0x100006d4; + FalseAlmCnt = 0x100006e0; + ROMInfo = 0x10000720; + DM_CfoTrack = 0x10000738; + rom_libgloss_ram_map = 0x10000760; + __rtl_errno = 0x10000bc4; +} diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c index bd83781b3a0..e46be132ddd 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c @@ -14,26 +14,30 @@ * limitations under the License. */ #include "rtl8195a.h" -#include "system_8195a.h" -#if defined ( __CC_ARM ) /* ARM Compiler 4/5 */ + +#if defined(__CC_ARM) +#include "cmsis_armcc.h" +#elif defined(__GNUC__) +#include "cmsis_gcc.h" +#else +#include +#endif + + +#if defined(__CC_ARM) || \ + (defined (__ARMCC_VERSION) && __ARMCC_VERSION >= 6010050) + +extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Limit; extern uint8_t Image$$RW_IRAM1$$ZI$$Base[]; -#define __bss_start__ Image$$RW_IRAM1$$ZI$$Base extern uint8_t Image$$RW_IRAM1$$ZI$$Limit[]; -#define __bss_end__ Image$$RW_IRAM1$$ZI$$Limit -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler 6 */ -extern uint8_t Image$$RW_IRAM1$$ZI$$Base[]; #define __bss_start__ Image$$RW_IRAM1$$ZI$$Base -extern uint8_t Image$$RW_IRAM1$$ZI$$Limit[]; -#define __bss_end__ Image$$RW_IRAM1$$ZI$$Limit +#define __bss_end__ Image$$RW_IRAM1$$ZI$$Limit + +#elif defined (__ICCARM__) -#elif defined ( __ICCARM__ ) #pragma section=".ram.bss" -#pragma section=".rom.bss" -#pragma section=".ram.start.table" -#pragma section=".ram_image1.bss" -#pragma section=".image2.start.table1" -#pragma section=".image2.start.table2" +extern uint32_t CSTACK$$Limit; uint8_t *__bss_start__; uint8_t *__bss_end__; @@ -42,30 +46,29 @@ void __iar_data_init_app(void) __bss_start__ = (uint8_t *)__section_begin(".ram.bss"); __bss_end__ = (uint8_t *)__section_end(".ram.bss"); } + #else -extern uint8_t __bss_start__[]; -extern uint8_t __bss_end__[]; -extern uint8_t __image1_bss_start__[]; -extern uint8_t __image1_bss_end__[]; -extern uint8_t __image2_entry_func__[]; -extern uint8_t __image2_validate_code__[]; + +extern uint32_t __StackTop; +extern uint8_t __bss_sram1_start__[]; +extern uint8_t __bss_sram1_end__[]; +extern uint8_t __bss_sram2_start__[]; +extern uint8_t __bss_sram2_end__[]; + #endif extern VECTOR_Func NewVectorTable[]; extern void SystemCoreClockUpdate(void); extern void PLAT_Start(void); extern void PLAT_Main(void); -extern HAL_TIMER_OP HalTimerOp; - -IMAGE2_START_RAM_FUN_SECTION const RAM_START_FUNCTION gImage2EntryFun0 = { - PLAT_Start -}; -IMAGE1_VALID_PATTEN_SECTION const uint8_t RAM_IMG1_VALID_PATTEN[] = { - 0x23, 0x79, 0x16, 0x88, 0xff, 0xff, 0xff, 0xff +IMAGE2_START_RAM_FUN_SECTION +const RAM_START_FUNCTION gImage2EntryFun0 = { + PLAT_Start }; -IMAGE2_VALID_PATTEN_SECTION const uint8_t RAM_IMG2_VALID_PATTEN[20] = { +IMAGE2_VALID_PATTEN_SECTION +const uint8_t IMAGE2_SIGNATURE[20] = { 'R', 'T', 'K', 'W', 'i', 'n', 0x0, 0xff, (FW_VERSION&0xff), ((FW_VERSION >> 8)&0xff), (FW_SUBVERSION&0xff), ((FW_SUBVERSION >> 8)&0xff), @@ -93,7 +96,7 @@ void TRAP_NMIHandler(void) #endif } -#if defined ( __ICCARM__ ) +#if defined (__ICCARM__) void __TRAP_HardFaultHandler_Patch(uint32_t addr) { uint32_t cfsr; @@ -102,15 +105,15 @@ void __TRAP_HardFaultHandler_Patch(uint32_t addr) uint32_t stackpc; uint16_t asmcode; - cfsr = HAL_READ32(0xE000ED28, 0x0); + cfsr = __HAL_READ32(0xE000ED28, 0x0); // Violation to memory access protection if (cfsr & 0x82) { - bfar = HAL_READ32(0xE000ED38, 0x0); + bfar = __HAL_READ32(0xE000ED38, 0x0); // invalid access to wifi register, usually happened in LPS 32K or IPS - if (bfar >= WIFI_REG_BASE && bfar < WIFI_REG_BASE + 0x40000) { + if (bfar >= WLAN_BASE && bfar < WLAN_BASE + 0x40000) { //__BKPT(0); @@ -125,18 +128,18 @@ void __TRAP_HardFaultHandler_Patch(uint32_t addr) * However, the fault assembly code (Ex. LDR or ADR) is not actually executed, * So the register value is un-predictable. **/ - stackpc = HAL_READ32(addr, 0x18); - asmcode = HAL_READ16(stackpc, 0); + stackpc = __HAL_READ32(addr, 0x18); + asmcode = __HAL_READ16(stackpc, 0); if ((asmcode & 0xF800) > 0xE000) { // 32-bit instruction, (opcode[15:11] = 0b11111, 0b11110, 0b11101) - HAL_WRITE32(addr, 0x18, stackpc + 4); + __HAL_WRITE32(addr, 0x18, stackpc + 4); } else { // 16-bit instruction - HAL_WRITE32(addr, 0x18, stackpc + 2); + __HAL_WRITE32(addr, 0x18, stackpc + 2); } // clear Hard Fault Status Register - HAL_WRITE32(0xE000ED2C, 0x0, HAL_READ32(0xE000ED2C, 0x0)); + __HAL_WRITE32(0xE000ED2C, 0x0, __HAL_READ32(0xE000ED2C, 0x0)); return; } } @@ -155,8 +158,11 @@ void TRAP_HardFaultHandler_Patch(void) #endif // Override original Interrupt Vector Table -INFRA_START_SECTION void TRAP_OverrideTable(uint32_t stackp) +void TRAP_OverrideTable(uint32_t stackp) { + // Set MSP + __set_MSP(stackp); + // Override NMI Handler NewVectorTable[2] = (VECTOR_Func) TRAP_NMIHandler; @@ -165,85 +171,59 @@ INFRA_START_SECTION void TRAP_OverrideTable(uint32_t stackp) #endif } -INFRA_START_SECTION void PLAT_Init(void) +// Image2 Entry Function +void PLAT_Start(void) { uint32_t val; - //Set SPS lower voltage - val = __RTK_CTRL_READ32(REG_SYS_EFUSE_SYSCFG0); - val &= 0xf0ffffff; - val |= 0x6000000; - __RTK_CTRL_WRITE32(REG_SYS_EFUSE_SYSCFG0, val); - - //xtal buffer driving current - val = __RTK_CTRL_READ32(REG_SYS_XTAL_CTRL1); - val &= ~(BIT_MASK_SYS_XTAL_DRV_RF1 << BIT_SHIFT_SYS_XTAL_DRV_RF1); - val |= BIT_SYS_XTAL_DRV_RF1(1); - __RTK_CTRL_WRITE32(REG_SYS_XTAL_CTRL1, val); -} - -//3 Image 2 -extern _LONG_CALL_ void * __rtl_memset_v1_00(void * m , int c , size_t n); - -//extern uint32_t mbed_stack_isr_start; -//extern uint32_t mbed_stack_isr_size; -INFRA_START_SECTION void PLAT_Start(void) -{ - u8 isFlashEn; -#if defined ( __ICCARM__ ) +#if defined (__ICCARM__) __iar_data_init_app(); #endif + // Clear RAM BSS - __rtl_memset_v1_00((void *)__bss_start__, 0, __bss_end__ - __bss_start__); +#ifdef __GNUC__ + __memset((void *)__bss_sram1_start__, 0, __bss_sram1_end__ - __bss_sram1_start__); + __memset((void *)__bss_sram2_start__, 0, __bss_sram2_end__ - __bss_sram2_start__); +#else + __memset((void *)__bss_start__, 0, __bss_end__ - __bss_start__); +#endif +#if defined (__CC_ARM) + TRAP_OverrideTable((uint32_t)&Image$$ARM_LIB_STACK$$ZI$$Limit); +#elif defined (__ICCARM__) + TRAP_OverrideTable((uint32_t)&CSTACK$$Limit); +#elif defined (__GNUC__) + TRAP_OverrideTable((uint32_t)&__StackTop); +#else TRAP_OverrideTable(0x1FFFFFFC); -/* add by Ian --for mbed isr stack address setting */ - __set_MSP(0x1fffffbc); - - -#ifdef CONFIG_SPIC_MODULE - if ((HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) & BIT_SOC_FLASH_EN) != 0) { - isFlashEn = 1; - } else { - isFlashEn = 0; - } #endif -#ifdef CONFIG_TIMER_MODULE HalTimerOpInit_Patch(&HalTimerOp); -#endif - - //DBG_8195A("===== Enter Image 2 ====\n"); - - SystemCoreClockUpdate(); - if (isFlashEn) { -#if CONFIG_SPIC_EN && SPIC_CALIBRATION_IN_NVM - SpicNVMCalLoadAll(); -#endif - SpicReadIDRtl8195A(); - // turn off SPIC for power saving - SpicDisableRtl8195A(); - } + // Set SPS lower voltage + val = __RTK_CTRL_READ32(REG_SYS_EFUSE_SYSCFG0); + val &= 0xf0ffffff; + val |= 0x6000000; + __RTK_CTRL_WRITE32(REG_SYS_EFUSE_SYSCFG0, val); + + // xtal buffer driving current + val = __RTK_CTRL_READ32(REG_SYS_XTAL_CTRL1); + val &= ~(BIT_MASK_SYS_XTAL_DRV_RF1 << BIT_SHIFT_SYS_XTAL_DRV_RF1); + val |= BIT_SYS_XTAL_DRV_RF1(1); + __RTK_CTRL_WRITE32(REG_SYS_XTAL_CTRL1, val); + // Initialize SPIC, then disable it for power saving. + if ((HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) & BIT_SOC_FLASH_EN) != 0) { + SpicNVMCalLoadAll(); + SpicReadIDRtl8195A(); + SpicDisableRtl8195A(); + } - PLAT_Init(); #ifdef CONFIG_TIMER_MODULE - Calibration32k(); - -#ifdef CONFIG_WDG -#ifdef CONFIG_WDG_TEST - WDGInit(); -#endif //CONFIG_WDG_TEST -#endif //CONFIG_WDG -#endif //CONFIG_TIMER_MODULE - -#ifdef CONFIG_SOC_PS_MODULE - //InitSoCPM(); -#endif - /* GPIOA_7 does not pull high at power on. It causes SDIO Device - * hardware to enable automatically and occupy GPIOA[7:0] */ + Calibration32k(); +#endif + #ifndef CONFIG_SDIO_DEVICE_EN SDIO_DEV_Disable(); #endif @@ -256,37 +236,41 @@ extern void SVC_Handler(void); extern void PendSV_Handler(void); extern void SysTick_Handler(void); +// The Main App entry point #if defined (__CC_ARM) __asm void ARM_PLAT_Main(void) { - IMPORT SystemInit - IMPORT __main - BL SystemInit - BL __main + IMPORT SystemInit + IMPORT __main + BL SystemInit + BL __main +} +#elif defined (__ICCARM__) +extern void __iar_program_start(void); + +void IAR_PLAT_Main(void) +{ + SystemInit(); + __iar_program_start(); } #endif -extern void __iar_program_start( void ); -// The Main App entry point void PLAT_Main(void) { TRAP_Init((void *)SVC_Handler, (void *)PendSV_Handler, (void *)SysTick_Handler); -#if defined (__ICCARM__) - //IAR_PLAT_Main(); - SystemInit(); - __iar_program_start(); -#elif defined (__CC_ARM) - ARM_PLAT_Main(); - -#elif defined (__GNUC__) - __asm ( - "ldr r0, =SystemInit \n" +#if defined (__CC_ARM) + ARM_PLAT_Main(); +#elif defined (__ICCARM__) + IAR_PLAT_Main(); +#else + __asm ("ldr r0, =SystemInit \n" "blx r0 \n" "ldr r0, =_start \n" "bx r0 \n" ); #endif + // Never reached - for(;;); + for (;;); } diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/ota_api.c b/targets/TARGET_Realtek/TARGET_AMEBA/ota_api.c new file mode 100644 index 00000000000..811407a514b --- /dev/null +++ b/targets/TARGET_Realtek/TARGET_AMEBA/ota_api.c @@ -0,0 +1,154 @@ +/* mbed Microcontroller Library + * Copyright (c) 2013-2017 Realtek Semiconductor Corp. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include +#include + +#include "mbed_wait_api.h" + +#include "rtl8195a.h" +#include "flash_ext.h" + +#define FLASH_TOP 0x200000 +#define FLASH_SECTOR_SIZE 0x1000 +#define FLASH_SECTOR_MASK ~(FLASH_SECTOR_SIZE - 1) +#define OTA_REGION1 0x0b000 +#define OTA_REGION2 0xc0000 +#define TAG_OFS 0xc +#define VER_OFS 0x10 + +#define TAG_DOWNLOAD 0x81950001 +#define TAG_VERIFIED 0x81950003 + +static flash_t flash_obj; + +typedef struct imginfo_s { + uint32_t base; + uint32_t tag; + uint64_t ver; +} imginfo_t; + + +void OTA_GetImageInfo(imginfo_t *info) +{ + uint32_t ver_hi, ver_lo; + + flash_ext_read_word(&flash_obj, info->base + TAG_OFS, &info->tag); + flash_ext_read_word(&flash_obj, info->base + VER_OFS, &ver_lo); + flash_ext_read_word(&flash_obj, info->base + VER_OFS + 4, &ver_hi); + + if (info->tag == TAG_DOWNLOAD) { + info->ver = ((uint64_t)ver_hi << 32) | (uint64_t) ver_lo; + } else { + info->ver = 0; + } +} + +uint32_t OTA_GetBase(void) +{ + static uint32_t ota_base = 0; + imginfo_t region1, region2; + + if (ota_base == OTA_REGION1 || ota_base == OTA_REGION2) { + return ota_base; + } + + region1.base = OTA_REGION1; + region2.base = OTA_REGION2; + + OTA_GetImageInfo(®ion1); + OTA_GetImageInfo(®ion2); + + if (region1.ver >= region2.ver) { + ota_base = region2.base; + } else { + ota_base = region1.base; + } + return ota_base; +} + +uint32_t OTA_MarkUpdateDone(void) +{ + uint32_t addr = OTA_GetBase() + TAG_OFS; + + return flash_ext_write_word(&flash_obj, addr, TAG_DOWNLOAD); +} + +uint32_t OTA_UpdateImage(uint32_t offset, uint32_t len, uint8_t *data) +{ + uint32_t addr, start, end, count, shift; + uint8_t *pdata = data; + uint8_t buf[FLASH_SECTOR_SIZE]; + + start = OTA_GetBase() + offset; + end = start + len; + + if (data == NULL || start > FLASH_TOP || end > FLASH_TOP) { + return 0; + } + + addr = start & FLASH_SECTOR_MASK; + if (addr != start) { + shift = start - addr; + count = MIN(FLASH_SECTOR_SIZE - shift, len); + flash_ext_stream_read(&flash_obj, addr, shift, buf); + memcpy((void *)buf + shift, (void *)pdata, count); + + flash_ext_erase_sector(&flash_obj, addr); + flash_ext_stream_write(&flash_obj, addr, FLASH_SECTOR_SIZE, buf); + addr += FLASH_SECTOR_SIZE; + pdata += count; + } + + while (addr < end) { + printf("OTA: update addr=0x%lx, len=%ld\r\n", addr, len); + count = MIN(FLASH_SECTOR_SIZE, end - addr); + flash_ext_erase_sector(&flash_obj, addr); + flash_ext_stream_write(&flash_obj, addr, count, pdata); + addr += FLASH_SECTOR_SIZE; + pdata += count; + } + return len; +} + +uint32_t OTA_ReadImage(uint32_t offset, uint32_t len, uint8_t *data) +{ + uint32_t addr, endaddr; + + addr = OTA_GetBase() + offset; + endaddr = addr + len; + + if (data == NULL || addr > FLASH_TOP || endaddr > FLASH_TOP) { + return 0; + } + + printf("OTA: read addr=0x%lx\r\n", addr); + return flash_ext_stream_read(&flash_obj, addr, len, data); +} + +void OTA_ResetTarget(void) +{ + __RTK_CTRL_WRITE32(0x14, 0x00000021); + wait(1); + + // write SCB->AIRCR + HAL_WRITE32(0xE000ED00, 0x0C, + (0x5FA << 16) | // VECTKEY + (HAL_READ32(0xE000ED00, 0x0C) & (7 << 8)) | // PRIGROUP + (1 << 2)); // SYSRESETREQ + + // not reached + while (1); +} diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/ota_api.h b/targets/TARGET_Realtek/TARGET_AMEBA/ota_api.h new file mode 100644 index 00000000000..2b978a32368 --- /dev/null +++ b/targets/TARGET_Realtek/TARGET_AMEBA/ota_api.h @@ -0,0 +1,18 @@ +#ifndef MBED_OTA_API_H +#define MBED_OTA_API_H + +#ifdef __cplusplus + extern "C" { +#endif + +extern uint32_t OTA_UpdateImage(uint32_t offset, uint32_t len, uint8_t *data); +extern uint32_t OTA_ReadImage(uint32_t offset, uint32_t len, uint8_t *data); +extern uint32_t OTA_MarkUpdateDone(void); +extern void OTA_ResetTarget(void); + +#ifdef __cplusplus +} +#endif + +#endif /* MBED_OTA_API_H */ + diff --git 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for i in range(0, len(line), 2)] + line.reverse() + # convert to write buffer + output.write("".join([chr(long(b, 16)) for b in line])) def append_image_file(image, output): - try: - input = open(image, "rb") - output.write(input.read()) - except Exception: - return + input = open(image, "rb") + output.write(input.read()) input.close() -def prepend(image, image_prepend, toolchain, info): - if info['size'] == 0: - return - output = open(image_prepend, "wb") - write_fixed_width_value(info['size'], 8, output) - write_fixed_width_value(info['addr'], 8, output) - if info['img'] == 2 : - write_fixed_width_value(RAM2_RSVD, 16, output) - elif info['img'] == 3 : - write_fixed_width_value(RAM3_RSVD, 16, output) - if os.path.isfile(image): - with open(image, "rb") as input: - if toolchain == "IAR": - input.seek(info['addr']) - elif info['img'] == 3: #toolchain is not IAR - input.seek(info['addr']-IMG2_OFFSET) - output.write(input.read(info['size'])) - else: - image = os.path.join(image, info['name']) - with open(image, "rb") as input: - output.write(input.read(info['size'])) +def write_padding_bytes(output_name, size): + current_size = os.stat(output_name).st_size + padcount = size - current_size + if padcount < 0: + print "[ERROR] image is larger than expected size" + sys.exit(-1) + output = open(output_name, "ab") + output.write('\377' * padcount) + output.close() + +def sha256_checksum(filename, block_size=65536): + sha256 = hashlib.sha256() + with open(filename, 'rb') as f: + for block in iter(lambda: f.read(block_size), b''): + sha256.update(block) + return sha256.hexdigest() + +def get_version_by_time(): + secs = int((datetime.now()-datetime(2016,11,1)).total_seconds()) + return RAM2_VER + secs +# ---------------------------- +# main function +# ---------------------------- +def prepend(image, entry, segment, image_ram2, image_ota): + + # parse input arguments + output = open(image_ram2, "wb") + + write_fixed_width_value(os.stat(image).st_size, 8, output) + write_fixed_width_value(int(entry), 8, output) + write_fixed_width_value(int(segment), 8, output) + + RAM2_SHA = sha256_checksum(image) + write_fixed_width_value(RAM2_TAG, 8, output) + write_fixed_width_value(get_version_by_time(), 16, output) + write_fixed_width_string(RAM2_SHA, 64, output) + write_fixed_width_value(RAM2_RSVD, 8, output) + + append_image_file(image, output) output.close() - -def _parse_section(toolchain, elf, section): - info = {'addr':None, 'size':0}; - if toolchain not in ["GCC_ARM", "ARM_STD", "ARM", "ARM_MICRO", "IAR"]: - print "[ERROR] unsupported toolchain " + toolchain - sys.exit(-1) - - mapfile = elf.rsplit(".", 1)[0] + ".map" - + ota = open(image_ota, "wb") + write_fixed_width_value(os.stat(image).st_size, 8, ota) + write_fixed_width_value(int(entry), 8, ota) + write_fixed_width_value(int(segment), 8, ota) + write_fixed_width_value(0xFFFFFFFF, 8, ota) + write_fixed_width_value(get_version_by_time(), 16, ota) + write_fixed_width_string(RAM2_SHA, 64, ota) + write_fixed_width_value(RAM2_RSVD, 8, ota) + + append_image_file(image, ota) + ota.close() + +def find_symbol(toolchain, mapfile, symbol): + ret = None + + HEX = '0x0{,8}(?P[0-9A-Fa-f]{8})' + if toolchain == "GCC_ARM": + SYM = re.compile(r'^\s+' + HEX + r'\s+' + symbol + '\r?$') + elif toolchain in ["ARM_STD", "ARM", "ARM_MICRO"]: + SYM = re.compile(r'^\s+' + HEX + r'\s+0x[0-9A-Fa-f]{8}\s+Code.*\s+i\.' + symbol + r'\s+.*$') + elif toolchain == "IAR": + SYM = re.compile(r'^' + symbol + r'\s+' + HEX + '\s+.*$') + with open(mapfile, 'r') as infile: - # Search area to parse for line in infile: - if toolchain == "GCC_ARM": - # .image2.table 0x[00000000]30000000 0x18 - # 0x[00000000]30000000 __image2_start__ = . - # 0x[00000000]30000000 __image2_entry_func__ = . - match = re.match(r'^' + section + \ - r'\s+0x0{,8}(?P[0-9A-Fa-f]{8})\s+0x(?P[0-9A-Fa-f]+).*$', line) - elif toolchain in ["ARM_STD", "ARM", "ARM_MICRO"]: - # Memory Map of the image - # Load Region LR_DRAM (Base: 0x30000000, Size: 0x00006a74, Max: 0x00200000, ABSOLUTE) - # Execution Region IMAGE2_TABLE (Base: 0x30000000, Size: 0x00000018, Max: 0xffffffff, ABSOLUTE, FIXED) - # Base Addr Size Type Attr Idx E Section Name Object - # 0x30000000 0x00000004 Data RO 5257 .image2.ram.data rtl8195a_init.o - match = re.match(r'^.*Region\s+' + section + \ - r'\s+\(Base: 0x(?P[0-9A-Fa-f]{8}),\s+Size: 0x(?P[0-9A-Fa-f]+), .*\)$', line) - elif toolchain == "IAR": - # Section Kind Address Size Object - # ------- ---- ------- ---- ------ - # "A3": 0x8470 - # IMAGE2 0x10006000 0x5d18 - # .ram_image2.text 0x10006000 0x5bbc - # .rodata const 0x10006000 0x14 retarget.o [17] - match = re.match(r'^\s+' + section + \ - r'\s+0x(?P[0-9A-Fa-f]{8})\s+0x(?P[0-9A-Fa-f]+)\s+.*$', line) + match = re.match(SYM, line) if match: - info['addr'] = int(match.group("addr"), 16) - try: - info['size'] = int(match.group("size"), 16) - except IndexError: - print "[WARNING] cannot find the size of section " + section - return info - - print "[ERROR] cannot find the address of section " + section - return info - -def parse_section(toolchain, elf, sections, img): - img_info = {'name':"", 'addr':None, 'size':0, 'img':img} - for section in sections: - section_info = _parse_section(toolchain, elf, section) - if img_info['addr'] is None or img_info['addr'] > section_info['addr']: - img_info['addr'] = section_info['addr'] - img_info['name'] = section - img_info['size'] = img_info['size'] + section_info['size'] - return img_info + ret = match.group("addr") -# ---------------------------- -# main function -# ---------------------------- -def rtl8195a_elf2bin(toolchain, image_elf, image_bin): + if not ret: + print "[ERROR] cannot find the address of symbol " + symbol + return 0 + + return int(ret,16) | 1 + +def parse_load_segment_gcc(image_elf): + # Program Headers: + # Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align + # LOAD 0x000034 0x10006000 0x10006000 0x026bc 0x026bc RW 0x8 + # LOAD 0x0026f0 0x30000000 0x30000000 0x06338 0x06338 RWE 0x4 + segment_list = [] + cmd = 'arm-none-eabi-readelf -l ' + image_elf + for line in subprocess.check_output(cmd, shell=True, universal_newlines=True).split("\n"): + if not line.startswith(" LOAD"): + continue + segment = line.split() + if len(segment) != 8: + continue + offset = int(segment[1][2:], 16) + addr = int(segment[2][2:], 16) + size = int(segment[4][2:], 16) + if addr != 0 and size != 0: + segment_list.append((offset, addr, size)) + return segment_list + +def parse_load_segment_armcc(image_elf): + # ==================================== + # + # ** Program header #2 + # + # Type : PT_LOAD (1) + # File Offset : 52 (0x34) + # Virtual Addr : 0x30000000 + # Physical Addr : 0x30000000 + # Size in file : 27260 bytes (0x6a7c) + # Size in memory: 42168 bytes (0xa4b8) + # Flags : PF_X + PF_W + PF_R + PF_ARM_ENTRY (0x80000007) + # Alignment : 8 + # + (offset, addr, size) = (0, 0, 0) + segment_list = [] + in_segment = False + cmd = 'fromelf.exe --text -v --only=none ' + image_elf + for line in subprocess.check_output(cmd, shell=True, universal_newlines=True).split("\n"): + if line == "": + pass + elif line.startswith("** Program header"): + in_segment = True + elif in_segment == False: + pass + elif line.startswith("============"): + if addr != 0 and size != 0: + segment_list.append((offset, addr, size)) + in_segment = False + (offset, addr, size) = (0, 0, 0) + elif line.startswith(" Type"): + if not re.match(r'\s+Type\s+:\s+PT_LOAD\s.*$', line): + in_segment = False + elif line.startswith(" File Offset"): + match = re.match(r'^\s+File Offset\s+:\s+(?P\d+).*$', line) + if match: + offset = int(match.group("offset")) + elif line.startswith(" Virtual Addr"): + match = re.match(r'^\s+Virtual Addr\s+:\s+0x(?P[0-9a-f]+).*$', line) + if match: + addr = int(match.group("addr"), 16) + elif line.startswith(" Size in file"): + match = re.match(r'^\s+Size in file\s+:.*\(0x(?P[0-9a-f]+)\).*$', line) + if match: + size = int(match.group("size"), 16) + return segment_list + + +def parse_load_segment_iar(image_elf): + # SEGMENTS: + # + # Type Offset Virtual Physical File Sz Mem Sz Flags Align + # ---- ------ ------- -------- ------- ------ ----- ----- + # 0: load 0x34 0x10006000 0x10006000 0x26bc 0x26bc 0x6 WR 0x8 + # 1: load 0x26f0 0x30000000 0x30000000 0x6338 0x6338 0x7 XWR 0x4 + # + # SECTIONS: + # + # Name Type Addr Offset Size Aln Lnk Inf ESz Flags + # ---- ---- ---- ------ ---- --- --- --- --- ----- + # 1: .shstrtab strtab 0xfc4d8 0x60 0x4 + # 2: .strtab strtab 0xfc538 0xbb3f 0x4 + + segment_list = [] + in_segment = False + cmd = 'ielfdumparm.exe ' + image_elf + for line in subprocess.check_output(cmd, shell=True, universal_newlines=True).split("\n"): + if line.startswith(" SEGMENTS:"): + in_segment = True + elif in_segment == False: + pass + elif line.startswith(" SECTIONS:"): + break + elif re.match(r'^\s+\w+:\s+load\s+.*$', line): + segment = line.split() + offset = int(segment[2][2:], 16) + addr = int(segment[3][2:], 16) + size = int(segment[5][2:], 16) + if addr != 0 and size != 0: + segment_list.append((offset, addr, size)) + return segment_list + +def parse_load_segment(toolchain, image_elf): if toolchain == "GCC_ARM": - img2_sections = [".image2.table", ".text", ".data"] - img3_sections = [".sdr_all"] + return parse_load_segment_gcc(image_elf) elif toolchain in ["ARM_STD", "ARM", "ARM_MICRO"]: - img2_sections = [".image2.table", ".text", ".data"] - img3_sections = ["_DRAM_CODE"] + return parse_load_segment_armcc(image_elf) elif toolchain == "IAR": - img2_sections = ["IMAGE2"] - img3_sections = ["SDRAM"] + return parse_load_segment_iar(image_elf) else: - print("[error] unsupported toolchain") + toolchain - return - image2_info = {'addr':None, 'size':0, 'img':2} - image3_info = {'addr':None, 'size':0, 'img':3} + return [] + +def write_load_segment(image_elf, image_bin, segment): + file_elf = open(image_elf, "rb") + file_bin = open(image_bin, "wb") + for (offset, addr, size) in segment: + file_elf.seek(offset) + # write image header - size & addr + write_fixed_width_value(addr, 8, file_bin) + write_fixed_width_value(size, 8, file_bin) + # write load segment + file_bin.write(file_elf.read(size)) + file_bin.close() + file_elf.close() + +# ---------------------------- +# main function +# ---------------------------- +def rtl8195a_elf2bin(t_self, image_elf, image_bin): + segment = parse_load_segment(t_self.name, image_elf) + write_load_segment(image_elf, image_bin, segment) + image_name = os.path.splitext(image_elf)[0] + image_map = image_name + '.map' + + ram2_ent = find_symbol(t_self.name, image_map, "PLAT_Start") + ram1_bin = os.path.join(TOOLS_BOOTLOADERS, "REALTEK_RTL8195AM", "ram_1.bin") + ram2_bin = image_name + '-ram_2.bin' + ota_bin = image_name + '-ota.bin' + prepend(image_bin, ram2_ent, len(segment), ram2_bin, ota_bin) - img1_prepend_bin = os.path.join(TOOLS_BOOTLOADERS, "REALTEK_RTL8195AM", "ram_1_prepend.bin") - img2_prepend_bin = image_name + '-ram_2_prepend.bin' - img3_prepend_bin = image_name + '-ram_3_prepend.bin' - - old_bin = image_name + '.bin' - - img_info = parse_section(toolchain, image_elf, img2_sections, 2) - prepend(old_bin, img2_prepend_bin, toolchain, img_info) - img_info = parse_section(toolchain, image_elf, img3_sections, 3) - prepend(old_bin, img3_prepend_bin, toolchain, img_info) - - #delete original binary - if os.path.isfile(image_bin): - os.remove(image_bin) - else: - for i in os.listdir(image_bin): - os.remove(os.path.join(image_bin, i)) - os.removedirs(image_bin) - # write output file output = open(image_bin, "wb") - append_image_file(img1_prepend_bin, output) - append_image_file(img2_prepend_bin, output) - append_image_file(img3_prepend_bin, output) + append_image_file(ram1_bin, output) + append_image_file(ram2_bin, output) output.close() - # post built done - diff --git a/tools/targets/__init__.py b/tools/targets/__init__.py index 9d02174234f..ce794777b6f 100644 --- a/tools/targets/__init__.py +++ b/tools/targets/__init__.py @@ -523,7 +523,7 @@ class RTL8195ACode: @staticmethod def binary_hook(t_self, resources, elf, binf): from tools.targets.REALTEK_RTL8195AM import rtl8195a_elf2bin - rtl8195a_elf2bin(t_self.name, elf, binf) + rtl8195a_elf2bin(t_self, elf, binf) ################################################################################ # Instantiate all public targets From 2654d2c43351142f3dc4e7227ccd26cf190cf521 Mon Sep 17 00:00:00 2001 From: Yuguo Zou Date: Thu, 27 Jul 2017 18:51:57 +0800 Subject: [PATCH 04/15] Switch off DBG messages And clean up some unused debug messages --- .../TARGET_AMEBA/TARGET_RTL8195A/device/platform_autoconf.h | 2 +- targets/TARGET_Realtek/TARGET_AMEBA/analogin_api.c | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/platform_autoconf.h b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/platform_autoconf.h index f91dcfa39ad..6613bbd5244 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/platform_autoconf.h +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/platform_autoconf.h @@ -186,7 +186,7 @@ #define CONFIG_UART_LOG_HISTORY 1 #undef CONFIG_CONSOLE_NORMALL_MODE #define CONFIG_CONSOLE_VERIFY_MODE 1 -#define CONFIG_DEBUG_LOG 1 +#undef CONFIG_DEBUG_LOG #define CONFIG_DEBUG_ERR_MSG 1 #undef CONFIG_DEBUG_WARN_MSG #undef CONFIG_DEBUG_INFO_MSG diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/analogin_api.c b/targets/TARGET_Realtek/TARGET_AMEBA/analogin_api.c index 011008d7914..3011f412b15 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/analogin_api.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/analogin_api.c @@ -113,12 +113,10 @@ void analogin_init (analogin_t *obj, PinName pin) /* Load user setting */ if ((pHalADCInitDataTmp->ADCEndian == ADC_DATA_ENDIAN_LITTLE) || (pHalADCInitDataTmp->ADCEndian == ADC_DATA_ENDIAN_BIG)) { - DBG_8195A("K\n"); pSalADCHND->pInitDat->ADCEndian = pHalADCInitDataTmp->ADCEndian; } if ((pHalADCInitDataTmp->ADCAudioEn != ADC_FEATURE_DISABLED) && (pHalADCInitDataTmp->ADCAudioEn < 2)) { - DBG_8195A("O\n"); pSalADCHND->pInitDat->ADCAudioEn = pHalADCInitDataTmp->ADCAudioEn; } From d1c87347af1d4fcf3761d3514c54e7a226e47032 Mon Sep 17 00:00:00 2001 From: Yuguo Zou Date: Fri, 28 Jul 2017 18:33:52 +0800 Subject: [PATCH 05/15] Fix ARMCC & IAR compile errors --- .../device/TOOLCHAIN_ARM_STD/rtl8195a.sct | 3 +++ .../TARGET_RTL8195A/device/rtl8195a_init.c | 22 +++++++++---------- targets/TARGET_Realtek/TARGET_AMEBA/ota_api.c | 2 +- tools/targets/REALTEK_RTL8195AM.py | 10 ++++++--- 4 files changed, 22 insertions(+), 15 deletions(-) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct index 72a3a64321b..97ae026e169 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct @@ -38,6 +38,9 @@ LR_RAM 0x10006000 0x6FFFF { .ANY (+ZI) } + ARM_LIB_STACK (0x10070000 - 0x1000) EMPTY 0x1000 { + } + TCM_OVERLAY 0x1FFF0000 0x10000{ lwip_mem.o(.bss*) lwip_memp.o(.bss*) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c index e46be132ddd..a9d4d9644f8 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c @@ -105,15 +105,15 @@ void __TRAP_HardFaultHandler_Patch(uint32_t addr) uint32_t stackpc; uint16_t asmcode; - cfsr = __HAL_READ32(0xE000ED28, 0x0); + cfsr = HAL_READ32(0xE000ED28, 0x0); // Violation to memory access protection if (cfsr & 0x82) { - bfar = __HAL_READ32(0xE000ED38, 0x0); + bfar = HAL_READ32(0xE000ED38, 0x0); // invalid access to wifi register, usually happened in LPS 32K or IPS - if (bfar >= WLAN_BASE && bfar < WLAN_BASE + 0x40000) { + if (bfar >= WIFI_REG_BASE && bfar < WIFI_REG_BASE + 0x40000) { //__BKPT(0); @@ -128,18 +128,18 @@ void __TRAP_HardFaultHandler_Patch(uint32_t addr) * However, the fault assembly code (Ex. LDR or ADR) is not actually executed, * So the register value is un-predictable. **/ - stackpc = __HAL_READ32(addr, 0x18); - asmcode = __HAL_READ16(stackpc, 0); + stackpc = HAL_READ32(addr, 0x18); + asmcode = HAL_READ16(stackpc, 0); if ((asmcode & 0xF800) > 0xE000) { // 32-bit instruction, (opcode[15:11] = 0b11111, 0b11110, 0b11101) - __HAL_WRITE32(addr, 0x18, stackpc + 4); + HAL_WRITE32(addr, 0x18, stackpc + 4); } else { // 16-bit instruction - __HAL_WRITE32(addr, 0x18, stackpc + 2); + HAL_WRITE32(addr, 0x18, stackpc + 2); } // clear Hard Fault Status Register - __HAL_WRITE32(0xE000ED2C, 0x0, __HAL_READ32(0xE000ED2C, 0x0)); + HAL_WRITE32(0xE000ED2C, 0x0, HAL_READ32(0xE000ED2C, 0x0)); return; } } @@ -181,11 +181,11 @@ void PLAT_Start(void) #endif // Clear RAM BSS -#ifdef __GNUC__ +#if defined (__ICCARM__) || defined (__CC_ARM) + __memset((void *)__bss_start__, 0, __bss_end__ - __bss_start__); +#else __memset((void *)__bss_sram1_start__, 0, __bss_sram1_end__ - __bss_sram1_start__); __memset((void *)__bss_sram2_start__, 0, __bss_sram2_end__ - __bss_sram2_start__); -#else - __memset((void *)__bss_start__, 0, __bss_end__ - __bss_start__); #endif #if defined (__CC_ARM) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/ota_api.c b/targets/TARGET_Realtek/TARGET_AMEBA/ota_api.c index 811407a514b..890a8ad5600 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/ota_api.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/ota_api.c @@ -104,7 +104,7 @@ uint32_t OTA_UpdateImage(uint32_t offset, uint32_t len, uint8_t *data) shift = start - addr; count = MIN(FLASH_SECTOR_SIZE - shift, len); flash_ext_stream_read(&flash_obj, addr, shift, buf); - memcpy((void *)buf + shift, (void *)pdata, count); + memcpy((void *)(buf + shift), (void *)pdata, count); flash_ext_erase_sector(&flash_obj, addr); flash_ext_stream_write(&flash_obj, addr, FLASH_SECTOR_SIZE, buf); diff --git a/tools/targets/REALTEK_RTL8195AM.py b/tools/targets/REALTEK_RTL8195AM.py index 10a67c0fe5c..335fc57c844 100644 --- a/tools/targets/REALTEK_RTL8195AM.py +++ b/tools/targets/REALTEK_RTL8195AM.py @@ -59,9 +59,6 @@ def get_version_by_time(): secs = int((datetime.now()-datetime(2016,11,1)).total_seconds()) return RAM2_VER + secs -# ---------------------------- -# main function -# ---------------------------- def prepend(image, entry, segment, image_ram2, image_ota): # parse input arguments @@ -229,6 +226,13 @@ def parse_load_segment(toolchain, image_elf): def write_load_segment(image_elf, image_bin, segment): file_elf = open(image_elf, "rb") + #delete folder with same name when using ARMCC + if os.path.isfile(image_bin): + pass + else: + for i in os.listdir(image_bin): + os.remove(os.path.join(image_bin, i)) + os.removedirs(image_bin) file_bin = open(image_bin, "wb") for (offset, addr, size) in segment: file_elf.seek(offset) From 35d7ca27be3847ecb50a73658be5de4b807a2d8b Mon Sep 17 00:00:00 2001 From: Tony Wu Date: Tue, 1 Aug 2017 15:00:40 +0800 Subject: [PATCH 06/15] rtl8195am - fix ARMCC SRAM + SDRAM porting Signed-off-by: Tony Wu --- .../device/TOOLCHAIN_ARM_STD/rtl8195a.sct | 84 ++++++++++--------- .../device/TOOLCHAIN_ARM_STD/sys.cpp | 42 +++------- .../TARGET_RTL8195A/device/rtl8195a_init.c | 18 ++-- targets/TARGET_Realtek/mbed_rtx.h | 13 ++- tools/targets/REALTEK_RTL8195AM.py | 17 ++-- 5 files changed, 79 insertions(+), 95 deletions(-) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct index 97ae026e169..60ffdb919e5 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct @@ -1,55 +1,57 @@ -; ************************************************************* -; *** Scatter-Loading Description File for RTL8195A *** -; ************************************************************* -LR_ROM 0x00000000 0x00030000{ - _ROM_CODE 0x00000000 0x00030000 { - ;*.o (RESET, +First) - ;*(InRoot$$Sections) - } -} +; Realtek Semiconductor Corp. +; +; RTL8195A ARMCC Scatter File +; +; MEMORY +; { +; SROM (rx) : ORIGIN = 0x10000000, LENGTH = 0x00007000 +; SRAM (rwx) : ORIGIN = 0x10007000, LENGTH = 0x00070000 - 0x00007000 +; TCM (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 0x00010000 +; DRAM (rwx) : ORIGIN = 0x30000000, LENGTH = 2M +; } -LR_RAM 0x10006000 0x6FFFF { -;LR_RAM 0x10000000 0x6FFFF { - ;ROM_BSS 0x10000000 0x0005FFF{ - ;rtl_console.o(.mon.ram.bss*) - ;} - - .image2.table 0x10006000 FIXED { - rtl8195a_init.o(.image2.ram.data*) - rtl8195a_init.o(.image2.validate.rodata*) - } - - .text +0 FIXED{ - rtl8195a_init.o(.infra.ram.start) - ;*.o(.mon.ram.text*) - ;*.o(.hal.flash.text*) - ;*.o(.hal.sdrc.text*) - ;*.o(.hal.gpio.text*) - ;*.o(.text*) - ;*.o(.rodata*) - .ANY (+RO) +LR_IRAM 0x10007000 (0x70000 - 0x7000) { + + IMAGE2_TABLE 0x10007000 FIXED { + *rtl8195a_init.o(.image2.ram.data*, +FIRST) + *rtl8195a_init.o(.image2.validate.rodata*) } - .data +0 FIXED{ - .ANY (+RW) + ER_IRAM +0 FIXED { + *rtl8195a_crypto.o(.text*, .rodata*) + *mbedtls*.o(.text*, .rodata*) + libc.a: (.text*, .rodata*) } RW_IRAM1 +0 UNINIT FIXED { - .ANY (+ZI) + *rtl8195a_crypto.o(.data*) + *mbedtls*.o(.data*) + libc.a: (.data*) + *(.sdram.data*) } - ARM_LIB_STACK (0x10070000 - 0x1000) EMPTY 0x1000 { + RW_IRAM2 +0 UNINIT FIXED { + *rtl8195a_crypto.o(.bss*, COMMON) + *mbedtls*.o(.bss*, COMMON) + libc.a: (.bss*, COMMON) + *(.bss.thread_stack_main) } - TCM_OVERLAY 0x1FFF0000 0x10000{ - lwip_mem.o(.bss*) - lwip_memp.o(.bss*) - *.o(.tcm.heap*) + ARM_LIB_STACK (0x10070000 - 0x1000) EMPTY 0x1000 { } } -LR_DRAM 0x30000000 0x1FFFFF{ - _DRAM_CODE 0x30000000 0x1FFFFF{ - *.o(.text*) - } +LR_DRAM 0x30000000 0x200000 { + + ER_DRAM +0 FIXED { + .ANY (+RO) + } + + RW_DRAM1 +0 UNINIT FIXED { + .ANY (+RW) + } + + RW_DRAM2 +0 UNINIT FIXED { + .ANY (+ZI) + } } diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/sys.cpp b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/sys.cpp index 7eb3026e3c5..13433246b46 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/sys.cpp +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/sys.cpp @@ -1,46 +1,24 @@ -/****************************************************************************** - * Copyright (c) 2013-2016 Realtek Semiconductor Corp. +/* mbed Microcontroller Library - stackheap + * Copyright (C) 2009-2011 ARM Limited. All rights reserved. * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - * mbed Microcontroller Library - stackheap - * Setup a fixed single stack/heap memory model, - * between the top of the RW/ZI region and the stackpointer - ******************************************************************************/ - + * Setup a fixed single stack/heap memory model, + * between the top of the RW/ZI region and the stackpointer + */ #ifdef __cplusplus extern "C" { -#endif +#endif #include #include -extern char Image$$RW_IRAM1$$ZI$$Limit[]; +extern char Image$$RW_IRAM2$$ZI$$Limit[]; + extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) { - uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit; + uint32_t zi_limit = (uint32_t)Image$$RW_IRAM2$$ZI$$Limit; uint32_t sp_limit = __current_sp(); zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned - //push down stack pointer to recycle some of the stack space that are not use in future - __asm volatile - ( - "MRS IP, MSP \n" - "ADD IP, #64 \n" - "BIC IP, IP, #7 \n" - "MSR MSP, IP \n" - ); struct __initial_stackheap r; r.heap_base = zi_limit; r.heap_limit = sp_limit; @@ -49,4 +27,4 @@ extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_ #ifdef __cplusplus } -#endif +#endif diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c index a9d4d9644f8..93ac91387be 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c @@ -28,10 +28,14 @@ (defined (__ARMCC_VERSION) && __ARMCC_VERSION >= 6010050) extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Limit; -extern uint8_t Image$$RW_IRAM1$$ZI$$Base[]; -extern uint8_t Image$$RW_IRAM1$$ZI$$Limit[]; -#define __bss_start__ Image$$RW_IRAM1$$ZI$$Base -#define __bss_end__ Image$$RW_IRAM1$$ZI$$Limit +extern uint8_t Image$$RW_IRAM2$$ZI$$Base[]; +extern uint8_t Image$$RW_IRAM2$$ZI$$Limit[]; +extern uint8_t Image$$RW_DRAM2$$ZI$$Base[]; +extern uint8_t Image$$RW_DRAM2$$ZI$$Limit[]; +#define __bss_sram_start__ Image$$RW_IRAM2$$ZI$$Base +#define __bss_sram_end__ Image$$RW_IRAM2$$ZI$$Limit +#define __bss_dram_start__ Image$$RW_DRAM2$$ZI$$Base +#define __bss_dram_end__ Image$$RW_DRAM2$$ZI$$Limit #elif defined (__ICCARM__) @@ -181,11 +185,11 @@ void PLAT_Start(void) #endif // Clear RAM BSS -#if defined (__ICCARM__) || defined (__CC_ARM) +#if defined (__ICCARM__) __memset((void *)__bss_start__, 0, __bss_end__ - __bss_start__); #else - __memset((void *)__bss_sram1_start__, 0, __bss_sram1_end__ - __bss_sram1_start__); - __memset((void *)__bss_sram2_start__, 0, __bss_sram2_end__ - __bss_sram2_start__); + __memset((void *)__bss_sram_start__, 0, __bss_sram_end__ - __bss_sram_start__); + __memset((void *)__bss_dram_start__, 0, __bss_dram_end__ - __bss_dram_start__); #endif #if defined (__CC_ARM) diff --git a/targets/TARGET_Realtek/mbed_rtx.h b/targets/TARGET_Realtek/mbed_rtx.h index 264a5ed53e5..a5a4e56833f 100644 --- a/targets/TARGET_Realtek/mbed_rtx.h +++ b/targets/TARGET_Realtek/mbed_rtx.h @@ -21,16 +21,14 @@ #include "rtl8195a.h" #if defined(__CC_ARM) -#ifdef CONFIG_RTL8195A - #define INITIAL_SP 0x10070000 - #define ISR_STACK_START 0x1FFFEFFC -#else - #ERROR "NOT SUPPORT NOW" -#endif + extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[]; + extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Length[]; + #define ISR_STACK_START (unsigned char *)(Image$$ARM_LIB_STACK$$ZI$$Base) + #define ISR_STACK_SIZE (uint32_t)(Image$$ARM_LIB_STACK$$ZI$$Length) + #define INITIAL_SP (uint32_t)(Image$$ARM_LIB_STACK$$ZI$$Base) #elif defined(__GNUC__) extern uint32_t __StackTop[]; extern uint32_t __StackLimit[]; -// extern uint32_t __end__[]; extern uint32_t __HeapLimit[]; #define INITIAL_SP (__StackTop) #endif @@ -54,4 +52,3 @@ #endif #endif - diff --git a/tools/targets/REALTEK_RTL8195AM.py b/tools/targets/REALTEK_RTL8195AM.py index 335fc57c844..ab80a082e95 100644 --- a/tools/targets/REALTEK_RTL8195AM.py +++ b/tools/targets/REALTEK_RTL8195AM.py @@ -6,6 +6,7 @@ import sys, array, struct, os, re, subprocess import hashlib +import shutil from tools.paths import TOOLS_BOOTLOADERS from datetime import datetime @@ -59,6 +60,9 @@ def get_version_by_time(): secs = int((datetime.now()-datetime(2016,11,1)).total_seconds()) return RAM2_VER + secs +# ---------------------------- +# main function +# ---------------------------- def prepend(image, entry, segment, image_ram2, image_ota): # parse input arguments @@ -226,13 +230,6 @@ def parse_load_segment(toolchain, image_elf): def write_load_segment(image_elf, image_bin, segment): file_elf = open(image_elf, "rb") - #delete folder with same name when using ARMCC - if os.path.isfile(image_bin): - pass - else: - for i in os.listdir(image_bin): - os.remove(os.path.join(image_bin, i)) - os.removedirs(image_bin) file_bin = open(image_bin, "wb") for (offset, addr, size) in segment: file_elf.seek(offset) @@ -248,6 +245,12 @@ def write_load_segment(image_elf, image_bin, segment): # main function # ---------------------------- def rtl8195a_elf2bin(t_self, image_elf, image_bin): + # remove target binary file/path + if os.path.isfile(image_bin): + os.remove(image_bin) + else: + shutil.rmtree(image_bin) + segment = parse_load_segment(t_self.name, image_elf) write_load_segment(image_elf, image_bin, segment) From 49a7e4b59e4f03a2c3ff0358e34b8f3e9e808005 Mon Sep 17 00:00:00 2001 From: Yuguo Zou Date: Tue, 1 Aug 2017 17:03:01 +0800 Subject: [PATCH 07/15] Fix GCC compile errors --- .../TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld | 8 ++++---- .../TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld index d731f9c076a..b344f36ec8f 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld @@ -162,21 +162,21 @@ SECTIONS .bss.sram1 (NOLOAD) : { - __bss_sram1_start__ = .; + __bss_sram_start__ = .; *rtl8195a_crypto.o (.bss* COMMON) *mbedtls*.o (.bss* COMMON) *(.bss.thread_stack_main) - __bss_sram1_end__ = .; + __bss_sram_end__ = .; } > SRAM1 .bss.sram2 (NOLOAD) : { __bss_start__ = .; - __bss_sram2_start__ = .; + __bss_dram_start__ = .; *(.bss*) *(COMMON) *(.bdsram.data*) - __bss_sram2_end__ = .; + __bss_dram_end__ = .; __bss_end__ = .; } > SRAM2 diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c index 93ac91387be..1486560b51c 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c @@ -54,10 +54,10 @@ void __iar_data_init_app(void) #else extern uint32_t __StackTop; -extern uint8_t __bss_sram1_start__[]; -extern uint8_t __bss_sram1_end__[]; -extern uint8_t __bss_sram2_start__[]; -extern uint8_t __bss_sram2_end__[]; +extern uint8_t __bss_sram_start__[]; +extern uint8_t __bss_sram_end__[]; +extern uint8_t __bss_dram_start__[]; +extern uint8_t __bss_dram_end__[]; #endif From 1d06bf427929d168d28c44c7169ea95f10b284ee Mon Sep 17 00:00:00 2001 From: Yuguo Zou Date: Tue, 1 Aug 2017 17:45:04 +0800 Subject: [PATCH 08/15] Disambiguate function __memset() in rtl8195a_init.c When use ARMCC, __memset is replaced by ARM's version which will make boot process hang. --- .../TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c index 1486560b51c..64d7b3eca5c 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c @@ -175,6 +175,7 @@ void TRAP_OverrideTable(uint32_t stackp) #endif } +extern _LONG_CALL_ void * __rtl_memset_v1_00(void * m , int c , size_t n); // Image2 Entry Function void PLAT_Start(void) { @@ -186,10 +187,10 @@ void PLAT_Start(void) // Clear RAM BSS #if defined (__ICCARM__) - __memset((void *)__bss_start__, 0, __bss_end__ - __bss_start__); + __rtl_memset_v1_00((void *)__bss_start__, 0, __bss_end__ - __bss_start__); #else - __memset((void *)__bss_sram_start__, 0, __bss_sram_end__ - __bss_sram_start__); - __memset((void *)__bss_dram_start__, 0, __bss_dram_end__ - __bss_dram_start__); + __rtl_memset_v1_00((void *)__bss_sram_start__, 0, __bss_sram_end__ - __bss_sram_start__); + __rtl_memset_v1_00((void *)__bss_dram_start__, 0, __bss_dram_end__ - __bss_dram_start__); #endif #if defined (__CC_ARM) From 56a98e11d1e936ef9b1a813273742554796879f7 Mon Sep 17 00:00:00 2001 From: Yuguo Zou Date: Thu, 3 Aug 2017 11:06:24 +0800 Subject: [PATCH 09/15] Move ticker related text to SRAM to fix GCC mbed-os-tests-mbed_drivers-timeout failing issue --- .../device/TOOLCHAIN_GCC_ARM/rtl8195a.ld | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld index b344f36ec8f..5b7888ecae0 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld @@ -70,6 +70,15 @@ SECTIONS *rtl8195a_crypto.o (.text* .rodata*) *mbedtls*.o (.text* .rodata*) *libc.a: (.text* .rodata*) + *Ticker.o (.text*) + *Timeout.o (.text*) + *TimerEvent.o (.text*) + *mbed_ticker_api.o (.text*) + *mbed_critical.o (.text*) + + *us_ticker.o (.text*) + *lib_peripheral_mbed_gcc.a: (.text*) + } > SRAM1 .text.sram2 : @@ -109,17 +118,18 @@ SECTIONS .data.sram1 : { . = ALIGN(4); - __sdram_data_start__ = .; + __sram_data_start__ = .; *rtl8195a_crypto*.o (.data*) *mbedtls*.o (.data*) - *(.sdram.data*) - __sdram_data_end__ = .; + __sram_data_end__ = .; } > SRAM1 .data.sram2 : { + __sdram_data_start__ = .; *(vtable) *(.data*) + *(.sdram.data*) . = ALIGN(4); /* preinit data */ @@ -143,6 +153,7 @@ SECTIONS . = ALIGN(4); + __sdram_data_end__ = .; /* All data end */ } > SRAM2 __data_end__ = .; From e16c2d283321e45a98e0ce3686fe73ddffbf32c3 Mon Sep 17 00:00:00 2001 From: Yuguo Zou Date: Thu, 17 Aug 2017 19:35:37 +0800 Subject: [PATCH 10/15] Add RTW8195AM support for mbed client with ARMCC Move ticker related code to SRAM due to time drift sensitive --- .../lib_peripheral_mbed_arm.ar | Bin 268426 -> 268322 bytes .../device/TOOLCHAIN_ARM_STD/rtl8195a.sct | 39 ++++++++++++++---- .../TARGET_RTL8195A/device/rtl8195a_init.c | 7 +++- .../TARGET_RTL8195A/device/rtl8195a_timer.h | 2 +- .../drivers/wlan/realtek/include/autoconf.h | 2 +- .../sdk/os/os_dep/include/osdep_service.h | 2 +- .../TARGET_Realtek/TARGET_AMEBA/us_ticker.c | 21 +++++----- 7 files changed, 49 insertions(+), 24 deletions(-) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/lib_peripheral_mbed_arm.ar b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/lib_peripheral_mbed_arm.ar index 805b4991054b3cb37af6bfd34104c8928631a1aa..9ab2e81f22a62e50e59776b5b5b80ed1612fc217 100644 GIT binary patch delta 9009 zcmeHMd013Owy&z&JG&rjE8U=gxIwe32{vc|6$7JA#!O6TP#G{LA!L!4s10fo)QQ1d zwKOrNHNJ5T%b;F$Of-2h5=^vR$i!?m?t>ErgNmXur*0Pw8ed-Wz0CLidHsFG@BU7m zI(6#YQ_C$D)q1b1@vixlSTmXt{<&hQLio2TuY@6dPqE5^cT5QX-xTYw@A&XMgnzSQ z{U3~79fI(0P)KkZx^J=etT26uNYC=nZbbgg#rmr{nCFSe{R&-y$j_DPrxCe-vEE(L z5RAw#DNW}P`MGinB6&{{e6OIN7VG_lAWQ!1FDsKGkZ`|JbPWl=q*#B6Qcs-?DkS`G z%Yi#c;KkbY@b5qcE<>z1gjYO3gbsu&!*vL|;;nOq;Us*1Gb79r|vCI`jP5 z?m|IaGHuNxTk2+1-UxJ6#!+Y;P&a?mba#>$Lye(iYu$<+34OX1MDu+Ay5?h3l|tNf zZlU8uh5y|ON|Pxr&Lmzw7KyX!4!6uw1>LrFUcb}1svV(yDs|)LqGDrAdSwPqzb)oo z|6GmCee2r;QJtxM3-&SAK8Fo0&*jfJT3C|z?DNGXqUMHC^tu^@ezG1P9pajf zU~Q|dm!qk4UC|BkqmEE~Q*7$kgufOS-x`6Bi3e^iw(iah`;VRJ<%Kv}u-i&e)Es-; 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zJNDR_H}M+exZwEoD{j(nP>Xl5+ksBg*2t~i@V%psePe>X>fn7Wi#mk2BIS1D_VztK z@0a{p%#Cj?D|Vh5hZw2O}5m3Z8@fUfI3iHslX=;`nt+79khz3jKM+l@zHM zpAa-5ZshI1XD1!nr47ypPCBt*hf@S5;T?)VlrIs8Yr|&A4@mR~9E1h?5u2;HtrDAS zqCh-G>_?Qp0D0`i;XbQQ%tGa9Kk2O&jJm}I&r*G8aKz& zWF4=4AGiNkb=pzl8!zQE zg!Z8T={)X3mPG9l+IIq8ch5$u55WtTmz48c6W}%ew$Q&BD?Sk7LLVucI}c9}zN167 t_UWRg9bm07bc*&*XBovuPO&=Qzom1ty?fe5(4C?*+Z*j_hF;ei_CKI#EuR1Y diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct index 60ffdb919e5..604a20c7ecf 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct @@ -18,29 +18,50 @@ LR_IRAM 0x10007000 (0x70000 - 0x7000) { } ER_IRAM +0 FIXED { - *rtl8195a_crypto.o(.text*, .rodata*) - *mbedtls*.o(.text*, .rodata*) - libc.a: (.text*, .rodata*) + *rtl8195a_crypto.o (+RO) + * (i.mbedtls*) + *libc.a (+RO) + + *rtx_*.o (+RO) + *Ticker.o (+RO) + *Timeout.o (+RO) + *rtx_timer.o (+RO) + *TimerEvent.o (+RO) + *mbed_ticker_api.o (+RO) + *mbed_critical.o (+RO) + *us_ticker.o (+RO) + + *lib_peripheral_mbed_arm.ar (+RO) } RW_IRAM1 +0 UNINIT FIXED { - *rtl8195a_crypto.o(.data*) - *mbedtls*.o(.data*) - libc.a: (.data*) + *rtl8195a_crypto.o(+RW) + ;*mbedtls*.o(+RW) + *libc.a (+RW) *(.sdram.data*) + *lib_peripheral_mbed_arm.ar (+RW) } RW_IRAM2 +0 UNINIT FIXED { - *rtl8195a_crypto.o(.bss*, COMMON) - *mbedtls*.o(.bss*, COMMON) - libc.a: (.bss*, COMMON) + *rtl8195a_crypto.o(+ZI, COMMON) + ;*mbedtls*.o(+ZI, COMMON) + *libc.a (+ZI, COMMON) *(.bss.thread_stack_main) + *lib_peripheral_mbed_arm.ar (+ZI, COMMON) } ARM_LIB_STACK (0x10070000 - 0x1000) EMPTY 0x1000 { } } +;LR_TCM 0x1FFF0000 0x10000 { +; TCM_OVERLAY 0x1FFF0000 0x10000 { +; lwip_mem.o(.bss*) +; lwip_memp.o(.bss*) +; *.o(.tcm.heap*) +; } +;} + LR_DRAM 0x30000000 0x200000 { ER_DRAM +0 FIXED { diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c index 64d7b3eca5c..11c686b85b2 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c @@ -125,9 +125,9 @@ void __TRAP_HardFaultHandler_Patch(uint32_t addr) * Otherwise it will keep hitting MemMange Fault on the same assembly code. * * To step to next command, we need parse the assembly code to check if - * it is 16-bit or 32-bit command. + * it is 16-bit or 32-bit command. * Ref: ARM Architecture Reference Manual (ARMv7-A and ARMv7-R edition), - * Chapter A6 - Thumb Instruction Set Encoding + * Chapter A6 - Thumb Instruction Set Encoding * * However, the fault assembly code (Ex. LDR or ADR) is not actually executed, * So the register value is un-predictable. @@ -202,6 +202,9 @@ void PLAT_Start(void) #else TRAP_OverrideTable(0x1FFFFFFC); #endif + extern HAL_TIMER_OP_EXT HalTimerOpExt; + __rtl_memset_v1_00((void *)&HalTimerOpExt, 0, sizeof(HalTimerOpExt)); + __rtl_memset_v1_00((void *)&HalTimerOp, 0, sizeof(HalTimerOp)); HalTimerOpInit_Patch(&HalTimerOp); SystemCoreClockUpdate(); diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_timer.h b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_timer.h index 2dd16255dbc..caf8223d118 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_timer.h +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_timer.h @@ -15,7 +15,7 @@ #define _RTL8195A_TIMER_H_ -#define TIMER_TICK_US 31 +#define TIMER_TICK_US 32 #define TIMER_LOAD_COUNT_OFF 0x00 #define TIMER_CURRENT_VAL_OFF 0x04 diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/include/autoconf.h b/targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/include/autoconf.h index 3d69fff6188..3079a12357d 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/include/autoconf.h +++ b/targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/include/autoconf.h @@ -107,7 +107,7 @@ #if defined(CONFIG_PLATFORM_AMEBA_X) #if !defined(CONFIG_PLATFORM_8711B) - #define CONFIG_USE_TCM_HEAP 1 /* USE TCM HEAP */ + #define CONFIG_USE_TCM_HEAP 0 /* USE TCM HEAP */ #endif #define CONFIG_RECV_TASKLET_THREAD #define CONFIG_XMIT_TASKLET_THREAD diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/sdk/os/os_dep/include/osdep_service.h b/targets/TARGET_Realtek/TARGET_AMEBA/sdk/os/os_dep/include/osdep_service.h index 68cba7a6ef9..d8d0600018b 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/sdk/os/os_dep/include/osdep_service.h +++ b/targets/TARGET_Realtek/TARGET_AMEBA/sdk/os/os_dep/include/osdep_service.h @@ -32,7 +32,7 @@ extern "C" { #if defined(CONFIG_PLATFORM_8195A) #ifndef CONFIG_USE_TCM_HEAP - #define CONFIG_USE_TCM_HEAP 1 /* USE TCM HEAP */ + #define CONFIG_USE_TCM_HEAP 0 /* USE TCM HEAP */ #endif #define USE_MUTEX_FOR_SPINLOCK 1 #endif diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/us_ticker.c b/targets/TARGET_Realtek/TARGET_AMEBA/us_ticker.c index 0efdca5d45e..4969b5f84b5 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/us_ticker.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/us_ticker.c @@ -77,21 +77,22 @@ uint32_t us_ticker_read() void us_ticker_set_interrupt(timestamp_t timestamp) { uint32_t cur_time_us; - uint32_t time_def; - + uint32_t time_dif; + HalTimerOp.HalTimerDis((u32)TimerAdapter.TimerId); cur_time_us = us_ticker_read(); - if ((uint32_t)timestamp >= cur_time_us) { - time_def = (uint32_t)timestamp - cur_time_us; + if ((uint32_t)timestamp > cur_time_us) { + time_dif = (uint32_t)timestamp - cur_time_us; } else { - time_def = 0xffffffff - cur_time_us + (uint32_t)timestamp; + HalTimerOpExt.HalTimerReLoad((u32)TimerAdapter.TimerId, 0xffffffff); + HalTimerOpExt.HalTimerIrqEn((u32)TimerAdapter.TimerId); + HalTimerOp.HalTimerEn((u32)TimerAdapter.TimerId); + NVIC_SetPendingIRQ(TIMER2_7_IRQ); + return; } - if (time_def < TIMER_TICK_US) { - time_def = TIMER_TICK_US; // at least 1 tick - } - HalTimerOp.HalTimerDis((u32)TimerAdapter.TimerId); - HalTimerOpExt.HalTimerReLoad((u32)TimerAdapter.TimerId, time_def); + TimerAdapter.TimerLoadValueUs = time_dif; + HalTimerOpExt.HalTimerReLoad((u32)TimerAdapter.TimerId, time_dif / TIMER_TICK_US); HalTimerOpExt.HalTimerIrqEn((u32)TimerAdapter.TimerId); HalTimerOp.HalTimerEn((u32)TimerAdapter.TimerId); From 1e398cfc60399b36b002aacc360551a84b94cbfd Mon Sep 17 00:00:00 2001 From: Yuguo Zou Date: Fri, 18 Aug 2017 19:31:50 +0800 Subject: [PATCH 11/15] Add RTL8195AM support for mbed client with IAR Move ticker related code to SRAM due to time drift sensitive --- .../lib_peripheral_mbed_gcc.a | Bin 648770 -> 648326 bytes .../device/TOOLCHAIN_GCC_ARM/rtl8195a.ld | 23 +- .../TOOLCHAIN_IAR/lib_peripheral_mbed_iar.a | Bin 353112 -> 353004 bytes .../device/TOOLCHAIN_IAR/rtl8195a.icf | 258 ++++++++++++------ tools/targets/REALTEK_RTL8195AM.py | 2 + 5 files changed, 193 insertions(+), 90 deletions(-) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/lib_peripheral_mbed_gcc.a b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/lib_peripheral_mbed_gcc.a index 9a6780af31942eadd64027419a6d9c32244ba149..352cdf86f647bcbbea5d640e052051ad396c09d1 100644 GIT binary patch delta 26119 zcmcJ&33yaR_V<5pbvoTi6A~bhge@y15SC_NWfuZO33~_#K~V!DW-ua((tr*kqJUA0 zQHCHoh>9$NG$JZ0j;JWOpr|-7Eb8DE1tH?X`~B8Ey}&rne}4b>_ul8Z{i$>6oT^iG z>(;%u`gZc_-rR+6<}OR~cJjAx*R^A}uA4Ilsz5`_RT8x?*kQT;|L%u>v|QYOQUCoO z_@5a6FWAPcj<=%sK(z3Gn|3#vX8jNMfa5T4hvmL_-*%tn{(rs){&OX<6Bbxzzx^pI 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znw{@}jOL9X(Y#wpRGZIotmP6CwStRbVR4HmQI7t~2Dvq5{!3YTV$g>~!DB=&AyI)j zBA1b<$YPO~l8FAK$Qwvh> SRAM1 .text.sram2 : @@ -203,7 +204,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) - . = ORIGIN(SRAM1) + LENGTH(SRAM1) - StackSize; + . = ORIGIN(SRAM1) + LENGTH(SRAM1) - StackSize; __HeapLimit = .; } > SRAM1 @@ -214,7 +215,7 @@ SECTIONS { __StackLimit = .; *(.stack) - . += StackSize - (. - __StackLimit); + . += StackSize - (. - __StackLimit); } > SRAM1 /* Set stack top to end of RAM, and stack limit move down by diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_IAR/lib_peripheral_mbed_iar.a b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_IAR/lib_peripheral_mbed_iar.a index 1ec9f66ca4d399e80281ccf455b52c618ba9d501..63c8d704d43797268f7a8de1e4e48621f17b2888 100644 GIT binary patch delta 2810 zcmcJRc~DhV9LIn6-1CsfVozBf#18JVJvKpHF!#j3rZfl9bj+wh1;iOGjnuSoMnvD_ znX#I*DbrD;Fuk;>*r;Vm+PIJ9$}~=3;Wnvd_WeB`kNfyPhBx2y`7P(3^ZT89=AJ(q z(sm@IHrzKeH7z?cEyJNUT-5BJXV+Nf-Tjv2|M0Wq_axKLxo~jVp7(t&M|!WoxjCW8 z>RwZ-!&!JBbWd=fV{x59sjg-2`Dd&e-Obcc{ceUQF?~g!Zy|q9WaH zh(22N0@F-IdYG|uqjtkn7d(*T8g^;tlD*>W#`cTacfp=#WZ@ZhV|}}pHmRHKYOXjt zyvt@ZEfs$`y5_oiOxlgJJH-&wGhMdCBO=GjkmhY?n^x%e!{SadzYN7QG~~b2f*w;6Rw6_maB@ zcBVQ~)s{+B?B}5}FUlNeH&S1aZ+oV5IEPBjzX!}yje#d+ zoAAq~zg_a(ppzh z@WJ?!g7(L0!l=I{<22QFU2gKFSjv<588t2PQ%%!V&Tq1zY678&_{$~oV+|nkXPrc3 zV}(74HLs&oT+a~Z@kCFuA})#*aj~o;iQ-t19M76h)Snf8E^)vg9< zRgK&A(JG)-TAlmqhiqz4VTV<3LJK{e2<*G}qGR2xoRMvr^ZMc8( zR2HPlL3GV!#hVNDA50`QXd*5p9$r-680mm zlrODa`0m8|x^dhpcFYFHWW(S`z^EMFUW%6_VL zzqF`^o3d#P-kk`Ph))XFmGG{(P8|x1e)3I3F{~(QEGtSB$BGifvtr8$%JH$VtFkj% zqH}%T04vXdG|F){?mf3ubOgBb7zc+QBPFBQ3r>be_Lj#S1Lq+ zdc?S&@k_?ZcYuL+fYwF84;YIXr!(GUtYh54IQ%Z~5#s~KbwCjrr{c0u5^J^1@+z9r zs1_t>36}T-oN`w|rdQh><3KhXH8j8Dx`6uPS5aA-?a0ZTJ!|poipu1LDGskMS!3os TnKaGw{lTA&__E8l)P?>BP?J0Z delta 2908 zcmcJRYitx%6vxlpxm)N%*h1NDVQIUxJmgVWx}{yfQp&4RY71%*iB>*ykmTu{-1G4oj|;Q(aQ#X@9JpW^TwRJDyzkVA|_bx|qCmb+7CQc9`@-?Qk9kVI)VW};iQT0<6ZOgE7s$YvV93y> z57kbXgTI!!T40AxEP?&so+d|K1m~*sJ46~-`3WvQ4KOp`$v_q3{gv1 z3e^^tO7#KDMsG?F~1Juiw@p|@nr|s zVBF|nh4FO{uV_X5)I+k$5LJwj-xUMCt|hoZoJIF zeK5bK8`n6PHxZF%RD{l$)bCVt$7ox1{g{!K|vjfJ`h72v&XdGUwO7k_hYFwlD zGWYx-FZD{>Taj|qU(tT|L3?Z?HLVw0iCWed&|g$m+T0${%$jS`uld?%wih40-`c9* z?~{01=kcE{iA^HV^9#+dj{GWjCdhOuD7v9hL1Aw)ORmfPn#!q_Zl(Pu_k|xNv;&@r zL~*PMMDeV%h}^8O_hp?NDGeV$KjtE${;cpD$od!>nHByStOb#~fEO9eToO4eo*%`G zz8(V!Qz21+4QP|GtkZ~cSrIUv^%0^8tT-6N5|vuH5P670tryQ=O}26(Dz-wc?2r@D zOrpnGeUY=KsYLUbQ;D9o_J-(kHl*XrVV!PNO~_Ke{4QV6>dm4XvPjdi%xyR2R!s%x z$YQm$Ne+xf?pToGCaN7xa&#C?A@GZ=jGh8%gjy_FKkUK(q+Tew92AziQSX(JG#Y-)4J$JKJN3c0$8BIYhf` zhr{fElW1f{@!MEYKp~*0v6~e&PlCqds~XNa5(%;5#HQL>#+ro$Sh1m(ZQa83PD(pgb)KPxIYh!qveU`0hTS##90=e2y}wSr->ZmfYY8n3F# zT?1l*a9Qb6WwqKMS1rDP2DSHu$Pg>NswyalxHfyyVQTL=(N`S_N_PzNtJ2sod64k< z)P{Mw$M}4*TlDv-mTcisf83E#Fyaf{uKq}Wp^^AvUp2lNQ(>Q)ohLlT{6e?*+NV+% zxIAhzCR{(kFI~OeEHhm9u+tI_vAkxas_!ZhaR?D}Q`NE=u1NG-sVc1s_WOm2Dm^5< zmU9an*vQUWn(~LF<*bIc$^><~N+j@%n$s$SDrLD%?=rp6L9I-mc2MD;px70*=XR!f z9dwPU)+XWes}tkwjXmX8cUE9LVwzi2_*K Date: Wed, 23 Aug 2017 16:10:58 +0800 Subject: [PATCH 12/15] Fix stack underflow issue Switch on TCM --- .../device/TOOLCHAIN_ARM_STD/rtl8195a.sct | 14 +++++++------- .../common/drivers/wlan/realtek/include/autoconf.h | 2 +- .../sdk/os/os_dep/include/osdep_service.h | 2 +- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct index 604a20c7ecf..045b8ccfe51 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct @@ -54,13 +54,13 @@ LR_IRAM 0x10007000 (0x70000 - 0x7000) { } } -;LR_TCM 0x1FFF0000 0x10000 { -; TCM_OVERLAY 0x1FFF0000 0x10000 { -; lwip_mem.o(.bss*) -; lwip_memp.o(.bss*) -; *.o(.tcm.heap*) -; } -;} +LR_TCM 0x1FFF0000 0x10000 { + TCM_OVERLAY 0x1FFF0000 0x10000 { + lwip_mem.o(.bss*) + lwip_memp.o(.bss*) + *.o(.tcm.heap*) + } +} LR_DRAM 0x30000000 0x200000 { diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/include/autoconf.h b/targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/include/autoconf.h index 3079a12357d..3d69fff6188 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/include/autoconf.h +++ b/targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/include/autoconf.h @@ -107,7 +107,7 @@ #if defined(CONFIG_PLATFORM_AMEBA_X) #if !defined(CONFIG_PLATFORM_8711B) - #define CONFIG_USE_TCM_HEAP 0 /* USE TCM HEAP */ + #define CONFIG_USE_TCM_HEAP 1 /* USE TCM HEAP */ #endif #define CONFIG_RECV_TASKLET_THREAD #define CONFIG_XMIT_TASKLET_THREAD diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/sdk/os/os_dep/include/osdep_service.h b/targets/TARGET_Realtek/TARGET_AMEBA/sdk/os/os_dep/include/osdep_service.h index d8d0600018b..68cba7a6ef9 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/sdk/os/os_dep/include/osdep_service.h +++ b/targets/TARGET_Realtek/TARGET_AMEBA/sdk/os/os_dep/include/osdep_service.h @@ -32,7 +32,7 @@ extern "C" { #if defined(CONFIG_PLATFORM_8195A) #ifndef CONFIG_USE_TCM_HEAP - #define CONFIG_USE_TCM_HEAP 0 /* USE TCM HEAP */ + #define CONFIG_USE_TCM_HEAP 1 /* USE TCM HEAP */ #endif #define USE_MUTEX_FOR_SPINLOCK 1 #endif From a0064ae47c5c2a06acbcd23d97ac1b44d96bc82e Mon Sep 17 00:00:00 2001 From: Yuguo Zou Date: Thu, 24 Aug 2017 11:26:40 +0800 Subject: [PATCH 13/15] Remove extension in cmd Remove extension in command line so the script could work on Linux --- tools/targets/REALTEK_RTL8195AM.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/targets/REALTEK_RTL8195AM.py b/tools/targets/REALTEK_RTL8195AM.py index 14ecf9b285d..dff50327ae9 100644 --- a/tools/targets/REALTEK_RTL8195AM.py +++ b/tools/targets/REALTEK_RTL8195AM.py @@ -153,7 +153,7 @@ def parse_load_segment_armcc(image_elf): (offset, addr, size) = (0, 0, 0) segment_list = [] in_segment = False - cmd = 'fromelf.exe --text -v --only=none ' + image_elf + cmd = 'fromelf --text -v --only=none ' + image_elf for line in subprocess.check_output(cmd, shell=True, universal_newlines=True).split("\n"): if line == "": pass @@ -201,7 +201,7 @@ def parse_load_segment_iar(image_elf): segment_list = [] in_segment = False - cmd = 'ielfdumparm.exe ' + image_elf + cmd = 'ielfdumparm ' + image_elf for line in subprocess.check_output(cmd, shell=True, universal_newlines=True).split("\n"): if line.startswith(" SEGMENTS:"): in_segment = True From c834b7faacd0ee8ce77010bd0b287af8b13b7ea6 Mon Sep 17 00:00:00 2001 From: Yuguo Zou Date: Mon, 28 Aug 2017 19:04:26 +0800 Subject: [PATCH 14/15] Fix bugs for RTL8195AM with debug profile of compilers 1. Add alignment / padding for postbuild segments 2. Clear tcm.bss section 3. Remove TRAP_OverrideTable(), move lines to PLAT_Start() --- .../device/TOOLCHAIN_ARM_STD/rtl8195a.sct | 4 +- .../device/TOOLCHAIN_GCC_ARM/rtl8195a.ld | 12 +++++- .../TARGET_RTL8195A/device/rtl8195a_init.c | 40 +++++++++---------- tools/targets/REALTEK_RTL8195AM.py | 4 ++ 4 files changed, 34 insertions(+), 26 deletions(-) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct index 045b8ccfe51..e76cc189fe8 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct @@ -56,8 +56,8 @@ LR_IRAM 0x10007000 (0x70000 - 0x7000) { LR_TCM 0x1FFF0000 0x10000 { TCM_OVERLAY 0x1FFF0000 0x10000 { - lwip_mem.o(.bss*) - lwip_memp.o(.bss*) + *lwip_mem.o(.bss*) + *lwip_memp.o(.bss*) *.o(.tcm.heap*) } } diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld index 88043bd5d1b..de7fb556de6 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld @@ -72,7 +72,6 @@ SECTIONS *libc.a: (.text* .rodata*) *Ticker.o (.text*) *Timeout.o (.text*) - /* *rtx_timer.o (.text*)*/ *TimerEvent.o (.text*) *mbed_ticker_api.o (.text*) *mbed_critical.o (.text*) @@ -207,7 +206,16 @@ SECTIONS . = ORIGIN(SRAM1) + LENGTH(SRAM1) - StackSize; __HeapLimit = .; } > SRAM1 - + + .TCM_overlay : + { + __bss_dtcm_start__ = .; + *lwip_mem.o (.bss*) + *lwip_memp.o (.bss*) + *(.tcm.heap*) + __bss_dtcm_end__ = .; + } > TCM + /* .stack_dummy section doesn't contains any symbols. It is only * used for linker to calculate size of stack sections, and assign * values to stack symbols later */ diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c index 11c686b85b2..9e1faafe2f3 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c @@ -30,12 +30,17 @@ extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Limit; extern uint8_t Image$$RW_IRAM2$$ZI$$Base[]; extern uint8_t Image$$RW_IRAM2$$ZI$$Limit[]; +extern uint8_t Image$$TCM_OVERLAY$$ZI$$Base[]; +extern uint8_t Image$$TCM_OVERLAY$$ZI$$Limit[]; extern uint8_t Image$$RW_DRAM2$$ZI$$Base[]; extern uint8_t Image$$RW_DRAM2$$ZI$$Limit[]; #define __bss_sram_start__ Image$$RW_IRAM2$$ZI$$Base #define __bss_sram_end__ Image$$RW_IRAM2$$ZI$$Limit +#define __bss_dtcm_start__ Image$$TCM_OVERLAY$$ZI$$Base +#define __bss_dtcm_end__ Image$$TCM_OVERLAY$$ZI$$Limit #define __bss_dram_start__ Image$$RW_DRAM2$$ZI$$Base #define __bss_dram_end__ Image$$RW_DRAM2$$ZI$$Limit +#define __stackp Image$$ARM_LIB_STACK$$ZI$$Limit #elif defined (__ICCARM__) @@ -50,15 +55,20 @@ void __iar_data_init_app(void) __bss_start__ = (uint8_t *)__section_begin(".ram.bss"); __bss_end__ = (uint8_t *)__section_end(".ram.bss"); } +#define __stackp CSTACK$$Limit #else extern uint32_t __StackTop; +extern uint32_t __StackLimit; extern uint8_t __bss_sram_start__[]; extern uint8_t __bss_sram_end__[]; +extern uint8_t __bss_dtcm_start__[]; +extern uint8_t __bss_dtcm_end__[]; extern uint8_t __bss_dram_start__[]; extern uint8_t __bss_dram_end__[]; +#define __stackp __StackTop #endif extern VECTOR_Func NewVectorTable[]; @@ -161,20 +171,6 @@ void TRAP_HardFaultHandler_Patch(void) } #endif -// Override original Interrupt Vector Table -void TRAP_OverrideTable(uint32_t stackp) -{ - // Set MSP - __set_MSP(stackp); - - // Override NMI Handler - NewVectorTable[2] = (VECTOR_Func) TRAP_NMIHandler; - - #if defined ( __ICCARM__ ) - NewVectorTable[3] = (VECTOR_Func) TRAP_HardFaultHandler_Patch; - #endif -} - extern _LONG_CALL_ void * __rtl_memset_v1_00(void * m , int c , size_t n); // Image2 Entry Function void PLAT_Start(void) @@ -190,18 +186,18 @@ void PLAT_Start(void) __rtl_memset_v1_00((void *)__bss_start__, 0, __bss_end__ - __bss_start__); #else __rtl_memset_v1_00((void *)__bss_sram_start__, 0, __bss_sram_end__ - __bss_sram_start__); + __rtl_memset_v1_00((void *)__bss_dtcm_start__, 0, __bss_dtcm_end__ - __bss_dtcm_start__); __rtl_memset_v1_00((void *)__bss_dram_start__, 0, __bss_dram_end__ - __bss_dram_start__); #endif -#if defined (__CC_ARM) - TRAP_OverrideTable((uint32_t)&Image$$ARM_LIB_STACK$$ZI$$Limit); -#elif defined (__ICCARM__) - TRAP_OverrideTable((uint32_t)&CSTACK$$Limit); -#elif defined (__GNUC__) - TRAP_OverrideTable((uint32_t)&__StackTop); -#else - TRAP_OverrideTable(0x1FFFFFFC); + // Set MSP + __set_MSP((uint32_t)&__stackp - 0x100); + // Overwrite vector table + NewVectorTable[2] = (VECTOR_Func) TRAP_NMIHandler; +#if defined ( __ICCARM__ ) + NewVectorTable[3] = (VECTOR_Func) TRAP_HardFaultHandler_Patch; #endif + extern HAL_TIMER_OP_EXT HalTimerOpExt; __rtl_memset_v1_00((void *)&HalTimerOpExt, 0, sizeof(HalTimerOpExt)); __rtl_memset_v1_00((void *)&HalTimerOp, 0, sizeof(HalTimerOp)); diff --git a/tools/targets/REALTEK_RTL8195AM.py b/tools/targets/REALTEK_RTL8195AM.py index dff50327ae9..86eda42934f 100644 --- a/tools/targets/REALTEK_RTL8195AM.py +++ b/tools/targets/REALTEK_RTL8195AM.py @@ -240,6 +240,10 @@ def write_load_segment(image_elf, image_bin, segment): write_fixed_width_value(size, 8, file_bin) # write load segment file_bin.write(file_elf.read(size)) + delta = size % 4 + if delta != 0: + padding = 4 - delta + write_fixed_width_value(0x0, padding * 2, file_bin) file_bin.close() file_elf.close() From 67f1ee53439c10876ed23c691b1c68e0a71869f6 Mon Sep 17 00:00:00 2001 From: Yuguo Zou Date: Tue, 5 Sep 2017 19:11:38 +0800 Subject: [PATCH 15/15] Resolve including directory issue in GCC linker script for Ameba Should not make assumption of specific directory when include .h from linker script --- .../TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld index de7fb556de6..4c05ef96414 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld @@ -14,7 +14,7 @@ * limitations under the License. */ -INCLUDE "mbed-os/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a_rom.h" +INCLUDE "rtl8195a_rom.h" /* DATA_RAM: We cannot put Code(.text) in DATA_RAM, this region is reserved for Image1(boot loader). But we can put .data/.bss of Image2 in this region */ MEMORY