From c638d2cdcb29ac20fcc2c504be79467b99c7b37a Mon Sep 17 00:00:00 2001 From: Jimmy Brisson Date: Fri, 9 Dec 2016 11:33:45 -0600 Subject: [PATCH 1/4] Fix typo in IAR definitions --- tools/export/iar/iar_definitions.json | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/tools/export/iar/iar_definitions.json b/tools/export/iar/iar_definitions.json index 5eb71cba442..0eb33aee9b4 100644 --- a/tools/export/iar/iar_definitions.json +++ b/tools/export/iar/iar_definitions.json @@ -1,5 +1,5 @@ { - "stm32l476vg": { + "STM32L476VG": { "OGChipSelectEditMenu": "STM32L476VG\tST STM32L476VG" }, "LPC11U24FBD48/401": { @@ -17,7 +17,7 @@ "STM32F042K6": { "OGChipSelectEditMenu": "STM32F042x6\tST STM32F042x6" }, - "stm32l476rg": { + "STM32L476RG": { "OGChipSelectEditMenu": "STM32L476RG\tST STM32L476RG" }, "STM32L011K4": { @@ -71,7 +71,7 @@ "STM32L073RZ": { "OGChipSelectEditMenu": "STM32L073RZ\tST STM32L073RZ" }, - "stm32ff746zg": { + "STM32F746ZG": { "OGChipSelectEditMenu": "STM32F746ZG\tST STM32F746ZG", "CoreVariant": 41, "GFPUCoreSlave2": 41, @@ -83,7 +83,7 @@ "LPC812M101JDH20": { "OGChipSelectEditMenu": "LPC812M101\tNXP LPC812M101" }, - "stm32f746ng": { + "STM32F746NG": { "OGChipSelectEditMenu": "STM32F746NG\tST STM32F746NG" }, "STM32F411RE": { From 2481c468ce1e689ff9368dbfe3da6136213d020a Mon Sep 17 00:00:00 2001 From: Jimmy Brisson Date: Mon, 12 Dec 2016 15:00:05 -0600 Subject: [PATCH 2/4] Update IAR template and STM M7 part options --- tools/export/iar/__init__.py | 4 +- tools/export/iar/ewp.tmpl | 307 ++++++++++++++------------ tools/export/iar/iar_definitions.json | 11 +- 3 files changed, 171 insertions(+), 151 deletions(-) diff --git a/tools/export/iar/__init__.py b/tools/export/iar/__init__.py index e07d7d99262..2451f94f306 100644 --- a/tools/export/iar/__init__.py +++ b/tools/export/iar/__init__.py @@ -69,7 +69,9 @@ def iar_device(self): "CoreVariant": '', "GFPUCoreSlave": '', "GFPUCoreSlave2": 40, - "GBECoreSlave": 35 + "GBECoreSlave": 35, + "FPU2": 0, + "NrRegs": 0, } iar_defaults.update(device_info) diff --git a/tools/export/iar/ewp.tmpl b/tools/export/iar/ewp.tmpl index 3ba5e4be8aa..47cc365e490 100644 --- a/tools/export/iar/ewp.tmpl +++ b/tools/export/iar/ewp.tmpl @@ -10,153 +10,166 @@ General 3 - - 22 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + 24 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM diff --git a/tools/export/iar/iar_definitions.json b/tools/export/iar/iar_definitions.json index 0eb33aee9b4..9ca7eb80446 100644 --- a/tools/export/iar/iar_definitions.json +++ b/tools/export/iar/iar_definitions.json @@ -73,9 +73,10 @@ }, "STM32F746ZG": { "OGChipSelectEditMenu": "STM32F746ZG\tST STM32F746ZG", + "GBECoreSlave": 41, "CoreVariant": 41, - "GFPUCoreSlave2": 41, - "GBECoreSlave": 41 + "FPU2": 6, + "NrRegs": 1 }, "MKL43Z256xxx4": { "OGChipSelectEditMenu": "MKL43Z256xxx4\tFreescale MKL43Z256xxx4" @@ -84,7 +85,11 @@ "OGChipSelectEditMenu": "LPC812M101\tNXP LPC812M101" }, "STM32F746NG": { - "OGChipSelectEditMenu": "STM32F746NG\tST STM32F746NG" + "OGChipSelectEditMenu": "STM32F746NG\tST STM32F746NG", + "GBECoreSlave": 41, + "CoreVariant": 41, + "FPU2": 6, + "NrRegs": 1 }, "STM32F411RE": { "OGChipSelectEditMenu": "STM32F411RE\tST STM32F411RE" From 80d47e21ff81f300f06cc4549f665f77c997569c Mon Sep 17 00:00:00 2001 From: Jimmy Brisson Date: Mon, 12 Dec 2016 18:20:03 -0600 Subject: [PATCH 3/4] Remove special case template for F746ZG --- tools/export/iar/__init__.py | 3 +- tools/export/iar/iar_nucleo_f746zg.ewp.tmpl | 1936 ------------------- 2 files changed, 1 insertion(+), 1938 deletions(-) delete mode 100644 tools/export/iar/iar_nucleo_f746zg.ewp.tmpl diff --git a/tools/export/iar/__init__.py b/tools/export/iar/__init__.py index 2451f94f306..671f6336326 100644 --- a/tools/export/iar/__init__.py +++ b/tools/export/iar/__init__.py @@ -33,8 +33,7 @@ class IAR(Exporter): and DeviceCMSIS.check_supported(target)] SPECIAL_TEMPLATES = { - 'rz_a1h' : 'iar/iar_rz_a1h.ewp.tmpl', - 'nucleo_f746zg' : 'iar/iar_nucleo_f746zg.ewp.tmpl' + 'rz_a1h' : 'iar/iar_rz_a1h.ewp.tmpl' } def iar_groups(self, grouped_src): diff --git a/tools/export/iar/iar_nucleo_f746zg.ewp.tmpl b/tools/export/iar/iar_nucleo_f746zg.ewp.tmpl deleted file mode 100644 index f42f88222e1..00000000000 --- a/tools/export/iar/iar_nucleo_f746zg.ewp.tmpl +++ /dev/null @@ -1,1936 +0,0 @@ - - - - 2 - - {{name}} - - ARM - - 1 - - General - 3 - - 24 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 31 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 9 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 1 - - - - - - - - - CUSTOM - 3 - - - - 0 - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 16 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 1 - - - - - - - BILINK - 0 - - - - - Release - - ARM - - 0 - - General - 3 - - 24 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 31 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 9 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 0 - - - - - - - - - CUSTOM - 3 - - - - 0 - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 16 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 0 - - - - - - - BILINK - 0 - - - - {% for group in groups %} - - {{group.name}} - {% for file in group.files %} - - {{file}} - - {% endfor %} - - {% endfor %} - 2 - - From e29135ed1c1e019ccba6f627e4ef30ecaecd7a8a Mon Sep 17 00:00:00 2001 From: Jimmy Brisson Date: Mon, 12 Dec 2016 18:46:47 -0600 Subject: [PATCH 4/4] Remove special case for RZ-A1H --- tools/export/iar/__init__.py | 11 +- tools/export/iar/ewp.tmpl | 2 +- tools/export/iar/iar_rz_a1h.ewp.tmpl | 932 --------------------------- 3 files changed, 3 insertions(+), 942 deletions(-) delete mode 100644 tools/export/iar/iar_rz_a1h.ewp.tmpl diff --git a/tools/export/iar/__init__.py b/tools/export/iar/__init__.py index 671f6336326..dafedebf216 100644 --- a/tools/export/iar/__init__.py +++ b/tools/export/iar/__init__.py @@ -32,10 +32,6 @@ class IAR(Exporter): obj.device_name in IAR_DEFS.keys() and "IAR" in obj.supported_toolchains and DeviceCMSIS.check_supported(target)] - SPECIAL_TEMPLATES = { - 'rz_a1h' : 'iar/iar_rz_a1h.ewp.tmpl' - } - def iar_groups(self, grouped_src): """Return a namedtuple of group info Positional Arguments: @@ -88,9 +84,6 @@ def format_src(self, srcs): grouped[group] = [self.format_file(src) for src in files] return grouped - def get_ewp_template(self): - return self.SPECIAL_TEMPLATES.get(self.target.lower(), 'iar/ewp.tmpl') - def generate(self): """Generate the .eww, .ewd, and .ewp files""" srcs = self.resources.headers + self.resources.s_sources + \ @@ -118,9 +111,9 @@ def generate(self): } ctx.update(flags) - self.gen_file('iar/eww.tmpl', ctx, self.project_name+".eww") + self.gen_file('iar/eww.tmpl', ctx, self.project_name + ".eww") self.gen_file('iar/ewd.tmpl', ctx, self.project_name + ".ewd") - self.gen_file(self.get_ewp_template(), ctx, self.project_name + ".ewp") + self.gen_file('iar/ewp.tmpl', ctx, self.project_name + ".ewp") @staticmethod def build(project_name, log_name="build_log.txt", cleanup=True): diff --git a/tools/export/iar/ewp.tmpl b/tools/export/iar/ewp.tmpl index 47cc365e490..943c148cbcc 100644 --- a/tools/export/iar/ewp.tmpl +++ b/tools/export/iar/ewp.tmpl @@ -162,7 +162,7 @@