From 7da6d19b024c3d74d0e765db26861728e24b5786 Mon Sep 17 00:00:00 2001 From: tomoyuki yamanaka Date: Mon, 9 May 2016 12:26:19 +0900 Subject: [PATCH] In IAR compile, change the sequence of the ROM section. we changed the sequence of ROM section to " " when compiled with the IAR. --- .../TARGET_RENESAS/TARGET_RZ_A1H/TOOLCHAIN_IAR/MBRZA1H.icf | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/libraries/mbed/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/TOOLCHAIN_IAR/MBRZA1H.icf b/libraries/mbed/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/TOOLCHAIN_IAR/MBRZA1H.icf index ebe95c51ecc..3bd5dca30fb 100644 --- a/libraries/mbed/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/TOOLCHAIN_IAR/MBRZA1H.icf +++ b/libraries/mbed/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/TOOLCHAIN_IAR/MBRZA1H.icf @@ -38,6 +38,7 @@ define region RetRAM_region = mem:[from __ICFEDIT_region_RetRAM_start__ define region MirrorRAM_region = mem:[from __ICFEDIT_region_MirrorRAM_start__ to __ICFEDIT_region_MirrorRAM_end__]; define region MirrorRetRAM_region = mem:[from __ICFEDIT_region_MirrorRetRAM_start__ to __ICFEDIT_region_MirrorRetRAM_end__]; +define block ROM_FIXED_ORDER with fixed order { ro code, ro data }; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; define block SVC_STACK with alignment = 8, size = __ICFEDIT_size_svcstack__ { }; define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { }; @@ -48,11 +49,11 @@ define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; initialize by copy { readwrite }; do not initialize { section .noinit }; -do not initialize { section MMU_TT }; +do not initialize { section .retram }; place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; -place in ROM_region { readonly }; +place in ROM_region { readonly, block ROM_FIXED_ORDER }; place in RAM_region { readwrite, block CSTACK, block SVC_STACK, block IRQ_STACK, block FIQ_STACK, block UND_STACK, block ABT_STACK, block HEAP };