From 1af62f87d296e34b2355b4749c2637761084d7b0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?M=C3=A5ns=20Nilsson?= Date: Tue, 2 Apr 2024 19:46:09 +0200 Subject: [PATCH] Add missing MVE support for int16 convolution (#124) - Removes arm_convolve_s16 - Updates arm_nn_mat_mul_kernel_s16.c to be used by scalar and DSP - Adds arm_nn_mat_mult_nt_t_s16.c with MVE support - Refactors and renames arm_convolve_fast_s16 to arm_convolve_s16 so that all variants use the previously named fast s16 version. - Updates unit tests to increase test coverage for convolution s16 - Keras based unit test uses null bias as opposed to array with zeroes - Correct PDSC file BUGS=https://github.com/ARM-software/CMSIS-NN/issues/101 https://github.com/ARM-software/CMSIS-NN/issues/119 --- ARM.CMSIS-NN.pdsc | 7 +- Include/arm_nnfunctions.h | 68 +- Include/arm_nnsupportfunctions.h | 54 +- .../arm_convolve_fast_s16.c | 232 ------ .../arm_convolve_get_buffer_sizes_s16.c | 58 +- .../arm_convolve_get_buffer_sizes_s8.c | 12 +- .../ConvolutionFunctions/arm_convolve_s16.c | 213 ++++- .../arm_convolve_wrapper_s16.c | 38 +- .../arm_depthwise_conv_fast_s16.c | 8 +- .../arm_nn_mat_mult_kernel_s16.c} | 169 ++-- .../arm_nn_mat_mult_nt_t_s16.c | 265 ++++++ .../arm_nn_vec_mat_mult_t_s16.c | 8 +- Tests/UnitTest/CMakeLists.txt | 1 - .../TestData/int16xint8/biases_data.h | 6 +- .../TestData/int16xint8/config_data.h | 26 +- .../TestData/int16xint8/input_data.h | 333 +++++++- .../TestData/int16xint8/output_mult_data.h | 6 +- .../TestData/int16xint8/output_ref_data.h | 13 +- .../TestData/int16xint8/output_shift_data.h | 6 +- .../TestCases/TestData/int16xint8/test_data.h | 4 +- .../TestData/int16xint8/weights_data.h | 356 +++++++- .../TestData/int16xint8_spill/biases_data.h | 6 + .../TestData/int16xint8_spill/config_data.h | 24 + .../TestData/int16xint8_spill/input_data.h | 281 +++++++ .../int16xint8_spill/output_mult_data.h | 7 + .../int16xint8_spill/output_ref_data.h | 12 + .../int16xint8_spill/output_shift_data.h | 6 + .../TestData/int16xint8_spill/test_data.h | 9 + .../TestData/int16xint8_spill/weights_data.h | 781 ++++++++++++++++++ .../TestData/int16xint8_spill2/biases_data.h | 6 + .../TestData/int16xint8_spill2/config_data.h | 24 + .../TestData/int16xint8_spill2/input_data.h | 66 ++ .../int16xint8_spill2/output_mult_data.h | 7 + .../int16xint8_spill2/output_ref_data.h | 12 + .../int16xint8_spill2/output_shift_data.h | 6 + .../TestData/int16xint8_spill2/test_data.h | 9 + .../TestData/int16xint8_spill2/weights_data.h | 176 ++++ .../TestData/requantize_s64/biases_data.h | 6 +- .../TestData/requantize_s64/config_data.h | 20 +- .../TestData/requantize_s64/input_data.h | 13 +- .../requantize_s64/output_mult_data.h | 7 +- .../TestData/requantize_s64/output_ref_data.h | 10 +- .../requantize_s64/output_shift_data.h | 6 +- .../TestData/requantize_s64/test_data.h | 4 +- .../TestData/requantize_s64/weights_data.h | 20 +- .../test_arm_convolve_fast_s16/CMakeLists.txt | 23 - .../Unity/unity_test_arm_convolve_fast_s16.c | 51 -- .../test_arm_convolve_fast_s16.c | 328 -------- .../Unity/unity_test_arm_convolve_s16.c | 4 +- .../test_arm_convolve_s16.c | 207 ++++- Tests/UnitTest/conv_settings.py | 30 +- Tests/UnitTest/generate_test_data.py | 80 +- 52 files changed, 3109 insertions(+), 1015 deletions(-) delete mode 100644 Source/ConvolutionFunctions/arm_convolve_fast_s16.c rename Source/{NNSupportFunctions/arm_nn_mat_mul_kernel_s16.c => ConvolutionFunctions/arm_nn_mat_mult_kernel_s16.c} (62%) create mode 100644 Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s16.c create mode 100644 Tests/UnitTest/TestCases/TestData/int16xint8_spill/biases_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/int16xint8_spill/config_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/int16xint8_spill/input_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/int16xint8_spill/output_mult_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/int16xint8_spill/output_ref_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/int16xint8_spill/output_shift_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/int16xint8_spill/test_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/int16xint8_spill/weights_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/int16xint8_spill2/biases_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/int16xint8_spill2/config_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/int16xint8_spill2/input_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/int16xint8_spill2/output_mult_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/int16xint8_spill2/output_ref_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/int16xint8_spill2/output_shift_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/int16xint8_spill2/test_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/int16xint8_spill2/weights_data.h delete mode 100644 Tests/UnitTest/TestCases/test_arm_convolve_fast_s16/CMakeLists.txt delete mode 100644 Tests/UnitTest/TestCases/test_arm_convolve_fast_s16/Unity/unity_test_arm_convolve_fast_s16.c delete mode 100644 Tests/UnitTest/TestCases/test_arm_convolve_fast_s16/test_arm_convolve_fast_s16.c diff --git a/ARM.CMSIS-NN.pdsc b/ARM.CMSIS-NN.pdsc index d5240368..5dbf5495 100644 --- a/ARM.CMSIS-NN.pdsc +++ b/ARM.CMSIS-NN.pdsc @@ -38,6 +38,7 @@ + @@ -53,7 +54,6 @@ - @@ -69,13 +69,13 @@ - + @@ -101,9 +101,9 @@ + - @@ -112,6 +112,7 @@ + diff --git a/Include/arm_nnfunctions.h b/Include/arm_nnfunctions.h index ab4c0eca..e4604c17 100644 --- a/Include/arm_nnfunctions.h +++ b/Include/arm_nnfunctions.h @@ -21,8 +21,8 @@ * Title: arm_nnfunctions.h * Description: Public header file for CMSIS NN Library * - * $Date: 20 February 2024 - * $Revision: V.14.0.0 + * $Date: 11 March 2024 + * $Revision: V.15.0.0 * * Target : Arm(R) M-Profile Architecture @@ -375,8 +375,10 @@ arm_cmsis_nn_status arm_convolve_s4(const cmsis_nn_context *ctx, * @param[in] bias_data Optional bias data pointer. Data type: int32 * @param[in] output_dims Output tensor dimensions. Format: [N, H, W, C_OUT] * @param[out] output_data Output data pointer. Data type: int8 - - * @return The function returns ARM_CMSIS_NN_SUCCESS + * + * @return The function returns ARM_CMSIS_NN_SUCCESS if successful or + * ARM_CMSIS_NN_ARG_ERROR if incorrect arguments or + * ARM_CMSIS_NN_NO_IMPL_ERROR * * @details * 1. Supported framework: TensorFlow Lite micro @@ -522,8 +524,10 @@ int32_t arm_transpose_conv_s8_get_buffer_size_mve(const cmsis_nn_dims *input_dim * @param[in] bias_data Optional bias data pointer. Data type: int64 * @param[in] output_dims Output tensor dimensions. Format: [N, H, W, C_OUT] * @param[out] output_data Output data pointer. Data type: int16 - - * @return The function returns ARM_CMSIS_NN_SUCCESS + * + * @return The function returns ARM_CMSIS_NN_SUCCESS if successful or + * ARM_CMSIS_NN_ARG_ERROR if incorrect arguments or + * ARM_CMSIS_NN_NO_IMPL_ERROR * * @details * 1. Supported framework: TensorFlow Lite micro @@ -541,47 +545,6 @@ arm_cmsis_nn_status arm_convolve_s16(const cmsis_nn_context *ctx, const int64_t *bias_data, const cmsis_nn_dims *output_dims, int16_t *output_data); -/** - * @brief Optimized s16 convolution function - * @param[in, out] ctx Function context that contains the additional buffer if required by the function. - * arm_convolve_fast_s16_get_buffer_size will return the buffer_size if required. - * The caller is expected to clear the buffer, if applicable, for security reasons. - * @param[in] conv_params Convolution parameters (e.g. strides, dilations, pads,...). - * conv_params->input_offset : Not used - * conv_params->output_offset : Not used - * @param[in] quant_params Per-channel quantization info. - * It contains the multiplier and shift values to be applied to each output channel - * @param[in] input_dims Input (activation) tensor dimensions. Format: [N, H, W, C_IN] - * @param[in] input_data Input (activation) data pointer. Data type: int16 - * @param[in] filter_dims Filter tensor dimensions. Format: [C_OUT, HK, WK, C_IN] where HK and WK are the - * spatial filter dimensions. (filter_dims->w * filter_dims->h * input_dims->c) must not - exceed 512 - * @param[in] filter_data Filter data pointer. Data type: int8 - * @param[in] bias_dims Bias tensor dimensions. Format: [C_OUT] - * @param[in] bias_data Optional bias data pointer. Data type: int64 - * @param[in] output_dims Output tensor dimensions. Format: [N, H, W, C_OUT] - * @param[out] output_data Output data pointer. Data type: int16 - - * @return The function returns ARM_CMSIS_NN_SUCCESS - * - * @details - * 1. Supported framework: TensorFlow Lite micro - * 2. Additional memory is required for optimization. Refer to argument 'ctx' for details. - * 3. Implementation supports kernel volumes (filter width * filter height * input channels) < 512. - * - */ - -arm_cmsis_nn_status arm_convolve_fast_s16(const cmsis_nn_context *ctx, - const cmsis_nn_conv_params *conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const int16_t *input_data, - const cmsis_nn_dims *filter_dims, - const int8_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int64_t *bias_data, - const cmsis_nn_dims *output_dims, - int16_t *output_data); /** * @brief Get the required buffer size for s16 convolution function @@ -594,17 +557,6 @@ arm_cmsis_nn_status arm_convolve_fast_s16(const cmsis_nn_context *ctx, */ int32_t arm_convolve_s16_get_buffer_size(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *filter_dims); -/** - * @brief Get the required buffer size for fast s16 convolution function - * - * @param[in] input_dims Input (activation) tensor dimensions. Format: [N, H, W, C_IN] - * @param[in] filter_dims Filter tensor dimensions. Format: [C_OUT, HK, WK, C_IN] where HK and WK - * are the spatial filter dimensions - * @return The function returns required buffer size(bytes) - * - */ -int32_t arm_convolve_fast_s16_get_buffer_size(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *filter_dims); - /** * @brief Fast s4 version for 1x1 convolution (non-square shape) * diff --git a/Include/arm_nnsupportfunctions.h b/Include/arm_nnsupportfunctions.h index f2b7f29b..70c57022 100644 --- a/Include/arm_nnsupportfunctions.h +++ b/Include/arm_nnsupportfunctions.h @@ -21,8 +21,8 @@ * Title: arm_nnsupportfunctions.h * Description: Public header file of support functions for CMSIS NN Library * - * $Date: 14 February 2024 - * $Revision: V.19.0.0 + * $Date: 22 March 2024 + * $Revision: V.20.0.0 * * Target : Arm(R) M-Profile Architecture * -------------------------------------------------------------------- */ @@ -63,6 +63,10 @@ extern "C" { // will result in lower scratch buffer usage. #define CH_IN_BLOCK_MVE (124) +// For input of int16 when number of columns are above this limit int64 accumulation is needed +// to not loose precision. +#define MAX_COL_COUNT (512) + /** * @brief definition to pack four 8 bit values. */ @@ -281,8 +285,8 @@ int16_t *arm_nn_mat_mult_kernel_s16(const int8_t *input_a, const int32_t output_ch, const int32_t *out_shift, const int32_t *out_mult, - const int16_t activation_min, - const int16_t activation_max, + const int32_t activation_min, + const int32_t activation_max, const int32_t num_col_a, const int64_t *const output_bias, int16_t *out_0); @@ -445,6 +449,48 @@ arm_cmsis_nn_status arm_nn_mat_mult_nt_t_s8(const int8_t *lhs, const int32_t row_address_offset, const int32_t lhs_cols_offset); +/** + * @brief General Matrix-multiplication function with per-channel requantization and int16 input (LHS) and output. + * This function assumes: + * - LHS input matrix NOT transposed (nt) + * - RHS input matrix transposed (t) + * + * @note This operation also performs the broadcast bias addition before the requantization + * + * @param[in] lhs Pointer to the LHS input matrix + * @param[in] rhs Pointer to the RHS input matrix + * @param[in] bias Pointer to the bias vector. The length of this vector is equal to the number of + * output columns (or RHS input rows) + * @param[out] dst Pointer to the output matrix with "m" rows and "n" columns + * @param[in] dst_multipliers Pointer to the multipliers vector needed for the per-channel requantization. + * The length of this vector is equal to the number of output columns (or RHS input + * rows) + * @param[in] dst_shifts Pointer to the shifts vector needed for the per-channel requantization. The length + * of this vector is equal to the number of output columns (or RHS input rows) + * @param[in] lhs_rows Number of LHS input rows + * @param[in] rhs_rows Number of RHS input rows + * @param[in] rhs_cols Number of LHS/RHS input columns + * @param[in] activation_min Minimum value to clamp down the output. Range : int16 + * @param[in] activation_max Maximum value to clamp up the output. Range : int16 + * + * @details MVE implementation only. + * + * @return The function returns ARM_CMSIS_NN_SUCCESS or + * ARM_CMSIS_NN_NO_IMPL_ERROR if not for MVE + * + */ +arm_cmsis_nn_status arm_nn_mat_mult_nt_t_s16(const int16_t *lhs, + const int8_t *rhs, + const int64_t *bias, + int16_t *dst, + const int32_t *dst_multipliers, + const int32_t *dst_shifts, + const int32_t lhs_rows, + const int32_t rhs_rows, + const int32_t rhs_cols, + const int32_t activation_min, + const int32_t activation_max); + /** * @brief General Matrix-multiplication function with int8 input and int32 output. * This function assumes: diff --git a/Source/ConvolutionFunctions/arm_convolve_fast_s16.c b/Source/ConvolutionFunctions/arm_convolve_fast_s16.c deleted file mode 100644 index 5348c3f7..00000000 --- a/Source/ConvolutionFunctions/arm_convolve_fast_s16.c +++ /dev/null @@ -1,232 +0,0 @@ -/* - * SPDX-FileCopyrightText: Copyright 2010-2023 Arm Limited and/or its affiliates - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_convolve_fast_s16.c - * Description: Optimized s16 version of convolution. - * - * $Date: 23 March 2023 - * $Revision: V.2.3.0 - * - * Target : Arm(R) M-Profile Architecture - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup Public - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/* - * Basic s16 convolution function. - * - * Refer header file for details. Optimal use case for the DSP/MVE implementation is when input and output channels - * are multiples of 4 or atleast greater than 4. - * - */ - -arm_cmsis_nn_status arm_convolve_fast_s16(const cmsis_nn_context *ctx, - const cmsis_nn_conv_params *conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const int16_t *input_data, - const cmsis_nn_dims *filter_dims, - const int8_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int64_t *bias_data, - const cmsis_nn_dims *output_dims, - int16_t *output_data) -{ - (void)bias_dims; - if (filter_dims->w * filter_dims->h * input_dims->c >= 512) - { - return ARM_CMSIS_NN_ARG_ERROR; - } - - if (ctx->buf == NULL && arm_convolve_s8_get_buffer_size(input_dims, filter_dims) > 0) - { - return ARM_CMSIS_NN_ARG_ERROR; - } - int16_t *buffer_a = (int16_t *)ctx->buf; - - const int32_t input_batches = input_dims->n; - const int32_t input_x = input_dims->w; - const int32_t input_y = input_dims->h; - const int32_t input_ch = input_dims->c; - const int32_t kernel_x = filter_dims->w; - const int32_t kernel_y = filter_dims->h; - const int32_t output_x = output_dims->w; - const int32_t output_y = output_dims->h; - const int32_t output_ch = output_dims->c; - const int32_t rhs_cols = input_ch * kernel_y * kernel_x; - - const int32_t pad_x = conv_params->padding.w; - const int32_t pad_y = conv_params->padding.h; - const int32_t stride_x = conv_params->stride.w; - const int32_t stride_y = conv_params->stride.h; - - const int16_t out_activation_min = conv_params->activation.min; - const int16_t out_activation_max = conv_params->activation.max; - int32_t *output_mult = quant_params->multiplier; - int32_t *output_shift = quant_params->shift; - - for (int i_batch = 0; i_batch < input_batches; i_batch++) - { -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Generate two columns from the input tensor a GEMM computation */ - int16_t *two_column_buf = buffer_a; - int16_t *out = output_data; - /* This part implements the im2col function */ - for (int32_t i_out_y = 0; i_out_y < output_y; i_out_y++) - { - for (int32_t i_out_x = 0; i_out_x < output_x; i_out_x++) - { - for (int32_t i_ker_y = i_out_y * stride_y - pad_y; i_ker_y < i_out_y * stride_y - pad_y + kernel_y; - i_ker_y++) - { - for (int32_t i_ker_x = i_out_x * stride_x - pad_x; i_ker_x < i_out_x * stride_x - pad_x + kernel_x; - i_ker_x++) - { - if (i_ker_y < 0 || i_ker_y >= input_y || i_ker_x < 0 || i_ker_x >= input_x) - { - /* Filling 0 for out-of-bound paddings */ - arm_memset_s8((int8_t *)two_column_buf, 0, sizeof(int16_t) * input_ch); - } - else - { - arm_memcpy_s8((int8_t *)two_column_buf, - (const int8_t *)(input_data + (i_ker_y * input_x + i_ker_x) * input_ch), - input_ch * sizeof(int16_t)); - } - two_column_buf += input_ch; - } - } - /* Computation is filed for every 2 columns */ - if (two_column_buf == buffer_a + 2 * rhs_cols) - { - out = arm_nn_mat_mult_kernel_s16(filter_data, - buffer_a, - output_ch, - output_shift, - output_mult, - out_activation_min, - out_activation_max, - rhs_cols, - bias_data, - out); - - /* Counter reset */ - two_column_buf = buffer_a; - } - } - } - - /* Left-over because odd number of output pixels */ - if (two_column_buf != buffer_a) - { - const int8_t *ker_a = filter_data; - int i; - - for (i = 0; i < output_ch; i++) - { - /* Init the accumulator*/ - int32_t sum = 0; - - /* Point to the beginning of the im2col buffer where the input is available as a rearranged column */ - const int16_t *ip_as_col = buffer_a; - - /* 4 multiply and accumulates are done in one loop. */ - int32_t col_count = rhs_cols >> 2; - - while (col_count) - { - int32_t ker_a1, ker_a2; - int32_t ip_b1, ip_b2; - - ker_a = read_and_pad(ker_a, &ker_a1, &ker_a2); - - ip_b1 = arm_nn_read_q15x2_ia(&ip_as_col); - sum = SMLAD(ker_a1, ip_b1, sum); - ip_b2 = arm_nn_read_q15x2_ia(&ip_as_col); - sum = SMLAD(ker_a2, ip_b2, sum); - - col_count--; - } - /* Handle left over mac */ - col_count = rhs_cols & 0x3; - while (col_count) - { - int8_t ker_a1 = *ker_a++; - int16_t ip_b1 = *ip_as_col++; - sum += ker_a1 * ip_b1; - col_count--; - } - if (bias_data) - { - int32_t reduced_multiplier = REDUCE_MULTIPLIER(output_mult[i]); - int64_t acc_64 = sum + bias_data[i]; - sum = arm_nn_requantize_s64(acc_64, reduced_multiplier, output_shift[i]); - } - else - { - sum = arm_nn_requantize(sum, output_mult[i], output_shift[i]); - } - sum = MAX(sum, out_activation_min); - sum = MIN(sum, out_activation_max); - *out++ = (int16_t)sum; - } - } -#else - (void)input_data; - (void)output_data; - (void)bias_data; - (void)filter_data; - (void)buffer_a; - (void)kernel_x; - (void)kernel_y; - (void)pad_x; - (void)pad_y; - (void)stride_x; - (void)stride_y; - (void)out_activation_min; - (void)out_activation_max; - (void)output_mult; - (void)output_shift; - (void)rhs_cols; - return ARM_CMSIS_NN_ARG_ERROR; -#endif - /* Advance to the next batch */ - input_data += (input_x * input_y * input_ch); - output_data += (output_x * output_y * output_ch); - } - - /* Return to application */ - return ARM_CMSIS_NN_SUCCESS; -} - -/** - * @} end of NNConv group - */ diff --git a/Source/ConvolutionFunctions/arm_convolve_get_buffer_sizes_s16.c b/Source/ConvolutionFunctions/arm_convolve_get_buffer_sizes_s16.c index 56af0e35..ad3291cd 100644 --- a/Source/ConvolutionFunctions/arm_convolve_get_buffer_sizes_s16.c +++ b/Source/ConvolutionFunctions/arm_convolve_get_buffer_sizes_s16.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright 2023 Arm Limited and/or its affiliates + * SPDX-FileCopyrightText: Copyright 2023-2024 Arm Limited and/or its affiliates * * SPDX-License-Identifier: Apache-2.0 * @@ -21,8 +21,8 @@ * Title: arm_convolve_get_buffer_sizes_s16.c * Description: Collection of get buffer size functions for the various s16 convolution layer functions. * - * $Date: 30 January 2023 - * $Revision: V.1.0.0 + * $Date: 20 March 2024 + * $Revision: V.2.0.0 * * Target : Arm(R) M-Profile Architecture * @@ -40,30 +40,26 @@ * @{ */ -__STATIC_INLINE int32_t arm_convolve_fast_s16_get_buffer_size_dsp(const cmsis_nn_dims *input_dims, - const cmsis_nn_dims *filter_dims) +__STATIC_INLINE int32_t arm_convolve_s16_get_buffer_size_mve(const cmsis_nn_dims *input_dims, + const cmsis_nn_dims *filter_dims) { - return (2 * input_dims->c * filter_dims->w * filter_dims->h) * (int32_t)sizeof(int16_t); + int32_t col_length = input_dims->c * filter_dims->w * filter_dims->h; + // Get number of complete lanes with int16 elements (multiple of 8) for given col_length. This is dependent on + // implementation of arm_nn_mat_mult_nt_t_s16 + col_length = (col_length + 7) / 8; + // 4 -> number of im2col buffers, 8 -> 8 elements per Q register + return 4 * col_length * 8 * (int32_t)sizeof(int16_t); } -int32_t arm_convolve_fast_s16_get_buffer_size(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *filter_dims) +int32_t arm_convolve_s16_get_buffer_size(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *filter_dims) { -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - return arm_convolve_fast_s16_get_buffer_size_dsp(input_dims, filter_dims); +#if defined(ARM_MATH_MVEI) + return arm_convolve_s16_get_buffer_size_mve(input_dims, filter_dims); #else - (void)input_dims; - (void)filter_dims; - return 0; + return (2 * input_dims->c * filter_dims->w * filter_dims->h) * (int32_t)sizeof(int16_t); #endif } -int32_t arm_convolve_s16_get_buffer_size(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *filter_dims) -{ - (void)input_dims; - (void)filter_dims; - return 0; -} - /* * Get the required buffer size for arm_convolve_wrapper_s16. This is the recommended function convolve wrapper s16 * function. @@ -76,16 +72,10 @@ int32_t arm_convolve_wrapper_s16_get_buffer_size(const cmsis_nn_conv_params *con const cmsis_nn_dims *filter_dims, const cmsis_nn_dims *output_dims) { - -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - return arm_convolve_wrapper_s16_get_buffer_size_dsp(conv_params, input_dims, filter_dims, output_dims); -#else (void)conv_params; (void)output_dims; - // MVE and scalar implementation have same buffer requirements return arm_convolve_s16_get_buffer_size(input_dims, filter_dims); -#endif } int32_t arm_convolve_wrapper_s16_get_buffer_size_dsp(const cmsis_nn_conv_params *conv_params, @@ -93,18 +83,7 @@ int32_t arm_convolve_wrapper_s16_get_buffer_size_dsp(const cmsis_nn_conv_params const cmsis_nn_dims *filter_dims, const cmsis_nn_dims *output_dims) { - (void)output_dims; - - if (filter_dims->w * filter_dims->h * input_dims->c < 512 && - (conv_params->dilation.w == 1 && conv_params->dilation.h == 1)) - { - return arm_convolve_fast_s16_get_buffer_size_dsp(input_dims, filter_dims); - } - else - { - - return arm_convolve_s16_get_buffer_size(input_dims, filter_dims); - } + return arm_convolve_wrapper_s16_get_buffer_size(conv_params, input_dims, filter_dims, output_dims); } int32_t arm_convolve_wrapper_s16_get_buffer_size_mve(const cmsis_nn_conv_params *conv_params, @@ -112,7 +91,10 @@ int32_t arm_convolve_wrapper_s16_get_buffer_size_mve(const cmsis_nn_conv_params const cmsis_nn_dims *filter_dims, const cmsis_nn_dims *output_dims) { - return arm_convolve_wrapper_s16_get_buffer_size(conv_params, input_dims, filter_dims, output_dims); + (void)conv_params; + (void)output_dims; + + return arm_convolve_s16_get_buffer_size_mve(input_dims, filter_dims); } /** diff --git a/Source/ConvolutionFunctions/arm_convolve_get_buffer_sizes_s8.c b/Source/ConvolutionFunctions/arm_convolve_get_buffer_sizes_s8.c index fc48198d..dd09b4ed 100644 --- a/Source/ConvolutionFunctions/arm_convolve_get_buffer_sizes_s8.c +++ b/Source/ConvolutionFunctions/arm_convolve_get_buffer_sizes_s8.c @@ -21,8 +21,8 @@ * Title: arm_convolve_get_buffer_sizes_s8.c * Description: Collection of get buffer size functions for the various s8 convolution layer functions. * - * $Date: 14 March 2024 - * $Revision: V.2.1.0 + * $Date: 28 March 2024 + * $Revision: V.2.1.1 * * Target : Arm(R) M-Profile Architecture * @@ -45,11 +45,11 @@ __STATIC_INLINE int32_t arm_convolve_s8_get_buffer_size_mve(const cmsis_nn_dims const cmsis_nn_dims *filter_dims) { int32_t col_length = input_dims->c * filter_dims->w * filter_dims->h; - // Get number of complete int16 lanes(multiple of 8) for given col_length. This is dependent on + // Get number of complete lanes with int8 elements (multiple of 16) for given col_length. This is dependent on // implementation of arm_nn_mat_mult_nt_t_s8 - col_length = (col_length + 7) / 8; - // 4 -> number of im2col buffers, 8 -> 8 elements per Q register - return 4 * col_length * 8 * (int32_t)sizeof(int8_t); + col_length = (col_length + 15) / 16; + // 4 -> number of im2col buffers, 16 -> 16 elements per Q register + return 4 * col_length * 16 * (int32_t)sizeof(int8_t); } __STATIC_INLINE int32_t arm_convolve_1_x_n_s8_get_buffer_size_mve(const cmsis_nn_conv_params *conv_params, diff --git a/Source/ConvolutionFunctions/arm_convolve_s16.c b/Source/ConvolutionFunctions/arm_convolve_s16.c index 75d30f16..08e21663 100644 --- a/Source/ConvolutionFunctions/arm_convolve_s16.c +++ b/Source/ConvolutionFunctions/arm_convolve_s16.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright 2010-2023 Arm Limited and/or its affiliates + * SPDX-FileCopyrightText: Copyright 2010-2024 Arm Limited and/or its affiliates * * SPDX-License-Identifier: Apache-2.0 * @@ -19,10 +19,10 @@ /* ---------------------------------------------------------------------- * Project: CMSIS NN Library * Title: arm_convolve_s16.c - * Description: s16 version of convolution using symmetric quantization. + * Description: s16 version of convolution. * - * $Date: 30 January 2023 - * $Revision: V.2.1.0 + * $Date: 22 March 2024 + * $Revision: V.3.0.0 * * Target : Arm(R) M-Profile Architecture * @@ -47,7 +47,6 @@ * are multiples of 4 or atleast greater than 4. * */ - arm_cmsis_nn_status arm_convolve_s16(const cmsis_nn_context *ctx, const cmsis_nn_conv_params *conv_params, const cmsis_nn_per_channel_quant_params *quant_params, @@ -61,7 +60,12 @@ arm_cmsis_nn_status arm_convolve_s16(const cmsis_nn_context *ctx, int16_t *output_data) { (void)bias_dims; - (void)ctx; + + if (ctx->buf == NULL) + { + return ARM_CMSIS_NN_ARG_ERROR; + } + int16_t *buffer_a = (int16_t *)ctx->buf; const int32_t input_batches = input_dims->n; const int32_t input_x = input_dims->w; @@ -72,69 +76,190 @@ arm_cmsis_nn_status arm_convolve_s16(const cmsis_nn_context *ctx, const int32_t output_x = output_dims->w; const int32_t output_y = output_dims->h; const int32_t output_ch = output_dims->c; + const int32_t rhs_cols = input_ch * kernel_y * kernel_x; + const int32_t dilation_x = conv_params->dilation.w; + const int32_t dilation_y = conv_params->dilation.h; const int32_t pad_x = conv_params->padding.w; const int32_t pad_y = conv_params->padding.h; const int32_t stride_x = conv_params->stride.w; const int32_t stride_y = conv_params->stride.h; - const int32_t dilation_x = conv_params->dilation.w; - const int32_t dilation_y = conv_params->dilation.h; const int32_t out_activation_min = conv_params->activation.min; const int32_t out_activation_max = conv_params->activation.max; int32_t *output_mult = quant_params->multiplier; int32_t *output_shift = quant_params->shift; +#if defined(ARM_MATH_MVEI) + const int32_t rhs_rows = output_dims->c; +#endif + for (int i_batch = 0; i_batch < input_batches; i_batch++) { - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - for (int32_t i_out_ch = 0; i_out_ch < output_ch; i_out_ch++) - { - const int32_t reduced_multiplier = REDUCE_MULTIPLIER(output_mult[i_out_ch]); + int16_t *im2col = buffer_a; + int16_t *out = output_data; - for (int32_t base_idx_y = -pad_y, i_out_y = 0; i_out_y < output_y; base_idx_y += stride_y, i_out_y++) + int32_t lhs_rows = 0; + + /* This part implements the im2col function */ + for (int32_t i_out_y = 0; i_out_y < output_y; i_out_y++) + { + for (int32_t i_out_x = 0; i_out_x < output_x; i_out_x++) { - for (int32_t base_idx_x = -pad_x, i_out_x = 0; i_out_x < output_x; base_idx_x += stride_x, i_out_x++) + const int32_t base_idx_x = stride_x * i_out_x - pad_x; + const int32_t base_idx_y = stride_y * i_out_y - pad_y; + + for (int32_t i_ker_y = 0; i_ker_y < kernel_y; i_ker_y++) { - int64_t conv_out_acc = 0; - - const int32_t start_y_max = (-base_idx_y + dilation_y - 1) / dilation_y; - const int32_t ker_y_start = MAX(0, start_y_max); - const int32_t start_x_max = (-base_idx_x + dilation_x - 1) / dilation_x; - const int32_t ker_x_start = MAX(0, start_x_max); - const int32_t end_min_y = (input_y - base_idx_y + dilation_y - 1) / dilation_y; - const int32_t ker_y_end = MIN(kernel_y, end_min_y); - const int32_t end_min_x = (input_x - base_idx_x + dilation_x - 1) / dilation_x; - const int32_t ker_x_end = MIN(kernel_x, end_min_x); - - for (int32_t i_ker_y = ker_y_start; i_ker_y < ker_y_end; i_ker_y++) + for (int32_t i_ker_x = 0; i_ker_x < kernel_x; i_ker_x++) { - for (int32_t i_ker_x = ker_x_start; i_ker_x < ker_x_end; i_ker_x++) + const int32_t k_y = base_idx_y + dilation_y * i_ker_y; + const int32_t k_x = base_idx_x + dilation_x * i_ker_x; + + if (k_y < 0 || k_y >= input_y || k_x < 0 || k_x >= input_x) + { + /* Filling 0 for out-of-bound paddings */ + arm_memset_s8((int8_t *)im2col, 0, sizeof(int16_t) * (uint32_t)input_ch); + } + else { - const int32_t in_row = base_idx_y + dilation_y * i_ker_y; - const int32_t in_col = base_idx_x + dilation_x * i_ker_x; - - for (int32_t i_input_ch = 0; i_input_ch < input_ch; i_input_ch++) - { - conv_out_acc += input_data[(in_row * input_x + in_col) * input_ch + i_input_ch] * - filter_data[i_out_ch * input_ch * kernel_y * kernel_x + - (i_ker_y * kernel_x + i_ker_x) * input_ch + i_input_ch]; - } + arm_memcpy_s8((int8_t *)im2col, + (const int8_t *)(input_data + (k_y * input_x + k_x) * input_ch), + (uint32_t)input_ch * sizeof(int16_t)); } + im2col += input_ch; } + } - if (bias_data) - { - conv_out_acc += bias_data[i_out_ch]; - } + lhs_rows++; +#if defined(ARM_MATH_MVEI) + /* Computation is filed for every 4 columns */ + if (lhs_rows == 4) + { + arm_nn_mat_mult_nt_t_s16(buffer_a, + filter_data, + bias_data, + out, + output_mult, + output_shift, + lhs_rows, + rhs_rows, + rhs_cols, + out_activation_min, + out_activation_max); + out += lhs_rows * output_ch; + + lhs_rows = 0; + im2col = buffer_a; + } +#else + /* Computation is filed for every 2 columns */ + if (lhs_rows == 2) + { + out = arm_nn_mat_mult_kernel_s16(filter_data, + buffer_a, + output_ch, + output_shift, + output_mult, + out_activation_min, + out_activation_max, + rhs_cols, + bias_data, + out); - int32_t conv_out = arm_nn_requantize_s64(conv_out_acc, reduced_multiplier, output_shift[i_out_ch]); - conv_out = MAX(conv_out, out_activation_min); - conv_out = MIN(conv_out, out_activation_max); - output_data[i_out_ch + (i_out_y * output_x + i_out_x) * output_ch] = (int16_t)conv_out; + /* Counter reset */ + im2col = buffer_a; + lhs_rows = 0; } +#endif } + + if (out == NULL) + { + return ARM_CMSIS_NN_NO_IMPL_ERROR; + } + } + + /* Handle left over columns */ + if (lhs_rows != 0) + { +#if defined(ARM_MATH_MVEI) + arm_nn_mat_mult_nt_t_s16(buffer_a, + filter_data, + bias_data, + out, + output_mult, + output_shift, + lhs_rows, + rhs_rows, + rhs_cols, + out_activation_min, + out_activation_max); + out += lhs_rows * rhs_rows; + lhs_rows = 0; + im2col = buffer_a; +#else // #if defined(ARM_MATH_MVEI) + + const int8_t *ker_a = filter_data; + int i; + + for (i = 0; i < output_ch; i++) + { + /* Init the accumulator*/ + int32_t sum = 0; + + /* Point to the beginning of the im2col buffer where the input is available as a rearranged column */ + const int16_t *ip_as_col = buffer_a; + + #if defined(ARM_MATH_DSP) + /* 4 multiply and accumulates are done in one loop. */ + int32_t col_count = rhs_cols >> 2; + + while (col_count) + { + int32_t ker_a1, ker_a2; + int32_t ip_b1, ip_b2; + + ker_a = read_and_pad(ker_a, &ker_a1, &ker_a2); + + ip_b1 = arm_nn_read_q15x2_ia(&ip_as_col); + sum = SMLAD(ker_a1, ip_b1, sum); + ip_b2 = arm_nn_read_q15x2_ia(&ip_as_col); + sum = SMLAD(ker_a2, ip_b2, sum); + + col_count--; + } + /* Handle left over mac */ + col_count = rhs_cols & 0x3; + #else + uint16_t col_count = rhs_cols; + + #endif + while (col_count) + { + int8_t ker_a1 = *ker_a++; + int16_t ip_b1 = *ip_as_col++; + sum += ker_a1 * ip_b1; + col_count--; + } + if (bias_data) + { + int32_t reduced_multiplier = REDUCE_MULTIPLIER(output_mult[i]); + int64_t acc_64 = sum + bias_data[i]; + sum = arm_nn_requantize_s64(acc_64, reduced_multiplier, output_shift[i]); + } + else + { + sum = arm_nn_requantize(sum, output_mult[i], output_shift[i]); + } + sum = MAX(sum, out_activation_min); + sum = MIN(sum, out_activation_max); + *out++ = (int16_t)sum; + } + lhs_rows = 0; +#endif // #if defined(ARM_MATH_MVEI) } + /* Advance to the next batch */ input_data += (input_x * input_y * input_ch); output_data += (output_x * output_y * output_ch); diff --git a/Source/ConvolutionFunctions/arm_convolve_wrapper_s16.c b/Source/ConvolutionFunctions/arm_convolve_wrapper_s16.c index b05588ed..0d6d8832 100644 --- a/Source/ConvolutionFunctions/arm_convolve_wrapper_s16.c +++ b/Source/ConvolutionFunctions/arm_convolve_wrapper_s16.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright 2021-2023 Arm Limited and/or its affiliates + * SPDX-FileCopyrightText: Copyright 2021-2024 Arm Limited and/or its affiliates * * SPDX-License-Identifier: Apache-2.0 * @@ -22,8 +22,8 @@ * Description: s16 convolution layer wrapper function with the main purpose to call the optimal kernel available in * cmsis-nn to perform the convolution. * - * $Date: 30 January 2023 - * $Revision: V.2.1.0 + * $Date: 12 March 2024 + * $Revision: V.2.2.0 * * Target : Arm(R) M-Profile Architecture * @@ -59,37 +59,6 @@ arm_cmsis_nn_status arm_convolve_wrapper_s16(const cmsis_nn_context *ctx, const cmsis_nn_dims *output_dims, int16_t *output_data) { -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - if (filter_dims->w * filter_dims->h * input_dims->c < 512 && - (conv_params->dilation.w == 1 && conv_params->dilation.h == 1)) - { - return arm_convolve_fast_s16(ctx, - conv_params, - quant_params, - input_dims, - input_data, - filter_dims, - filter_data, - bias_dims, - bias_data, - output_dims, - output_data); - } - else - { - return arm_convolve_s16(ctx, - conv_params, - quant_params, - input_dims, - input_data, - filter_dims, - filter_data, - bias_dims, - bias_data, - output_dims, - output_data); - } -#else return arm_convolve_s16(ctx, conv_params, quant_params, @@ -101,7 +70,6 @@ arm_cmsis_nn_status arm_convolve_wrapper_s16(const cmsis_nn_context *ctx, bias_data, output_dims, output_data); -#endif } /** diff --git a/Source/ConvolutionFunctions/arm_depthwise_conv_fast_s16.c b/Source/ConvolutionFunctions/arm_depthwise_conv_fast_s16.c index f15578e3..c8f56a27 100644 --- a/Source/ConvolutionFunctions/arm_depthwise_conv_fast_s16.c +++ b/Source/ConvolutionFunctions/arm_depthwise_conv_fast_s16.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright 2022-2023 Arm Limited and/or its affiliates + * SPDX-FileCopyrightText: Copyright 2022-2024 Arm Limited and/or its affiliates * * SPDX-License-Identifier: Apache-2.0 * @@ -22,8 +22,8 @@ * Description: Optimized s16 depthwise separable convolution function for * channel multiplier of 1. * - * $Date: 30 January 2023 - * $Revision: V.1.3.0 + * $Date: 19 March 2024 + * $Revision: V.1.4.0 * * Target : Arm(R) M-Profile Architecture * @@ -69,7 +69,7 @@ arm_cmsis_nn_status arm_depthwise_conv_fast_s16(const cmsis_nn_context *ctx, return ARM_CMSIS_NN_ARG_ERROR; } - if (filter_dims->w * filter_dims->h >= 512) + if (filter_dims->w * filter_dims->h >= MAX_COL_COUNT) { return ARM_CMSIS_NN_ARG_ERROR; } diff --git a/Source/NNSupportFunctions/arm_nn_mat_mul_kernel_s16.c b/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s16.c similarity index 62% rename from Source/NNSupportFunctions/arm_nn_mat_mul_kernel_s16.c rename to Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s16.c index b196eb86..9e9c5337 100644 --- a/Source/NNSupportFunctions/arm_nn_mat_mul_kernel_s16.c +++ b/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s16.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright 2010-2023 Arm Limited and/or its affiliates + * SPDX-FileCopyrightText: Copyright 2010-2024 Arm Limited and/or its affiliates * * * SPDX-License-Identifier: Apache-2.0 @@ -20,10 +20,10 @@ /* ---------------------------------------------------------------------- * Project: CMSIS NN Library * Title: arm_nn_mat_mult_kernel_s16.c - * Description: Matrix-multiplication function for convolution + * Description: Matrix-multiplication function for 16 bits convolution * - * $Date: 5 Janauray 2023 - * $Revision: V.1.2.0 + * $Date: 22 March 2024 + * $Revision: V.2.0.0 * * Target : Arm(R) M-Profile Architecture * -------------------------------------------------------------------- */ @@ -46,34 +46,35 @@ * Refer header file for details. * */ - int16_t *arm_nn_mat_mult_kernel_s16(const int8_t *input_a, const int16_t *input_b, const int32_t output_ch, const int32_t *out_shift, const int32_t *out_mult, - const int16_t activation_min, - const int16_t activation_max, + const int32_t activation_min, + const int32_t activation_max, const int32_t num_col_a, const int64_t *const output_bias, int16_t *out_0) { +#if !defined(ARM_MATH_MVEI) + const int32_t num_col_a_fast = num_col_a > MAX_COL_COUNT ? MAX_COL_COUNT : num_col_a; + const int32_t num_col_a_slow = num_col_a - MAX_COL_COUNT; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* set up the second output pointers */ int16_t *out_1 = out_0 + output_ch; const int64_t *bias = output_bias; - uint16_t row_count = output_ch / 2; + int32_t row_count = output_ch / 2; const int8_t *ip_a0 = input_a; + int32_t reduced_multiplier; - /* this loop over rows in A */ + /* This loop over rows in A */ while (row_count) { - /* setup pointers for B */ + /* Setup pointers for B */ const int16_t *ip_b0 = input_b; const int16_t *ip_b1 = ip_b0 + num_col_a; - /* align the second pointer for A */ + /* Align the second pointer for A */ const int8_t *ip_a1 = ip_a0 + num_col_a; /* Init accumulator for channel N and N + 1 */ @@ -82,8 +83,15 @@ int16_t *arm_nn_mat_mult_kernel_s16(const int8_t *input_a, int32_t ch_1_out_0 = 0; int32_t ch_1_out_1 = 0; - uint16_t col_count = num_col_a / 4; - /* accumulate over the vector */ + int64_t ch_0_out_0_s64 = 0; + int64_t ch_0_out_1_s64 = 0; + int64_t ch_1_out_0_s64 = 0; + int64_t ch_1_out_1_s64 = 0; + + #if defined(ARM_MATH_DSP) + uint16_t col_count = num_col_a_fast / 4; + + /* Accumulate over the vector */ while (col_count) { int32_t a01, a02, a11, a12; @@ -107,8 +115,12 @@ int16_t *arm_nn_mat_mult_kernel_s16(const int8_t *input_a, ch_1_out_1 = SMLAD(a12, b1, ch_1_out_1); col_count--; - } /* while over col_count */ - col_count = num_col_a & 0x3; + } + col_count = num_col_a_fast & 0x3; + #else + int32_t col_count = num_col_a_fast; + #endif + while (col_count) { int8_t a0 = *ip_a0++; @@ -121,22 +133,49 @@ int16_t *arm_nn_mat_mult_kernel_s16(const int8_t *input_a, ch_1_out_0 += a1 * b0; ch_1_out_1 += a1 * b1; col_count--; - } /* while over col_count */ - if (bias) + } + + ch_0_out_0_s64 = ch_0_out_0; + ch_0_out_1_s64 = ch_0_out_1; + ch_1_out_0_s64 = ch_1_out_0; + ch_1_out_1_s64 = ch_1_out_1; + + if (num_col_a > MAX_COL_COUNT) { - int32_t reduced_multiplier = REDUCE_MULTIPLIER(*out_mult); - int64_t acc_64 = ch_0_out_0 + *bias; - ch_0_out_0 = arm_nn_requantize_s64(acc_64, reduced_multiplier, *out_shift); - acc_64 = ch_0_out_1 + *bias++; - ch_0_out_1 = arm_nn_requantize_s64(acc_64, reduced_multiplier, *out_shift); - out_mult++; + col_count = num_col_a_slow; + while (col_count) + { + int8_t a0 = *ip_a0++; + int16_t b0 = *ip_b0++; + int8_t a1 = *ip_a1++; + int16_t b1 = *ip_b1++; + + ch_0_out_0_s64 += a0 * b0; + ch_0_out_1_s64 += a0 * b1; + ch_1_out_0_s64 += a1 * b0; + ch_1_out_1_s64 += a1 * b1; + col_count--; + } } - else + + if (bias) { - ch_0_out_0 = arm_nn_requantize(ch_0_out_0, *out_mult, *out_shift); - ch_0_out_1 = arm_nn_requantize(ch_0_out_1, *out_mult, *out_shift); - out_mult++; + ch_0_out_0_s64 += *bias; + ch_0_out_1_s64 += *bias++; + ch_1_out_0_s64 += *bias; + ch_1_out_1_s64 += *bias++; } + + reduced_multiplier = REDUCE_MULTIPLIER(*out_mult); + ch_0_out_0 = arm_nn_requantize_s64(ch_0_out_0_s64, reduced_multiplier, *out_shift); + ch_0_out_1 = arm_nn_requantize_s64(ch_0_out_1_s64, reduced_multiplier, *out_shift); + out_mult++; + out_shift++; + + reduced_multiplier = REDUCE_MULTIPLIER(*out_mult); + ch_1_out_0 = arm_nn_requantize_s64(ch_1_out_0_s64, reduced_multiplier, *out_shift); + ch_1_out_1 = arm_nn_requantize_s64(ch_1_out_1_s64, reduced_multiplier, *out_shift); + ch_0_out_0 = MAX(ch_0_out_0, activation_min); ch_0_out_0 = MIN(ch_0_out_0, activation_max); *out_0++ = (int16_t)ch_0_out_0; @@ -144,23 +183,7 @@ int16_t *arm_nn_mat_mult_kernel_s16(const int8_t *input_a, ch_0_out_1 = MAX(ch_0_out_1, activation_min); ch_0_out_1 = MIN(ch_0_out_1, activation_max); *out_1++ = (int16_t)ch_0_out_1; - out_shift++; - if (bias) - { - int32_t reduced_multiplier = REDUCE_MULTIPLIER(*out_mult); - int64_t acc_64 = ch_1_out_0 + *bias; - ch_1_out_0 = arm_nn_requantize_s64(acc_64, reduced_multiplier, *out_shift); - acc_64 = ch_1_out_1 + *bias++; - ch_1_out_1 = arm_nn_requantize_s64(acc_64, reduced_multiplier, *out_shift); - out_mult++; - } - else - { - ch_1_out_0 = arm_nn_requantize(ch_1_out_0, *out_mult, *out_shift); - ch_1_out_1 = arm_nn_requantize(ch_1_out_1, *out_mult, *out_shift); - out_mult++; - } ch_1_out_0 = MAX(ch_1_out_0, activation_min); ch_1_out_0 = MIN(ch_1_out_0, activation_max); *out_0++ = (int16_t)ch_1_out_0; @@ -168,24 +191,29 @@ int16_t *arm_nn_mat_mult_kernel_s16(const int8_t *input_a, ch_1_out_1 = MAX(ch_1_out_1, activation_min); ch_1_out_1 = MIN(ch_1_out_1, activation_max); *out_1++ = (int16_t)ch_1_out_1; + + out_mult++; out_shift++; - /* skip row */ + /* Skip row */ ip_a0 += num_col_a; row_count--; } - /* compute the last odd numbered row if any */ + /* Compute the last odd numbered row if any */ if (output_ch & 0x1) { - /* setup pointers for B */ + /* Setup pointers for B */ const int16_t *ip_b0 = input_b; const int16_t *ip_b1 = ip_b0 + num_col_a; int32_t ch_0_out_0 = 0; int32_t ch_0_out_1 = 0; + int64_t ch_0_out_0_s64 = 0; + int64_t ch_0_out_1_s64 = 0; - uint16_t col_count = num_col_a >> 2; + #if defined(ARM_MATH_DSP) + uint16_t col_count = num_col_a_fast >> 2; while (col_count) { int32_t a01, a02; @@ -205,6 +233,9 @@ int16_t *arm_nn_mat_mult_kernel_s16(const int8_t *input_a, col_count--; } col_count = num_col_a & 0x3; + #else + int32_t col_count = num_col_a_fast; + #endif while (col_count) { int8_t a0 = *ip_a0++; @@ -215,19 +246,35 @@ int16_t *arm_nn_mat_mult_kernel_s16(const int8_t *input_a, ch_0_out_1 += a0 * b1; col_count--; } - if (bias) + + ch_0_out_0_s64 = ch_0_out_0; + ch_0_out_1_s64 = ch_0_out_1; + + if (num_col_a > MAX_COL_COUNT) { - int32_t reduced_multiplier = REDUCE_MULTIPLIER(*out_mult); - int64_t acc_64 = ch_0_out_0 + *bias; - ch_0_out_0 = arm_nn_requantize_s64(acc_64, reduced_multiplier, *out_shift); - acc_64 = ch_0_out_1 + *bias++; - ch_0_out_1 = arm_nn_requantize_s64(acc_64, reduced_multiplier, *out_shift); + col_count = num_col_a_slow; + while (col_count) + { + int8_t a0 = *ip_a0++; + int16_t b0 = *ip_b0++; + int16_t b1 = *ip_b1++; + + ch_0_out_0_s64 += a0 * b0; + ch_0_out_1_s64 += a0 * b1; + col_count--; + } } - else + + if (bias) { - ch_0_out_0 = arm_nn_requantize(ch_0_out_0, *out_mult, *out_shift); - ch_0_out_1 = arm_nn_requantize(ch_0_out_1, *out_mult, *out_shift); + ch_0_out_0_s64 += *bias; + ch_0_out_1_s64 += *bias++; } + + reduced_multiplier = REDUCE_MULTIPLIER(*out_mult); + ch_0_out_0 = arm_nn_requantize_s64(ch_0_out_0_s64, reduced_multiplier, *out_shift); + ch_0_out_1 = arm_nn_requantize_s64(ch_0_out_1_s64, reduced_multiplier, *out_shift); + ch_0_out_0 = MAX(ch_0_out_0, activation_min); ch_0_out_0 = MIN(ch_0_out_0, activation_max); *out_0++ = (int16_t)ch_0_out_0; @@ -241,7 +288,7 @@ int16_t *arm_nn_mat_mult_kernel_s16(const int8_t *input_a, out_0 += output_ch; - /* return the new output pointer with offset */ + /* Return the new output pointer with offset */ return out_0; #else (void)input_a; @@ -254,11 +301,11 @@ int16_t *arm_nn_mat_mult_kernel_s16(const int8_t *input_a, (void)num_col_a; (void)output_bias; (void)out_0; - /* To be completed */ + return NULL; #endif } /** * @} end of Doxygen group - */ \ No newline at end of file + */ diff --git a/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s16.c b/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s16.c new file mode 100644 index 00000000..78972d5b --- /dev/null +++ b/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s16.c @@ -0,0 +1,265 @@ +/* + * SPDX-FileCopyrightText: Copyright 2020-2024 Arm Limited and/or its affiliates + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* ---------------------------------------------------------------------- + * Project: CMSIS NN Library + * Title: arm_nn_mat_mult_nt_t_s16 + * Description: Matrix multiplication support function with the right-hand-side (rhs) matrix transposed + * + * $Date: 2 April 2024 + * $Revision: V.1.0.0 + * + * Target : Arm(R) M-Profile Architecture + * + * -------------------------------------------------------------------- */ + +#include "arm_nnsupportfunctions.h" + +/** + * @ingroup groupSupport + */ + +/** + * @addtogroup supportConvolution + * @{ + */ + +/* + * s16 matrix multiplication with the right-hand-side matrix transposed + * + * Refer header file for details. + * + */ +arm_cmsis_nn_status arm_nn_mat_mult_nt_t_s16(const int16_t *lhs, + const int8_t *rhs, + const int64_t *bias, + int16_t *dst, + const int32_t *dst_multipliers, + const int32_t *dst_shifts, + const int32_t lhs_rows, + const int32_t rhs_rows, + const int32_t rhs_cols, + const int32_t activation_min, + const int32_t activation_max) +{ +#if defined(ARM_MATH_MVEI) + + const uint32_t rhs_rows_offset = (uint32_t)rhs_rows * sizeof(int16_t); + const uint32x4_t scatter_offset = { + 0, (uint32_t)rhs_rows_offset, (uint32_t)rhs_rows_offset * 2, (uint32_t)rhs_rows_offset * 3}; + + const int32_t rhs_cols_fast = rhs_cols > MAX_COL_COUNT ? MAX_COL_COUNT : rhs_cols; + const int32_t rhs_cols_slow = rhs_cols - MAX_COL_COUNT; + + int i_items = 0; + + for (; i_items <= (lhs_rows - 4); i_items += 4) + { + for (int i = 0; i < rhs_rows; i++) + { + int32_t acc_n0 = 0; + int32_t acc_n1 = 0; + int32_t acc_n2 = 0; + int32_t acc_n3 = 0; + + int64_t acc_n0_s64 = 0; + int64_t acc_n1_s64 = 0; + int64_t acc_n2_s64 = 0; + int64_t acc_n3_s64 = 0; + + const int16_t *ip_row_0 = lhs; + const int16_t *ip_row_1 = lhs + rhs_cols; + const int16_t *ip_row_2 = lhs + (2 * rhs_cols); + const int16_t *ip_row_3 = lhs + (3 * rhs_cols); + const int8_t *col_base = rhs + i * rhs_cols; + + #if defined(ARM_MATH_AUTOVECTORIZE) + for (int j = 0; j < rhs_cols_fast; j++) + { + int8_t col = col_base[j]; + acc_n0 += ip_row_0[j] * col; + acc_n1 += ip_row_1[j] * col; + acc_n2 += ip_row_2[j] * col; + acc_n3 += ip_row_3[j] * col; + } + #else + // Note: If operand initialization is moved around, use '&' constraint to + // specify earlyclobber operands. + __ASM volatile(" .p2align 2 \n" + " wlstp.16 lr, %[cnt], 1f \n" + " mov %[out0], 0 \n" + " mov %[out1], 0 \n" + " mov %[out2], 0 \n" + " mov %[out3], 0 \n" + " vldrb.s16 q0, [%[col]], #8 \n" + "2: \n" + " vldrh.u16 q1, [%[row0]], #16 \n" + " vmlava.s16 %[out0], q0, q1 \n" + " vldrh.u16 q2, [%[row1]], #16 \n" + " vmlava.s16 %[out1], q0, q2 \n" + " vldrh.u16 q3, [%[row2]], #16 \n" + " vmlava.s16 %[out2], q0, q3 \n" + " vldrh.u16 q4, [%[row3]], #16 \n" + " vmlava.s16 %[out3], q0, q4 \n" + " vldrb.s16 q0, [%[col]], #8 \n" + " letp lr, 2b \n" + "1: \n" + : [col] "+l"(col_base), + [row0] "+l"(ip_row_0), + [row1] "+l"(ip_row_1), + [row2] "+l"(ip_row_2), + [row3] "+l"(ip_row_3), + [out0] "=Te"(acc_n0), + [out1] "=Te"(acc_n1), + [out2] "=Te"(acc_n2), + [out3] "=Te"(acc_n3) + : [cnt] "r"(rhs_cols_fast) + : "q0", "q1", "q2", "q3", "q4", "memory", "r14"); + #endif + acc_n0_s64 = acc_n0; + acc_n1_s64 = acc_n1; + acc_n2_s64 = acc_n2; + acc_n3_s64 = acc_n3; + + if (rhs_cols > MAX_COL_COUNT) + { + ip_row_0 = lhs + MAX_COL_COUNT; + ip_row_1 = lhs + rhs_cols + MAX_COL_COUNT; + ip_row_2 = lhs + (2 * rhs_cols) + MAX_COL_COUNT; + ip_row_3 = lhs + (3 * rhs_cols) + MAX_COL_COUNT; + col_base = rhs + i * rhs_cols + MAX_COL_COUNT; + + for (int j = 0; j < rhs_cols_slow; j++) + { + int8_t col = col_base[j]; + acc_n0_s64 += ip_row_0[j] * col; + acc_n1_s64 += ip_row_1[j] * col; + acc_n2_s64 += ip_row_2[j] * col; + acc_n3_s64 += ip_row_3[j] * col; + } + } + + if (bias) + { + acc_n0_s64 += bias[i]; + acc_n1_s64 += bias[i]; + acc_n2_s64 += bias[i]; + acc_n3_s64 += bias[i]; + } + + int32_t reduced_multiplier = REDUCE_MULTIPLIER(dst_multipliers[i]); + int32_t shift = dst_shifts[i]; + + acc_n0 = arm_nn_requantize_s64(acc_n0_s64, reduced_multiplier, shift); + acc_n1 = arm_nn_requantize_s64(acc_n1_s64, reduced_multiplier, shift); + acc_n2 = arm_nn_requantize_s64(acc_n2_s64, reduced_multiplier, shift); + acc_n3 = arm_nn_requantize_s64(acc_n3_s64, reduced_multiplier, shift); + int32x4_t res = {acc_n0, acc_n1, acc_n2, acc_n3}; + + res = vmaxq_s32(res, vdupq_n_s32(activation_min)); + res = vminq_s32(res, vdupq_n_s32(activation_max)); + + vstrhq_scatter_offset_s32(dst, scatter_offset, res); + dst++; + } + + lhs += 4 * rhs_cols; + dst += (3 * rhs_rows); + } + + for (; i_items < lhs_rows; i_items++) + { + for (int i = 0; i < rhs_rows; i++) + { + int32_t acc_n0 = 0; + int64_t acc_n0_s64 = 0; + const int16_t *ip_row_0 = lhs; + const int8_t *col_base = rhs + i * rhs_cols; + + #if defined(ARM_MATH_AUTOVECTORIZE) + for (int j = 0; j < rhs_cols_fast; j++) + { + int8_t col = col_base[j]; + acc_n0 += ip_row_0[j] * col; + } + #else + __ASM volatile(" .p2align 2 \n" + " wlstp.32 lr, %[cnt], 1f \n" + " mov %[out0], 0 \n" + "2: \n" + " vldrb.s32 q0, [%[col]], #4 \n" + " vldrh.s32 q1, [%[row0]], #8 \n" + " vmlava.s32 %[out0], q0, q1 \n" + " letp lr, 2b \n" + "1: \n" + : [col] "+l"(col_base), [row0] "+l"(ip_row_0), [out0] "=Te"(acc_n0) + : [cnt] "r"(rhs_cols_fast) + : "q0", "q1", "memory", "r14"); + #endif + acc_n0_s64 = acc_n0; + + if (rhs_cols > MAX_COL_COUNT) + { + ip_row_0 = lhs + MAX_COL_COUNT; + col_base = rhs + i * rhs_cols + MAX_COL_COUNT; + + for (int j = 0; j < rhs_cols_slow; j++) + { + int8_t col = col_base[j]; + acc_n0_s64 += ip_row_0[j] * col; + } + } + + if (bias) + { + acc_n0_s64 += bias[i]; + } + + int32_t reduced_multiplier = REDUCE_MULTIPLIER(dst_multipliers[i]); + int32_t shift = dst_shifts[i]; + + acc_n0 = arm_nn_requantize_s64(acc_n0_s64, reduced_multiplier, shift); + acc_n0 = MAX(acc_n0, activation_min); + acc_n0 = MIN(acc_n0, activation_max); + *dst++ = (int16_t)acc_n0; + } + lhs += rhs_cols; + } + +#else + (void)lhs; + (void)rhs; + (void)dst_multipliers; + (void)dst_shifts; + (void)dst; + (void)activation_min; + (void)activation_max; + (void)bias; + (void)lhs_rows; + (void)lhs_rows; + (void)rhs_rows; + (void)rhs_cols; + + return ARM_CMSIS_NN_NO_IMPL_ERROR; +#endif + return ARM_CMSIS_NN_SUCCESS; +} + +/** + * @} end of Doxygen group + */ diff --git a/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s16.c b/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s16.c index b51fbf73..4c7983e2 100644 --- a/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s16.c +++ b/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s16.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright 2020-2023 Arm Limited and/or its affiliates + * SPDX-FileCopyrightText: Copyright 2020-2024 Arm Limited and/or its affiliates * * SPDX-License-Identifier: Apache-2.0 * @@ -21,8 +21,8 @@ * Title: arm_nn_vec_mat_mult_t_s16 * Description: s16 vector by matrix (transposed) multiplication * - * $Date: 5 January 2023 - * $Revision: V.2.2.0 + * $Date: 22 March 2024 + * $Revision: V.2.3.0 * * Target : Arm(R) M-Profile Architecture * @@ -30,8 +30,6 @@ #include "arm_nnsupportfunctions.h" -#define MAX_COL_COUNT (512) - /** * @ingroup groupSupport */ diff --git a/Tests/UnitTest/CMakeLists.txt b/Tests/UnitTest/CMakeLists.txt index d8d8ab7a..cb273db5 100644 --- a/Tests/UnitTest/CMakeLists.txt +++ b/Tests/UnitTest/CMakeLists.txt @@ -75,7 +75,6 @@ add_subdirectory(TestCases/test_arm_avgpool_s16) add_subdirectory(TestCases/test_arm_avgpool_s8) add_subdirectory(TestCases/test_arm_convolve_1x1_s8_fast) add_subdirectory(TestCases/test_arm_convolve_1x1_s4_fast) -add_subdirectory(TestCases/test_arm_convolve_fast_s16) add_subdirectory(TestCases/test_arm_convolve_s16) add_subdirectory(TestCases/test_arm_convolve_s8) add_subdirectory(TestCases/test_arm_convolve_s4) diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8/biases_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8/biases_data.h index 0df67b68..87e0e5d9 100644 --- a/Tests/UnitTest/TestCases/TestData/int16xint8/biases_data.h +++ b/Tests/UnitTest/TestCases/TestData/int16xint8/biases_data.h @@ -1,6 +1,6 @@ -// Generated by generate_test_data.py using tensorflow version 2.10.0 (Keras version 2.10.0). -// Interpreter from tensorflow version 2.10.0 and revision upstream/v2.10.0-0-g359c3cdfc5f. +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. #pragma once #include -const int64_t int16xint8_biases[4] = {-2693823, 4268473, -1952572, -1471661}; +const int64_t *int16xint8_biases = NULL; diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8/config_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8/config_data.h index 274f27fa..5002212f 100644 --- a/Tests/UnitTest/TestCases/TestData/int16xint8/config_data.h +++ b/Tests/UnitTest/TestCases/TestData/int16xint8/config_data.h @@ -1,23 +1,23 @@ -// Generated by generate_test_data.py using tensorflow version 2.10.0 (Keras version 2.10.0). -// Interpreter from tensorflow version 2.10.0 and revision upstream/v2.10.0-0-g359c3cdfc5f. +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. #pragma once #define INT16XINT8_OUT_CH 4 -#define INT16XINT8_IN_CH 3 -#define INT16XINT8_INPUT_W 7 +#define INT16XINT8_IN_CH 55 +#define INT16XINT8_INPUT_W 10 #define INT16XINT8_INPUT_H 8 -#define INT16XINT8_DST_SIZE 48 -#define INT16XINT8_INPUT_SIZE 168 -#define INT16XINT8_OUT_ACTIVATION_MIN -13335 +#define INT16XINT8_DST_SIZE 40 +#define INT16XINT8_INPUT_SIZE 4400 +#define INT16XINT8_OUT_ACTIVATION_MIN -32768 #define INT16XINT8_OUT_ACTIVATION_MAX 32767 #define INT16XINT8_INPUT_BATCHES 1 -#define INT16XINT8_FILTER_X 2 +#define INT16XINT8_FILTER_X 9 #define INT16XINT8_FILTER_Y 4 -#define INT16XINT8_STRIDE_X 2 -#define INT16XINT8_STRIDE_Y 3 +#define INT16XINT8_STRIDE_X 1 +#define INT16XINT8_STRIDE_Y 1 #define INT16XINT8_PAD_X 0 -#define INT16XINT8_PAD_Y 1 -#define INT16XINT8_OUTPUT_W 4 -#define INT16XINT8_OUTPUT_H 3 +#define INT16XINT8_PAD_Y 0 +#define INT16XINT8_OUTPUT_W 2 +#define INT16XINT8_OUTPUT_H 5 #define INT16XINT8_INPUT_OFFSET 0 #define INT16XINT8_OUTPUT_OFFSET 0 #define INT16XINT8_DILATION_X 1 diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8/input_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8/input_data.h index 332e9a2d..a9857dce 100644 --- a/Tests/UnitTest/TestCases/TestData/int16xint8/input_data.h +++ b/Tests/UnitTest/TestCases/TestData/int16xint8/input_data.h @@ -1,18 +1,321 @@ -// Generated by generate_test_data.py using tensorflow version 2.10.0 (Keras version 2.10.0). -// Interpreter from tensorflow version 2.10.0 and revision upstream/v2.10.0-0-g359c3cdfc5f. +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. #pragma once #include -const int16_t int16xint8_input[168] = { - 10557, -29412, 16306, -5806, -32348, -19960, 2964, -32596, 20924, 18562, -20598, -6976, 27849, 12415, - -30223, -27312, -7108, -12970, 29648, 26680, -8421, -14587, 18276, 21648, -2320, 12407, -17227, 8336, - -19571, 21794, -7472, 26556, -18272, 4333, 29296, -8120, -14915, 28821, -21516, 516, 3900, 24368, - -3683, -2848, -1891, 10821, -26504, 2110, 5717, -24497, 1898, -23262, -11098, -21592, -27834, -30928, - 15710, -28005, 5185, -24728, -22215, -21817, 1560, -28083, -29076, -26205, -28534, -24994, -5517, 32166, - 25809, 904, 23030, 32059, -11323, 3203, 21358, -29406, -18602, -14718, -26485, -31259, -2470, -1560, - 1982, 801, -418, -20854, -22982, -25937, 30793, 10965, 2980, 23705, 16271, 10279, -25793, 11816, - 30853, 3285, 29763, 20687, -19271, 972, 27703, -8887, -32590, 428, -31855, -24800, -7196, 3695, - 9322, -12119, 26056, 28964, 11767, -25994, 8310, 25111, 2990, 10228, 9369, 8724, -23360, -21582, - -6857, -5432, -20932, -18168, 29165, -4251, -30703, -29891, -332, 18088, 22134, 23526, -22889, 18975, - -20517, 18490, -15958, 11060, -15179, -1603, 28921, -15049, 29725, -21223, 5630, -27275, -8880, -16761, - 29354, -10064, -15754, 15828, -9302, -11527, -5767, 2286, 623, -805, 24164, 26393, 14253, 11532}; +const int16_t int16xint8_input[4400] = { + 2258, -12216, 21955, 28148, 24627, -27487, 10259, 1230, -22204, -20857, -4155, -11625, -12677, -16925, + 20804, -2514, 30927, -8927, 31309, 11732, -15134, 4402, 9163, -27708, 4394, -28138, -31148, 12312, + 15482, -24145, 30356, 30332, 5787, 32650, 9767, 9098, 9892, -3355, -4309, 28572, 11701, 11084, + -14139, 16324, 11331, 7507, 14202, -19123, 5268, 7244, -12431, -12248, 9727, -17937, -336, 26839, + 21250, 21610, -14691, -8927, -10025, 12339, -19596, 4049, 20204, -12937, -27421, 17454, -15713, 1844, + 14225, -32744, 20568, 4312, 31329, 30059, 161, -12642, -23241, -2821, -8344, 18918, 25202, -1485, + -2434, 6275, -5036, -15151, 32710, -17041, -20987, -19723, -17316, 7476, 22161, 24685, 11959, 22263, + 19819, 12886, -18595, -16198, 29482, 11992, 6715, -26602, 12559, 4968, 9046, -17713, 21326, -28775, + 25570, -7374, 28219, 10499, -3695, 13442, -11035, 16418, 24432, -12198, 19648, -2747, -31244, 32200, + 12354, -8623, 21864, 4109, -15097, 13314, -19738, -6218, 25493, 105, 15966, -14539, 24697, 23697, + -6783, -22239, 5334, 30959, -7932, -30297, -10048, -2983, 15982, -25128, -30039, 27386, 11554, -21482, + 6832, 959, -17909, -11444, 23960, -26539, 30792, -23153, 26795, 29854, -21395, 23582, 15220, 13625, + 7170, 3548, -2081, 16865, 23240, -17971, 20097, -18667, 16294, 12263, -20768, 20227, 12646, 11252, + 16940, -32242, -24922, 1394, -2967, -14485, 16886, -21016, 1822, 17047, -25726, 7505, -15337, -31020, + -16606, 11889, 31023, 13219, -25931, 5486, -30148, 22892, -16340, -29886, -18678, 23338, -4706, 3020, + -14704, 24188, -26789, -10494, 20445, -2109, -26602, -31952, -1866, -14889, 19340, 27187, 25327, 17627, + 30428, -28544, -28249, 6444, -4327, -18179, -23642, 19621, 19011, -31294, 4899, 31259, -17601, 14607, + 21903, 6354, -13802, -18978, -32115, 3732, 29904, 4626, -23383, 28943, 9113, -25375, 8677, 2850, + 8488, 5178, 31903, 358, -23079, 8366, -11574, -8258, 9291, 17477, 13631, 10186, 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11950, -1807, -26664, -3033, 12255, -14974, -10480, 19667, 21866, + 25056, -24974, 6206, 16887, 7974, 3772, 9987, 25505, -25187, -23149, 7380, -30400, 9479, 951, + 23216, 14808, -18936, 8482, 14108, 5134, -22338, -27257, 75, -30636, 30251, 26794, 4489, -28184, + -14687, -8898, -18187, -22519, -26907, -14352, -3844, -22462, 29345, 16109, 32008, -9122, 74, 18736, + 20028, 17973, 29661, 23304, 15327, 88, -1218, -14304, -1488, 20091, -11243, 28514, 19831, 20756, + -538, 21813, -5941, -17111, -19310, -14720, 30406, 30987, -7041, -32379, -21946, 26270, 15146, 28823, + -29820, -17457, -16731, -1078, 31960, -4324, -31651, 27679, 18062, -25412, -16987, -19877, -7473, -31450, + -7321, 11436, 12389, 6300, 20420, -27898, 8265, 18487, -23677, 14945, -23902, -21175, -26155, 23133, + -32665, 776, 8163, 27953, -11349, -5927, 27751, -4949, -7998, -2989, -23709, 19833, 13638, -6709, + -32280, -5049, 32028, 10369, -11774, 23317, 12585, -18338, 26859, -14993, -15835, 21275, -5159, -1726, + 21602, 1266, -13424, 3149, -10442, 1928, -18287, 13727, -4019, 19892, -10922, 14936, -214, 2110, + -31846, 19574, -17071, 18407, 31292, 25800, 2090, 1672, 27480, -19629, 11216, -17006, 9101, 24825, + -10441, -23676, 21067, -13812, -24285, 31068, -26184, 11522, 16483, 24081, -848, -11582, -4332, -740, + 27803, -621, -2762, -11778}; diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8/output_mult_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8/output_mult_data.h index c7e50e3d..9fd93e90 100644 --- a/Tests/UnitTest/TestCases/TestData/int16xint8/output_mult_data.h +++ b/Tests/UnitTest/TestCases/TestData/int16xint8/output_mult_data.h @@ -1,6 +1,6 @@ -// Generated by generate_test_data.py using tensorflow version 2.10.0 (Keras version 2.10.0). -// Interpreter from tensorflow version 2.10.0 and revision upstream/v2.10.0-0-g359c3cdfc5f. +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. #pragma once #include -const int32_t int16xint8_output_mult[4] = {1089212438, 2042635001, 2134124060, 1087333954}; +const int32_t int16xint8_output_mult[4] = {1094038263, 1093426216, 1093614140, 1093822383}; diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8/output_ref_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8/output_ref_data.h index 15280764..babc7a6e 100644 --- a/Tests/UnitTest/TestCases/TestData/int16xint8/output_ref_data.h +++ b/Tests/UnitTest/TestCases/TestData/int16xint8/output_ref_data.h @@ -1,10 +1,9 @@ -// Generated by generate_test_data.py using tensorflow version 2.10.0 (Keras version 2.10.0). -// Interpreter from tensorflow version 2.10.0 and revision upstream/v2.10.0-0-g359c3cdfc5f. +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. #pragma once #include -const int16_t int16xint8_output_ref[48] = { - -13335, -169, -10400, -1211, -4046, 17113, 6664, 31020, -11016, 14661, -12617, 4871, - -11590, 6034, -12869, -2736, -13335, 23907, -6623, 2609, 6054, 6400, -2306, -13335, - -7031, 1919, 13723, -13335, -13335, 4406, 23009, -13335, -8348, 12887, 1828, -13335, - -13335, 1073, 13718, 617, -2508, 10951, 5453, -11033, -4797, 5220, -9823, -2385}; +const int16_t int16xint8_output_ref[40] = {180, 471, 855, 475, -60, 327, 298, -198, 147, 108, + 535, -101, -101, -235, -535, -188, -547, -944, -548, -328, + -895, -624, -496, -1029, -809, -671, -453, -410, -266, -563, + -818, -799, -512, -485, -639, -968, -102, -9, -414, -314}; diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8/output_shift_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8/output_shift_data.h index 74770b4b..5ca3315b 100644 --- a/Tests/UnitTest/TestCases/TestData/int16xint8/output_shift_data.h +++ b/Tests/UnitTest/TestCases/TestData/int16xint8/output_shift_data.h @@ -1,6 +1,6 @@ -// Generated by generate_test_data.py using tensorflow version 2.10.0 (Keras version 2.10.0). -// Interpreter from tensorflow version 2.10.0 and revision upstream/v2.10.0-0-g359c3cdfc5f. +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. #pragma once #include -const int32_t int16xint8_output_shift[4] = {-8, -9, -9, -8}; +const int32_t int16xint8_output_shift[4] = {-16, -16, -16, -16}; diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8/test_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8/test_data.h index 8102687f..4d61c5f2 100644 --- a/Tests/UnitTest/TestCases/TestData/int16xint8/test_data.h +++ b/Tests/UnitTest/TestCases/TestData/int16xint8/test_data.h @@ -1,5 +1,5 @@ -// Generated by generate_test_data.py using tensorflow version 2.10.0 (Keras version 2.10.0). -// Interpreter from tensorflow version 2.10.0 and revision upstream/v2.10.0-0-g359c3cdfc5f. +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. #include "biases_data.h" #include "config_data.h" #include "input_data.h" diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8/weights_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8/weights_data.h index ac8c8768..91884235 100644 --- a/Tests/UnitTest/TestCases/TestData/int16xint8/weights_data.h +++ b/Tests/UnitTest/TestCases/TestData/int16xint8/weights_data.h @@ -1,11 +1,351 @@ -// Generated by generate_test_data.py using tensorflow version 2.10.0 (Keras version 2.10.0). -// Interpreter from tensorflow version 2.10.0 and revision upstream/v2.10.0-0-g359c3cdfc5f. +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. #pragma once #include -const int8_t int16xint8_weights[96] = { - 12, -38, -25, -95, 18, -1, 57, 35, 76, 61, -54, 20, -19, -40, -127, -7, 39, 110, 39, 45, - -20, -41, 48, -69, 12, -105, 127, 58, -103, 108, 36, -48, -101, 42, -48, 87, 79, -27, 36, 66, - -42, -114, 80, 40, 115, -126, 94, -9, -50, -121, 45, -29, 118, -111, -96, -23, -85, 71, 82, 16, - -127, -82, 83, -88, 74, -101, 118, 37, -91, -71, 82, -1, 42, 125, -58, 54, -113, 119, 94, -23, - 114, 91, -21, 75, 91, -109, -103, -83, 124, 7, 45, -127, -5, -20, -109, -124}; +const int8_t int16xint8_weights[7920] = { + 118, 98, 35, 46, 18, 96, 107, 92, 59, 73, 100, 7, 94, 43, 112, 33, 55, 111, 5, 20, 68, 58, 82, + 93, 120, 46, 10, 25, 76, 30, 111, 9, 94, 23, 118, 56, 39, 45, 72, 123, 47, 23, 62, 50, 44, 78, + 74, 110, 90, 23, 8, 65, 38, 36, 85, 22, 25, 13, 38, 43, 63, 104, 74, 93, 27, 125, 17, 57, 87, + 95, 71, 52, 90, 71, 54, 5, 93, 94, 55, 89, 48, 12, 103, 117, 78, 74, 20, 84, 10, 100, 19, 17, + 73, 41, 37, 86, 104, 54, 83, 35, 114, 35, 39, 76, 48, 86, 120, 92, 27, 40, 64, 71, 30, 88, 9, + 54, 47, 25, 93, 75, 15, 63, 106, 21, 105, 3, 57, 78, 79, 4, 9, 77, 20, 52, 96, 22, 74, 72, + 85, 95, 19, 26, 57, 13, 10, 124, 50, 19, 52, 116, 30, 102, 35, 11, 60, 35, 77, 110, 78, 119, 119, + 115, 71, 71, 68, 12, 22, 114, 81, 66, 65, 66, 94, 127, 56, 19, 79, 51, 71, 3, 90, 107, 20, 97, + 29, 9, 125, 93, 65, 61, 116, 10, 5, 108, 24, 55, 122, 112, 37, 80, 52, 4, 72, 14, 118, 64, 22, + 102, 52, 55, 93, 6, 42, 115, 57, 104, 123, 77, 116, 17, 81, 41, 124, 97, 7, 120, 92, 121, 53, 42, + 126, 26, 3, 73, 79, 120, 51, 24, 124, 84, 41, 70, 3, 3, 67, 27, 83, 60, 24, 49, 72, 42, 54, + 41, 3, 28, 125, 48, 41, 68, 12, 20, 79, 56, 89, 62, 7, 110, 56, 45, 97, 50, 61, 79, 4, 30, + 121, 115, 110, 52, 25, 92, 1, 122, 28, 63, 125, 14, 61, 109, 15, 8, 94, 118, 106, 13, 29, 105, 34, + 88, 107, 1, 110, 48, 101, 121, 8, 12, 42, 61, 23, 54, 50, 42, 35, 101, 124, 19, 14, 54, 30, 96, + 103, 29, 85, 9, 87, 6, 27, 24, 49, 66, 55, 8, 78, 3, 85, 88, 47, 95, 61, 48, 46, 38, 13, + 23, 106, 44, 123, 114, 70, 120, 15, 16, 123, 79, 78, 36, 86, 59, 49, 11, 124, 127, 102, 70, 64, 35, + 112, 92, 49, 29, 109, 118, 48, 114, 39, 110, 33, 107, 43, 14, 5, 72, 41, 72, 74, 76, 2, 8, 63, + 102, 20, 28, 105, 87, 13, 102, 80, 121, 73, 126, 56, 29, 20, 9, 7, 51, 16, 92, 99, 115, 48, 85, + 53, 41, 119, 19, 3, 117, 74, 98, 118, 53, 33, 65, 64, 49, 7, 62, 44, 60, 41, 55, 24, 53, 93, + 10, 111, 27, 38, 50, 70, 62, 69, 119, 40, 48, 42, 65, 45, 118, 15, 36, 29, 87, 33, 52, 1, 84, + 79, 83, 65, 101, 77, 82, 54, 42, 102, 55, 25, 98, 30, 87, 88, 64, 5, 56, 45, 56, 86, 85, 32, + 74, 104, 98, 14, 33, 86, 102, 85, 30, 25, 71, 76, 98, 103, 82, 82, 116, 12, 1, 82, 116, 108, 121, + 122, 103, 56, 79, 54, 64, 95, 83, 70, 42, 99, 119, 60, 91, 123, 108, 41, 26, 21, 8, 60, 83, 22, + 107, 28, 100, 84, 122, 74, 55, 51, 45, 4, 122, 48, 76, 5, 26, 28, 26, 95, 127, 89, 18, 97, 77, + 110, 70, 115, 19, 84, 91, 1, 97, 1, 36, 92, 115, 16, 74, 42, 122, 124, 52, 59, 66, 11, 37, 101, + 101, 28, 112, 107, 24, 83, 71, 101, 73, 112, 36, 93, 63, 117, 43, 76, 36, 76, 30, 45, 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53, 42, 41, 35, 58, + 94, 43, 113, 88, 42, 9, 119, 125, 114, 89, 90, 83, 28, 90, 30, 87, 111, 35, 42, 6, 63, 49, 96, + 33, 61, 13, 54, 110, 113, 12, 54, 93, 117, 122, 105, 89, 34, 120, 117, 6, 97, 111, 72, 96, 71, 1, + 92, 24, 5, 50, 29, 100, 96, 61, 72, 35, 118, 93, 93, 72, 21, 95, 5, 104, 104, 90, 110, 24, 51, + 120, 10, 64, 34, 122, 31, 34, 90, 8, 61, 11, 119, 61, 111, 125, 24, 23, 72, 85, 100, 72, 54, 113, + 18, 6, 56, 9, 27, 26, 97, 127, 110, 49, 106, 76, 11, 83, 98, 123, 92, 14, 68, 121, 26, 3, 120, + 17, 24, 73, 8, 14, 39, 27, 95, 71, 67, 4, 58, 58, 5, 111, 92, 127, 6, 10, 94, 75, 69, 78, + 70, 107, 11, 117, 98, 99, 95, 95, 50, 3, 91, 71, 27, 35, 117, 56, 18, 92, 51, 66, 28, 96, 103, + 109, 111, 10, 95, 109, 110, 127, 27, 46, 67, 43, 79, 82, 31, 19, 8, 45, 9, 50, 30, 79, 97, 78, + 69, 119, 2, 46, 18, 50, 31, 85, 126, 78, 7, 67, 42, 22, 45, 25, 3, 103, 59, 36, 91, 41, 6, + 60, 42, 79, 95, 123, 4, 27, 58, 120, 6, 28, 81, 79, 112, 106, 96, 52, 18, 68, 69, 38, 74, 27, + 22, 50, 74, 103, 34, 120, 93, 122}; diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8_spill/biases_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8_spill/biases_data.h new file mode 100644 index 00000000..e6f7ade2 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/int16xint8_spill/biases_data.h @@ -0,0 +1,6 @@ +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. +#pragma once +#include + +const int64_t *int16xint8_spill_biases = NULL; diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8_spill/config_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8_spill/config_data.h new file mode 100644 index 00000000..7aa2ee73 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/int16xint8_spill/config_data.h @@ -0,0 +1,24 @@ +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. +#pragma once +#define INT16XINT8_SPILL_OUT_CH 9 +#define INT16XINT8_SPILL_IN_CH 55 +#define INT16XINT8_SPILL_INPUT_W 10 +#define INT16XINT8_SPILL_INPUT_H 8 +#define INT16XINT8_SPILL_DST_SIZE 90 +#define INT16XINT8_SPILL_INPUT_SIZE 4400 +#define INT16XINT8_SPILL_OUT_ACTIVATION_MIN 32667 +#define INT16XINT8_SPILL_OUT_ACTIVATION_MAX 32767 +#define INT16XINT8_SPILL_INPUT_BATCHES 1 +#define INT16XINT8_SPILL_FILTER_X 9 +#define INT16XINT8_SPILL_FILTER_Y 4 +#define INT16XINT8_SPILL_STRIDE_X 1 +#define INT16XINT8_SPILL_STRIDE_Y 1 +#define INT16XINT8_SPILL_PAD_X 0 +#define INT16XINT8_SPILL_PAD_Y 0 +#define INT16XINT8_SPILL_OUTPUT_W 2 +#define INT16XINT8_SPILL_OUTPUT_H 5 +#define INT16XINT8_SPILL_INPUT_OFFSET 0 +#define INT16XINT8_SPILL_OUTPUT_OFFSET 0 +#define INT16XINT8_SPILL_DILATION_X 1 +#define INT16XINT8_SPILL_DILATION_Y 1 diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8_spill/input_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8_spill/input_data.h new file mode 100644 index 00000000..dd1ccfce --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/int16xint8_spill/input_data.h @@ -0,0 +1,281 @@ +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. +#pragma once +#include + +const int16_t int16xint8_spill_input[4400] = { + 32755, 32727, 32721, 32721, 32701, 32721, 32750, 32682, 32669, 32691, 32714, 32670, 32699, 32722, 32730, 32726, + 32684, 32730, 32734, 32682, 32699, 32743, 32697, 32740, 32677, 32731, 32721, 32667, 32712, 32747, 32674, 32684, + 32751, 32713, 32737, 32672, 32696, 32728, 32761, 32690, 32740, 32687, 32672, 32757, 32691, 32742, 32719, 32687, + 32672, 32672, 32717, 32719, 32753, 32722, 32695, 32695, 32741, 32673, 32701, 32721, 32750, 32739, 32731, 32743, + 32679, 32762, 32678, 32725, 32675, 32716, 32741, 32735, 32757, 32762, 32719, 32709, 32766, 32738, 32694, 32761, + 32702, 32764, 32694, 32758, 32716, 32744, 32736, 32701, 32720, 32766, 32710, 32685, 32730, 32743, 32676, 32756, + 32685, 32692, 32693, 32700, 32715, 32708, 32761, 32693, 32732, 32726, 32674, 32766, 32676, 32680, 32705, 32678, + 32707, 32704, 32713, 32733, 32761, 32753, 32731, 32692, 32731, 32704, 32753, 32667, 32740, 32738, 32755, 32683, + 32673, 32671, 32681, 32723, 32751, 32671, 32766, 32692, 32724, 32764, 32723, 32673, 32679, 32697, 32678, 32761, + 32726, 32698, 32677, 32735, 32690, 32754, 32692, 32752, 32737, 32761, 32674, 32744, 32762, 32731, 32720, 32732, + 32749, 32713, 32691, 32742, 32675, 32707, 32736, 32712, 32681, 32700, 32737, 32752, 32764, 32742, 32725, 32708, + 32732, 32687, 32681, 32680, 32672, 32680, 32760, 32712, 32719, 32689, 32713, 32757, 32710, 32757, 32681, 32704, + 32674, 32670, 32714, 32683, 32740, 32757, 32728, 32751, 32720, 32722, 32725, 32676, 32684, 32720, 32688, 32681, + 32725, 32705, 32679, 32714, 32750, 32758, 32721, 32742, 32760, 32691, 32698, 32761, 32708, 32667, 32670, 32745, + 32740, 32748, 32733, 32727, 32739, 32763, 32716, 32683, 32754, 32669, 32746, 32746, 32696, 32764, 32736, 32720, + 32720, 32683, 32714, 32727, 32756, 32706, 32761, 32691, 32718, 32762, 32692, 32736, 32716, 32733, 32761, 32719, + 32720, 32698, 32710, 32733, 32732, 32722, 32764, 32732, 32690, 32766, 32694, 32667, 32688, 32695, 32689, 32737, + 32706, 32705, 32711, 32676, 32683, 32730, 32685, 32741, 32762, 32742, 32692, 32696, 32674, 32757, 32721, 32762, + 32673, 32673, 32758, 32708, 32758, 32722, 32682, 32674, 32748, 32745, 32688, 32760, 32683, 32756, 32724, 32668, + 32694, 32753, 32687, 32746, 32738, 32680, 32759, 32676, 32688, 32689, 32736, 32702, 32689, 32762, 32713, 32752, + 32679, 32682, 32682, 32677, 32685, 32737, 32695, 32766, 32667, 32759, 32731, 32714, 32668, 32732, 32715, 32700, + 32715, 32755, 32737, 32694, 32729, 32766, 32734, 32762, 32701, 32674, 32726, 32682, 32766, 32748, 32749, 32743, + 32762, 32679, 32713, 32756, 32751, 32677, 32734, 32759, 32727, 32668, 32750, 32695, 32738, 32742, 32702, 32755, + 32698, 32710, 32733, 32745, 32765, 32713, 32680, 32710, 32681, 32763, 32725, 32697, 32668, 32723, 32689, 32711, + 32686, 32743, 32685, 32724, 32750, 32722, 32679, 32751, 32726, 32763, 32686, 32751, 32703, 32668, 32745, 32748, + 32739, 32691, 32673, 32756, 32735, 32727, 32715, 32747, 32734, 32722, 32706, 32716, 32721, 32766, 32702, 32744, + 32704, 32668, 32726, 32763, 32713, 32720, 32676, 32738, 32684, 32672, 32747, 32735, 32680, 32693, 32739, 32748, + 32689, 32718, 32704, 32722, 32676, 32676, 32692, 32756, 32766, 32713, 32713, 32690, 32749, 32754, 32707, 32751, + 32707, 32760, 32699, 32759, 32735, 32696, 32745, 32743, 32736, 32755, 32686, 32766, 32710, 32667, 32712, 32701, + 32733, 32669, 32755, 32756, 32685, 32762, 32737, 32754, 32733, 32728, 32722, 32700, 32690, 32722, 32751, 32668, + 32695, 32737, 32676, 32741, 32724, 32758, 32714, 32684, 32706, 32703, 32699, 32743, 32682, 32719, 32759, 32737, + 32685, 32752, 32757, 32753, 32721, 32748, 32753, 32679, 32760, 32681, 32708, 32691, 32747, 32732, 32708, 32679, + 32678, 32737, 32716, 32700, 32723, 32694, 32707, 32721, 32728, 32725, 32749, 32723, 32722, 32713, 32688, 32675, + 32717, 32764, 32709, 32733, 32738, 32755, 32678, 32676, 32714, 32706, 32689, 32727, 32730, 32720, 32681, 32676, + 32676, 32763, 32692, 32722, 32714, 32694, 32746, 32682, 32723, 32712, 32678, 32742, 32722, 32731, 32761, 32756, + 32677, 32688, 32741, 32729, 32694, 32730, 32722, 32679, 32754, 32674, 32739, 32739, 32700, 32739, 32669, 32730, + 32756, 32744, 32689, 32765, 32682, 32689, 32685, 32680, 32758, 32764, 32678, 32668, 32679, 32743, 32697, 32725, + 32690, 32696, 32763, 32689, 32734, 32737, 32699, 32687, 32675, 32760, 32695, 32692, 32677, 32679, 32706, 32725, + 32693, 32762, 32763, 32675, 32685, 32672, 32748, 32749, 32701, 32746, 32730, 32753, 32731, 32738, 32681, 32677, + 32676, 32687, 32747, 32761, 32759, 32719, 32676, 32733, 32753, 32686, 32686, 32758, 32706, 32703, 32759, 32704, + 32669, 32725, 32744, 32686, 32721, 32764, 32754, 32729, 32731, 32677, 32741, 32728, 32679, 32722, 32678, 32674, + 32672, 32672, 32676, 32681, 32729, 32706, 32726, 32669, 32694, 32677, 32762, 32702, 32745, 32739, 32729, 32702, + 32673, 32739, 32715, 32720, 32723, 32715, 32753, 32704, 32683, 32732, 32763, 32766, 32683, 32724, 32733, 32759, + 32764, 32704, 32724, 32747, 32751, 32719, 32673, 32752, 32765, 32737, 32707, 32677, 32679, 32688, 32681, 32671, + 32721, 32689, 32720, 32708, 32702, 32722, 32707, 32691, 32716, 32710, 32764, 32672, 32762, 32742, 32749, 32749, + 32735, 32753, 32718, 32677, 32753, 32672, 32765, 32699, 32694, 32736, 32728, 32743, 32696, 32739, 32740, 32705, + 32677, 32670, 32758, 32674, 32676, 32766, 32702, 32750, 32696, 32674, 32720, 32725, 32701, 32679, 32760, 32712, + 32714, 32714, 32698, 32669, 32763, 32755, 32669, 32765, 32754, 32735, 32729, 32676, 32682, 32741, 32704, 32698, + 32725, 32748, 32757, 32685, 32748, 32680, 32671, 32718, 32733, 32742, 32737, 32693, 32701, 32675, 32700, 32698, + 32702, 32766, 32685, 32742, 32697, 32728, 32677, 32747, 32678, 32764, 32676, 32731, 32763, 32684, 32720, 32747, + 32695, 32765, 32753, 32726, 32711, 32686, 32734, 32699, 32765, 32704, 32765, 32719, 32690, 32714, 32739, 32763, + 32748, 32761, 32760, 32748, 32763, 32758, 32755, 32757, 32746, 32766, 32672, 32711, 32714, 32691, 32744, 32762, + 32671, 32737, 32752, 32753, 32739, 32687, 32726, 32726, 32750, 32687, 32673, 32754, 32676, 32765, 32690, 32714, + 32762, 32724, 32766, 32733, 32715, 32674, 32715, 32731, 32699, 32674, 32694, 32746, 32743, 32705, 32689, 32668, + 32745, 32718, 32675, 32678, 32743, 32706, 32730, 32679, 32680, 32704, 32692, 32717, 32689, 32761, 32724, 32729, + 32753, 32668, 32762, 32691, 32675, 32702, 32678, 32673, 32711, 32668, 32718, 32675, 32671, 32736, 32729, 32743, + 32692, 32730, 32721, 32710, 32759, 32750, 32731, 32698, 32688, 32699, 32671, 32763, 32673, 32713, 32671, 32749, + 32717, 32694, 32745, 32694, 32694, 32707, 32743, 32705, 32762, 32750, 32750, 32753, 32722, 32689, 32687, 32721, + 32739, 32725, 32738, 32741, 32706, 32702, 32739, 32684, 32727, 32704, 32691, 32682, 32709, 32738, 32760, 32686, + 32736, 32719, 32727, 32673, 32753, 32707, 32684, 32701, 32741, 32726, 32737, 32761, 32702, 32723, 32729, 32673, + 32676, 32691, 32687, 32759, 32678, 32765, 32667, 32733, 32757, 32676, 32751, 32720, 32757, 32722, 32720, 32736, + 32736, 32735, 32704, 32756, 32670, 32710, 32750, 32682, 32765, 32752, 32741, 32746, 32706, 32733, 32741, 32756, + 32668, 32678, 32726, 32711, 32731, 32721, 32743, 32749, 32711, 32727, 32692, 32721, 32680, 32711, 32759, 32747, + 32667, 32710, 32762, 32758, 32678, 32685, 32676, 32740, 32722, 32685, 32733, 32763, 32667, 32736, 32701, 32681, + 32680, 32693, 32690, 32762, 32673, 32713, 32744, 32694, 32747, 32723, 32671, 32709, 32722, 32762, 32694, 32709, + 32705, 32741, 32757, 32686, 32696, 32706, 32716, 32730, 32708, 32758, 32750, 32691, 32714, 32755, 32709, 32699, + 32728, 32677, 32761, 32718, 32752, 32699, 32738, 32739, 32724, 32707, 32667, 32679, 32761, 32711, 32685, 32761, + 32673, 32742, 32679, 32678, 32718, 32752, 32743, 32678, 32727, 32726, 32693, 32707, 32739, 32687, 32667, 32738, + 32669, 32676, 32684, 32694, 32730, 32723, 32727, 32687, 32689, 32679, 32749, 32690, 32758, 32675, 32721, 32716, + 32756, 32732, 32721, 32700, 32757, 32684, 32702, 32694, 32679, 32698, 32740, 32758, 32705, 32759, 32698, 32709, + 32716, 32669, 32751, 32717, 32756, 32681, 32689, 32685, 32724, 32757, 32732, 32705, 32669, 32749, 32709, 32728, + 32696, 32674, 32754, 32766, 32705, 32722, 32759, 32712, 32674, 32742, 32686, 32673, 32742, 32703, 32751, 32697, + 32706, 32718, 32763, 32745, 32719, 32717, 32668, 32719, 32744, 32744, 32674, 32717, 32683, 32686, 32671, 32668, + 32727, 32732, 32731, 32738, 32707, 32713, 32720, 32686, 32669, 32715, 32739, 32748, 32757, 32712, 32765, 32723, + 32717, 32678, 32741, 32703, 32687, 32692, 32722, 32738, 32669, 32672, 32734, 32765, 32683, 32698, 32680, 32708, + 32668, 32695, 32704, 32724, 32745, 32675, 32673, 32718, 32738, 32681, 32714, 32744, 32697, 32709, 32680, 32667, + 32703, 32762, 32741, 32738, 32757, 32723, 32717, 32762, 32725, 32765, 32731, 32700, 32689, 32760, 32672, 32670, + 32734, 32672, 32738, 32678, 32681, 32686, 32705, 32761, 32742, 32745, 32753, 32751, 32731, 32742, 32766, 32759, + 32755, 32675, 32688, 32676, 32703, 32760, 32738, 32747, 32690, 32686, 32760, 32724, 32754, 32724, 32676, 32683, + 32671, 32716, 32725, 32728, 32674, 32719, 32670, 32673, 32720, 32679, 32695, 32729, 32762, 32719, 32717, 32746, + 32719, 32758, 32668, 32668, 32705, 32763, 32684, 32719, 32674, 32680, 32707, 32719, 32738, 32723, 32738, 32741, + 32714, 32719, 32691, 32685, 32752, 32746, 32679, 32711, 32673, 32765, 32691, 32698, 32669, 32694, 32700, 32763, + 32693, 32729, 32704, 32741, 32733, 32721, 32724, 32713, 32719, 32690, 32709, 32705, 32733, 32712, 32733, 32739, + 32715, 32707, 32739, 32717, 32686, 32718, 32675, 32748, 32683, 32763, 32729, 32744, 32681, 32714, 32766, 32680, + 32730, 32744, 32697, 32757, 32708, 32715, 32721, 32688, 32755, 32685, 32716, 32668, 32704, 32700, 32738, 32733, + 32720, 32742, 32702, 32706, 32719, 32675, 32751, 32713, 32682, 32708, 32690, 32759, 32742, 32715, 32749, 32730, + 32693, 32710, 32766, 32692, 32686, 32694, 32753, 32756, 32691, 32760, 32742, 32747, 32744, 32745, 32733, 32724, + 32695, 32711, 32707, 32680, 32742, 32722, 32691, 32742, 32763, 32673, 32737, 32711, 32758, 32733, 32723, 32760, + 32689, 32715, 32676, 32761, 32720, 32708, 32706, 32673, 32670, 32759, 32674, 32678, 32703, 32684, 32737, 32745, + 32672, 32699, 32670, 32697, 32718, 32692, 32700, 32763, 32725, 32670, 32710, 32762, 32719, 32738, 32764, 32746, + 32709, 32710, 32682, 32743, 32684, 32668, 32673, 32719, 32685, 32668, 32704, 32669, 32703, 32708, 32674, 32699, + 32668, 32755, 32745, 32758, 32707, 32764, 32752, 32740, 32715, 32679, 32685, 32672, 32687, 32714, 32693, 32680, + 32680, 32708, 32735, 32757, 32727, 32685, 32742, 32744, 32745, 32700, 32693, 32702, 32717, 32715, 32712, 32717, + 32683, 32717, 32698, 32712, 32696, 32719, 32756, 32699, 32738, 32764, 32741, 32693, 32719, 32764, 32741, 32759, + 32698, 32670, 32682, 32697, 32702, 32697, 32689, 32688, 32672, 32678, 32757, 32694, 32729, 32766, 32737, 32725, + 32762, 32753, 32689, 32680, 32720, 32673, 32764, 32719, 32701, 32669, 32751, 32685, 32693, 32705, 32762, 32716, + 32764, 32681, 32725, 32715, 32749, 32757, 32735, 32698, 32738, 32669, 32733, 32727, 32696, 32735, 32712, 32749, + 32741, 32737, 32714, 32685, 32706, 32751, 32707, 32724, 32751, 32696, 32728, 32747, 32737, 32694, 32695, 32675, + 32675, 32757, 32699, 32668, 32683, 32733, 32747, 32762, 32718, 32720, 32748, 32715, 32759, 32747, 32673, 32766, + 32744, 32736, 32719, 32716, 32674, 32735, 32752, 32752, 32689, 32668, 32730, 32722, 32748, 32737, 32733, 32759, + 32748, 32763, 32754, 32746, 32766, 32688, 32760, 32679, 32682, 32677, 32697, 32684, 32746, 32669, 32734, 32683, + 32673, 32702, 32690, 32677, 32695, 32765, 32763, 32706, 32719, 32704, 32756, 32749, 32711, 32721, 32694, 32683, + 32699, 32685, 32749, 32745, 32761, 32749, 32731, 32673, 32679, 32705, 32682, 32753, 32672, 32686, 32682, 32667, + 32682, 32706, 32699, 32758, 32763, 32691, 32702, 32704, 32736, 32751, 32689, 32672, 32748, 32738, 32766, 32734, + 32735, 32761, 32721, 32704, 32752, 32724, 32680, 32713, 32675, 32703, 32706, 32667, 32765, 32752, 32696, 32700, + 32745, 32752, 32759, 32710, 32718, 32696, 32677, 32670, 32752, 32747, 32675, 32695, 32725, 32710, 32745, 32690, + 32676, 32710, 32735, 32739, 32752, 32729, 32736, 32711, 32710, 32712, 32702, 32745, 32740, 32682, 32678, 32698, + 32732, 32687, 32685, 32737, 32736, 32765, 32674, 32749, 32755, 32755, 32685, 32744, 32688, 32715, 32746, 32719, + 32762, 32710, 32671, 32713, 32711, 32748, 32679, 32673, 32676, 32754, 32742, 32693, 32757, 32756, 32680, 32748, + 32668, 32724, 32738, 32670, 32667, 32715, 32759, 32755, 32674, 32680, 32712, 32727, 32716, 32717, 32761, 32735, + 32735, 32757, 32707, 32738, 32725, 32766, 32753, 32731, 32699, 32695, 32700, 32682, 32710, 32702, 32711, 32684, + 32672, 32741, 32669, 32683, 32762, 32683, 32677, 32760, 32706, 32672, 32685, 32747, 32686, 32753, 32701, 32714, + 32766, 32674, 32729, 32713, 32702, 32712, 32682, 32758, 32694, 32695, 32684, 32689, 32691, 32693, 32712, 32766, + 32714, 32714, 32714, 32685, 32685, 32698, 32728, 32718, 32681, 32726, 32688, 32675, 32757, 32745, 32761, 32747, + 32720, 32715, 32696, 32717, 32747, 32732, 32688, 32702, 32673, 32747, 32699, 32739, 32727, 32753, 32680, 32745, + 32673, 32719, 32709, 32679, 32712, 32694, 32749, 32748, 32668, 32720, 32697, 32672, 32766, 32671, 32761, 32668, + 32711, 32667, 32762, 32740, 32682, 32728, 32684, 32697, 32737, 32747, 32755, 32687, 32671, 32708, 32678, 32676, + 32756, 32672, 32674, 32746, 32728, 32727, 32701, 32683, 32705, 32763, 32737, 32765, 32702, 32744, 32753, 32684, + 32703, 32684, 32671, 32671, 32743, 32716, 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32764, 32677, 32693, 32764, 32756, 32713, 32736, 32732, 32737, 32695, 32728, 32760, 32684, 32736, + 32680, 32724, 32748, 32747, 32721, 32687, 32718, 32672, 32699, 32758, 32700, 32686, 32668, 32723, 32751, 32698, + 32751, 32684, 32748, 32734, 32766, 32734, 32754, 32721, 32675, 32734, 32727, 32670, 32734, 32685, 32737, 32673, + 32762, 32732, 32712, 32761, 32757, 32715, 32693, 32754, 32750, 32687, 32696, 32757, 32758, 32737, 32683, 32757, + 32709, 32696, 32696, 32757, 32752, 32671, 32678, 32729, 32671, 32681, 32686, 32724, 32714, 32668, 32674, 32694, + 32695, 32763, 32725, 32701, 32750, 32682, 32683, 32754, 32712, 32762, 32716, 32732, 32701, 32749, 32761, 32670, + 32671, 32716, 32755, 32727, 32696, 32758, 32732, 32715, 32687, 32696, 32694, 32720, 32716, 32727, 32715, 32724, + 32740, 32739, 32696, 32747, 32758, 32707, 32697, 32731, 32713, 32716, 32672, 32733, 32713, 32753, 32713, 32742}; diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8_spill/output_mult_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8_spill/output_mult_data.h new file mode 100644 index 00000000..9b36b1a9 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/int16xint8_spill/output_mult_data.h @@ -0,0 +1,7 @@ +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. +#pragma once +#include + +const int32_t int16xint8_spill_output_mult[9] = + {1100398998, 1100624659, 1100035049, 1099990516, 1100661379, 1100714636, 1100682734, 1100519706, 1100868940}; diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8_spill/output_ref_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8_spill/output_ref_data.h new file mode 100644 index 00000000..ee02443f --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/int16xint8_spill/output_ref_data.h @@ -0,0 +1,12 @@ +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. +#pragma once +#include + +const int16_t int16xint8_spill_output_ref[90] = { + 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32719, 32667, 32667, 32667, 32667, 32667, 32667, + 32667, 32667, 32719, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32719, 32667, 32667, 32667, + 32667, 32667, 32667, 32667, 32667, 32719, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32720, + 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32719, 32667, 32667, 32667, 32667, 32667, 32667, + 32667, 32667, 32720, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32719, 32667, 32667, 32667, + 32667, 32667, 32667, 32667, 32667, 32719, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32718}; diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8_spill/output_shift_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8_spill/output_shift_data.h new file mode 100644 index 00000000..b9beffc0 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/int16xint8_spill/output_shift_data.h @@ -0,0 +1,6 @@ +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. +#pragma once +#include + +const int32_t int16xint8_spill_output_shift[9] = {-16, -16, -16, -16, -16, -16, -16, -16, -16}; diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8_spill/test_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8_spill/test_data.h new file mode 100644 index 00000000..4d61c5f2 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/int16xint8_spill/test_data.h @@ -0,0 +1,9 @@ +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. +#include "biases_data.h" +#include "config_data.h" +#include "input_data.h" +#include "output_mult_data.h" +#include "output_ref_data.h" +#include "output_shift_data.h" +#include "weights_data.h" diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8_spill/weights_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8_spill/weights_data.h new file mode 100644 index 00000000..35ff86df --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/int16xint8_spill/weights_data.h @@ -0,0 +1,781 @@ +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. +#pragma once +#include + +const int8_t int16xint8_spill_weights[17820] = { + 79, 101, 58, 81, 42, 71, 35, 44, 102, 13, 8, 58, 12, 100, 15, 59, 85, 94, 86, 9, 50, 53, 63, + 17, 76, 82, 122, 74, 26, 41, 46, 92, 125, 70, 75, 32, 62, 53, 80, 21, 102, 110, 17, 21, 82, 104, + 120, 114, 26, 19, 33, 74, 116, 60, 96, 45, 110, 53, 102, 97, 124, 47, 8, 100, 25, 2, 75, 16, 36, + 115, 33, 86, 59, 8, 62, 108, 101, 35, 62, 106, 51, 87, 94, 102, 87, 68, 107, 60, 75, 24, 79, 50, + 96, 26, 21, 29, 26, 34, 102, 102, 31, 35, 118, 117, 104, 53, 82, 124, 2, 27, 62, 117, 70, 93, 14, + 7, 3, 76, 15, 27, 120, 17, 10, 1, 93, 75, 101, 63, 19, 37, 119, 11, 16, 109, 35, 91, 68, 58, + 45, 84, 25, 39, 18, 55, 118, 64, 45, 112, 95, 67, 121, 109, 75, 26, 62, 37, 82, 19, 46, 20, 108, + 91, 108, 47, 34, 102, 22, 126, 2, 30, 44, 98, 28, 58, 77, 20, 83, 17, 65, 101, 101, 11, 87, 42, + 101, 36, 55, 81, 24, 82, 101, 42, 2, 86, 17, 120, 10, 51, 75, 41, 66, 123, 73, 102, 9, 64, 14, + 57, 14, 3, 75, 91, 37, 92, 11, 35, 44, 28, 21, 124, 36, 13, 25, 3, 122, 24, 17, 46, 18, 113, + 32, 20, 3, 118, 89, 124, 20, 120, 44, 51, 74, 100, 120, 75, 68, 35, 106, 111, 7, 108, 99, 110, 113, + 28, 21, 68, 42, 119, 108, 9, 14, 39, 47, 59, 115, 21, 109, 93, 95, 53, 21, 18, 35, 106, 79, 43, + 54, 52, 118, 77, 63, 65, 105, 67, 12, 27, 12, 126, 71, 103, 23, 100, 72, 22, 7, 113, 1, 71, 66, + 84, 96, 57, 76, 117, 72, 6, 85, 126, 35, 22, 111, 28, 117, 12, 80, 82, 115, 40, 59, 38, 115, 7, + 100, 111, 20, 33, 77, 60, 119, 16, 123, 96, 94, 66, 99, 115, 47, 8, 109, 105, 56, 9, 8, 17, 116, + 97, 112, 47, 40, 100, 48, 16, 44, 61, 24, 107, 34, 67, 26, 92, 2, 78, 107, 89, 11, 8, 123, 74, + 90, 108, 84, 18, 28, 29, 70, 16, 115, 23, 106, 102, 64, 123, 56, 101, 125, 53, 122, 39, 70, 4, 39, + 41, 25, 72, 71, 69, 70, 62, 106, 57, 105, 125, 64, 113, 96, 27, 102, 37, 8, 83, 91, 38, 90, 63, + 118, 10, 35, 40, 121, 89, 50, 106, 30, 110, 120, 45, 18, 10, 85, 119, 23, 8, 15, 33, 34, 100, 84, + 74, 6, 111, 70, 47, 12, 30, 54, 102, 92, 92, 119, 83, 50, 95, 70, 106, 88, 77, 45, 73, 116, 127, + 104, 70, 22, 25, 83, 46, 67, 3, 82, 120, 93, 73, 43, 72, 81, 105, 100, 105, 84, 3, 32, 14, 53, + 117, 52, 106, 45, 31, 30, 123, 67, 95, 66, 53, 16, 58, 18, 19, 50, 109, 123, 25, 61, 13, 17, 91, + 25, 47, 116, 22, 64, 50, 28, 13, 22, 109, 1, 71, 102, 16, 25, 29, 38, 12, 32, 87, 65, 52, 2, + 83, 54, 46, 111, 48, 63, 36, 44, 44, 37, 31, 106, 33, 54, 39, 8, 103, 40, 15, 92, 14, 3, 75, + 26, 27, 107, 99, 93, 124, 22, 94, 38, 68, 25, 67, 108, 9, 25, 2, 14, 108, 2, 41, 36, 24, 125, + 41, 76, 119, 87, 103, 64, 60, 52, 98, 71, 40, 104, 89, 77, 49, 12, 122, 18, 23, 82, 93, 103, 94, + 78, 30, 68, 57, 23, 79, 113, 40, 56, 118, 22, 78, 22, 67, 53, 37, 29, 75, 30, 79, 31, 101, 104, + 68, 117, 19, 72, 5, 89, 39, 102, 4, 9, 36, 29, 106, 57, 98, 19, 28, 126, 10, 52, 9, 16, 29, + 103, 38, 126, 64, 78, 51, 30, 32, 103, 46, 48, 118, 59, 100, 31, 42, 7, 78, 16, 78, 124, 49, 16, + 36, 59, 22, 85, 42, 107, 45, 12, 68, 51, 104, 57, 77, 113, 101, 89, 43, 91, 97, 76, 114, 76, 126, + 29, 15, 102, 35, 65, 88, 46, 98, 103, 15, 64, 89, 18, 47, 77, 22, 59, 23, 29, 74, 105, 16, 33, + 74, 110, 3, 18, 113, 127, 12, 4, 84, 96, 66, 24, 9, 118, 71, 33, 35, 100, 67, 36, 21, 83, 101, + 32, 124, 82, 14, 84, 27, 59, 20, 34, 25, 84, 85, 114, 79, 72, 5, 42, 86, 42, 105, 109, 44, 119, + 29, 110, 1, 98, 43, 94, 77, 43, 117, 51, 29, 12, 125, 23, 26, 75, 32, 43, 58, 11, 108, 82, 53, + 63, 67, 109, 1, 30, 92, 53, 124, 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121, 3, 96, 122, 28, 26, 20, 12, 67, 46, 84, 117, 30, 81, 58, + 125, 14, 39, 19, 95, 58, 44, 96, 122, 60, 39, 77, 109, 58, 10, 35, 73, 120, 101, 24, 87, 126, 72, + 90, 9, 1, 18, 12, 16, 87, 32, 71, 12, 10, 5, 123, 127, 64, 98, 81, 27, 68, 89, 57, 126, 31, + 94, 126, 60, 31, 109, 71, 120, 34, 1, 115, 75, 119, 26, 122, 104, 9, 101, 106, 52, 75, 46, 46, 54, + 37, 69, 38, 38, 65, 67, 68, 31, 40, 60, 110, 117, 8, 42, 45, 117, 89, 114, 11, 86, 15, 58, 27, + 113, 47, 71, 15, 49, 79, 50, 106, 10, 38, 80, 39, 86, 87, 74, 49, 126, 42, 99, 127, 80, 26, 110, + 31, 83, 110, 67, 32, 48, 66, 48, 110, 121, 120, 90, 36, 68, 67, 124, 68, 115, 26, 60, 112, 51, 25, + 83, 17, 84, 73, 125, 44, 42, 48, 75, 24, 33, 98, 88, 102, 110, 124, 6, 119, 118, 65, 47, 68, 88, + 19, 32, 22, 53, 51, 64, 11, 8, 25, 16, 8, 102, 18, 118, 97, 110, 52, 19, 70, 5, 111, 61, 103, + 17, 91, 11, 16, 39, 11, 43, 107, 115, 47, 95, 8, 8, 72, 31, 9, 62, 7, 50, 103, 67, 86, 121, + 83, 57, 123, 59, 67, 71, 40, 6, 119, 11, 98, 51, 103, 26, 54, 107, 100, 89}; diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/biases_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/biases_data.h new file mode 100644 index 00000000..ace28d6c --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/biases_data.h @@ -0,0 +1,6 @@ +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. +#pragma once +#include + +const int64_t *int16xint8_spill2_biases = NULL; diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/config_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/config_data.h new file mode 100644 index 00000000..b79e38d8 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/config_data.h @@ -0,0 +1,24 @@ +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. +#pragma once +#define INT16XINT8_SPILL2_OUT_CH 9 +#define INT16XINT8_SPILL2_IN_CH 12 +#define INT16XINT8_SPILL2_INPUT_W 10 +#define INT16XINT8_SPILL2_INPUT_H 8 +#define INT16XINT8_SPILL2_DST_SIZE 90 +#define INT16XINT8_SPILL2_INPUT_SIZE 960 +#define INT16XINT8_SPILL2_OUT_ACTIVATION_MIN 32667 +#define INT16XINT8_SPILL2_OUT_ACTIVATION_MAX 32767 +#define INT16XINT8_SPILL2_INPUT_BATCHES 1 +#define INT16XINT8_SPILL2_FILTER_X 9 +#define INT16XINT8_SPILL2_FILTER_Y 4 +#define INT16XINT8_SPILL2_STRIDE_X 1 +#define INT16XINT8_SPILL2_STRIDE_Y 1 +#define INT16XINT8_SPILL2_PAD_X 0 +#define INT16XINT8_SPILL2_PAD_Y 0 +#define INT16XINT8_SPILL2_OUTPUT_W 2 +#define INT16XINT8_SPILL2_OUTPUT_H 5 +#define INT16XINT8_SPILL2_INPUT_OFFSET 0 +#define INT16XINT8_SPILL2_OUTPUT_OFFSET 0 +#define INT16XINT8_SPILL2_DILATION_X 1 +#define INT16XINT8_SPILL2_DILATION_Y 1 diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/input_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/input_data.h new file mode 100644 index 00000000..d81c3483 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/input_data.h @@ -0,0 +1,66 @@ +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. +#pragma once +#include + +const int16_t int16xint8_spill2_input[960] = { + 32732, 32696, 32712, 32689, 32702, 32755, 32747, 32756, 32690, 32671, 32733, 32703, 32714, 32668, 32687, 32730, + 32742, 32735, 32699, 32674, 32711, 32675, 32719, 32718, 32737, 32694, 32748, 32669, 32735, 32676, 32743, 32755, + 32740, 32719, 32746, 32688, 32719, 32733, 32739, 32689, 32766, 32703, 32674, 32687, 32728, 32704, 32708, 32691, + 32730, 32684, 32701, 32683, 32731, 32712, 32723, 32722, 32724, 32700, 32733, 32703, 32745, 32732, 32714, 32694, + 32732, 32754, 32695, 32741, 32750, 32739, 32688, 32722, 32756, 32674, 32681, 32759, 32741, 32697, 32706, 32747, + 32687, 32730, 32741, 32667, 32682, 32684, 32726, 32691, 32721, 32755, 32735, 32715, 32732, 32689, 32716, 32749, + 32677, 32692, 32694, 32739, 32715, 32717, 32723, 32717, 32716, 32736, 32678, 32701, 32694, 32705, 32688, 32718, + 32701, 32758, 32700, 32709, 32688, 32737, 32687, 32736, 32676, 32727, 32731, 32688, 32713, 32730, 32698, 32686, + 32762, 32722, 32685, 32720, 32754, 32753, 32711, 32726, 32760, 32759, 32680, 32702, 32683, 32761, 32713, 32699, + 32674, 32679, 32727, 32757, 32672, 32691, 32720, 32728, 32704, 32700, 32680, 32704, 32749, 32765, 32719, 32730, + 32683, 32751, 32736, 32718, 32696, 32674, 32674, 32690, 32747, 32690, 32763, 32706, 32758, 32720, 32710, 32735, + 32721, 32698, 32738, 32668, 32718, 32694, 32681, 32707, 32706, 32761, 32756, 32687, 32700, 32686, 32686, 32680, + 32751, 32761, 32715, 32744, 32697, 32712, 32686, 32725, 32764, 32746, 32739, 32739, 32733, 32763, 32718, 32720, + 32714, 32681, 32696, 32711, 32734, 32761, 32746, 32697, 32729, 32711, 32677, 32740, 32741, 32715, 32729, 32685, + 32685, 32726, 32728, 32707, 32763, 32731, 32676, 32729, 32711, 32714, 32739, 32753, 32729, 32716, 32735, 32712, + 32724, 32722, 32731, 32699, 32765, 32745, 32695, 32739, 32755, 32726, 32750, 32756, 32693, 32700, 32697, 32752, + 32726, 32732, 32722, 32684, 32724, 32706, 32737, 32755, 32684, 32764, 32703, 32687, 32733, 32671, 32699, 32726, + 32703, 32747, 32670, 32667, 32724, 32697, 32719, 32739, 32760, 32740, 32700, 32756, 32716, 32754, 32696, 32744, + 32750, 32732, 32761, 32760, 32751, 32668, 32753, 32698, 32748, 32667, 32760, 32746, 32725, 32708, 32711, 32706, + 32715, 32752, 32667, 32734, 32724, 32745, 32743, 32723, 32682, 32706, 32718, 32762, 32733, 32676, 32708, 32680, + 32761, 32673, 32710, 32749, 32704, 32738, 32684, 32681, 32756, 32669, 32691, 32726, 32760, 32742, 32725, 32667, + 32760, 32704, 32728, 32706, 32719, 32709, 32671, 32759, 32720, 32669, 32742, 32695, 32694, 32765, 32717, 32761, + 32730, 32712, 32714, 32687, 32750, 32734, 32730, 32720, 32745, 32688, 32752, 32679, 32749, 32723, 32708, 32688, + 32683, 32712, 32668, 32690, 32669, 32749, 32734, 32678, 32678, 32698, 32713, 32727, 32702, 32694, 32697, 32759, + 32730, 32749, 32745, 32696, 32733, 32701, 32672, 32730, 32748, 32707, 32747, 32758, 32711, 32691, 32688, 32681, + 32755, 32748, 32748, 32735, 32727, 32707, 32677, 32712, 32751, 32741, 32724, 32674, 32689, 32752, 32740, 32710, + 32764, 32676, 32729, 32674, 32688, 32757, 32709, 32724, 32710, 32683, 32764, 32762, 32713, 32765, 32669, 32667, + 32704, 32736, 32749, 32732, 32712, 32748, 32733, 32695, 32743, 32693, 32761, 32740, 32675, 32682, 32744, 32714, + 32765, 32668, 32757, 32711, 32756, 32701, 32721, 32706, 32733, 32715, 32720, 32744, 32739, 32740, 32670, 32757, + 32675, 32687, 32722, 32753, 32683, 32752, 32685, 32685, 32688, 32747, 32727, 32701, 32734, 32677, 32669, 32674, + 32675, 32706, 32753, 32695, 32759, 32731, 32687, 32754, 32738, 32680, 32702, 32752, 32714, 32731, 32730, 32749, + 32721, 32699, 32760, 32684, 32719, 32687, 32694, 32720, 32671, 32723, 32679, 32741, 32690, 32737, 32737, 32689, + 32684, 32685, 32687, 32734, 32729, 32755, 32736, 32742, 32756, 32710, 32734, 32766, 32725, 32701, 32756, 32682, + 32683, 32749, 32741, 32736, 32695, 32723, 32726, 32758, 32678, 32689, 32681, 32765, 32708, 32718, 32693, 32737, + 32724, 32677, 32720, 32721, 32680, 32683, 32752, 32765, 32696, 32765, 32745, 32684, 32699, 32681, 32731, 32729, + 32678, 32711, 32667, 32668, 32756, 32713, 32745, 32737, 32741, 32673, 32719, 32678, 32759, 32673, 32714, 32698, + 32670, 32759, 32702, 32691, 32710, 32744, 32686, 32715, 32739, 32726, 32721, 32758, 32701, 32682, 32727, 32737, + 32743, 32704, 32762, 32743, 32701, 32685, 32720, 32763, 32729, 32752, 32763, 32696, 32735, 32697, 32700, 32707, + 32695, 32700, 32697, 32744, 32714, 32704, 32708, 32741, 32739, 32669, 32719, 32743, 32674, 32712, 32715, 32701, + 32704, 32708, 32684, 32707, 32736, 32731, 32697, 32729, 32689, 32741, 32730, 32760, 32689, 32674, 32766, 32693, + 32689, 32736, 32678, 32685, 32672, 32753, 32683, 32761, 32691, 32700, 32709, 32708, 32672, 32672, 32763, 32742, + 32696, 32714, 32722, 32752, 32735, 32697, 32724, 32678, 32712, 32668, 32707, 32678, 32679, 32696, 32759, 32760, + 32709, 32741, 32724, 32717, 32689, 32705, 32725, 32722, 32681, 32736, 32684, 32695, 32721, 32669, 32706, 32740, + 32693, 32704, 32737, 32694, 32738, 32720, 32690, 32763, 32689, 32675, 32725, 32765, 32669, 32676, 32688, 32723, + 32750, 32669, 32763, 32707, 32755, 32720, 32740, 32688, 32766, 32721, 32734, 32723, 32685, 32700, 32756, 32736, + 32702, 32721, 32698, 32722, 32745, 32718, 32675, 32752, 32702, 32726, 32668, 32675, 32714, 32694, 32745, 32676, + 32743, 32731, 32745, 32759, 32758, 32708, 32700, 32703, 32752, 32725, 32708, 32683, 32720, 32732, 32686, 32760, + 32766, 32733, 32750, 32737, 32746, 32702, 32684, 32709, 32731, 32733, 32689, 32713, 32730, 32762, 32688, 32710, + 32716, 32674, 32722, 32667, 32678, 32710, 32747, 32688, 32715, 32708, 32738, 32679, 32720, 32709, 32705, 32713, + 32703, 32681, 32732, 32684, 32717, 32715, 32711, 32736, 32685, 32695, 32669, 32758, 32725, 32680, 32758, 32678, + 32670, 32720, 32705, 32715, 32743, 32703, 32711, 32717, 32683, 32736, 32732, 32700, 32728, 32726, 32717, 32716, + 32713, 32763, 32697, 32711, 32736, 32704, 32728, 32761, 32677, 32679, 32731, 32720, 32712, 32723, 32762, 32718, + 32699, 32751, 32755, 32694, 32736, 32670, 32679, 32676, 32701, 32760, 32735, 32716, 32726, 32714, 32703, 32667, + 32671, 32668, 32729, 32738, 32727, 32704, 32748, 32717, 32716, 32717, 32701, 32748, 32721, 32679, 32747, 32707, + 32757, 32696, 32712, 32757, 32693, 32711, 32741, 32687, 32763, 32747, 32730, 32727, 32698, 32702, 32678, 32699, + 32756, 32733, 32697, 32691, 32732, 32732, 32680, 32690, 32739, 32740, 32750, 32717, 32674, 32686, 32703, 32671, + 32726, 32672, 32738, 32724, 32765, 32690, 32749, 32714, 32694, 32691, 32725, 32676, 32699, 32725, 32713, 32762, + 32724, 32690, 32676, 32710, 32697, 32765, 32670, 32758, 32728, 32681, 32744, 32712, 32741, 32765, 32756, 32766, + 32713, 32706, 32737, 32758, 32733, 32763, 32670, 32667, 32674, 32726, 32718, 32732, 32735, 32734, 32703, 32673, + 32709, 32723, 32717, 32759, 32754, 32671, 32723, 32719, 32740, 32677, 32697, 32668, 32671, 32739, 32704, 32744}; diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/output_mult_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/output_mult_data.h new file mode 100644 index 00000000..0fd80c3c --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/output_mult_data.h @@ -0,0 +1,7 @@ +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. +#pragma once +#include + +const int32_t int16xint8_spill2_output_mult[9] = + {1231320420, 1228194292, 1228950954, 1231269879, 1231112138, 1229528901, 1230557932, 1230167876, 1229640034}; diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/output_ref_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/output_ref_data.h new file mode 100644 index 00000000..ba5623b5 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/output_ref_data.h @@ -0,0 +1,12 @@ +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. +#pragma once +#include + +const int16_t int16xint8_spill2_output_ref[90] = { + 32716, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32718, 32667, 32667, 32667, 32667, 32667, + 32667, 32667, 32667, 32716, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32714, 32667, 32667, + 32667, 32667, 32667, 32667, 32667, 32667, 32716, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32667, + 32716, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32713, 32667, 32667, 32667, 32667, 32667, + 32667, 32667, 32667, 32714, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32713, 32667, 32667, + 32667, 32667, 32667, 32667, 32667, 32667, 32714, 32667, 32667, 32667, 32667, 32667, 32667, 32667, 32667}; diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/output_shift_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/output_shift_data.h new file mode 100644 index 00000000..074e382c --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/output_shift_data.h @@ -0,0 +1,6 @@ +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. +#pragma once +#include + +const int32_t int16xint8_spill2_output_shift[9] = {-14, -14, -14, -14, -14, -14, -14, -14, -14}; diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/test_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/test_data.h new file mode 100644 index 00000000..4d61c5f2 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/test_data.h @@ -0,0 +1,9 @@ +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. +#include "biases_data.h" +#include "config_data.h" +#include "input_data.h" +#include "output_mult_data.h" +#include "output_ref_data.h" +#include "output_shift_data.h" +#include "weights_data.h" diff --git a/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/weights_data.h b/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/weights_data.h new file mode 100644 index 00000000..4aee9323 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/int16xint8_spill2/weights_data.h @@ -0,0 +1,176 @@ +// Generated by test_settings.py using tensorflow version 2.14.0 (Keras version 2.14.0). +// Interpreter from tensorflow version 2.14.0 and revision v2.14.0-rc1-21-g4dacf3f368e. +#pragma once +#include + +const int8_t int16xint8_spill2_weights[3888] = { + 41, 91, 43, 84, 71, 88, 125, 36, 81, 15, 18, 116, 85, 94, 126, 54, 95, 93, 126, 68, 45, 123, 116, + 107, 119, 74, 90, 36, 77, 114, 21, 70, 67, 112, 103, 34, 32, 85, 37, 115, 67, 55, 97, 113, 86, 103, + 0, 82, 21, 101, 37, 67, 124, 6, 50, 83, 119, 75, 66, 83, 114, 75, 56, 105, 119, 33, 31, 75, 124, + 40, 40, 12, 28, 115, 37, 11, 121, 87, 95, 68, 18, 67, 88, 42, 53, 38, 127, 14, 5, 93, 17, 25, + 29, 22, 78, 106, 19, 106, 7, 50, 28, 120, 73, 5, 76, 17, 19, 102, 126, 36, 99, 95, 40, 79, 34, + 98, 0, 107, 123, 41, 122, 88, 53, 94, 38, 40, 41, 42, 117, 75, 8, 115, 107, 104, 35, 46, 1, 105, + 88, 15, 30, 124, 121, 41, 60, 6, 48, 1, 93, 111, 34, 125, 113, 121, 47, 11, 10, 78, 55, 60, 114, + 66, 69, 72, 80, 47, 68, 13, 81, 75, 41, 53, 119, 50, 103, 123, 55, 125, 10, 91, 113, 5, 125, 6, + 24, 11, 37, 5, 124, 2, 89, 89, 43, 53, 13, 2, 54, 40, 125, 70, 117, 74, 60, 69, 22, 99, 96, + 103, 126, 98, 39, 99, 10, 86, 31, 36, 30, 2, 34, 71, 91, 105, 10, 39, 126, 15, 103, 91, 83, 13, + 46, 60, 54, 9, 124, 40, 19, 65, 50, 100, 117, 116, 46, 103, 118, 24, 104, 109, 57, 28, 93, 49, 96, + 85, 127, 104, 8, 105, 127, 118, 58, 8, 13, 92, 104, 60, 71, 113, 20, 55, 76, 82, 30, 59, 48, 48, + 19, 105, 80, 117, 100, 58, 64, 121, 72, 10, 56, 88, 26, 49, 60, 5, 90, 99, 51, 108, 77, 35, 121, + 24, 126, 80, 123, 89, 56, 49, 3, 13, 26, 104, 55, 19, 105, 95, 24, 102, 111, 24, 84, 33, 55, 68, + 106, 88, 3, 76, 98, 57, 67, 22, 49, 40, 42, 108, 115, 7, 123, 54, 125, 5, 5, 27, 74, 111, 108, + 22, 109, 88, 69, 36, 26, 8, 17, 39, 81, 63, 91, 78, 70, 123, 110, 122, 88, 63, 7, 111, 32, 26, + 111, 109, 92, 76, 63, 13, 35, 37, 119, 91, 31, 59, 99, 115, 44, 5, 127, 98, 10, 51, 5, 97, 89, + 126, 73, 10, 24, 65, 15, 21, 28, 93, 46, 87, 5, 66, 57, 5, 79, 43, 64, 101, 44, 91, 118, 39, + 94, 59, 55, 87, 42, 99, 58, 11, 38, 10, 17, 43, 85, 61, 45, 37, 89, 106, 85, 80, 70, 124, 13, + 29, 85, 3, 104, 13, 106, 117, 123, 17, 76, 5, 14, 37, 58, 44, 88, 74, 63, 62, 73, 115, 23, 47, + 126, 62, 4, 9, 34, 41, 74, 40, 97, 3, 35, 91, 26, 102, 86, 29, 32, 78, 122, 59, 13, 5, 43, + 89, 84, 19, 72, 5, 104, 53, 71, 47, 3, 67, 20, 4, 33, 46, 17, 52, 56, 28, 124, 13, 22, 107, + 127, 70, 38, 20, 65, 98, 2, 4, 17, 41, 12, 54, 108, 71, 3, 7, 54, 89, 122, 3, 58, 88, 100, + 0, 37, 54, 41, 17, 2, 83, 89, 74, 103, 78, 54, 93, 10, 71, 2, 73, 113, 89, 112, 44, 1, 14, + 42, 40, 27, 12, 13, 85, 126, 61, 106, 27, 92, 43, 77, 88, 36, 124, 102, 28, 106, 127, 50, 26, 81, + 59, 78, 70, 84, 39, 105, 90, 66, 56, 97, 119, 86, 65, 40, 12, 62, 116, 70, 108, 118, 82, 1, 111, + 124, 90, 0, 72, 91, 117, 111, 19, 71, 80, 42, 36, 115, 46, 44, 83, 40, 32, 59, 85, 84, 19, 3, + 53, 125, 65, 17, 63, 31, 14, 111, 48, 102, 73, 17, 11, 80, 73, 126, 105, 16, 95, 98, 41, 122, 15, + 37, 50, 15, 121, 67, 36, 37, 52, 23, 3, 114, 109, 76, 25, 37, 101, 76, 87, 25, 88, 105, 42, 91, + 104, 101, 89, 111, 39, 118, 19, 126, 5, 32, 68, 45, 33, 12, 6, 76, 69, 50, 10, 124, 114, 25, 1, + 40, 10, 105, 105, 103, 33, 119, 103, 89, 122, 86, 126, 18, 64, 3, 82, 104, 32, 26, 30, 82, 57, 47, + 57, 105, 119, 125, 101, 58, 27, 110, 46, 19, 109, 111, 117, 2, 3, 64, 73, 83, 21, 71, 29, 61, 123, + 94, 4, 15, 59, 60, 39, 100, 101, 80, 21, 69, 97, 84, 76, 114, 113, 36, 107, 84, 22, 26, 18, 87, + 107, 24, 73, 59, 121, 117, 78, 27, 56, 73, 57, 74, 47, 11, 37, 124, 53, 78, 11, 2, 61, 75, 107, + 43, 22, 14, 15, 113, 120, 126, 104, 35, 87, 119, 78, 19, 79, 1, 96, 100, 48, 36, 93, 54, 76, 96, + 12, 29, 127, 80, 126, 41, 86, 117, 40, 20, 81, 93, 0, 53, 13, 124, 113, 55, 107, 118, 21, 9, 12, + 28, 2, 92, 17, 10, 41, 60, 121, 59, 43, 92, 116, 30, 110, 11, 98, 51, 71, 61, 116, 32, 29, 119, + 107, 106, 58, 114, 117, 88, 55, 120, 42, 90, 32, 87, 104, 109, 79, 103, 122, 56, 67, 46, 107, 42, 25, + 122, 80, 23, 1, 121, 76, 82, 102, 92, 84, 6, 126, 125, 45, 83, 85, 3, 125, 124, 14, 89, 71, 56, + 115, 64, 69, 83, 55, 124, 118, 11, 38, 94, 73, 97, 3, 112, 45, 5, 51, 77, 56, 1, 101, 46, 10, + 53, 77, 46, 28, 26, 104, 105, 45, 86, 81, 3, 7, 104, 95, 5, 15, 51, 11, 95, 9, 87, 30, 100, + 90, 20, 66, 85, 57, 100, 0, 110, 24, 76, 53, 24, 107, 98, 101, 112, 57, 99, 20, 62, 49, 125, 43, + 12, 123, 102, 14, 64, 68, 83, 94, 127, 84, 124, 64, 36, 46, 13, 39, 67, 71, 9, 44, 122, 36, 125, + 16, 45, 90, 98, 35, 125, 20, 25, 81, 21, 8, 76, 45, 76, 26, 115, 52, 66, 53, 120, 107, 54, 115, + 63, 9, 2, 2, 27, 38, 43, 90, 67, 91, 56, 82, 109, 17, 30, 46, 21, 49, 60, 19, 6, 10, 122, + 33, 68, 86, 23, 87, 92, 62, 105, 110, 7, 8, 77, 120, 67, 90, 18, 57, 44, 3, 61, 68, 92, 42, + 116, 106, 92, 71, 5, 22, 105, 69, 6, 112, 32, 44, 91, 66, 111, 53, 67, 66, 110, 25, 123, 71, 125, + 113, 35, 75, 96, 32, 1, 88, 43, 115, 93, 59, 78, 116, 39, 16, 46, 29, 75, 58, 99, 69, 106, 31, + 102, 104, 94, 29, 81, 113, 59, 91, 43, 100, 74, 83, 85, 3, 26, 6, 56, 66, 69, 87, 83, 18, 88, + 107, 15, 117, 35, 97, 69, 52, 40, 69, 86, 82, 114, 84, 97, 76, 11, 49, 18, 62, 53, 114, 88, 71, + 112, 46, 40, 91, 17, 5, 34, 5, 5, 102, 4, 15, 109, 57, 16, 38, 26, 61, 43, 13, 111, 112, 55, + 15, 35, 9, 67, 62, 26, 35, 105, 103, 13, 55, 84, 48, 60, 70, 102, 123, 121, 28, 105, 73, 5, 89, + 44, 3, 64, 106, 95, 68, 41, 40, 117, 4, 51, 25, 100, 4, 9, 115, 21, 51, 36, 81, 21, 90, 75, + 20, 25, 125, 122, 88, 16, 52, 107, 3, 54, 7, 7, 39, 102, 91, 76, 104, 118, 64, 127, 72, 35, 54, + 33, 50, 121, 29, 85, 0, 43, 14, 11, 53, 76, 49, 49, 127, 116, 77, 117, 107, 42, 89, 81, 14, 117, + 59, 98, 115, 46, 57, 126, 80, 76, 75, 80, 121, 102, 64, 29, 126, 97, 46, 13, 46, 110, 102, 82, 4, + 102, 8, 51, 61, 76, 69, 69, 60, 13, 22, 95, 16, 89, 20, 24, 119, 12, 33, 72, 57, 58, 17, 44, + 76, 126, 106, 74, 5, 90, 95, 51, 95, 126, 76, 103, 126, 6, 19, 49, 10, 43, 11, 26, 53, 108, 71, + 38, 57, 122, 12, 75, 67, 55, 34, 88, 94, 51, 96, 5, 120, 1, 9, 6, 110, 60, 122, 83, 127, 95, + 125, 87, 90, 4, 105, 66, 45, 3, 7, 73, 29, 97, 112, 66, 100, 92, 113, 21, 6, 116, 53, 46, 74, + 39, 90, 30, 114, 100, 75, 66, 89, 35, 51, 28, 89, 76, 5, 116, 96, 49, 118, 43, 14, 89, 63, 5, + 0, 106, 96, 82, 83, 58, 103, 69, 48, 31, 64, 108, 78, 122, 86, 82, 113, 10, 51, 21, 59, 21, 122, + 49, 71, 62, 8, 4, 3, 125, 105, 61, 8, 78, 33, 36, 7, 66, 89, 109, 45, 92, 6, 102, 94, 32, + 79, 9, 68, 28, 85, 57, 126, 84, 38, 87, 40, 46, 76, 103, 39, 86, 117, 83, 36, 87, 6, 0, 108, + 122, 12, 14, 2, 99, 42, 45, 99, 21, 106, 32, 127, 91, 13, 38, 61, 57, 93, 85, 3, 10, 24, 34, + 25, 10, 85, 116, 61, 68, 67, 11, 124, 20, 44, 21, 71, 60, 49, 114, 62, 91, 115, 51, 44, 72, 29, + 57, 71, 3, 22, 22, 74, 20, 38, 66, 105, 62, 76, 50, 126, 49, 73, 107, 23, 121, 58, 103, 6, 41, + 56, 11, 45, 36, 4, 76, 62, 60, 52, 95, 72, 60, 52, 46, 30, 10, 109, 57, 91, 28, 110, 59, 60, + 114, 29, 28, 115, 61, 29, 51, 48, 92, 3, 119, 64, 81, 78, 106, 36, 69, 15, 80, 96, 32, 11, 19, + 71, 84, 82, 36, 100, 13, 107, 98, 99, 1, 20, 23, 83, 30, 73, 105, 23, 113, 31, 78, 83, 17, 29, + 85, 24, 64, 77, 7, 28, 92, 73, 121, 108, 118, 26, 106, 103, 32, 125, 125, 61, 64, 34, 22, 29, 16, + 68, 29, 37, 59, 54, 64, 122, 23, 58, 121, 84, 74, 96, 28, 126, 77, 51, 13, 35, 93, 57, 105, 27, + 3, 103, 19, 66, 82, 26, 40, 87, 49, 48, 117, 73, 56, 91, 79, 113, 91, 40, 77, 17, 68, 66, 117, + 45, 88, 0, 123, 19, 82, 36, 8, 78, 94, 39, 28, 126, 39, 35, 10, 22, 79, 43, 45, 63, 50, 97, + 30, 71, 44, 37, 106, 67, 13, 65, 111, 114, 60, 27, 109, 97, 27, 22, 114, 94, 103, 77, 88, 95, 13, + 118, 81, 25, 35, 126, 72, 6, 40, 85, 32, 64, 107, 85, 83, 71, 20, 91, 87, 5, 26, 107, 16, 64, + 42, 127, 7, 90, 81, 79, 86, 29, 96, 91, 71, 30, 42, 106, 9, 42, 111, 12, 30, 116, 106, 126, 69, + 99, 9, 11, 27, 69, 17, 106, 77, 114, 69, 74, 94, 72, 8, 116, 4, 127, 15, 64, 47, 120, 116, 71, + 52, 89, 123, 105, 43, 37, 79, 18, 59, 107, 88, 88, 76, 50, 38, 63, 6, 110, 75, 63, 68, 51, 124, + 99, 76, 77, 55, 23, 110, 51, 34, 94, 102, 14, 70, 83, 70, 75, 78, 67, 82, 35, 70, 84, 64, 29, + 1, 47, 110, 123, 10, 61, 28, 108, 64, 81, 120, 99, 85, 75, 36, 123, 107, 35, 62, 83, 46, 101, 26, + 15, 15, 107, 17, 57, 99, 19, 74, 64, 113, 70, 21, 79, 87, 87, 7, 107, 36, 93, 127, 25, 118, 88, + 9, 34, 124, 51, 87, 17, 83, 8, 66, 5, 4, 49, 120, 64, 58, 115, 62, 126, 46, 29, 10, 114, 42, + 18, 26, 61, 78, 39, 69, 38, 57, 47, 48, 35, 36, 17, 70, 36, 71, 52, 117, 33, 85, 52, 40, 117, + 41, 42, 9, 88, 111, 74, 123, 95, 1, 69, 23, 84, 54, 44, 15, 20, 32, 20, 43, 33, 71, 41, 105, + 91, 88, 23, 13, 67, 45, 62, 116, 54, 30, 93, 71, 91, 92, 10, 77, 7, 54, 11, 104, 94, 45, 82, + 33, 78, 55, 40, 103, 32, 61, 98, 108, 38, 111, 79, 11, 13, 58, 26, 93, 14, 14, 99, 33, 30, 101, + 67, 117, 121, 97, 52, 95, 87, 105, 23, 24, 3, 64, 114, 50, 39, 61, 55, 86, 52, 68, 72, 100, 104, + 84, 102, 97, 19, 83, 35, 57, 89, 32, 6, 98, 80, 118, 26, 110, 96, 107, 41, 91, 9, 78, 62, 102, + 66, 103, 80, 60, 14, 75, 127, 26, 66, 14, 14, 65, 105, 100, 28, 13, 74, 102, 98, 125, 85, 6, 10, + 81, 39, 23, 58, 65, 106, 15, 37, 85, 89, 47, 14, 80, 74, 75, 13, 67, 55, 93, 93, 83, 28, 78, + 108, 6, 105, 76, 59, 3, 99, 127, 54, 99, 112, 55, 18, 125, 13, 115, 119, 70, 39, 30, 69, 72, 66, + 119, 80, 39, 114, 111, 90, 84, 118, 64, 9, 91, 105, 21, 106, 121, 76, 65, 63, 53, 9, 93, 57, 32, + 31, 35, 38, 7, 12, 102, 13, 40, 5, 7, 23, 49, 2, 32, 9, 18, 13, 4, 63, 21, 118, 120, 14, + 121, 73, 41, 8, 83, 54, 57, 76, 9, 126, 90, 109, 41, 98, 45, 50, 92, 27, 18, 20, 76, 5, 119, + 53, 120, 32, 39, 77, 108, 109, 79, 67, 80, 2, 11, 5, 25, 40, 13, 62, 96, 31, 100, 62, 112, 52, + 95, 18, 99, 8, 91, 84, 78, 53, 10, 10, 68, 26, 107, 11, 66, 69, 83, 6, 41, 17, 8, 46, 1, + 114, 25, 99, 53, 120, 44, 83, 32, 94, 75, 96, 55, 52, 110, 57, 12, 3, 121, 57, 74, 105, 39, 55, + 108, 4, 30, 71, 61, 112, 52, 121, 126, 104, 81, 124, 58, 70, 63, 3, 12, 109, 42, 79, 8, 113, 28, + 65, 84, 81, 61, 74, 43, 100, 0, 22, 80, 30, 46, 117, 3, 122, 60, 13, 69, 13, 23, 99, 33, 80, + 43, 127, 8, 32, 98, 9, 10, 2, 97, 21, 19, 92, 32, 88, 103, 13, 116, 98, 120, 83, 81, 4, 63, + 3, 1, 64, 79, 98, 38, 52, 101, 65, 105, 113, 102, 41, 45, 28, 101, 114, 116, 70, 50, 65, 22, 38, + 53, 91, 1, 100, 92, 75, 10, 105, 116, 64, 52, 126, 74, 119, 1, 103, 120, 89, 88, 72, 12, 20, 76, + 81, 84, 65, 49, 68, 15, 56, 114, 28, 43, 94, 65, 69, 119, 87, 0, 115, 26, 74, 95, 92, 99, 52, + 56, 122, 22, 92, 73, 4, 112, 102, 105, 97, 80, 14, 84, 74, 36, 1, 105, 27, 42, 92, 95, 15, 72, + 80, 28, 57, 42, 72, 111, 81, 121, 98, 49, 105, 88, 28, 30, 77, 119, 115, 1, 126, 38, 22, 41, 87, + 96, 117, 93, 28, 30, 36, 91, 92, 79, 3, 88, 66, 36, 75, 15, 98, 25, 88, 104, 23, 36, 5, 4, + 26, 35, 47, 77, 16, 17, 105, 110, 106, 70, 25, 50, 1, 33, 77, 96, 8, 24, 104, 80, 40, 9, 97, + 99, 17, 82, 88, 41, 10, 107, 50, 11, 48, 80, 4, 27, 123, 14, 42, 99, 84, 75, 65, 7, 80, 115, + 114, 90, 99, 46, 11, 34, 95, 12, 85, 25, 58, 29, 22, 88, 45, 36, 101, 67, 1, 10, 112, 39, 101, + 43, 9, 112, 23, 39, 87, 113, 57, 29, 91, 35, 90, 53, 113, 27, 52, 50, 44, 75, 78, 108, 102, 89, + 127, 97, 94, 27, 89, 121, 46, 35, 23, 87, 100, 83, 39, 65, 68, 67, 91, 126, 120, 29, 115, 16, 20, + 105, 36, 85, 46, 9, 13, 28, 81, 7, 37, 120, 88, 72, 27, 78, 116, 31, 66, 73, 21, 13, 101, 37, + 59, 15, 28, 50, 61, 90, 11, 102, 99, 98, 68, 42, 107, 98, 88, 80, 98, 113, 23, 4, 63, 36, 115, + 61, 91, 96, 46, 18, 102, 83, 11, 106, 49, 50, 108, 120, 110, 74, 95, 7, 6, 114, 99, 74, 4, 60, + 42, 66, 9, 90, 19, 118, 19, 23, 127, 116, 10, 48, 106, 18, 49, 19, 81, 62, 32, 98, 26, 39, 41, + 5, 113, 112, 32, 57, 46, 76, 57, 106, 15, 32, 48, 84, 28, 60, 28, 32, 38, 23, 29, 81, 13, 97, + 51, 69, 59, 8, 73, 13, 41, 71, 54, 6, 55, 64, 74, 74, 126, 93, 80, 56, 33, 43, 76, 18, 93, + 31, 77, 38, 118, 68, 122, 13, 80, 63, 60, 105, 2, 122, 60, 37, 76, 32, 77, 95, 107, 41, 108, 42, + 70, 77, 124, 33, 33, 119, 19, 102, 103, 63, 44, 83, 85, 118, 37, 118, 6, 0, 103, 39, 4, 109, 93, + 43, 24, 83, 62, 86, 69, 124, 6, 91, 114, 95, 90, 5, 124, 10, 96, 45, 71, 28, 120, 96, 77, 84, + 46, 26, 108, 111, 105, 63, 35, 36, 18, 3, 85, 63, 119, 49, 118, 37, 42, 80, 107, 6, 52, 19, 39, + 37, 125, 35, 101, 30, 66, 71, 98, 76, 98, 28, 107, 58, 109, 65, 104, 94, 9, 41, 47, 52, 101, 62, + 29, 66, 81, 102, 26, 77, 83, 123, 91, 65, 77, 54, 45, 80, 33, 112, 57, 79, 98, 85, 88, 60, 5, + 49, 63, 78, 53, 36, 95, 119, 42, 49, 89, 65, 13, 85, 50, 31, 1, 112, 109, 77, 73, 62, 87, 62, + 107, 112, 56, 47, 56, 76, 119, 70, 94, 0, 76, 82, 19, 120, 97, 2, 10, 121, 86, 70, 41, 86, 106, + 7, 68, 19, 39, 108, 109, 18, 11, 5, 77, 100, 117, 64, 9, 77, 61, 48, 0, 80, 120, 64, 121, 21, + 80, 105, 30, 19, 114, 39, 1, 90, 98, 19, 114, 120, 54, 57, 52, 112, 54, 46, 7, 15, 2, 50, 116, + 44, 11, 20, 31, 118, 114, 57, 69, 124, 15, 87, 11, 90, 73, 1, 45, 20, 2, 4, 118, 60, 24, 88, + 30, 95, 125, 127, 112, 111, 42, 39, 113, 25, 22, 59, 4, 85, 86, 69, 113, 5, 76, 86, 23, 95, 105, + 113, 104, 25, 18, 50, 108, 20, 56, 14, 117, 24, 20, 77, 5, 13, 72, 109, 10, 69, 103, 117, 82, 98, + 81, 93, 7, 5, 11, 44, 22, 45, 120, 59, 126, 112, 77, 100, 38, 86, 3, 121, 50, 75, 77, 3, 118, + 3, 87, 19, 12, 23, 1, 71, 83, 41, 63, 91, 38, 110, 8, 113, 58, 48, 46, 94, 47, 127, 110, 114, + 77, 5, 18, 84, 68, 53, 34, 27, 57, 17, 44, 21, 49, 43, 127, 65, 74, 9, 70, 59, 86, 37, 49, + 98, 38, 49, 116, 81, 56, 116, 25, 32, 57, 44, 14, 31, 7, 103, 90, 92, 98, 120, 55, 70, 16, 84, + 38, 66, 24, 120, 83, 35, 78, 6, 91, 20, 100, 81, 68, 49, 84, 102, 16, 116, 75, 111, 20, 94, 115, + 103, 9, 106, 102, 97, 29, 117, 7, 63, 127, 75, 124, 32, 75, 89, 76, 25, 105, 29, 59, 33, 118, 97, + 125, 58, 108, 18, 10, 84, 112, 33, 91, 111, 16, 2, 94, 122, 23, 22, 121, 80, 90, 2, 42, 77, 119, + 79, 113, 22, 86, 36, 101, 73, 79, 67, 43, 58, 5, 53, 69, 61, 119, 114, 102, 29, 5, 52, 101, 46, + 27, 91, 74, 123, 58, 59, 116, 121, 3, 88, 112, 41, 114, 61, 32, 63, 12, 109, 49, 124, 97, 42, 61, + 42, 39, 32, 22, 118, 126, 60, 104, 97, 78, 106, 23, 82, 97, 94, 126, 60, 21, 37, 115, 56, 48, 126, + 101, 48, 91, 66, 20, 111, 31, 51, 21, 53, 55, 68, 104, 85, 27, 18, 35, 30, 23, 22, 44, 73, 33, + 30, 45, 26, 92, 27, 116, 126, 51, 44, 101, 23, 33, 38, 50, 53, 79, 36, 71, 0, 42, 112, 23, 124, + 48, 49, 29, 6, 58, 95, 29, 45, 100, 112, 100, 54, 57, 125, 105, 92, 117, 14, 34, 121, 36, 121, 85, + 39, 24, 108, 52, 19, 41, 116, 40, 15, 13, 116, 52, 19, 126, 111, 33, 19, 73, 60, 100, 25, 35, 127, + 27, 45, 49, 12, 98, 32, 43, 52, 71, 29, 48, 70, 88, 39, 39, 16, 27, 16, 8, 44, 23, 77, 116, + 78, 24, 72, 69, 122, 94, 82, 122, 28, 114, 96, 58, 95, 42, 99, 104, 97, 31, 45, 15, 50, 86, 53, + 84, 63, 40, 55, 34, 11, 93, 61, 3, 125, 70, 32, 108, 93, 7, 122, 7, 16, 29, 51, 98, 28, 42, + 64, 69, 22, 64, 80, 53, 116, 75, 33, 36, 14, 41, 2, 113, 57, 53, 105, 109, 83, 122, 119, 81, 109, + 3, 38, 45, 110, 71, 49, 9, 1, 105, 95, 71, 45, 116, 14, 51, 63, 63, 30, 97, 35, 23, 109, 8, + 27, 92, 10, 49, 66, 84, 32, 106, 73, 24, 100, 90, 77, 6, 118, 99, 20, 96, 41, 19, 35, 45, 66, + 78, 36, 60, 29, 67, 25, 0, 57, 104, 11, 116, 89, 73, 66, 88, 61, 59, 40, 104, 14, 4, 43, 125, + 34, 80, 122, 11, 109, 49, 52, 37, 25, 53, 71, 55, 96, 24, 55, 84, 118, 2, 56, 46, 33, 75, 20, + 37, 20, 49, 109, 115, 65, 26, 83, 45, 118, 5, 7, 51, 53, 22, 96, 80, 89, 72, 80, 107, 75, 127, + 33, 74, 106, 74, 49, 95, 94, 32, 35, 70, 41, 111, 46, 116, 67, 98, 98, 116, 88, 39, 41, 115, 17, + 90, 103, 20, 44, 40, 41, 103, 68, 30, 16, 8, 60, 74, 10, 118, 72, 17, 117, 110, 102, 67, 85, 98, + 31, 13, 105, 105, 60, 11, 106, 42, 79, 1, 27, 53, 123, 18, 94, 40, 79, 65, 57, 66, 91, 121, 29, + 61, 26, 43, 93, 99, 7, 78, 58, 53, 125, 24, 10, 116, 67, 72, 27, 20, 124, 105, 101, 79, 62, 51, + 58, 114, 32, 2, 6, 80, 34, 125, 88, 93, 48, 57, 1, 3, 41, 47, 70, 72, 73, 6, 114, 76, 93, + 18, 95, 61, 29, 53, 88, 27, 64, 15, 87, 36, 87, 60, 54, 49, 125, 106, 87, 95, 30, 38, 114, 83, + 51, 11, 82, 83, 46, 2, 91, 125, 26, 83, 112, 15, 32, 33, 17, 0, 121, 27, 87, 85, 29, 19, 30, + 41, 16, 88, 115, 2, 100, 85, 108, 89, 73, 53, 30, 70, 88, 20, 52, 102, 44, 30, 2, 107, 66, 120, + 7, 72, 79, 93, 36, 73, 46, 120, 118, 4, 73, 24, 124, 66, 110, 21, 46, 92, 111, 17, 96, 66, 29, + 44, 21, 41, 54, 71, 33, 34, 77, 17, 54, 23, 13, 97, 2, 0, 106, 31, 27, 126, 70, 82, 38, 14, + 107, 8, 127, 0, 100, 31, 52, 103, 26, 10, 106, 88, 51, 119, 28, 42, 0, 28, 68, 14, 55, 41, 80, + 104, 1, 6, 18, 63, 24, 107, 122, 24, 21, 119, 27, 60, 119, 74, 102, 10, 29, 5, 13, 5, 64, 1, + 12, 28, 115, 113, 96, 39, 84, 99, 73, 18, 25, 25, 79, 75, 115, 39, 94, 24, 6, 15, 87, 28, 40, + 106, 114, 92, 2, 53, 21, 52, 71, 25, 43, 118, 69, 86, 6, 88, 95, 10, 93, 105, 93, 127, 125, 61, + 36, 117, 104, 76, 47, 22, 84, 103, 23, 95, 95, 109, 39, 60, 1, 68, 31, 4, 72, 54, 74, 21, 118, + 40}; diff --git a/Tests/UnitTest/TestCases/TestData/requantize_s64/biases_data.h b/Tests/UnitTest/TestCases/TestData/requantize_s64/biases_data.h index 42d1ae86..bbd481c9 100644 --- a/Tests/UnitTest/TestCases/TestData/requantize_s64/biases_data.h +++ b/Tests/UnitTest/TestCases/TestData/requantize_s64/biases_data.h @@ -1,6 +1,6 @@ -// Generated by generate_test_data.py using tensorflow version 2.10.0 (Keras version 2.10.0). -// Interpreter from tensorflow version 2.10.0 and revision upstream/v2.10.0-0-g359c3cdfc5f. +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-2-g0b15fdfcb3f. #pragma once #include -const int64_t requantize_s64_biases[2] = {47, 37}; +const int64_t requantize_s64_biases[8] = {2718092, 2556575, 646371, 1427241, 2010306, 3766647, 1886211, 1482898}; diff --git a/Tests/UnitTest/TestCases/TestData/requantize_s64/config_data.h b/Tests/UnitTest/TestCases/TestData/requantize_s64/config_data.h index e014cca9..359f3f95 100644 --- a/Tests/UnitTest/TestCases/TestData/requantize_s64/config_data.h +++ b/Tests/UnitTest/TestCases/TestData/requantize_s64/config_data.h @@ -1,12 +1,12 @@ -// Generated by generate_test_data.py using tensorflow version 2.10.0 (Keras version 2.10.0). -// Interpreter from tensorflow version 2.10.0 and revision upstream/v2.10.0-0-g359c3cdfc5f. +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-2-g0b15fdfcb3f. #pragma once -#define REQUANTIZE_S64_OUT_CH 2 -#define REQUANTIZE_S64_IN_CH 2 -#define REQUANTIZE_S64_INPUT_W 3 -#define REQUANTIZE_S64_INPUT_H 2 -#define REQUANTIZE_S64_DST_SIZE 4 -#define REQUANTIZE_S64_INPUT_SIZE 12 +#define REQUANTIZE_S64_OUT_CH 8 +#define REQUANTIZE_S64_IN_CH 8 +#define REQUANTIZE_S64_INPUT_W 4 +#define REQUANTIZE_S64_INPUT_H 4 +#define REQUANTIZE_S64_DST_SIZE 72 +#define REQUANTIZE_S64_INPUT_SIZE 128 #define REQUANTIZE_S64_OUT_ACTIVATION_MIN -32768 #define REQUANTIZE_S64_OUT_ACTIVATION_MAX 32767 #define REQUANTIZE_S64_INPUT_BATCHES 1 @@ -16,8 +16,8 @@ #define REQUANTIZE_S64_STRIDE_Y 1 #define REQUANTIZE_S64_PAD_X 0 #define REQUANTIZE_S64_PAD_Y 0 -#define REQUANTIZE_S64_OUTPUT_W 2 -#define REQUANTIZE_S64_OUTPUT_H 1 +#define REQUANTIZE_S64_OUTPUT_W 3 +#define REQUANTIZE_S64_OUTPUT_H 3 #define REQUANTIZE_S64_INPUT_OFFSET 0 #define REQUANTIZE_S64_OUTPUT_OFFSET 0 #define REQUANTIZE_S64_DILATION_X 1 diff --git a/Tests/UnitTest/TestCases/TestData/requantize_s64/input_data.h b/Tests/UnitTest/TestCases/TestData/requantize_s64/input_data.h index 1a058e6d..16b016d2 100644 --- a/Tests/UnitTest/TestCases/TestData/requantize_s64/input_data.h +++ b/Tests/UnitTest/TestCases/TestData/requantize_s64/input_data.h @@ -1,6 +1,13 @@ -// Generated by generate_test_data.py using tensorflow version 2.10.0 (Keras version 2.10.0). -// Interpreter from tensorflow version 2.10.0 and revision upstream/v2.10.0-0-g359c3cdfc5f. +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-2-g0b15fdfcb3f. #pragma once #include -const int16_t requantize_s64_input[12] = {97, 100, 51, 39, 29, 117, -111, -104, 41, 38, 115, -113}; +const int16_t requantize_s64_input[128] = { + 12, 97, 80, 37, -72, 16, -110, -46, 109, -28, -21, 20, 24, 66, -110, -71, -31, -109, 90, + 11, 64, 77, 83, -38, -26, 44, 86, -109, -88, -39, 43, -36, 29, -95, -90, -36, -30, -41, + 8, 62, 25, -124, -107, -104, -113, -7, 18, 6, 44, -18, 5, -81, -18, 64, -49, -29, 82, + 124, 66, -63, -111, -103, 99, 109, -15, 101, -2, 39, 21, -42, -51, -115, -59, 25, -121, -69, + -46, 104, -20, -8, -91, 31, -114, 25, -27, 39, 79, -117, -28, -93, -31, 19, 107, 61, -8, + -125, -66, 97, -87, -98, -113, -111, 51, 65, 104, 76, 90, 110, -39, -98, -74, -56, -56, -48, + 34, -46, -107, 12, -74, 14, 96, 77, 85, -61, -17, 40, -18, 97}; diff --git a/Tests/UnitTest/TestCases/TestData/requantize_s64/output_mult_data.h b/Tests/UnitTest/TestCases/TestData/requantize_s64/output_mult_data.h index a2fc73d1..1f5cffeb 100644 --- a/Tests/UnitTest/TestCases/TestData/requantize_s64/output_mult_data.h +++ b/Tests/UnitTest/TestCases/TestData/requantize_s64/output_mult_data.h @@ -1,6 +1,7 @@ -// Generated by generate_test_data.py using tensorflow version 2.10.0 (Keras version 2.10.0). -// Interpreter from tensorflow version 2.10.0 and revision upstream/v2.10.0-0-g359c3cdfc5f. +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-2-g0b15fdfcb3f. #pragma once #include -const int32_t requantize_s64_output_mult[2] = {1853463365, 1838451297}; +const int32_t requantize_s64_output_mult[8] = + {1414739540, 1453951389, 1391394644, 1429974075, 1417631388, 1463499963, 1461229183, 1369934873}; diff --git a/Tests/UnitTest/TestCases/TestData/requantize_s64/output_ref_data.h b/Tests/UnitTest/TestCases/TestData/requantize_s64/output_ref_data.h index 75a7fa4c..8037cbdd 100644 --- a/Tests/UnitTest/TestCases/TestData/requantize_s64/output_ref_data.h +++ b/Tests/UnitTest/TestCases/TestData/requantize_s64/output_ref_data.h @@ -1,6 +1,10 @@ -// Generated by generate_test_data.py using tensorflow version 2.10.0 (Keras version 2.10.0). -// Interpreter from tensorflow version 2.10.0 and revision upstream/v2.10.0-0-g359c3cdfc5f. +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-2-g0b15fdfcb3f. #pragma once #include -const int16_t requantize_s64_output_ref[4] = {-68, 186, -134, -116}; +const int16_t requantize_s64_output_ref[72] = { + 3491, 3462, 833, 1853, 2589, 5061, 2542, 1794, 3482, 3408, 813, 1895, 2613, 4994, 2499, 1816, 3508, 3371, + 766, 1820, 2610, 4960, 2545, 1878, 3523, 3346, 811, 1887, 2611, 5067, 2517, 1843, 3481, 3363, 787, 1903, + 2590, 4992, 2493, 1863, 3501, 3384, 896, 1931, 2619, 4995, 2398, 1810, 3497, 3405, 835, 1929, 2571, 5008, + 2538, 1832, 3566, 3349, 806, 1854, 2573, 4989, 2502, 1870, 3500, 3393, 754, 1804, 2560, 4972, 2570, 1898}; diff --git a/Tests/UnitTest/TestCases/TestData/requantize_s64/output_shift_data.h b/Tests/UnitTest/TestCases/TestData/requantize_s64/output_shift_data.h index c73834a4..de069ed5 100644 --- a/Tests/UnitTest/TestCases/TestData/requantize_s64/output_shift_data.h +++ b/Tests/UnitTest/TestCases/TestData/requantize_s64/output_shift_data.h @@ -1,6 +1,6 @@ -// Generated by generate_test_data.py using tensorflow version 2.10.0 (Keras version 2.10.0). -// Interpreter from tensorflow version 2.10.0 and revision upstream/v2.10.0-0-g359c3cdfc5f. +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-2-g0b15fdfcb3f. #pragma once #include -const int32_t requantize_s64_output_shift[2] = {-7, -7}; +const int32_t requantize_s64_output_shift[8] = {-9, -9, -9, -9, -9, -9, -9, -9}; diff --git a/Tests/UnitTest/TestCases/TestData/requantize_s64/test_data.h b/Tests/UnitTest/TestCases/TestData/requantize_s64/test_data.h index 8102687f..7930b388 100644 --- a/Tests/UnitTest/TestCases/TestData/requantize_s64/test_data.h +++ b/Tests/UnitTest/TestCases/TestData/requantize_s64/test_data.h @@ -1,5 +1,5 @@ -// Generated by generate_test_data.py using tensorflow version 2.10.0 (Keras version 2.10.0). -// Interpreter from tensorflow version 2.10.0 and revision upstream/v2.10.0-0-g359c3cdfc5f. +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-2-g0b15fdfcb3f. #include "biases_data.h" #include "config_data.h" #include "input_data.h" diff --git a/Tests/UnitTest/TestCases/TestData/requantize_s64/weights_data.h b/Tests/UnitTest/TestCases/TestData/requantize_s64/weights_data.h index 816357f5..f263b88a 100644 --- a/Tests/UnitTest/TestCases/TestData/requantize_s64/weights_data.h +++ b/Tests/UnitTest/TestCases/TestData/requantize_s64/weights_data.h @@ -1,7 +1,19 @@ -// Generated by generate_test_data.py using tensorflow version 2.10.0 (Keras version 2.10.0). -// Interpreter from tensorflow version 2.10.0 and revision upstream/v2.10.0-0-g359c3cdfc5f. +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-2-g0b15fdfcb3f. #pragma once #include -const int8_t requantize_s64_weights[16] = - {-95, -110, -39, 99, -127, 73, -58, 108, 101, 127, -17, -89, 24, -99, -34, 87}; +const int8_t requantize_s64_weights[256] = { + 74, 87, -103, 86, 32, 107, -13, -53, -118, 113, -41, -13, -45, -91, -26, -106, 89, 86, 49, -127, + 51, -58, -80, -117, 16, -69, -115, 83, 14, 86, 79, 76, -82, 41, 36, 77, -120, 40, -97, -75, + -14, -81, 16, 22, -60, -55, -100, -22, -56, -127, -77, -30, 75, -13, 49, -37, 33, -52, 19, -8, + -6, -79, -48, 2, -54, 80, 39, -14, -45, -126, -52, -86, 86, 114, 28, 107, -53, -109, 107, 121, + 72, -10, -84, -7, -43, -104, 69, -13, -83, 69, -103, -4, 22, 26, -127, 12, 116, 94, -50, 54, + -55, 6, -45, 90, -103, 8, 28, -114, -44, 127, 96, 25, -20, 107, -102, -52, -96, -39, 61, -100, + 8, -88, -79, 76, 80, -53, 65, -22, 60, 18, 112, -48, 2, 127, -19, 3, -54, 1, -43, -93, + -51, 84, -1, 88, 44, -44, -29, -40, 117, 68, -17, -15, 0, 37, -29, -5, 60, 112, -68, 64, + -17, 54, -81, 122, -49, -8, -121, 68, 80, -127, -104, -117, -56, -49, -53, 122, -6, -93, 115, -46, + 117, -82, 48, 44, -38, -23, -34, -84, 29, -70, 8, -48, -66, -47, 104, 61, -8, -122, 109, -70, + -28, -101, 38, -119, 23, 114, -98, -33, 73, 58, -14, 96, -67, -87, -120, 127, 56, -23, 37, -56, + 5, 39, 61, 47, -71, -88, -49, -111, -54, 110, -68, 56, -2, -50, -62, 87, -58, -15, -12, -56, + -114, -28, 50, -22, 48, 39, -56, 63, -38, 115, 127, 61, 52, -22, 58, 118}; diff --git a/Tests/UnitTest/TestCases/test_arm_convolve_fast_s16/CMakeLists.txt b/Tests/UnitTest/TestCases/test_arm_convolve_fast_s16/CMakeLists.txt deleted file mode 100644 index 1f1a3093..00000000 --- a/Tests/UnitTest/TestCases/test_arm_convolve_fast_s16/CMakeLists.txt +++ /dev/null @@ -1,23 +0,0 @@ -# -# Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. -# -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the License); you may -# not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an AS IS BASIS, WITHOUT -# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -add_cmsis_nn_unit_test_executable(test_arm_convolve_fast_s16) - -target_sources(test_arm_convolve_fast_s16 PRIVATE - Unity/unity_test_arm_convolve_fast_s16.c - Unity/TestRunner/unity_test_arm_convolve_fast_s16_runner.c) diff --git a/Tests/UnitTest/TestCases/test_arm_convolve_fast_s16/Unity/unity_test_arm_convolve_fast_s16.c b/Tests/UnitTest/TestCases/test_arm_convolve_fast_s16/Unity/unity_test_arm_convolve_fast_s16.c deleted file mode 100644 index cff35bc8..00000000 --- a/Tests/UnitTest/TestCases/test_arm_convolve_fast_s16/Unity/unity_test_arm_convolve_fast_s16.c +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Copyright (C) 2010-2021, 2023 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include -#include -#include -#include -#include - -#include "../test_arm_convolve_fast_s16.c" -#include "unity.h" - -#ifdef USING_FVP_CORSTONE_300 -extern void uart_init(void); -#endif - -/* This function is called from the autogenerated file. - * The name must be exactly like this - */ -void setUp(void) -{ /* This is run before EACH TEST */ -#ifdef USING_FVP_CORSTONE_300 - uart_init(); -#endif -} - -/* This function is called from the autogenerated file. - * The name must be exactly like this - */ -void tearDown(void) {} - -void test_int16xint8_arm_convolve_fast_s16(void) { int16xint8_arm_convolve_fast_s16(); } -void test_requantize_s64_arm_convolve_fast_s16(void) { requantize_s64_arm_convolve_fast_s16(); } -void test_buffer_size_arm_convolve_fast_s16(void) { buffer_size_arm_convolve_fast_s16(); } -void test_buffer_size_mve_arm_convolve_fast_s16(void) { buffer_size_mve_arm_convolve_fast_s16(); } -void test_buffer_size_dsp_arm_convolve_fast_s16(void) { buffer_size_dsp_arm_convolve_fast_s16(); } diff --git a/Tests/UnitTest/TestCases/test_arm_convolve_fast_s16/test_arm_convolve_fast_s16.c b/Tests/UnitTest/TestCases/test_arm_convolve_fast_s16/test_arm_convolve_fast_s16.c deleted file mode 100644 index 97854c58..00000000 --- a/Tests/UnitTest/TestCases/test_arm_convolve_fast_s16/test_arm_convolve_fast_s16.c +++ /dev/null @@ -1,328 +0,0 @@ -/* - * SPDX-FileCopyrightText: Copyright 2010-2023 Arm Limited and/or its affiliates All rights - * reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include - -#include -#include - -#include "../TestData/int16xint8/test_data.h" -#include "../TestData/requantize_s64/test_data.h" -#include "../Utils/validate.h" - -void int16xint8_arm_convolve_fast_s16(void) -{ - int16_t output[INT16XINT8_DST_SIZE] = {0}; - - cmsis_nn_context ctx; - cmsis_nn_conv_params conv_params; - cmsis_nn_per_channel_quant_params quant_params; - cmsis_nn_dims input_dims; - cmsis_nn_dims filter_dims; - cmsis_nn_dims bias_dims; - cmsis_nn_dims output_dims; - - const int64_t *bias_data = int16xint8_biases; - const int8_t *kernel_data = int16xint8_weights; - const int16_t *input_data = int16xint8_input; - const int16_t *output_ref = int16xint8_output_ref; - const int32_t output_ref_size = INT16XINT8_DST_SIZE; - - input_dims.n = INT16XINT8_INPUT_BATCHES; - input_dims.w = INT16XINT8_INPUT_W; - input_dims.h = INT16XINT8_INPUT_H; - input_dims.c = INT16XINT8_IN_CH; - filter_dims.w = INT16XINT8_FILTER_X; - filter_dims.h = INT16XINT8_FILTER_Y; - output_dims.w = INT16XINT8_OUTPUT_W; - output_dims.h = INT16XINT8_OUTPUT_H; - output_dims.c = INT16XINT8_OUT_CH; - - conv_params.padding.w = INT16XINT8_PAD_X; - conv_params.padding.h = INT16XINT8_PAD_Y; - conv_params.stride.w = INT16XINT8_STRIDE_X; - conv_params.stride.h = INT16XINT8_STRIDE_Y; - conv_params.dilation.w = INT16XINT8_DILATION_X; - conv_params.dilation.h = INT16XINT8_DILATION_X; - - conv_params.input_offset = 0; - conv_params.output_offset = 0; - conv_params.activation.min = INT16XINT8_OUT_ACTIVATION_MIN; - conv_params.activation.max = INT16XINT8_OUT_ACTIVATION_MAX; - quant_params.multiplier = (int32_t *)int16xint8_output_mult; - quant_params.shift = (int32_t *)int16xint8_output_shift; - - int buf_size = arm_convolve_wrapper_s16_get_buffer_size(&conv_params, &input_dims, &filter_dims, &output_dims); - ctx.buf = malloc(buf_size); - - arm_cmsis_nn_status result = arm_convolve_wrapper_s16(&ctx, - &conv_params, - &quant_params, - &input_dims, - input_data, - &filter_dims, - kernel_data, - &bias_dims, - bias_data, - &output_dims, - output); - if (ctx.buf) - { - // The caller is responsible to clear the scratch buffers for security reasons if applicable. - memset(ctx.buf, 0, buf_size); - free(ctx.buf); - } - - TEST_ASSERT_EQUAL(ARM_CMSIS_NN_SUCCESS, result); - TEST_ASSERT_TRUE(validate_s16(output, output_ref, output_ref_size)); - memset(output, 0, sizeof(output)); - - buf_size = arm_convolve_fast_s16_get_buffer_size(&input_dims, &filter_dims); - ctx.buf = malloc(buf_size); - - result = arm_convolve_fast_s16(&ctx, - &conv_params, - &quant_params, - &input_dims, - input_data, - &filter_dims, - kernel_data, - &bias_dims, - bias_data, - &output_dims, - output); - if (ctx.buf) - { - memset(ctx.buf, 0, buf_size); - free(ctx.buf); - } -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - TEST_ASSERT_EQUAL(ARM_CMSIS_NN_SUCCESS, result); - TEST_ASSERT_TRUE(validate_s16(output, output_ref, output_ref_size)); -#else - TEST_ASSERT_EQUAL(ARM_CMSIS_NN_ARG_ERROR, result); -#endif -} - -void requantize_s64_arm_convolve_fast_s16(void) -{ - int16_t output[REQUANTIZE_S64_DST_SIZE] = {0}; - - cmsis_nn_context ctx; - cmsis_nn_conv_params conv_params; - cmsis_nn_per_channel_quant_params quant_params; - cmsis_nn_dims input_dims; - cmsis_nn_dims filter_dims; - cmsis_nn_dims bias_dims; - cmsis_nn_dims output_dims; - - const int64_t *bias_data = requantize_s64_biases; - const int8_t *kernel_data = requantize_s64_weights; - const int16_t *input_data = requantize_s64_input; - const int16_t *output_ref = requantize_s64_output_ref; - const int32_t output_ref_size = REQUANTIZE_S64_DST_SIZE; - - input_dims.n = REQUANTIZE_S64_INPUT_BATCHES; - input_dims.w = REQUANTIZE_S64_INPUT_W; - input_dims.h = REQUANTIZE_S64_INPUT_H; - input_dims.c = REQUANTIZE_S64_IN_CH; - filter_dims.w = REQUANTIZE_S64_FILTER_X; - filter_dims.h = REQUANTIZE_S64_FILTER_Y; - output_dims.w = REQUANTIZE_S64_OUTPUT_W; - output_dims.h = REQUANTIZE_S64_OUTPUT_H; - output_dims.c = REQUANTIZE_S64_OUT_CH; - - conv_params.padding.w = REQUANTIZE_S64_PAD_X; - conv_params.padding.h = REQUANTIZE_S64_PAD_Y; - conv_params.stride.w = REQUANTIZE_S64_STRIDE_X; - conv_params.stride.h = REQUANTIZE_S64_STRIDE_Y; - conv_params.dilation.w = REQUANTIZE_S64_DILATION_X; - conv_params.dilation.h = REQUANTIZE_S64_DILATION_Y; - - conv_params.input_offset = REQUANTIZE_S64_INPUT_OFFSET; - conv_params.output_offset = REQUANTIZE_S64_OUTPUT_OFFSET; - conv_params.activation.min = REQUANTIZE_S64_OUT_ACTIVATION_MIN; - conv_params.activation.max = REQUANTIZE_S64_OUT_ACTIVATION_MAX; - quant_params.multiplier = (int32_t *)requantize_s64_output_mult; - quant_params.shift = (int32_t *)requantize_s64_output_shift; - - int buf_size = arm_convolve_wrapper_s16_get_buffer_size(&conv_params, &input_dims, &filter_dims, &output_dims); - ctx.buf = malloc(buf_size); - - arm_cmsis_nn_status result = arm_convolve_wrapper_s16(&ctx, - &conv_params, - &quant_params, - &input_dims, - input_data, - &filter_dims, - kernel_data, - &bias_dims, - bias_data, - &output_dims, - output); - - if (ctx.buf) - { - memset(ctx.buf, 0, buf_size); - free(ctx.buf); - } - TEST_ASSERT_EQUAL(ARM_CMSIS_NN_SUCCESS, result); - TEST_ASSERT_TRUE(validate_s16(output, output_ref, output_ref_size)); - memset(output, 0, sizeof(output)); - - buf_size = arm_convolve_fast_s16_get_buffer_size(&input_dims, &filter_dims); - ctx.buf = malloc(buf_size); - - result = arm_convolve_fast_s16(&ctx, - &conv_params, - &quant_params, - &input_dims, - input_data, - &filter_dims, - kernel_data, - &bias_dims, - bias_data, - &output_dims, - output); - if (ctx.buf) - { - memset(ctx.buf, 0, buf_size); - free(ctx.buf); - } -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - TEST_ASSERT_EQUAL(ARM_CMSIS_NN_SUCCESS, result); - TEST_ASSERT_TRUE(validate_s16(output, output_ref, output_ref_size)); -#else - TEST_ASSERT_EQUAL(ARM_CMSIS_NN_ARG_ERROR, result); -#endif -} - -void buffer_size_arm_convolve_fast_s16(void) -{ - cmsis_nn_conv_params conv_params; - cmsis_nn_dims input_dims; - cmsis_nn_dims filter_dims; - cmsis_nn_dims output_dims; - - input_dims.n = REQUANTIZE_S64_INPUT_BATCHES; - input_dims.w = REQUANTIZE_S64_INPUT_W; - input_dims.h = REQUANTIZE_S64_INPUT_H; - input_dims.c = REQUANTIZE_S64_IN_CH; - filter_dims.w = REQUANTIZE_S64_FILTER_X; - filter_dims.h = REQUANTIZE_S64_FILTER_Y; - output_dims.w = REQUANTIZE_S64_OUTPUT_W; - output_dims.h = REQUANTIZE_S64_OUTPUT_H; - output_dims.c = REQUANTIZE_S64_OUT_CH; - - conv_params.padding.w = REQUANTIZE_S64_PAD_X; - conv_params.padding.h = REQUANTIZE_S64_PAD_Y; - conv_params.stride.w = REQUANTIZE_S64_STRIDE_X; - conv_params.stride.h = REQUANTIZE_S64_STRIDE_Y; - conv_params.dilation.w = REQUANTIZE_S64_DILATION_X; - conv_params.dilation.h = REQUANTIZE_S64_DILATION_Y; - - conv_params.input_offset = REQUANTIZE_S64_INPUT_OFFSET; - conv_params.output_offset = REQUANTIZE_S64_OUTPUT_OFFSET; - conv_params.activation.min = REQUANTIZE_S64_OUT_ACTIVATION_MIN; - conv_params.activation.max = REQUANTIZE_S64_OUT_ACTIVATION_MAX; - - const int32_t buf_size = arm_convolve_fast_s16_get_buffer_size(&input_dims, &filter_dims); - const int32_t wrapper_buf_size = - arm_convolve_wrapper_s16_get_buffer_size(&conv_params, &input_dims, &filter_dims, &output_dims); - - TEST_ASSERT_EQUAL(wrapper_buf_size, buf_size); -} - -void buffer_size_mve_arm_convolve_fast_s16(void) -{ -#if defined(ARM_MATH_MVEI) - cmsis_nn_conv_params conv_params; - cmsis_nn_dims input_dims; - cmsis_nn_dims filter_dims; - cmsis_nn_dims output_dims; - - input_dims.n = REQUANTIZE_S64_INPUT_BATCHES; - input_dims.w = REQUANTIZE_S64_INPUT_W; - input_dims.h = REQUANTIZE_S64_INPUT_H; - input_dims.c = REQUANTIZE_S64_IN_CH; - filter_dims.w = REQUANTIZE_S64_FILTER_X; - filter_dims.h = REQUANTIZE_S64_FILTER_Y; - output_dims.w = REQUANTIZE_S64_OUTPUT_W; - output_dims.h = REQUANTIZE_S64_OUTPUT_H; - output_dims.c = REQUANTIZE_S64_OUT_CH; - - conv_params.padding.w = REQUANTIZE_S64_PAD_X; - conv_params.padding.h = REQUANTIZE_S64_PAD_Y; - conv_params.stride.w = REQUANTIZE_S64_STRIDE_X; - conv_params.stride.h = REQUANTIZE_S64_STRIDE_Y; - conv_params.dilation.w = REQUANTIZE_S64_DILATION_X; - conv_params.dilation.h = REQUANTIZE_S64_DILATION_Y; - - conv_params.input_offset = REQUANTIZE_S64_INPUT_OFFSET; - conv_params.output_offset = REQUANTIZE_S64_OUTPUT_OFFSET; - conv_params.activation.min = REQUANTIZE_S64_OUT_ACTIVATION_MIN; - conv_params.activation.max = REQUANTIZE_S64_OUT_ACTIVATION_MAX; - - const int32_t wrapper_buf_size = - arm_convolve_wrapper_s16_get_buffer_size(&conv_params, &input_dims, &filter_dims, &output_dims); - const int32_t mve_wrapper_buf_size = - arm_convolve_wrapper_s16_get_buffer_size_mve(&conv_params, &input_dims, &filter_dims, &output_dims); - - TEST_ASSERT_EQUAL(wrapper_buf_size, mve_wrapper_buf_size); -#endif -} - -void buffer_size_dsp_arm_convolve_fast_s16(void) -{ -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - cmsis_nn_conv_params conv_params; - cmsis_nn_dims input_dims; - cmsis_nn_dims filter_dims; - cmsis_nn_dims output_dims; - - input_dims.n = REQUANTIZE_S64_INPUT_BATCHES; - input_dims.w = REQUANTIZE_S64_INPUT_W; - input_dims.h = REQUANTIZE_S64_INPUT_H; - input_dims.c = REQUANTIZE_S64_IN_CH; - filter_dims.w = REQUANTIZE_S64_FILTER_X; - filter_dims.h = REQUANTIZE_S64_FILTER_Y; - output_dims.w = REQUANTIZE_S64_OUTPUT_W; - output_dims.h = REQUANTIZE_S64_OUTPUT_H; - output_dims.c = REQUANTIZE_S64_OUT_CH; - - conv_params.padding.w = REQUANTIZE_S64_PAD_X; - conv_params.padding.h = REQUANTIZE_S64_PAD_Y; - conv_params.stride.w = REQUANTIZE_S64_STRIDE_X; - conv_params.stride.h = REQUANTIZE_S64_STRIDE_Y; - conv_params.dilation.w = REQUANTIZE_S64_DILATION_X; - conv_params.dilation.h = REQUANTIZE_S64_DILATION_Y; - - conv_params.input_offset = REQUANTIZE_S64_INPUT_OFFSET; - conv_params.output_offset = REQUANTIZE_S64_OUTPUT_OFFSET; - conv_params.activation.min = REQUANTIZE_S64_OUT_ACTIVATION_MIN; - conv_params.activation.max = REQUANTIZE_S64_OUT_ACTIVATION_MAX; - - const int32_t wrapper_buf_size = - arm_convolve_wrapper_s16_get_buffer_size(&conv_params, &input_dims, &filter_dims, &output_dims); - const int32_t dsp_wrapper_buf_size = - arm_convolve_wrapper_s16_get_buffer_size_dsp(&conv_params, &input_dims, &filter_dims, &output_dims); - - TEST_ASSERT_EQUAL(wrapper_buf_size, dsp_wrapper_buf_size); -#endif -} diff --git a/Tests/UnitTest/TestCases/test_arm_convolve_s16/Unity/unity_test_arm_convolve_s16.c b/Tests/UnitTest/TestCases/test_arm_convolve_s16/Unity/unity_test_arm_convolve_s16.c index b3df59b7..96232496 100644 --- a/Tests/UnitTest/TestCases/test_arm_convolve_s16/Unity/unity_test_arm_convolve_s16.c +++ b/Tests/UnitTest/TestCases/test_arm_convolve_s16/Unity/unity_test_arm_convolve_s16.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2010-2023 Arm Limited or its affiliates. All rights reserved. + * SPDX-FileCopyrightText: Copyright 2010-2024 Arm Limited and/or its affiliates All rights * * SPDX-License-Identifier: Apache-2.0 * @@ -52,3 +52,5 @@ void test_int16xint8_dilation_3_arm_convolve_s16(void) { int16xint8_dilation_3_a void test_buffer_size_arm_convolve_s16(void) { buffer_size_arm_convolve_s16(); } void test_buffer_size_mve_arm_convolve_s16(void) { buffer_size_mve_arm_convolve_s16(); } void test_buffer_size_dsp_arm_convolve_s16(void) { buffer_size_dsp_arm_convolve_s16(); } +void test_int16xint8_spill_arm_convolve_s16(void) { int16xint8_spill_arm_convolve_s16(); } +void test_int16xint8_spill2_arm_convolve_s16(void) { int16xint8_spill2_arm_convolve_s16(); } diff --git a/Tests/UnitTest/TestCases/test_arm_convolve_s16/test_arm_convolve_s16.c b/Tests/UnitTest/TestCases/test_arm_convolve_s16/test_arm_convolve_s16.c index 00b74342..25194e8b 100644 --- a/Tests/UnitTest/TestCases/test_arm_convolve_s16/test_arm_convolve_s16.c +++ b/Tests/UnitTest/TestCases/test_arm_convolve_s16/test_arm_convolve_s16.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright 2010-2023 Arm Limited and/or its affiliates All rights + * SPDX-FileCopyrightText: Copyright 2010-2024 Arm Limited and/or its affiliates All rights * reserved. * * SPDX-License-Identifier: Apache-2.0 @@ -26,6 +26,8 @@ #include "../TestData/int16xint8_dilation_1/test_data.h" #include "../TestData/int16xint8_dilation_2/test_data.h" #include "../TestData/int16xint8_dilation_3/test_data.h" +#include "../TestData/int16xint8_spill/test_data.h" +#include "../TestData/int16xint8_spill2/test_data.h" #include "../TestData/requantize_s64/test_data.h" #include "../Utils/validate.h" @@ -73,18 +75,18 @@ void int16xint8_arm_convolve_s16(void) int buf_size = arm_convolve_s16_get_buffer_size(&input_dims, &filter_dims); ctx.buf = malloc(buf_size); - - arm_cmsis_nn_status result = arm_convolve_s16(&ctx, - &conv_params, - &quant_params, - &input_dims, - input_data, - &filter_dims, - kernel_data, - &bias_dims, - bias_data, - &output_dims, - output); + arm_cmsis_nn_status result; + result = arm_convolve_s16(&ctx, + &conv_params, + &quant_params, + &input_dims, + input_data, + &filter_dims, + kernel_data, + &bias_dims, + bias_data, + &output_dims, + output); if (ctx.buf) { // The caller is responsible to clear the scratch buffers for security reasons if applicable. @@ -109,7 +111,6 @@ void int16xint8_arm_convolve_s16(void) bias_data, &output_dims, output); - if (ctx.buf) { memset(ctx.buf, 0, buf_size); @@ -588,3 +589,181 @@ void buffer_size_dsp_arm_convolve_s16(void) TEST_ASSERT_EQUAL(wrapper_buf_size, dsp_wrapper_buf_size); #endif } + +void int16xint8_spill_arm_convolve_s16(void) +{ + int16_t output[INT16XINT8_SPILL_DST_SIZE] = {0}; + + cmsis_nn_context ctx; + cmsis_nn_conv_params conv_params; + cmsis_nn_per_channel_quant_params quant_params; + cmsis_nn_dims input_dims; + cmsis_nn_dims filter_dims; + cmsis_nn_dims bias_dims; + cmsis_nn_dims output_dims; + + const int64_t *bias_data = int16xint8_spill_biases; + const int8_t *kernel_data = int16xint8_spill_weights; + const int16_t *input_data = int16xint8_spill_input; + const int16_t *output_ref = int16xint8_spill_output_ref; + const int32_t output_ref_size = INT16XINT8_SPILL_DST_SIZE; + + input_dims.n = INT16XINT8_SPILL_INPUT_BATCHES; + input_dims.w = INT16XINT8_SPILL_INPUT_W; + input_dims.h = INT16XINT8_SPILL_INPUT_H; + input_dims.c = INT16XINT8_SPILL_IN_CH; + filter_dims.w = INT16XINT8_SPILL_FILTER_X; + filter_dims.h = INT16XINT8_SPILL_FILTER_Y; + output_dims.w = INT16XINT8_SPILL_OUTPUT_W; + output_dims.h = INT16XINT8_SPILL_OUTPUT_H; + output_dims.c = INT16XINT8_SPILL_OUT_CH; + + conv_params.padding.w = INT16XINT8_SPILL_PAD_X; + conv_params.padding.h = INT16XINT8_SPILL_PAD_Y; + conv_params.stride.w = INT16XINT8_SPILL_STRIDE_X; + conv_params.stride.h = INT16XINT8_SPILL_STRIDE_Y; + conv_params.dilation.w = INT16XINT8_SPILL_DILATION_X; + conv_params.dilation.h = INT16XINT8_SPILL_DILATION_Y; + + conv_params.input_offset = 0; + conv_params.output_offset = 0; + conv_params.activation.min = INT16XINT8_SPILL_OUT_ACTIVATION_MIN; + conv_params.activation.max = INT16XINT8_SPILL_OUT_ACTIVATION_MAX; + quant_params.multiplier = (int32_t *)int16xint8_spill_output_mult; + quant_params.shift = (int32_t *)int16xint8_spill_output_shift; + + int buf_size = arm_convolve_s16_get_buffer_size(&input_dims, &filter_dims); + ctx.buf = malloc(buf_size); + arm_cmsis_nn_status result; + result = arm_convolve_s16(&ctx, + &conv_params, + &quant_params, + &input_dims, + input_data, + &filter_dims, + kernel_data, + &bias_dims, + bias_data, + &output_dims, + output); + if (ctx.buf) + { + // The caller is responsible to clear the scratch buffers for security reasons if applicable. + memset(ctx.buf, 0, buf_size); + free(ctx.buf); + } + TEST_ASSERT_EQUAL(ARM_CMSIS_NN_SUCCESS, result); + TEST_ASSERT_TRUE(validate_s16(output, output_ref, output_ref_size)); + memset(output, 0, sizeof(output)); + + buf_size = arm_convolve_wrapper_s16_get_buffer_size(&conv_params, &input_dims, &filter_dims, &output_dims); + ctx.buf = malloc(buf_size); + + result = arm_convolve_wrapper_s16(&ctx, + &conv_params, + &quant_params, + &input_dims, + input_data, + &filter_dims, + kernel_data, + &bias_dims, + bias_data, + &output_dims, + output); + if (ctx.buf) + { + memset(ctx.buf, 0, buf_size); + free(ctx.buf); + } + TEST_ASSERT_EQUAL(ARM_CMSIS_NN_SUCCESS, result); + TEST_ASSERT_TRUE(validate_s16(output, output_ref, output_ref_size)); +} + +void int16xint8_spill2_arm_convolve_s16(void) +{ + int16_t output[INT16XINT8_SPILL2_DST_SIZE] = {0}; + + cmsis_nn_context ctx; + cmsis_nn_conv_params conv_params; + cmsis_nn_per_channel_quant_params quant_params; + cmsis_nn_dims input_dims; + cmsis_nn_dims filter_dims; + cmsis_nn_dims bias_dims; + cmsis_nn_dims output_dims; + + const int64_t *bias_data = int16xint8_spill2_biases; + const int8_t *kernel_data = int16xint8_spill2_weights; + const int16_t *input_data = int16xint8_spill2_input; + const int16_t *output_ref = int16xint8_spill2_output_ref; + const int32_t output_ref_size = INT16XINT8_SPILL2_DST_SIZE; + + input_dims.n = INT16XINT8_SPILL2_INPUT_BATCHES; + input_dims.w = INT16XINT8_SPILL2_INPUT_W; + input_dims.h = INT16XINT8_SPILL2_INPUT_H; + input_dims.c = INT16XINT8_SPILL2_IN_CH; + filter_dims.w = INT16XINT8_SPILL2_FILTER_X; + filter_dims.h = INT16XINT8_SPILL2_FILTER_Y; + output_dims.w = INT16XINT8_SPILL2_OUTPUT_W; + output_dims.h = INT16XINT8_SPILL2_OUTPUT_H; + output_dims.c = INT16XINT8_SPILL2_OUT_CH; + + conv_params.padding.w = INT16XINT8_SPILL2_PAD_X; + conv_params.padding.h = INT16XINT8_SPILL2_PAD_Y; + conv_params.stride.w = INT16XINT8_SPILL2_STRIDE_X; + conv_params.stride.h = INT16XINT8_SPILL2_STRIDE_Y; + conv_params.dilation.w = INT16XINT8_SPILL2_DILATION_X; + conv_params.dilation.h = INT16XINT8_SPILL2_DILATION_Y; + + conv_params.input_offset = 0; + conv_params.output_offset = 0; + conv_params.activation.min = INT16XINT8_SPILL2_OUT_ACTIVATION_MIN; + conv_params.activation.max = INT16XINT8_SPILL2_OUT_ACTIVATION_MAX; + quant_params.multiplier = (int32_t *)int16xint8_spill2_output_mult; + quant_params.shift = (int32_t *)int16xint8_spill2_output_shift; + + int buf_size = arm_convolve_s16_get_buffer_size(&input_dims, &filter_dims); + ctx.buf = malloc(buf_size); + arm_cmsis_nn_status result; + result = arm_convolve_s16(&ctx, + &conv_params, + &quant_params, + &input_dims, + input_data, + &filter_dims, + kernel_data, + &bias_dims, + bias_data, + &output_dims, + output); + if (ctx.buf) + { + // The caller is responsible to clear the scratch buffers for security reasons if applicable. + memset(ctx.buf, 0, buf_size); + free(ctx.buf); + } + TEST_ASSERT_EQUAL(ARM_CMSIS_NN_SUCCESS, result); + TEST_ASSERT_TRUE(validate_s16(output, output_ref, output_ref_size)); + memset(output, 0, sizeof(output)); + + buf_size = arm_convolve_wrapper_s16_get_buffer_size(&conv_params, &input_dims, &filter_dims, &output_dims); + ctx.buf = malloc(buf_size); + + result = arm_convolve_wrapper_s16(&ctx, + &conv_params, + &quant_params, + &input_dims, + input_data, + &filter_dims, + kernel_data, + &bias_dims, + bias_data, + &output_dims, + output); + if (ctx.buf) + { + memset(ctx.buf, 0, buf_size); + free(ctx.buf); + } + TEST_ASSERT_EQUAL(ARM_CMSIS_NN_SUCCESS, result); + TEST_ASSERT_TRUE(validate_s16(output, output_ref, output_ref_size)); +} diff --git a/Tests/UnitTest/conv_settings.py b/Tests/UnitTest/conv_settings.py index c18bdd3d..5b7831d7 100644 --- a/Tests/UnitTest/conv_settings.py +++ b/Tests/UnitTest/conv_settings.py @@ -53,7 +53,9 @@ def __init__(self, dilation_x=1, dilation_y=1, interpreter="tensorflow", - int4_weights=False): + int4_weights=False, + weights_min=TestSettings.INT32_MIN, + weights_max=TestSettings.INT32_MAX): super().__init__(dataset, testtype, regenerate_weights, @@ -87,6 +89,9 @@ def __init__(self, self.scaling_factors = [] self.groups = groups + self.weights_min = weights_min + self.weights_max = weights_max + if self.test_type == 'depthwise_conv': self.channel_multiplier = self.output_ch // self.input_ch if self.output_ch % self.input_ch != 0: @@ -311,8 +316,8 @@ def generate_data(self, input_data=None, weights=None, biases=None) -> None: else: weights = self.get_randomized_data(weight_shape, self.kernel_table_file, - minrange=TestSettings.INT32_MIN, - maxrange=TestSettings.INT32_MAX, + minrange=self.weights_min, + maxrange=self.weights_max, decimals=1, regenerate=self.regenerate_new_weights) @@ -327,18 +332,26 @@ def generate_data(self, input_data=None, weights=None, biases=None) -> None: padding=self.padding, input_shape=input_shape[1:], dilation_rate=(self.dilation_y, self.dilation_x), - groups=self.groups) + groups=self.groups, + use_bias=self.generate_bias) model.add(conv_layer) - conv_layer.set_weights([weights, biases]) + if self.generate_bias: + conv_layer.set_weights([weights, biases]) + else: + conv_layer.set_weights([weights]) elif self.test_type == 'depthwise_conv': depthwise_layer = keras.layers.DepthwiseConv2D(kernel_size=(self.filter_y, self.filter_x), strides=(self.stride_y, self.stride_x), padding=self.padding, depth_multiplier=self.channel_multiplier, input_shape=input_shape[1:], - dilation_rate=(self.dilation_y, self.dilation_x)) + dilation_rate=(self.dilation_y, self.dilation_x), + use_bias=self.generate_bias) model.add(depthwise_layer) - depthwise_layer.set_weights([weights, biases]) + if self.generate_bias: + depthwise_layer.set_weights([weights, biases]) + else: + depthwise_layer.set_weights([weights]) elif self.test_type == 'transpose_conv': transposed_conv_layer = keras.layers.Conv2DTranspose(self.output_ch, kernel_size=(self.filter_y, self.filter_x), @@ -371,8 +384,7 @@ def generate_data(self, input_data=None, weights=None, biases=None) -> None: all_layers_details = interpreter.get_tensor_details() filter_layer = all_layers_details[filter_index] - if self.test_type == 'transpose_conv' and not self.generate_bias: - # TODO: real null bias for all operators and not only transpose conv. + if not self.int4_weights and not self.generate_bias: bias_layer = None biases = [] else: diff --git a/Tests/UnitTest/generate_test_data.py b/Tests/UnitTest/generate_test_data.py index 6d8b375c..a51ebe60 100755 --- a/Tests/UnitTest/generate_test_data.py +++ b/Tests/UnitTest/generate_test_data.py @@ -595,21 +595,74 @@ def load_testdata_sets(regenerate_input, regenerate_weights, regenerate_biases, regenerate_input, regenerate_biases, schema_file, - in_ch=3, + in_ch=55, out_ch=4, - x_in=7, + x_in=10, y_in=8, - w_x=2, + w_x=9, w_y=4, - stride_x=2, - stride_y=3, - pad=True, + stride_x=1, + stride_y=1, + pad=False, + generate_bias=False, randmin=TestSettings.INT16_MIN, randmax=TestSettings.INT16_MAX, - out_activation_min=-13335, - out_activation_max=32767, + out_activation_min=TestSettings.INT16_MIN, + out_activation_max=TestSettings.INT16_MAX, int16xint8=True, interpreter=interpreter) + dataset = 'int16xint8_spill' + testdata_sets[dataset] = ConvSettings(dataset, + type_of_test, + regenerate_weights, + regenerate_input, + regenerate_biases, + schema_file, + in_ch=55, + out_ch=9, + x_in=10, + y_in=8, + w_x=9, + w_y=4, + stride_x=1, + stride_y=1, + pad=False, + generate_bias=False, + randmin=TestSettings.INT16_MAX - 100, + randmax=TestSettings.INT16_MAX, + out_activation_min=TestSettings.INT16_MAX - 100, + out_activation_max=TestSettings.INT16_MAX, + bias_min=TestSettings.INT64_MIN, + bias_max=TestSettings.INT64_MAX, + int16xint8=True, + interpreter=interpreter, + weights_min=100) + dataset = 'int16xint8_spill2' + testdata_sets[dataset] = ConvSettings(dataset, + type_of_test, + regenerate_weights, + regenerate_input, + regenerate_biases, + schema_file, + in_ch=12, + out_ch=9, + x_in=10, + y_in=8, + w_x=9, + w_y=4, + stride_x=1, + stride_y=1, + pad=False, + generate_bias=False, + randmin=TestSettings.INT16_MAX - 100, + randmax=TestSettings.INT16_MAX, + out_activation_min=TestSettings.INT16_MAX - 100, + out_activation_max=TestSettings.INT16_MAX, + bias_min=TestSettings.INT64_MIN, + bias_max=TestSettings.INT64_MAX, + int16xint8=True, + interpreter=interpreter, + weights_min=100) dataset = 'requantize_s64' testdata_sets[dataset] = ConvSettings(dataset, type_of_test, @@ -617,20 +670,21 @@ def load_testdata_sets(regenerate_input, regenerate_weights, regenerate_biases, regenerate_input, regenerate_biases, schema_file, - in_ch=2, - out_ch=2, - x_in=3, - y_in=2, + in_ch=8, + out_ch=8, + x_in=4, + y_in=4, w_x=2, w_y=2, stride_x=1, stride_y=1, pad=False, + generate_bias=True, out_activation_min=TestSettings.INT16_MIN, out_activation_max=TestSettings.INT16_MAX, int16xint8=True, bias_min=-0x300, - bias_max=0x9fff, + bias_max=TestSettings.INT32_MAX + 1000, interpreter=interpreter) dataset = 'int16xint8_dilation_1' testdata_sets[dataset] = ConvSettings(dataset,